2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Driver for the Attansic/Atheros F1 10/100/1000 PHY.
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/socket.h>
45 #include <net/if_media.h>
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
51 #include <dev/mii/atphyreg.h>
53 #include "miibus_if.h"
55 static int atphy_probe(device_t);
56 static int atphy_attach(device_t);
58 static device_method_t atphy_methods[] = {
59 /* Device interface. */
60 DEVMETHOD(device_probe, atphy_probe),
61 DEVMETHOD(device_attach, atphy_attach),
62 DEVMETHOD(device_detach, mii_phy_detach),
63 DEVMETHOD(device_shutdown, bus_generic_shutdown),
67 static devclass_t atphy_devclass;
68 static driver_t atphy_driver = {
71 sizeof(struct mii_softc)
74 DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0);
76 static int atphy_service(struct mii_softc *, struct mii_data *, int);
77 static void atphy_status(struct mii_softc *);
78 static void atphy_reset(struct mii_softc *);
79 static uint16_t atphy_anar(struct ifmedia_entry *);
80 static int atphy_setmedia(struct mii_softc *, int);
82 static const struct mii_phydesc atphys[] = {
83 MII_PHY_DESC(xxATHEROS, F1),
84 MII_PHY_DESC(xxATHEROS, F1_7),
85 MII_PHY_DESC(xxATHEROS, AR8021),
86 MII_PHY_DESC(xxATHEROS, F2),
90 static const struct mii_phy_funcs atphy_funcs = {
97 atphy_probe(device_t dev)
100 return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT));
104 atphy_attach(device_t dev)
107 mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &atphy_funcs, 1);
112 atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
114 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
115 uint16_t anar, bmcr, bmsr;
122 if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
123 IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
124 atphy_setmedia(sc, ife->ifm_media);
129 switch (IFM_SUBTYPE(ife->ifm_media)) {
137 bmcr = PHY_READ(sc, MII_BMCR);
140 * Due to an unknown reason powering down PHY resulted
141 * in unexpected results such as inaccessibility of
142 * hardware of freshly rebooted system. Disable
143 * powering down PHY until I got more information for
144 * Attansic/Atheros PHY hardwares.
146 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
152 anar = atphy_anar(ife);
153 if ((ife->ifm_media & IFM_FDX) != 0) {
155 if ((ife->ifm_media & IFM_FLOW) != 0 ||
156 (sc->mii_flags & MIIF_FORCEPAUSE) != 0)
157 anar |= ANAR_PAUSE_TOWARDS;
160 if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
161 EXTSR_1000THDX)) != 0)
162 PHY_WRITE(sc, MII_100T2CR, 0);
163 PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
166 * Reset the PHY so all changes take effect.
168 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET | BMCR_AUTOEN |
175 * Only used for autonegotiation.
177 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
184 * Read the status register twice; BMSR_LINK is latch-low.
186 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
187 if (bmsr & BMSR_LINK) {
192 /* Announce link loss right after it happens. */
193 if (sc->mii_ticks++ == 0)
195 if (sc->mii_ticks <= sc->mii_anegticks)
199 atphy_setmedia(sc, ife->ifm_media);
203 /* Update the media status. */
206 /* Callback if something changed. */
207 mii_phy_update(sc, cmd);
212 atphy_status(struct mii_softc *sc)
214 struct mii_data *mii = sc->mii_pdata;
215 uint32_t bmsr, bmcr, ssr;
217 mii->mii_media_status = IFM_AVALID;
218 mii->mii_media_active = IFM_ETHER;
220 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
221 if ((bmsr & BMSR_LINK) != 0)
222 mii->mii_media_status |= IFM_ACTIVE;
224 bmcr = PHY_READ(sc, MII_BMCR);
225 if ((bmcr & BMCR_ISO) != 0) {
226 mii->mii_media_active |= IFM_NONE;
227 mii->mii_media_status = 0;
231 if ((bmcr & BMCR_LOOP) != 0)
232 mii->mii_media_active |= IFM_LOOP;
234 ssr = PHY_READ(sc, ATPHY_SSR);
235 if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
236 /* Erg, still trying, I guess... */
237 mii->mii_media_active |= IFM_NONE;
241 switch (ssr & ATPHY_SSR_SPEED_MASK) {
242 case ATPHY_SSR_1000MBS:
243 mii->mii_media_active |= IFM_1000_T;
245 * atphy(4) has a valid link so reset mii_ticks.
246 * Resetting mii_ticks is needed in order to
247 * detect link loss after auto-negotiation.
251 case ATPHY_SSR_100MBS:
252 mii->mii_media_active |= IFM_100_TX;
255 case ATPHY_SSR_10MBS:
256 mii->mii_media_active |= IFM_10_T;
260 mii->mii_media_active |= IFM_NONE;
264 if ((ssr & ATPHY_SSR_DUPLEX) != 0)
265 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
267 mii->mii_media_active |= IFM_HDX;
269 if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) &&
270 (PHY_READ(sc, MII_100T2SR) & GTSR_MS_RES) != 0)
271 mii->mii_media_active |= IFM_ETH_MASTER;
275 atphy_reset(struct mii_softc *sc)
277 struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
281 /* Take PHY out of power down mode. */
282 PHY_WRITE(sc, 29, 0x29);
283 PHY_WRITE(sc, 30, 0);
285 reg = PHY_READ(sc, ATPHY_SCR);
286 /* Enable automatic crossover. */
287 reg |= ATPHY_SCR_AUTO_X_MODE;
288 /* Disable power down. */
289 reg &= ~ATPHY_SCR_MAC_PDOWN;
290 /* Enable CRS on Tx. */
291 reg |= ATPHY_SCR_ASSERT_CRS_ON_TX;
292 /* Auto correction for reversed cable polarity. */
293 reg |= ATPHY_SCR_POLARITY_REVERSAL;
294 PHY_WRITE(sc, ATPHY_SCR, reg);
296 /* Workaround F1 bug to reset phy. */
297 atphy_setmedia(sc, ife == NULL ? IFM_AUTO : ife->ifm_media);
299 for (i = 0; i < 1000; i++) {
301 if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
307 atphy_anar(struct ifmedia_entry *ife)
312 switch (IFM_SUBTYPE(ife->ifm_media)) {
314 anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
328 if ((ife->ifm_media & IFM_FDX) != 0) {
329 if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
339 atphy_setmedia(struct mii_softc *sc, int media)
343 anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
344 if ((IFM_SUBTYPE(media) == IFM_AUTO || (media & IFM_FDX) != 0) &&
345 ((media & IFM_FLOW) != 0 ||
346 (sc->mii_flags & MIIF_FORCEPAUSE) != 0))
347 anar |= ANAR_PAUSE_TOWARDS;
348 PHY_WRITE(sc, MII_ANAR, anar);
349 if ((sc->mii_extcapabilities &
350 (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
351 PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
353 else if (sc->mii_mpd_model == MII_MODEL_xxATHEROS_F1) {
355 * AR8132 has 10/100 PHY and the PHY uses the same
356 * model number of F1 gigabit PHY. The PHY has no
357 * ability to establish gigabit link so explicitly
358 * disable 1000baseT configuration for the PHY.
359 * Otherwise, there is a case that atphy(4) could
360 * not establish a link against gigabit link partner
361 * unless the link partner supports down-shifting.
363 PHY_WRITE(sc, MII_100T2CR, 0);
365 PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
367 return (EJUSTRETURN);