3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
36 * Driver for the Broadcom BCR5400 1000baseTX PHY. Speed is always
37 * 1000mbps; all we need to negotiate here is full or half duplex.
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/socket.h>
46 #include <machine/clock.h>
49 #include <net/if_media.h>
51 #include <dev/mii/mii.h>
52 #include <dev/mii/miivar.h>
53 #include <dev/mii/miidevs.h>
55 #include <dev/mii/brgphyreg.h>
57 #include "miibus_if.h"
60 static const char rcsid[] =
64 static int brgphy_probe(device_t);
65 static int brgphy_attach(device_t);
67 static device_method_t brgphy_methods[] = {
68 /* device interface */
69 DEVMETHOD(device_probe, brgphy_probe),
70 DEVMETHOD(device_attach, brgphy_attach),
71 DEVMETHOD(device_detach, mii_phy_detach),
72 DEVMETHOD(device_shutdown, bus_generic_shutdown),
76 static devclass_t brgphy_devclass;
78 static driver_t brgphy_driver = {
81 sizeof(struct mii_softc)
84 DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0);
86 static int brgphy_service(struct mii_softc *, struct mii_data *, int);
87 static void brgphy_status(struct mii_softc *);
88 static int brgphy_mii_phy_auto(struct mii_softc *);
94 struct mii_attach_args *ma;
96 ma = device_get_ivars(dev);
98 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
99 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5400) {
100 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5400);
104 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
105 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5401) {
106 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5401);
110 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
111 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5411) {
112 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5411);
116 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
117 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5701) {
118 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5701);
122 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_xxBROADCOM &&
123 MII_MODEL(ma->mii_id2) == MII_MODEL_xxBROADCOM_BCM5703) {
124 device_set_desc(dev, MII_STR_xxBROADCOM_BCM5703);
135 struct mii_softc *sc;
136 struct mii_attach_args *ma;
137 struct mii_data *mii;
138 const char *sep = "";
140 sc = device_get_softc(dev);
141 ma = device_get_ivars(dev);
142 sc->mii_dev = device_get_parent(dev);
143 mii = device_get_softc(sc->mii_dev);
144 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
146 sc->mii_inst = mii->mii_instance;
147 sc->mii_phy = ma->mii_phyno;
148 sc->mii_service = brgphy_service;
151 sc->mii_flags |= MIIF_NOISOLATE;
154 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
155 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
157 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
160 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
161 BMCR_LOOP|BMCR_S100);
167 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
168 sc->mii_capabilities &= ~BMSR_ANEG;
169 device_printf(dev, " ");
171 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, sc->mii_inst),
173 PRINT(", 1000baseTX");
174 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, IFM_FDX, sc->mii_inst), 0);
175 PRINT("1000baseTX-FDX");
176 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
183 MIIBUS_MEDIAINIT(sc->mii_dev);
188 brgphy_service(sc, mii, cmd)
189 struct mii_softc *sc;
190 struct mii_data *mii;
193 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
199 * If we're not polling our PHY instance, just return.
201 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
207 * If the media indicates a different PHY instance,
210 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
211 reg = PHY_READ(sc, MII_BMCR);
212 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
217 * If the interface is not up, don't do anything.
219 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
222 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
223 BRGPHY_PHY_EXTCTL_HIGH_LA|BRGPHY_PHY_EXTCTL_EN_LTR);
224 PHY_WRITE(sc, BRGPHY_MII_AUXCTL,
225 BRGPHY_AUXCTL_LONG_PKT|BRGPHY_AUXCTL_TX_TST);
226 PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
228 switch (IFM_SUBTYPE(ife->ifm_media)) {
232 * If we're already in auto mode, just return.
234 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN)
237 (void) brgphy_mii_phy_auto(sc);
240 speed = BRGPHY_S1000;
248 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
249 PHY_WRITE(sc, BRGPHY_MII_BMCR,
250 BRGPHY_BMCR_FDX|speed);
252 PHY_WRITE(sc, BRGPHY_MII_BMCR, speed);
254 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE);
256 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
260 * When settning the link manually, one side must
261 * be the master and the other the slave. However
262 * ifmedia doesn't give us a good way to specify
263 * this, so we fake it by using one of the LINK
264 * flags. If LINK0 is set, we program the PHY to
265 * be a master, otherwise it's a slave.
267 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
268 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
269 BRGPHY_1000CTL_MSE|BRGPHY_1000CTL_MSC);
271 PHY_WRITE(sc, BRGPHY_MII_1000CTL,
277 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
288 * If we're not currently selected, just return.
290 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
294 * Is the interface even up?
296 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
300 * Only used for autonegotiation.
302 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
306 * Check to see if we have link. If we do, we don't
307 * need to restart the autonegotiation process. Read
308 * the BMSR twice in case it's latched.
310 reg = PHY_READ(sc, BRGPHY_MII_AUXSTS);
311 if (reg & BRGPHY_AUXSTS_LINK)
315 * Only retry autonegotiation every 5 seconds.
317 if (++sc->mii_ticks != 5)
322 brgphy_mii_phy_auto(sc);
326 /* Update the media status. */
329 /* Callback if something changed. */
330 mii_phy_update(sc, cmd);
336 struct mii_softc *sc;
338 struct mii_data *mii = sc->mii_pdata;
339 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
342 mii->mii_media_status = IFM_AVALID;
343 mii->mii_media_active = IFM_ETHER;
345 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR);
346 if (PHY_READ(sc, BRGPHY_MII_AUXSTS) & BRGPHY_AUXSTS_LINK)
347 mii->mii_media_status |= IFM_ACTIVE;
349 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR);
351 if (bmcr & BRGPHY_BMCR_LOOP)
352 mii->mii_media_active |= IFM_LOOP;
354 if (bmcr & BRGPHY_BMCR_AUTOEN) {
355 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) {
356 /* Erg, still trying, I guess... */
357 mii->mii_media_active |= IFM_NONE;
361 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) &
362 BRGPHY_AUXSTS_AN_RES) {
363 case BRGPHY_RES_1000FD:
364 mii->mii_media_active |= IFM_1000_T | IFM_FDX;
366 case BRGPHY_RES_1000HD:
367 mii->mii_media_active |= IFM_1000_T | IFM_HDX;
369 case BRGPHY_RES_100FD:
370 mii->mii_media_active |= IFM_100_TX | IFM_FDX;
372 case BRGPHY_RES_100T4:
373 mii->mii_media_active |= IFM_100_T4;
375 case BRGPHY_RES_100HD:
376 mii->mii_media_active |= IFM_100_TX | IFM_HDX;
378 case BRGPHY_RES_10FD:
379 mii->mii_media_active |= IFM_10_T | IFM_FDX;
381 case BRGPHY_RES_10HD:
382 mii->mii_media_active |= IFM_10_T | IFM_HDX;
385 mii->mii_media_active |= IFM_NONE;
391 mii->mii_media_active = ife->ifm_media;
398 brgphy_mii_phy_auto(mii)
399 struct mii_softc *mii;
404 PHY_WRITE(mii, BRGPHY_MII_BMCR, 0);
406 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL);
407 PHY_WRITE(mii, BRGPHY_MII_1000CTL, ktcr |
408 BRGPHY_1000CTL_AFD|BRGPHY_1000CTL_AHD);
409 ktcr = PHY_READ(mii, BRGPHY_MII_1000CTL);
411 PHY_WRITE(mii, BRGPHY_MII_ANAR,
412 BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
414 PHY_WRITE(mii, BRGPHY_MII_BMCR,
415 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG);
416 PHY_WRITE(mii, BRGPHY_MII_IMR, 0xFF00);
417 return (EJUSTRETURN);