3 * Bill Paul <wpaul@windriver.com>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
39 * Driver for the Cicada CS8201 10/100/1000 copper PHY.
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/module.h>
46 #include <sys/socket.h>
49 #include <machine/clock.h>
52 #include <net/if_arp.h>
53 #include <net/if_media.h>
55 #include <dev/mii/mii.h>
56 #include <dev/mii/miivar.h>
59 #include <dev/mii/ciphyreg.h>
61 #include "miibus_if.h"
63 #include <machine/bus.h>
65 #include <dev/vge/if_vgereg.h>
67 static int ciphy_probe(device_t);
68 static int ciphy_attach(device_t);
70 static device_method_t ciphy_methods[] = {
71 /* device interface */
72 DEVMETHOD(device_probe, ciphy_probe),
73 DEVMETHOD(device_attach, ciphy_attach),
74 DEVMETHOD(device_detach, mii_phy_detach),
75 DEVMETHOD(device_shutdown, bus_generic_shutdown),
79 static devclass_t ciphy_devclass;
81 static driver_t ciphy_driver = {
84 sizeof(struct mii_softc)
87 DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
89 static int ciphy_service(struct mii_softc *, struct mii_data *, int);
90 static void ciphy_status(struct mii_softc *);
91 static void ciphy_reset(struct mii_softc *);
92 static void ciphy_fixup(struct mii_softc *);
95 ciphy_probe(device_t dev)
97 struct mii_attach_args *ma;
99 ma = device_get_ivars(dev);
101 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
102 MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201) {
103 device_set_desc(dev, MII_STR_CICADA_CS8201);
107 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
108 MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201A) {
109 device_set_desc(dev, MII_STR_CICADA_CS8201A);
113 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
114 MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201B) {
115 device_set_desc(dev, MII_STR_CICADA_CS8201B);
123 ciphy_attach(device_t dev)
125 struct mii_softc *sc;
126 struct mii_attach_args *ma;
127 struct mii_data *mii;
129 sc = device_get_softc(dev);
130 ma = device_get_ivars(dev);
131 sc->mii_dev = device_get_parent(dev);
132 mii = device_get_softc(sc->mii_dev);
133 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
135 sc->mii_inst = mii->mii_instance;
136 sc->mii_phy = ma->mii_phyno;
137 sc->mii_service = ciphy_service;
140 sc->mii_flags |= MIIF_NOISOLATE;
145 sc->mii_capabilities =
146 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
147 if (sc->mii_capabilities & BMSR_EXTSTAT)
148 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
149 device_printf(dev, " ");
150 mii_phy_add_media(sc);
153 MIIBUS_MEDIAINIT(sc->mii_dev);
158 ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
160 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
166 * If we're not polling our PHY instance, just return.
168 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
174 * If the media indicates a different PHY instance,
177 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
178 reg = PHY_READ(sc, MII_BMCR);
179 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
184 * If the interface is not up, don't do anything.
186 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
189 ciphy_fixup(sc); /* XXX hardware bug work-around */
191 switch (IFM_SUBTYPE(ife->ifm_media)) {
195 * If we're already in auto mode, just return.
197 if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
200 (void) mii_phy_auto(sc);
211 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
212 speed |= CIPHY_BMCR_FDX;
213 gig = CIPHY_1000CTL_AFD;
215 gig = CIPHY_1000CTL_AHD;
218 PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
219 PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
220 PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
222 if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
225 PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
226 PHY_WRITE(sc, CIPHY_MII_BMCR,
227 speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
230 * When setting the link manually, one side must
231 * be the master and the other the slave. However
232 * ifmedia doesn't give us a good way to specify
233 * this, so we fake it by using one of the LINK
234 * flags. If LINK0 is set, we program the PHY to
235 * be a master, otherwise it's a slave.
237 if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
238 PHY_WRITE(sc, CIPHY_MII_1000CTL,
239 gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
241 PHY_WRITE(sc, CIPHY_MII_1000CTL,
242 gig|CIPHY_1000CTL_MSE);
246 PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
256 * If we're not currently selected, just return.
258 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
262 * Is the interface even up?
264 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
268 * Only used for autonegotiation.
270 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
274 * Check to see if we have link. If we do, we don't
275 * need to restart the autonegotiation process. Read
276 * the BMSR twice in case it's latched.
278 reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
283 * Only retry autonegotiation every 5 seconds.
285 if (++sc->mii_ticks <= 5/*10*/)
293 /* Update the media status. */
297 * Callback if something changed. Note that we need to poke
298 * apply fixups for certain PHY revs.
300 if (sc->mii_media_active != mii->mii_media_active ||
301 sc->mii_media_status != mii->mii_media_status ||
302 cmd == MII_MEDIACHG) {
305 mii_phy_update(sc, cmd);
310 ciphy_status(struct mii_softc *sc)
312 struct mii_data *mii = sc->mii_pdata;
315 mii->mii_media_status = IFM_AVALID;
316 mii->mii_media_active = IFM_ETHER;
318 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
320 if (bmsr & BMSR_LINK)
321 mii->mii_media_status |= IFM_ACTIVE;
323 bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
325 if (bmcr & CIPHY_BMCR_LOOP)
326 mii->mii_media_active |= IFM_LOOP;
328 if (bmcr & CIPHY_BMCR_AUTOEN) {
329 if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
330 /* Erg, still trying, I guess... */
331 mii->mii_media_active |= IFM_NONE;
336 bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
337 switch (bmsr & CIPHY_AUXCSR_SPEED) {
339 mii->mii_media_active |= IFM_10_T;
342 mii->mii_media_active |= IFM_100_TX;
344 case CIPHY_SPEED1000:
345 mii->mii_media_active |= IFM_1000_T;
348 device_printf(sc->mii_dev, "unknown PHY speed %x\n",
349 bmsr & CIPHY_AUXCSR_SPEED);
353 if (bmsr & CIPHY_AUXCSR_FDX)
354 mii->mii_media_active |= IFM_FDX;
360 ciphy_reset(struct mii_softc *sc)
368 #define PHY_SETBIT(x, y, z) \
369 PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
370 #define PHY_CLRBIT(x, y, z) \
371 PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
374 ciphy_fixup(struct mii_softc *sc)
377 uint16_t status, speed;
379 model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
380 status = PHY_READ(sc, CIPHY_MII_AUXCSR);
381 speed = status & CIPHY_AUXCSR_SPEED;
384 case MII_MODEL_CICADA_CS8201:
386 /* Turn off "aux mode" (whatever that means) */
387 PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
390 * Work around speed polling bug in VT3119/VT3216
391 * when using MII in full duplex mode.
393 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
394 (status & CIPHY_AUXCSR_FDX)) {
395 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
397 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
400 /* Enable link/activity LED blink. */
401 PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
405 case MII_MODEL_CICADA_CS8201A:
406 case MII_MODEL_CICADA_CS8201B:
409 * Work around speed polling bug in VT3119/VT3216
410 * when using MII in full duplex mode.
412 if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
413 (status & CIPHY_AUXCSR_FDX)) {
414 PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
416 PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
421 device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",