2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
36 * Pseudo-driver for internal NWAY support on DEC 21143 and workalike
37 * controllers. Technically we're abusing the miibus code to handle
38 * media selection and NWAY support here since there is no MII
39 * interface. However the logical operations are roughly the same,
40 * and the alternative is to create a fake MII interface in the driver,
41 * which is harder to do.
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/socket.h>
48 #include <sys/errno.h>
50 #include <sys/module.h>
51 #include <sys/mutex.h>
55 #include <net/if_arp.h>
56 #include <net/if_media.h>
58 #include <dev/mii/mii.h>
59 #include <dev/mii/miivar.h>
60 #include <dev/mii/miidevs.h>
62 #include <machine/bus_pio.h>
63 #include <machine/bus_memio.h>
64 #include <machine/bus.h>
65 #include <machine/resource.h>
68 #include <pci/pcivar.h>
70 #include <pci/if_dcreg.h>
72 #include "miibus_if.h"
75 static const char rcsid[] =
79 #define DC_SETBIT(sc, reg, x) \
80 CSR_WRITE_4(sc, reg, \
81 CSR_READ_4(sc, reg) | x)
83 #define DC_CLRBIT(sc, reg, x) \
84 CSR_WRITE_4(sc, reg, \
85 CSR_READ_4(sc, reg) & ~x)
87 #define MIIF_AUTOTIMEOUT 0x0004
90 * This is the subsystem ID for the built-in 21143 ethernet
91 * in several Compaq Presario systems. Apparently these are
92 * 10Mbps only, so we need to treat them specially.
94 #define COMPAQ_PRESARIO_ID 0xb0bb0e11
96 static int dcphy_probe(device_t);
97 static int dcphy_attach(device_t);
99 static device_method_t dcphy_methods[] = {
100 /* device interface */
101 DEVMETHOD(device_probe, dcphy_probe),
102 DEVMETHOD(device_attach, dcphy_attach),
103 DEVMETHOD(device_detach, mii_phy_detach),
104 DEVMETHOD(device_shutdown, bus_generic_shutdown),
108 static devclass_t dcphy_devclass;
110 static driver_t dcphy_driver = {
113 sizeof(struct mii_softc)
116 DRIVER_MODULE(dcphy, miibus, dcphy_driver, dcphy_devclass, 0, 0);
118 static int dcphy_service(struct mii_softc *, struct mii_data *, int);
119 static void dcphy_status(struct mii_softc *);
120 static void dcphy_reset(struct mii_softc *);
121 static int dcphy_auto(struct mii_softc *);
127 struct mii_attach_args *ma;
129 ma = device_get_ivars(dev);
132 * The dc driver will report the 21143 vendor and device
133 * ID to let us know that it wants us to attach.
135 if (ma->mii_id1 != DC_VENDORID_DEC ||
136 ma->mii_id2 != DC_DEVICEID_21143)
139 device_set_desc(dev, "Intel 21143 NWAY media interface");
148 struct mii_softc *sc;
149 struct mii_attach_args *ma;
150 struct mii_data *mii;
151 struct dc_softc *dc_sc;
153 sc = device_get_softc(dev);
154 ma = device_get_ivars(dev);
155 sc->mii_dev = device_get_parent(dev);
156 mii = device_get_softc(sc->mii_dev);
157 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
159 sc->mii_inst = mii->mii_instance;
160 sc->mii_phy = ma->mii_phyno;
161 sc->mii_service = dcphy_service;
164 sc->mii_flags |= MIIF_NOISOLATE;
167 #define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
169 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
173 dc_sc = mii->mii_ifp->if_softc;
174 CSR_WRITE_4(dc_sc, DC_10BTSTAT, 0);
175 CSR_WRITE_4(dc_sc, DC_10BTCTRL, 0);
177 switch(pci_read_config(device_get_parent(sc->mii_dev),
179 case COMPAQ_PRESARIO_ID:
180 /* Example of how to only allow 10Mbps modes. */
181 sc->mii_capabilities = BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
184 if (dc_sc->dc_pmode == DC_PMODE_SIA) {
185 sc->mii_capabilities =
186 BMSR_ANEG|BMSR_10TFDX|BMSR_10THDX;
188 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
189 sc->mii_inst), BMCR_LOOP|BMCR_S100);
191 sc->mii_capabilities =
192 BMSR_ANEG|BMSR_100TXFDX|BMSR_100TXHDX|
193 BMSR_10TFDX|BMSR_10THDX;
198 sc->mii_capabilities &= ma->mii_capmask;
199 device_printf(dev, " ");
204 MIIBUS_MEDIAINIT(sc->mii_dev);
209 dcphy_service(sc, mii, cmd)
210 struct mii_softc *sc;
211 struct mii_data *mii;
214 struct dc_softc *dc_sc;
215 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
219 dc_sc = mii->mii_ifp->if_softc;
224 * If we're not polling our PHY instance, just return.
226 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
233 * If the media indicates a different PHY instance,
236 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
241 * If the interface is not up, don't do anything.
243 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
247 mii->mii_media_active = IFM_NONE;
248 mode = CSR_READ_4(dc_sc, DC_NETCFG);
249 mode &= ~(DC_NETCFG_FULLDUPLEX|DC_NETCFG_PORTSEL|
250 DC_NETCFG_PCS|DC_NETCFG_SCRAMBLER|DC_NETCFG_SPEEDSEL);
252 switch (IFM_SUBTYPE(ife->ifm_media)) {
255 (void) dcphy_auto(sc);
259 * XXX Not supported as a manual setting right now.
264 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
265 mode |= DC_NETCFG_PORTSEL|DC_NETCFG_PCS|
267 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
268 mode |= DC_NETCFG_FULLDUPLEX;
270 mode &= ~DC_NETCFG_FULLDUPLEX;
271 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
274 DC_CLRBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
275 DC_CLRBIT(dc_sc, DC_10BTCTRL, 0xFFFF);
276 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
277 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3D);
279 DC_SETBIT(dc_sc, DC_10BTCTRL, 0x7F3F);
280 DC_SETBIT(dc_sc, DC_SIARESET, DC_SIA_RESET);
281 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
282 mode &= ~DC_NETCFG_PORTSEL;
283 mode |= DC_NETCFG_SPEEDSEL;
284 if ((ife->ifm_media & IFM_GMASK) == IFM_FDX)
285 mode |= DC_NETCFG_FULLDUPLEX;
287 mode &= ~DC_NETCFG_FULLDUPLEX;
288 CSR_WRITE_4(dc_sc, DC_NETCFG, mode);
298 * If we're not currently selected, just return.
300 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
304 * Is the interface even up?
306 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
310 * Only used for autonegotiation.
312 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
315 reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
316 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
320 * Only retry autonegotiation every 5 seconds.
322 * Otherwise, fall through to calling dcphy_status()
323 * since real Intel 21143 chips don't show valid link
324 * status until autonegotiation is switched off, and
325 * that only happens in dcphy_status(). Without this,
326 * successful autonegotation is never recognised on
329 if (++sc->mii_ticks != 50)
338 /* Update the media status. */
341 /* Callback if something changed. */
342 mii_phy_update(sc, cmd);
348 struct mii_softc *sc;
350 struct mii_data *mii = sc->mii_pdata;
351 int reg, anlpar, tstat = 0;
352 struct dc_softc *dc_sc;
354 dc_sc = mii->mii_ifp->if_softc;
356 mii->mii_media_status = IFM_AVALID;
357 mii->mii_media_active = IFM_ETHER;
359 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
362 reg = CSR_READ_4(dc_sc, DC_10BTSTAT);
363 if (!(reg & DC_TSTAT_LS10) || !(reg & DC_TSTAT_LS100))
364 mii->mii_media_status |= IFM_ACTIVE;
366 if (CSR_READ_4(dc_sc, DC_10BTCTRL) & DC_TCTL_AUTONEGENBL) {
367 /* Erg, still trying, I guess... */
368 tstat = CSR_READ_4(dc_sc, DC_10BTSTAT);
369 if ((tstat & DC_TSTAT_ANEGSTAT) != DC_ASTAT_AUTONEGCMP) {
370 if ((DC_IS_MACRONIX(dc_sc) || DC_IS_PNICII(dc_sc)) &&
371 (tstat & DC_TSTAT_ANEGSTAT) == DC_ASTAT_DISABLE)
373 mii->mii_media_active |= IFM_NONE;
377 if (tstat & DC_TSTAT_LP_CAN_NWAY) {
378 anlpar = tstat >> 16;
379 if (anlpar & ANLPAR_T4 &&
380 sc->mii_capabilities & BMSR_100TXHDX)
381 mii->mii_media_active |= IFM_100_T4;
382 else if (anlpar & ANLPAR_TX_FD &&
383 sc->mii_capabilities & BMSR_100TXFDX)
384 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
385 else if (anlpar & ANLPAR_TX &&
386 sc->mii_capabilities & BMSR_100TXHDX)
387 mii->mii_media_active |= IFM_100_TX;
388 else if (anlpar & ANLPAR_10_FD)
389 mii->mii_media_active |= IFM_10_T|IFM_FDX;
390 else if (anlpar & ANLPAR_10)
391 mii->mii_media_active |= IFM_10_T;
393 mii->mii_media_active |= IFM_NONE;
394 if (DC_IS_INTEL(dc_sc))
395 DC_CLRBIT(dc_sc, DC_10BTCTRL,
396 DC_TCTL_AUTONEGENBL);
400 * If the other side doesn't support NWAY, then the
401 * best we can do is determine if we have a 10Mbps or
402 * 100Mbps link. There's no way to know if the link
403 * is full or half duplex, so we default to half duplex
404 * and hope that the user is clever enough to manually
405 * change the media settings if we're wrong.
407 if (!(reg & DC_TSTAT_LS100))
408 mii->mii_media_active |= IFM_100_TX;
409 else if (!(reg & DC_TSTAT_LS10))
410 mii->mii_media_active |= IFM_10_T;
412 mii->mii_media_active |= IFM_NONE;
413 if (DC_IS_INTEL(dc_sc))
414 DC_CLRBIT(dc_sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
420 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_SPEEDSEL)
421 mii->mii_media_active |= IFM_10_T;
423 mii->mii_media_active |= IFM_100_TX;
424 if (CSR_READ_4(dc_sc, DC_NETCFG) & DC_NETCFG_FULLDUPLEX)
425 mii->mii_media_active |= IFM_FDX;
432 struct mii_softc *mii;
436 sc = mii->mii_pdata->mii_ifp->if_softc;
438 DC_CLRBIT(sc, DC_NETCFG, DC_NETCFG_PORTSEL);
439 DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
440 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
441 if (mii->mii_capabilities & BMSR_100TXHDX)
442 CSR_WRITE_4(sc, DC_10BTCTRL, 0x3FFFF);
444 CSR_WRITE_4(sc, DC_10BTCTRL, 0xFFFF);
445 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);
446 DC_SETBIT(sc, DC_10BTCTRL, DC_TCTL_AUTONEGENBL);
447 DC_SETBIT(sc, DC_10BTSTAT, DC_ASTAT_TXDISABLE);
454 struct mii_softc *mii;
458 sc = mii->mii_pdata->mii_ifp->if_softc;
460 DC_CLRBIT(sc, DC_SIARESET, DC_SIA_RESET);
462 DC_SETBIT(sc, DC_SIARESET, DC_SIA_RESET);