2 * Copyright (c) 2001 Wind River Systems
4 * Bill Paul <wpaul@bsdi.com>. All rights reserved.
5 * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by Bill Paul.
23 * 4. Neither the name of the author nor the names of any co-contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
37 * THE POSSIBILITY OF SUCH DAMAGE.
43 * Driver for the National Semiconductor DP83891 and DP83861
45 * Datasheet available at: http://www.national.com/ds/DP/DP83861.pdf
47 * The DP83891 is the older NatSemi gigE PHY which isn't being sold
48 * anymore. The DP83861 is its replacement, which is an 'enhanced'
49 * firmware driven component. The major difference between the
50 * two is that the 83891 can't generate interrupts, while the
51 * 83861 can. (I think it wasn't originally designed to do this, but
52 * it can now thanks to firmware updates.) The 83861 also allows
53 * access to its internal RAM via indirect register access.
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/kernel.h>
59 #include <sys/socket.h>
62 #include <machine/clock.h>
65 #include <net/if_media.h>
67 #include <dev/mii/mii.h>
68 #include <dev/mii/miivar.h>
69 #include <dev/mii/miidevs.h>
71 #include <dev/mii/nsgphyreg.h>
73 #include "miibus_if.h"
76 static const char rcsid[] =
80 static int nsgphy_probe(device_t);
81 static int nsgphy_attach(device_t);
83 static device_method_t nsgphy_methods[] = {
84 /* device interface */
85 DEVMETHOD(device_probe, nsgphy_probe),
86 DEVMETHOD(device_attach, nsgphy_attach),
87 DEVMETHOD(device_detach, mii_phy_detach),
88 DEVMETHOD(device_shutdown, bus_generic_shutdown),
92 static devclass_t nsgphy_devclass;
94 static driver_t nsgphy_driver = {
97 sizeof(struct mii_softc)
101 DRIVER_MODULE(nsgphy, miibus, nsgphy_driver, nsgphy_devclass, 0, 0);
103 static int nsgphy_service(struct mii_softc *, struct mii_data *,int);
104 static void nsgphy_status(struct mii_softc *);
106 const struct mii_phydesc gphyters[] = {
107 { MII_OUI_NATSEMI, MII_MODEL_NATSEMI_DP83861,
108 MII_STR_NATSEMI_DP83861 },
110 { MII_OUI_NATSEMI, MII_MODEL_NATSEMI_DP83891,
111 MII_STR_NATSEMI_DP83891 },
118 nsgphy_probe(device_t dev)
120 struct mii_attach_args *ma;
121 const struct mii_phydesc *mpd;
123 ma = device_get_ivars(dev);
124 mpd = mii_phy_match(ma, gphyters);
126 device_set_desc(dev, mpd->mpd_name);
134 nsgphy_attach(device_t dev)
136 struct mii_softc *sc;
137 struct mii_attach_args *ma;
138 struct mii_data *mii;
139 const struct mii_phydesc *mpd;
141 sc = device_get_softc(dev);
142 ma = device_get_ivars(dev);
143 mpd = mii_phy_match(ma, gphyters);
145 device_printf(dev, "<rev. %d>\n", MII_REV(ma->mii_id2));
146 device_printf(dev, " ");
147 sc->mii_dev = device_get_parent(dev);
148 mii = device_get_softc(sc->mii_dev);
149 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
151 sc->mii_inst = mii->mii_instance;
152 sc->mii_phy = ma->mii_phyno;
153 sc->mii_service = nsgphy_service;
155 sc->mii_anegticks = 5;
159 sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) |
160 (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
161 if (sc->mii_capabilities & BMSR_EXTSTAT)
162 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
164 mii_phy_add_media(sc);
167 MIIBUS_MEDIAINIT(sc->mii_dev);
172 nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
174 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
180 * If we're not polling our PHY instance, just return.
182 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
188 * If the media indicates a different PHY instance,
191 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
192 reg = PHY_READ(sc, MII_BMCR);
193 PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
198 * If the interface is not up, don't do anything.
200 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
203 mii_phy_setmedia(sc);
208 * If we're not currently selected, just return.
210 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
213 if (mii_phy_tick(sc) == EJUSTRETURN)
218 /* Update the media status. */
221 /* Callback if something changed. */
222 mii_phy_update(sc, cmd);
227 nsgphy_status(struct mii_softc *sc)
229 struct mii_data *mii = sc->mii_pdata;
230 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
231 int bmsr, bmcr, physup, gtsr;
233 mii->mii_media_status = IFM_AVALID;
234 mii->mii_media_active = IFM_ETHER;
236 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
238 physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
240 if (physup & PHY_SUP_LINK)
241 mii->mii_media_status |= IFM_ACTIVE;
243 bmcr = PHY_READ(sc, MII_BMCR);
244 if (bmcr & BMCR_ISO) {
245 mii->mii_media_active |= IFM_NONE;
246 mii->mii_media_status = 0;
250 if (bmcr & BMCR_LOOP)
251 mii->mii_media_active |= IFM_LOOP;
253 if (bmcr & BMCR_AUTOEN) {
255 * The media status bits are only valid if autonegotiation
256 * has completed (or it's disabled).
258 if ((bmsr & BMSR_ACOMP) == 0) {
259 /* Erg, still trying, I guess... */
260 mii->mii_media_active |= IFM_NONE;
264 switch (physup & (PHY_SUP_SPEED1|PHY_SUP_SPEED0)) {
266 mii->mii_media_active |= IFM_1000_T;
267 gtsr = PHY_READ(sc, MII_100T2SR);
268 if (gtsr & GTSR_MS_RES)
269 mii->mii_media_active |= IFM_ETH_MASTER;
273 mii->mii_media_active |= IFM_100_TX;
277 mii->mii_media_active |= IFM_10_T;
281 mii->mii_media_active |= IFM_NONE;
282 mii->mii_media_status = 0;
284 if (physup & PHY_SUP_DUPLEX)
285 mii->mii_media_active |= IFM_FDX;
287 mii->mii_media_active = ife->ifm_media;