1 /* $NetBSD: tlphyreg.h,v 1.1 1998/08/10 23:59:58 thorpej Exp $ */
4 * SPDX-License-Identifier: BSD-2-Clause-NetBSD
6 * Copyright (c) 1997 Manuel Bouyer. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 #ifndef _DEV_MII_TLPHYREG_H_
32 #define _DEV_MII_TLPHYREG_H_
35 * Registers for the TI ThunderLAN internal PHY.
38 #define MII_TLPHY_ID 0x10 /* ThunderLAN PHY ID */
39 #define ID_10BASETAUI 0x0001 /* 10baseT/AUI PHY */
41 #define MII_TLPHY_CTRL 0x11 /* Control regiseter */
42 #define CTRL_ILINK 0x8000 /* Ignore link */
43 #define CTRL_SWPOL 0x4000 /* swap polarity */
44 #define CTRL_AUISEL 0x2000 /* Select AUI */
45 #define CTRL_SQEEN 0x1000 /* Enable SQE */
46 #define CTRL_NFEW 0x0004 /* Not far end wrap */
47 #define CTRL_INTEN 0x0002 /* Interrupts enable */
48 #define CTRL_TINT 0x0001 /* Test Interrupts */
50 #define MII_TLPHY_ST 0x12 /* Status register */
51 #define ST_MII_INT 0x8000 /* MII interrupt */
52 #define ST_PHOK 0x4000 /* Power high OK */
53 #define ST_POLOK 0x2000 /* Polarity OK */
54 #define ST_TPE 0x1000 /* Twisted pair energy */
56 #endif /* _DEV_MII_TLPHYREG_H_ */