2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
6 * This code is derived from software contributed to The DragonFly Project
7 * by Sepherosa Ziehau <sepherosa@gmail.com>
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
19 * 3. Neither the name of The DragonFly Project nor the names of its
20 * contributors may be used to endorse or promote products derived
21 * from this software without specific, prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
26 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
27 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
29 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
31 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.3 2008/02/10 07:29:27 sephe Exp $
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/socket.h>
44 #include <sys/errno.h>
45 #include <sys/module.h>
49 #include <net/if_var.h>
50 #include <net/if_media.h>
51 #include <net/if_arp.h>
52 #include <net/ethernet.h>
53 #include <net/if_vlan_var.h>
55 #include <dev/mii/mii.h>
56 #include <dev/mii/miivar.h>
59 #include <dev/mii/truephyreg.h>
61 #include "miibus_if.h"
63 #define TRUEPHY_FRAMELEN(mtu) \
64 (ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN + (mtu) + ETHER_CRC_LEN)
66 static int truephy_service(struct mii_softc *, struct mii_data *, int);
67 static int truephy_attach(device_t);
68 static int truephy_probe(device_t);
69 static void truephy_reset(struct mii_softc *);
70 static void truephy_status(struct mii_softc *);
72 static device_method_t truephy_methods[] = {
73 /* device interface */
74 DEVMETHOD(device_probe, truephy_probe),
75 DEVMETHOD(device_attach, truephy_attach),
76 DEVMETHOD(device_detach, mii_phy_detach),
77 DEVMETHOD(device_shutdown, bus_generic_shutdown),
81 static const struct mii_phydesc truephys[] = {
82 MII_PHY_DESC(AGERE, ET1011),
83 MII_PHY_DESC(AGERE, ET1011C),
87 static devclass_t truephy_devclass;
89 static driver_t truephy_driver = {
92 sizeof(struct mii_softc)
95 DRIVER_MODULE(truephy, miibus, truephy_driver, truephy_devclass, 0, 0);
97 static const struct mii_phy_funcs truephy_funcs = {
103 static const struct truephy_dsp {
106 } truephy_dspcode[] = {
107 { 0x880b, 0x0926 }, /* AfeIfCreg4B1000Msbs */
108 { 0x880c, 0x0926 }, /* AfeIfCreg4B100Msbs */
109 { 0x880d, 0x0926 }, /* AfeIfCreg4B10Msbs */
111 { 0x880e, 0xb4d3 }, /* AfeIfCreg4B1000Lsbs */
112 { 0x880f, 0xb4d3 }, /* AfeIfCreg4B100Lsbs */
113 { 0x8810, 0xb4d3 }, /* AfeIfCreg4B10Lsbs */
115 { 0x8805, 0xb03e }, /* AfeIfCreg3B1000Msbs */
116 { 0x8806, 0xb03e }, /* AfeIfCreg3B100Msbs */
117 { 0x8807, 0xff00 }, /* AfeIfCreg3B10Msbs */
119 { 0x8808, 0xe090 }, /* AfeIfCreg3B1000Lsbs */
120 { 0x8809, 0xe110 }, /* AfeIfCreg3B100Lsbs */
121 { 0x880a, 0x0000 }, /* AfeIfCreg3B10Lsbs */
123 { 0x300d, 1 }, /* DisableNorm */
125 { 0x280c, 0x0180 }, /* LinkHoldEnd */
127 { 0x1c21, 0x0002 }, /* AlphaM */
129 { 0x3821, 6 }, /* FfeLkgTx0 */
130 { 0x381d, 1 }, /* FfeLkg1g4 */
131 { 0x381e, 1 }, /* FfeLkg1g5 */
132 { 0x381f, 1 }, /* FfeLkg1g6 */
133 { 0x3820, 1 }, /* FfeLkg1g7 */
135 { 0x8402, 0x01f0 }, /* Btinact */
136 { 0x800e, 20 }, /* LftrainTime */
137 { 0x800f, 24 }, /* DvguardTime */
138 { 0x8010, 46 } /* IdlguardTime */
142 truephy_probe(device_t dev)
145 return (mii_phy_dev_probe(dev, truephys, BUS_PROBE_DEFAULT));
149 truephy_attach(device_t dev)
151 struct mii_softc *sc;
153 sc = device_get_softc(dev);
155 mii_phy_dev_attach(dev, MIIF_NOISOLATE | MIIF_NOMANPAUSE,
160 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask;
161 if (sc->mii_capabilities & BMSR_EXTSTAT) {
162 sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
163 /* No 1000baseT half-duplex support */
164 sc->mii_extcapabilities &= ~EXTSR_1000THDX;
167 device_printf(dev, " ");
168 mii_phy_add_media(sc);
171 MIIBUS_MEDIAINIT(sc->mii_dev);
176 truephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
178 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
186 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
187 bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_AUTOEN;
188 PHY_WRITE(sc, MII_BMCR, bmcr);
189 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
192 mii_phy_setmedia(sc);
194 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
195 bmcr = PHY_READ(sc, MII_BMCR) & ~BMCR_PDOWN;
196 PHY_WRITE(sc, MII_BMCR, bmcr);
198 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
199 PHY_WRITE(sc, MII_BMCR,
200 bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
206 if (mii_phy_tick(sc) == EJUSTRETURN)
211 /* Update the media status. */
214 /* Callback if something changed. */
215 mii_phy_update(sc, cmd);
220 truephy_reset(struct mii_softc *sc)
224 if (sc->mii_mpd_model == MII_MODEL_AGERE_ET1011) {
229 for (i = 0; i < 2; ++i) {
230 PHY_READ(sc, MII_PHYIDR1);
231 PHY_READ(sc, MII_PHYIDR2);
233 PHY_READ(sc, TRUEPHY_CTRL);
234 PHY_WRITE(sc, TRUEPHY_CTRL,
235 TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1);
237 PHY_WRITE(sc, TRUEPHY_INDEX, TRUEPHY_INDEX_MAGIC);
238 PHY_READ(sc, TRUEPHY_DATA);
240 PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
243 PHY_READ(sc, MII_BMCR);
244 PHY_READ(sc, TRUEPHY_CTRL);
245 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
246 PHY_WRITE(sc, TRUEPHY_CTRL,
247 TRUEPHY_CTRL_DIAG | TRUEPHY_CTRL_RSV1 | TRUEPHY_CTRL_RSV0);
249 for (i = 0; i < nitems(truephy_dspcode); ++i) {
250 const struct truephy_dsp *dsp = &truephy_dspcode[i];
252 PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
253 PHY_WRITE(sc, TRUEPHY_DATA, dsp->data);
255 PHY_WRITE(sc, TRUEPHY_INDEX, dsp->index);
256 PHY_READ(sc, TRUEPHY_DATA);
259 PHY_READ(sc, MII_BMCR);
260 PHY_READ(sc, TRUEPHY_CTRL);
261 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
262 PHY_WRITE(sc, TRUEPHY_CTRL, TRUEPHY_CTRL_RSV1);
266 if (TRUEPHY_FRAMELEN((if_getmtu(sc->mii_pdata->mii_ifp)) > 2048)) {
269 conf = PHY_READ(sc, TRUEPHY_CONF);
270 conf &= ~TRUEPHY_CONF_TXFIFO_MASK;
271 conf |= TRUEPHY_CONF_TXFIFO_24;
272 PHY_WRITE(sc, TRUEPHY_CONF, conf);
277 truephy_status(struct mii_softc *sc)
279 struct mii_data *mii = sc->mii_pdata;
282 mii->mii_media_status = IFM_AVALID;
283 mii->mii_media_active = IFM_ETHER;
285 sr = PHY_READ(sc, TRUEPHY_SR);
286 bmcr = PHY_READ(sc, MII_BMCR);
288 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
289 if (bmsr & BMSR_LINK)
290 mii->mii_media_status |= IFM_ACTIVE;
292 if (bmcr & BMCR_AUTOEN) {
293 if ((bmsr & BMSR_ACOMP) == 0) {
294 mii->mii_media_active |= IFM_NONE;
299 switch (sr & TRUEPHY_SR_SPD_MASK) {
300 case TRUEPHY_SR_SPD_1000T:
301 mii->mii_media_active |= IFM_1000_T;
303 case TRUEPHY_SR_SPD_100TX:
304 mii->mii_media_active |= IFM_100_TX;
306 case TRUEPHY_SR_SPD_10T:
307 mii->mii_media_active |= IFM_10_T;
310 /* XXX will this ever happen? */
311 printf("invalid media SR %#x\n", sr);
312 mii->mii_media_active |= IFM_NONE;
316 if (sr & TRUEPHY_SR_FDX)
317 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
319 mii->mii_media_active |= IFM_HDX;