2 * Copyright (c) 2017 Ian Lepore <ian@freebsd.org>
5 * Development sponsored by Microsemi, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
33 * Microsemi / Vitesse VSC8501 (and similar).
36 #include "opt_platform.h"
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/socket.h>
42 #include <sys/errno.h>
43 #include <sys/module.h>
45 #include <sys/malloc.h>
48 #include <net/if_media.h>
50 #include <dev/mii/mii.h>
51 #include <dev/mii/miivar.h>
53 #include "miibus_if.h"
56 #include <dev/ofw/openfirm.h>
57 #include <dev/ofw/ofw_bus.h>
58 #include <dev/ofw/ofw_bus_subr.h>
59 #include <dev/mii/mii_fdt.h>
63 #define VSC8501_EXTPAGE_REG 0x001f
65 #define VSC8501_EXTCTL1_REG 0x0017
66 #define VSC8501_EXTCTL1_RGMII_MODE (1u << 12)
68 #define VSC8501_RGMII_CTRL_PAGE 0x02
69 #define VSC8501_RGMII_CTRL_REG 0x14
70 #define VSC8501_RGMII_DELAY_MASK 0x07
71 #define VSC8501_RGMII_DELAY_TXSHIFT 0
72 #define VSC8501_RGMII_DELAY_RXSHIFT 4
73 #define VSC8501_RGMII_RXCLOCK_DISABLE (1u << 11)
74 #define VSC8501_RGMII_RXSWAP (1u << 7)
75 #define VSC8501_RGMII_TXSWAP (1u << 3)
76 #define VSC8501_RGMII_LANESWAP (VSC8501_RGMII_RXSWAP | \
82 mii_contype_t contype;
88 static void vscphy_reset(struct mii_softc *);
89 static int vscphy_service(struct mii_softc *, struct mii_data *, int);
91 static const struct mii_phydesc vscphys[] = {
92 MII_PHY_DESC(xxVITESSE, VSC8501),
96 static const struct mii_phy_funcs vscphy_funcs = {
104 vscphy_fdt_get_config(struct vscphy_softc *vsc)
106 mii_fdt_phy_config_t *cfg;
109 cfg = mii_fdt_get_config(vsc->dev);
110 vsc->contype = cfg->con_type;
111 vsc->laneswap = (cfg->flags & MIIF_FDT_LANE_SWAP) &&
112 !(cfg->flags & MIIF_FDT_NO_LANE_SWAP);
113 if (OF_getencprop(cfg->phynode, "rx-delay", &val, sizeof(val)) > 0)
115 if (OF_getencprop(cfg->phynode, "tx-delay", &val, sizeof(val)) > 0)
117 mii_fdt_free_config(cfg);
122 vscphy_read(struct vscphy_softc *sc, u_int reg)
126 val = PHY_READ(&sc->mii_sc, reg);
131 vscphy_write(struct vscphy_softc *sc, u_int reg, u_int val)
134 PHY_WRITE(&sc->mii_sc, reg, val);
138 vsc8501_setup_rgmii(struct vscphy_softc *vsc)
142 vscphy_write(vsc, VSC8501_EXTPAGE_REG, VSC8501_RGMII_CTRL_PAGE);
144 reg = vscphy_read(vsc, VSC8501_RGMII_CTRL_REG);
145 reg &= ~VSC8501_RGMII_RXCLOCK_DISABLE;
146 reg &= ~VSC8501_RGMII_LANESWAP;
147 reg &= ~(VSC8501_RGMII_DELAY_MASK << VSC8501_RGMII_DELAY_TXSHIFT);
148 reg &= ~(VSC8501_RGMII_DELAY_MASK << VSC8501_RGMII_DELAY_RXSHIFT);
150 reg |= VSC8501_RGMII_LANESWAP;
151 if (vsc->contype == MII_CONTYPE_RGMII_ID ||
152 vsc->contype == MII_CONTYPE_RGMII_TXID) {
153 reg |= vsc->txdelay << VSC8501_RGMII_DELAY_TXSHIFT;
155 if (vsc->contype == MII_CONTYPE_RGMII_ID ||
156 vsc->contype == MII_CONTYPE_RGMII_RXID) {
157 reg |= vsc->rxdelay << VSC8501_RGMII_DELAY_RXSHIFT;
159 vscphy_write(vsc, VSC8501_RGMII_CTRL_REG, reg);
161 vscphy_write(vsc, VSC8501_EXTPAGE_REG, 0);
165 vsc8501_reset(struct vscphy_softc *vsc)
170 * Must set whether the mac<->phy connection is RGMII first; changes to
171 * that bit take effect only after a softreset.
173 reg = vscphy_read(vsc, VSC8501_EXTCTL1_REG);
174 if (mii_contype_is_rgmii(vsc->contype))
175 reg |= VSC8501_EXTCTL1_RGMII_MODE;
177 reg &= ~VSC8501_EXTCTL1_RGMII_MODE;
178 vscphy_write(vsc, VSC8501_EXTCTL1_REG, reg);
180 mii_phy_reset(&vsc->mii_sc);
183 * Setup rgmii control register if necessary, after softreset.
185 if (mii_contype_is_rgmii(vsc->contype))
186 vsc8501_setup_rgmii(vsc);
190 vscphy_reset(struct mii_softc *sc)
192 struct vscphy_softc *vsc = (struct vscphy_softc *)sc;
194 switch (sc->mii_mpd_model) {
195 case MII_MODEL_xxVITESSE_VSC8501:
205 vscphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
213 mii_phy_setmedia(sc);
217 if (mii_phy_tick(sc) == EJUSTRETURN)
222 /* Update the media status. */
225 /* Callback if something changed. */
226 mii_phy_update(sc, cmd);
231 vscphy_probe(device_t dev)
234 return (mii_phy_dev_probe(dev, vscphys, BUS_PROBE_DEFAULT));
238 vscphy_attach(device_t dev)
240 struct vscphy_softc *vsc;
242 vsc = device_get_softc(dev);
246 vscphy_fdt_get_config(vsc);
249 mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &vscphy_funcs, 1);
250 mii_phy_setmedia(&vsc->mii_sc);
255 static device_method_t vscphy_methods[] = {
256 /* device interface */
257 DEVMETHOD(device_probe, vscphy_probe),
258 DEVMETHOD(device_attach, vscphy_attach),
259 DEVMETHOD(device_detach, mii_phy_detach),
260 DEVMETHOD(device_shutdown, bus_generic_shutdown),
264 static devclass_t vscphy_devclass;
266 static driver_t vscphy_driver = {
269 sizeof(struct vscphy_softc)
272 DRIVER_MODULE(vscphy, miibus, vscphy_driver, vscphy_devclass, 0, 0);