sys/dev/mlx4/mlx4_en/mlx4_en_port.c

   1 /*
   2  * Copyright (c) 2007, 2014 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <sys/types.h>
  35 #include <linux/if_vlan.h>
  36
  37 #include <dev/mlx4/device.h>
  38 #include <dev/mlx4/cmd.h>
  39
  40 #include "en_port.h"
  41 #include "en.h"
  42
  43
  44 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
  45 {
  46         struct mlx4_cmd_mailbox *mailbox;
  47         struct mlx4_set_vlan_fltr_mbox *filter;
  48         int i;
  49         int j;
  50         int index = 0;
  51         u32 entry;
  52         int err = 0;
  53
  54         mailbox = mlx4_alloc_cmd_mailbox(dev);
  55         if (IS_ERR(mailbox))
  56                 return PTR_ERR(mailbox);
  57
  58         filter = mailbox->buf;
  59         for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
  60                 entry = 0;
  61                 for (j = 0; j < 32; j++) {
  62                         if (test_bit(index, priv->active_vlans))
  63                                 entry |= 1 << j;
  64                         index++;
  65                 }
  66                 filter->entry[i] = cpu_to_be32(entry);
  67         }
  68         err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR,
  69                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
  70         mlx4_free_cmd_mailbox(dev, mailbox);
  71         return err;
  72 }
  73
  74 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
  75 {
  76         struct mlx4_en_query_port_context *qport_context;
  77         struct mlx4_en_priv *priv = mlx4_netdev_priv(mdev->pndev[port]);
  78         struct mlx4_en_port_state *state = &priv->port_state;
  79         struct mlx4_cmd_mailbox *mailbox;
  80         int err;
  81
  82         mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  83         if (IS_ERR(mailbox))
  84                 return PTR_ERR(mailbox);
  85         err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  86                            MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  87                            MLX4_CMD_WRAPPED);
  88         if (err)
  89                 goto out;
  90         qport_context = mailbox->buf;
  91
  92         /* This command is always accessed from Ethtool context
  93          * already synchronized, no need in locking */
  94         state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
  95         switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
  96         case MLX4_EN_100M_SPEED:
  97                 state->link_speed = 100;
  98                 break;
  99         case MLX4_EN_1G_SPEED:
 100                 state->link_speed = 1000;
 101                 break;
 102         case MLX4_EN_10G_SPEED_XAUI:
 103         case MLX4_EN_10G_SPEED_XFI:
 104                 state->link_speed = 10000;
 105                 break;
 106         case MLX4_EN_20G_SPEED:
 107                 state->link_speed = 20000;
 108                 break;
 109         case MLX4_EN_40G_SPEED:
 110                 state->link_speed = 40000;
 111                 break;
 112         case MLX4_EN_56G_SPEED:
 113                 state->link_speed = 56000;
 114                 break;
 115         default:
 116                 state->link_speed = -1;
 117                 break;
 118         }
 119
 120         state->transceiver = qport_context->transceiver;
 121
 122         state->flags = 0; /* Reset and recalculate the port flags */
 123         state->flags |= (qport_context->link_up & MLX4_EN_ANC_MASK) ?
 124                 MLX4_EN_PORT_ANC : 0;
 125         state->flags |= (qport_context->autoneg & MLX4_EN_AUTONEG_MASK) ?
 126                 MLX4_EN_PORT_ANE : 0;
 127
 128 out:
 129         mlx4_free_cmd_mailbox(mdev->dev, mailbox);
 130         return err;
 131 }
 132
 133 /* Each counter set is located in struct mlx4_en_stat_out_mbox
 134  * with a const offset between its prio components.
 135  * This function runs over a counter set and sum all of it's prio components.
 136  */
 137 static u64 en_stats_adder(__be64 *start, __be64 *next, int num)
 138 {
 139         __be64 *curr = start;
 140         u64 ret = 0;
 141         int i;
 142         int offset = next - start;
 143
 144         for (i = 0; i < num; i++) {
 145                 ret += be64_to_cpu(*curr);
 146                 curr += offset;
 147         }
 148
 149         return ret;
 150 }
 151
 152 static void mlx4_en_fold_software_stats(struct ifnet *dev)
 153 {
 154         struct mlx4_en_priv *priv = mlx4_netdev_priv(dev);
 155         struct mlx4_en_dev *mdev = priv->mdev;
 156         u64 packets, bytes;
 157         int i;
 158
 159         if (!priv->port_up || mlx4_is_master(mdev->dev))
 160                 return;
 161
 162         packets = 0;
 163         bytes = 0;
 164         for (i = 0; i < priv->rx_ring_num; i++) {
 165                 const struct mlx4_en_rx_ring *ring = priv->rx_ring[i];
 166
 167                 packets += READ_ONCE(ring->packets);
 168                 bytes += READ_ONCE(ring->bytes);
 169         }
 170         priv->pkstats.rx_packets = packets;
 171         priv->pkstats.rx_bytes = bytes;
 172
 173         packets = 0;
 174         bytes = 0;
 175         for (i = 0; i < priv->tx_ring_num; i++) {
 176                 const struct mlx4_en_tx_ring *ring = priv->tx_ring[i];
 177
 178                 packets += READ_ONCE(ring->packets);
 179                 bytes += READ_ONCE(ring->bytes);
 180         }
 181         priv->pkstats.tx_packets = packets;
 182         priv->pkstats.tx_bytes = bytes;
 183 }
 184
 185 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
 186 {
 187         struct mlx4_counter tmp_vport_stats;
 188         struct mlx4_en_stat_out_mbox *mlx4_en_stats;
 189         struct mlx4_en_stat_out_flow_control_mbox *flowstats;
 190         struct ifnet *dev = mdev->pndev[port];
 191         struct mlx4_en_priv *priv = mlx4_netdev_priv(dev);
 192         struct mlx4_en_vport_stats *vport_stats = &priv->vport_stats;
 193         struct mlx4_cmd_mailbox *mailbox;
 194         u64 in_mod = reset << 8 | port;
 195         int err;
 196         int i, counter_index;
 197
 198         mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
 199         if (IS_ERR(mailbox))
 200                 return PTR_ERR(mailbox);
 201         err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
 202                            MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
 203                            MLX4_CMD_NATIVE);
 204         if (err)
 205                 goto out;
 206
 207         mlx4_en_stats = mailbox->buf;
 208
 209         spin_lock(&priv->stats_lock);
 210
 211         priv->port_stats.rx_chksum_good = 0;
 212         priv->port_stats.rx_chksum_none = 0;
 213         for (i = 0; i < priv->rx_ring_num; i++) {
 214                 priv->port_stats.rx_chksum_good += priv->rx_ring[i]->csum_ok;
 215                 priv->port_stats.rx_chksum_none += priv->rx_ring[i]->csum_none;
 216         }
 217         priv->port_stats.tx_chksum_offload = 0;
 218         priv->port_stats.queue_stopped = 0;
 219         priv->port_stats.wake_queue = 0;
 220         priv->port_stats.oversized_packets = 0;
 221         priv->port_stats.tso_packets = 0;
 222         priv->port_stats.defrag_attempts = 0;
 223
 224         for (i = 0; i < priv->tx_ring_num; i++) {
 225                 const struct mlx4_en_tx_ring *ring;
 226                 ring = priv->tx_ring[i];
 227
 228                 priv->port_stats.tx_chksum_offload += ring->tx_csum;
 229                 priv->port_stats.queue_stopped     += ring->queue_stopped;
 230                 priv->port_stats.wake_queue        += ring->wake_queue;
 231                 priv->port_stats.oversized_packets += ring->oversized_packets;
 232                 priv->port_stats.tso_packets       += ring->tso_packets;
 233                 priv->port_stats.defrag_attempts   += ring->defrag_attempts;
 234         }
 235
 236         priv->pkstats.rx_errors =
 237                            be64_to_cpu(mlx4_en_stats->PCS) +
 238                            be32_to_cpu(mlx4_en_stats->RJBBR) +
 239                            be32_to_cpu(mlx4_en_stats->RCRC) +
 240                            be32_to_cpu(mlx4_en_stats->RRUNT) +
 241                            be64_to_cpu(mlx4_en_stats->RInRangeLengthErr) +
 242                            be64_to_cpu(mlx4_en_stats->ROutRangeLengthErr) +
 243                            be32_to_cpu(mlx4_en_stats->RSHORT) +
 244                            en_stats_adder(&mlx4_en_stats->RGIANT_prio_0,
 245                                           &mlx4_en_stats->RGIANT_prio_1,
 246                                           NUM_PRIORITIES);
 247         priv->pkstats.tx_errors =
 248             en_stats_adder(&mlx4_en_stats->TGIANT_prio_0,
 249                                           &mlx4_en_stats->TGIANT_prio_1,
 250                                           NUM_PRIORITIES);
 251         priv->pkstats.rx_multicast_packets =
 252             en_stats_adder(&mlx4_en_stats->MCAST_prio_0,
 253                                           &mlx4_en_stats->MCAST_prio_1,
 254                                           NUM_PRIORITIES);
 255         priv->pkstats.rx_dropped = be32_to_cpu(mlx4_en_stats->RDROP);
 256         priv->pkstats.rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength);
 257         priv->pkstats.rx_over_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
 258         priv->pkstats.rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC);
 259         priv->pkstats.tx_dropped = be32_to_cpu(mlx4_en_stats->TDROP);
 260
 261         /* RX stats */
 262         priv->pkstats.rx_packets = en_stats_adder(&mlx4_en_stats->RTOT_prio_0,
 263                                            &mlx4_en_stats->RTOT_prio_1,
 264                                            NUM_PRIORITIES);
 265         priv->pkstats.rx_bytes = en_stats_adder(&mlx4_en_stats->ROCT_prio_0,
 266                                          &mlx4_en_stats->ROCT_prio_1,
 267                                          NUM_PRIORITIES);
 268         priv->pkstats.rx_broadcast_packets =
 269                         en_stats_adder(&mlx4_en_stats->RBCAST_prio_0,
 270                                        &mlx4_en_stats->RBCAST_prio_1,
 271                                        NUM_PRIORITIES);
 272         priv->pkstats.rx_jabbers = be32_to_cpu(mlx4_en_stats->RJBBR);
 273         priv->pkstats.rx_in_range_length_error =
 274                 be64_to_cpu(mlx4_en_stats->RInRangeLengthErr);
 275         priv->pkstats.rx_out_range_length_error =
 276                 be64_to_cpu(mlx4_en_stats->ROutRangeLengthErr);
 277
 278         /* Tx stats */
 279         priv->pkstats.tx_packets = en_stats_adder(&mlx4_en_stats->TTOT_prio_0,
 280                                            &mlx4_en_stats->TTOT_prio_1,
 281                                            NUM_PRIORITIES);
 282         priv->pkstats.tx_bytes = en_stats_adder(&mlx4_en_stats->TOCT_prio_0,
 283                                          &mlx4_en_stats->TOCT_prio_1,
 284                                          NUM_PRIORITIES);
 285         priv->pkstats.tx_multicast_packets =
 286                 en_stats_adder(&mlx4_en_stats->TMCAST_prio_0,
 287                                &mlx4_en_stats->TMCAST_prio_1,
 288                                NUM_PRIORITIES);
 289         priv->pkstats.tx_broadcast_packets =
 290                 en_stats_adder(&mlx4_en_stats->TBCAST_prio_0,
 291                                &mlx4_en_stats->TBCAST_prio_1,
 292                                NUM_PRIORITIES);
 293
 294         priv->pkstats.rx_prio[0][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0);
 295         priv->pkstats.rx_prio[0][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_0);
 296         priv->pkstats.rx_prio[1][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1);
 297         priv->pkstats.rx_prio[1][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_1);
 298         priv->pkstats.rx_prio[2][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2);
 299         priv->pkstats.rx_prio[2][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_2);
 300         priv->pkstats.rx_prio[3][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3);
 301         priv->pkstats.rx_prio[3][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_3);
 302         priv->pkstats.rx_prio[4][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4);
 303         priv->pkstats.rx_prio[4][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_4);
 304         priv->pkstats.rx_prio[5][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5);
 305         priv->pkstats.rx_prio[5][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_5);
 306         priv->pkstats.rx_prio[6][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6);
 307         priv->pkstats.rx_prio[6][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_6);
 308         priv->pkstats.rx_prio[7][0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7);
 309         priv->pkstats.rx_prio[7][1] = be64_to_cpu(mlx4_en_stats->ROCT_prio_7);
 310         priv->pkstats.rx_prio[8][0] = be64_to_cpu(mlx4_en_stats->RTOT_novlan);
 311         priv->pkstats.rx_prio[8][1] = be64_to_cpu(mlx4_en_stats->ROCT_novlan);
 312         priv->pkstats.tx_prio[0][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0);
 313         priv->pkstats.tx_prio[0][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_0);
 314         priv->pkstats.tx_prio[1][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1);
 315         priv->pkstats.tx_prio[1][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_1);
 316         priv->pkstats.tx_prio[2][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2);
 317         priv->pkstats.tx_prio[2][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_2);
 318         priv->pkstats.tx_prio[3][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3);
 319         priv->pkstats.tx_prio[3][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_3);
 320         priv->pkstats.tx_prio[4][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4);
 321         priv->pkstats.tx_prio[4][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_4);
 322         priv->pkstats.tx_prio[5][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5);
 323         priv->pkstats.tx_prio[5][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_5);
 324         priv->pkstats.tx_prio[6][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6);
 325         priv->pkstats.tx_prio[6][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_6);
 326         priv->pkstats.tx_prio[7][0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7);
 327         priv->pkstats.tx_prio[7][1] = be64_to_cpu(mlx4_en_stats->TOCT_prio_7);
 328         priv->pkstats.tx_prio[8][0] = be64_to_cpu(mlx4_en_stats->TTOT_novlan);
 329         priv->pkstats.tx_prio[8][1] = be64_to_cpu(mlx4_en_stats->TOCT_novlan);
 330
 331         mlx4_en_fold_software_stats(dev);
 332
 333         spin_unlock(&priv->stats_lock);
 334
 335         memset(&tmp_vport_stats, 0, sizeof(tmp_vport_stats));
 336         counter_index = mlx4_get_default_counter_index(mdev->dev, port);
 337         err = mlx4_get_counter_stats(mdev->dev, counter_index,
 338                                      &tmp_vport_stats, reset);
 339
 340         spin_lock(&priv->stats_lock);
 341         if (!err) {
 342                 /* ethtool stats format */
 343                 vport_stats->rx_bytes = be64_to_cpu(tmp_vport_stats.rx_bytes);
 344                 vport_stats->rx_frames = be64_to_cpu(tmp_vport_stats.rx_frames);
 345                 vport_stats->tx_bytes = be64_to_cpu(tmp_vport_stats.tx_bytes);
 346                 vport_stats->tx_frames = be64_to_cpu(tmp_vport_stats.tx_frames);
 347         }
 348
 349         if (reset == 0) {
 350                 if_inc_counter(dev, IFCOUNTER_IPACKETS,
 351                     priv->pkstats.rx_packets - priv->pkstats_last.rx_packets);
 352                 if_inc_counter(dev, IFCOUNTER_OPACKETS,
 353                     priv->pkstats.tx_packets - priv->pkstats_last.tx_packets);
 354                 if_inc_counter(dev, IFCOUNTER_IBYTES,
 355                     priv->pkstats.rx_bytes - priv->pkstats_last.rx_bytes);
 356                 if_inc_counter(dev, IFCOUNTER_OBYTES,
 357                     priv->pkstats.tx_bytes - priv->pkstats_last.tx_bytes);
 358                 if_inc_counter(dev, IFCOUNTER_IERRORS,
 359                     priv->pkstats.rx_errors - priv->pkstats_last.rx_errors);
 360                 if_inc_counter(dev, IFCOUNTER_IQDROPS,
 361                     priv->pkstats.rx_dropped - priv->pkstats_last.rx_dropped);
 362                 if_inc_counter(dev, IFCOUNTER_IMCASTS,
 363                     priv->pkstats.rx_multicast_packets - priv->pkstats_last.rx_multicast_packets);
 364                 if_inc_counter(dev, IFCOUNTER_OMCASTS,
 365                     priv->pkstats.tx_multicast_packets - priv->pkstats_last.tx_multicast_packets);
 366         }
 367         priv->pkstats_last = priv->pkstats;
 368
 369         spin_unlock(&priv->stats_lock);
 370
 371         /* 0xffs indicates invalid value */
 372         memset(mailbox->buf, 0xff, sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
 373
 374         if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN) {
 375                 memset(mailbox->buf, 0,
 376                        sizeof(*flowstats) * MLX4_NUM_PRIORITIES);
 377                 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma,
 378                                    in_mod | MLX4_DUMP_ETH_STATS_FLOW_CONTROL,
 379                                    0, MLX4_CMD_DUMP_ETH_STATS,
 380                                    MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE);
 381                 if (err)
 382                         goto out;
 383         }
 384
 385         flowstats = mailbox->buf;
 386
 387         spin_lock(&priv->stats_lock);
 388
 389         for (i = 0; i < MLX4_NUM_PRIORITIES; i++)       {
 390                 priv->rx_priority_flowstats[i].rx_pause =
 391                         be64_to_cpu(flowstats[i].rx_pause);
 392                 priv->rx_priority_flowstats[i].rx_pause_duration =
 393                         be64_to_cpu(flowstats[i].rx_pause_duration);
 394                 priv->rx_priority_flowstats[i].rx_pause_transition =
 395                         be64_to_cpu(flowstats[i].rx_pause_transition);
 396                 priv->tx_priority_flowstats[i].tx_pause =
 397                         be64_to_cpu(flowstats[i].tx_pause);
 398                 priv->tx_priority_flowstats[i].tx_pause_duration =
 399                         be64_to_cpu(flowstats[i].tx_pause_duration);
 400                 priv->tx_priority_flowstats[i].tx_pause_transition =
 401                         be64_to_cpu(flowstats[i].tx_pause_transition);
 402         }
 403
 404         /* if pfc is not in use, all priorities counters have the same value */
 405         priv->rx_flowstats.rx_pause =
 406                 be64_to_cpu(flowstats[0].rx_pause);
 407         priv->rx_flowstats.rx_pause_duration =
 408                 be64_to_cpu(flowstats[0].rx_pause_duration);
 409         priv->rx_flowstats.rx_pause_transition =
 410                 be64_to_cpu(flowstats[0].rx_pause_transition);
 411         priv->tx_flowstats.tx_pause =
 412                 be64_to_cpu(flowstats[0].tx_pause);
 413         priv->tx_flowstats.tx_pause_duration =
 414                 be64_to_cpu(flowstats[0].tx_pause_duration);
 415         priv->tx_flowstats.tx_pause_transition =
 416                 be64_to_cpu(flowstats[0].tx_pause_transition);
 417
 418         spin_unlock(&priv->stats_lock);
 419
 420 out:
 421         mlx4_free_cmd_mailbox(mdev->dev, mailbox);
 422         return err;
 423 }
 424
 425 int mlx4_en_get_vport_stats(struct mlx4_en_dev *mdev, u8 port)
 426 {
 427         struct mlx4_en_priv *priv = mlx4_netdev_priv(mdev->pndev[port]);
 428         struct mlx4_counter tmp_vport_stats;
 429         struct mlx4_en_vf_stats *vf_stats = &priv->vf_stats;
 430         int err, i, counter_index;
 431
 432         spin_lock(&priv->stats_lock);
 433
 434         priv->pkstats.rx_packets = 0;
 435         priv->pkstats.rx_bytes = 0;
 436         priv->port_stats.rx_chksum_good = 0;
 437         priv->port_stats.rx_chksum_none = 0;
 438         for (i = 0; i < priv->rx_ring_num; i++) {
 439                 priv->pkstats.rx_packets += priv->rx_ring[i]->packets;
 440                 priv->pkstats.rx_bytes += priv->rx_ring[i]->bytes;
 441                 priv->port_stats.rx_chksum_good += priv->rx_ring[i]->csum_ok;
 442                 priv->port_stats.rx_chksum_none += priv->rx_ring[i]->csum_none;
 443         }
 444         priv->pkstats.tx_packets = 0;
 445         priv->pkstats.tx_bytes = 0;
 446         priv->port_stats.tx_chksum_offload = 0;
 447         priv->port_stats.queue_stopped = 0;
 448         priv->port_stats.wake_queue = 0;
 449
 450         for (i = 0; i < priv->tx_ring_num; i++) {
 451                 const struct mlx4_en_tx_ring *ring = priv->tx_ring[i];
 452
 453                 priv->pkstats.tx_packets += ring->packets;
 454                 priv->pkstats.tx_bytes += ring->bytes;
 455                 priv->port_stats.tx_chksum_offload += ring->tx_csum;
 456                 priv->port_stats.queue_stopped     += ring->queue_stopped;
 457                 priv->port_stats.wake_queue        += ring->wake_queue;
 458                 priv->port_stats.oversized_packets += priv->tx_ring[i]->oversized_packets;
 459         }
 460
 461         spin_unlock(&priv->stats_lock);
 462
 463         memset(&tmp_vport_stats, 0, sizeof(tmp_vport_stats));
 464
 465         counter_index = mlx4_get_default_counter_index(mdev->dev, port);
 466         err = mlx4_get_counter_stats(mdev->dev, counter_index,
 467                                      &tmp_vport_stats, 0);
 468
 469         if (!err) {
 470                 spin_lock(&priv->stats_lock);
 471
 472                 vf_stats->rx_bytes = be64_to_cpu(tmp_vport_stats.rx_bytes);
 473                 vf_stats->rx_frames = be64_to_cpu(tmp_vport_stats.rx_frames);
 474                 vf_stats->tx_bytes = be64_to_cpu(tmp_vport_stats.tx_bytes);
 475                 vf_stats->tx_frames = be64_to_cpu(tmp_vport_stats.tx_frames);
 476
 477                 priv->pkstats.rx_packets = vf_stats->rx_frames;
 478                 priv->pkstats.rx_bytes = vf_stats->rx_bytes;
 479                 priv->pkstats.tx_packets = vf_stats->tx_frames;
 480                 priv->pkstats.tx_bytes = vf_stats->tx_bytes;
 481
 482                 /* PF&VFs are not expected to report errors in ifconfig.
 483                  * rx_errors will be reprted in PF's ethtool statistics,
 484                  * see: mlx4_en_DUMP_ETH_STATS
 485                  */
 486                 priv->pkstats.rx_errors = 0;
 487                 priv->pkstats.rx_dropped = 0;
 488                 priv->pkstats.tx_dropped = 0;
 489                 priv->pkstats.rx_multicast_packets = 0;
 490
 491                 spin_unlock(&priv->stats_lock);
 492         }
 493
 494         return err;
 495 }