2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
38 #include <linux/random.h>
39 #include <dev/mlx4/cmd.h>
40 #include <dev/mlx4/driver.h>
41 #include <linux/gfp.h>
42 #include <rdma/ib_pma.h>
47 MLX4_IB_VENDOR_CLASS1 = 0x9,
48 MLX4_IB_VENDOR_CLASS2 = 0xa
51 #define MLX4_TUN_SEND_WRID_SHIFT 34
52 #define MLX4_TUN_QPN_SHIFT 32
53 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
54 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
56 #define MLX4_TUN_IS_RECV(a) (((a) >> MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
57 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
59 /* Port mgmt change event handling */
61 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
62 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
63 #define NUM_IDX_IN_PKEY_TBL_BLK 32
64 #define GUID_TBL_ENTRY_SIZE 8 /* size in bytes */
65 #define GUID_TBL_BLK_NUM_ENTRIES 8
66 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
68 struct mlx4_mad_rcv_buf {
73 struct mlx4_mad_snd_buf {
77 struct mlx4_tunnel_mad {
79 struct mlx4_ib_tunnel_header hdr;
83 struct mlx4_rcv_tunnel_mad {
84 struct mlx4_rcv_tunnel_hdr hdr;
89 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
90 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
91 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
92 int block, u32 change_bitmap);
94 __be64 mlx4_ib_gen_node_guid(void)
96 #define NODE_GUID_HI ((u64) (((u64)IB_OPENIB_OUI) << 40))
97 return cpu_to_be64(NODE_GUID_HI | random());
100 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
102 return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
103 cpu_to_be64(0xff00000000000000LL);
106 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
107 int port, const struct ib_wc *in_wc,
108 const struct ib_grh *in_grh,
109 const void *in_mad, void *response_mad)
111 struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
114 u32 in_modifier = port;
117 inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
118 if (IS_ERR(inmailbox))
119 return PTR_ERR(inmailbox);
120 inbox = inmailbox->buf;
122 outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
123 if (IS_ERR(outmailbox)) {
124 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
125 return PTR_ERR(outmailbox);
128 memcpy(inbox, in_mad, 256);
131 * Key check traps can't be generated unless we have in_wc to
132 * tell us where to send the trap.
134 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
136 if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
138 if (mlx4_is_mfunc(dev->dev) &&
139 (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
155 memset(inbox + 256, 0, 256);
156 ext_info = inbox + 256;
158 ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
159 ext_info->rqpn = cpu_to_be32(in_wc->src_qp);
160 ext_info->sl = in_wc->sl << 4;
161 ext_info->g_path = in_wc->dlid_path_bits |
162 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
163 ext_info->pkey = cpu_to_be16(in_wc->pkey_index);
166 memcpy(ext_info->grh, in_grh, 40);
170 in_modifier |= in_wc->slid << 16;
173 err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
174 mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
175 MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
176 (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
179 memcpy(response_mad, outmailbox->buf, 256);
181 mlx4_free_cmd_mailbox(dev->dev, inmailbox);
182 mlx4_free_cmd_mailbox(dev->dev, outmailbox);
187 static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
189 struct ib_ah *new_ah;
190 struct ib_ah_attr ah_attr;
193 if (!dev->send_agent[port_num - 1][0])
196 memset(&ah_attr, 0, sizeof ah_attr);
199 ah_attr.port_num = port_num;
201 new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
206 spin_lock_irqsave(&dev->sm_lock, flags);
207 if (dev->sm_ah[port_num - 1])
208 ib_destroy_ah(dev->sm_ah[port_num - 1]);
209 dev->sm_ah[port_num - 1] = new_ah;
210 spin_unlock_irqrestore(&dev->sm_lock, flags);
214 * Snoop SM MADs for port info, GUID info, and P_Key table sets, so we can
215 * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
217 static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
220 struct ib_port_info *pinfo;
223 u32 bn, pkey_change_bitmap;
227 struct mlx4_ib_dev *dev = to_mdev(ibdev);
228 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
229 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
230 mad->mad_hdr.method == IB_MGMT_METHOD_SET)
231 switch (mad->mad_hdr.attr_id) {
232 case IB_SMP_ATTR_PORT_INFO:
233 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
235 pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
236 lid = be16_to_cpu(pinfo->lid);
238 update_sm_ah(dev, port_num,
239 be16_to_cpu(pinfo->sm_lid),
240 pinfo->neighbormtu_mastersmsl & 0xf);
242 if (pinfo->clientrereg_resv_subnetto & 0x80)
243 handle_client_rereg_event(dev, port_num);
246 handle_lid_change_event(dev, port_num);
249 case IB_SMP_ATTR_PKEY_TABLE:
250 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
252 if (!mlx4_is_mfunc(dev->dev)) {
253 mlx4_ib_dispatch_event(dev, port_num,
254 IB_EVENT_PKEY_CHANGE);
258 /* at this point, we are running in the master.
259 * Slaves do not receive SMPs.
261 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
262 base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
263 pkey_change_bitmap = 0;
264 for (i = 0; i < 32; i++) {
265 pr_debug("PKEY[%d] = x%x\n",
266 i + bn*32, be16_to_cpu(base[i]));
267 if (be16_to_cpu(base[i]) !=
268 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
269 pkey_change_bitmap |= (1 << i);
270 dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
271 be16_to_cpu(base[i]);
274 pr_debug("PKEY Change event: port=%d, "
275 "block=0x%x, change_bitmap=0x%x\n",
276 port_num, bn, pkey_change_bitmap);
278 if (pkey_change_bitmap) {
279 mlx4_ib_dispatch_event(dev, port_num,
280 IB_EVENT_PKEY_CHANGE);
281 if (!dev->sriov.is_going_down)
282 __propagate_pkey_ev(dev, port_num, bn,
287 case IB_SMP_ATTR_GUID_INFO:
288 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV)
290 /* paravirtualized master's guid is guid 0 -- does not change */
291 if (!mlx4_is_master(dev->dev))
292 mlx4_ib_dispatch_event(dev, port_num,
293 IB_EVENT_GID_CHANGE);
294 /*if master, notify relevant slaves*/
295 if (mlx4_is_master(dev->dev) &&
296 !dev->sriov.is_going_down) {
297 bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
298 mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
299 (u8 *)(&((struct ib_smp *)mad)->data));
300 mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
301 (u8 *)(&((struct ib_smp *)mad)->data));
305 case IB_SMP_ATTR_SL_TO_VL_TABLE:
306 /* cache sl to vl mapping changes for use in
307 * filling QP1 LRH VL field when sending packets
309 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV &&
310 dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)
312 if (!mlx4_is_slave(dev->dev)) {
313 union sl2vl_tbl_to_u64 sl2vl64;
316 for (jj = 0; jj < 8; jj++) {
317 sl2vl64.sl8[jj] = ((struct ib_smp *)mad)->data[jj];
318 pr_debug("sl2vl[%d] = %02x\n", jj, sl2vl64.sl8[jj]);
320 atomic64_set(&dev->sl2vl[port_num - 1], sl2vl64.sl64);
329 static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
330 int block, u32 change_bitmap)
332 int i, ix, slave, err;
335 for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
336 if (slave == mlx4_master_func_num(dev->dev))
338 if (!mlx4_is_slave_active(dev->dev, slave))
342 for (i = 0; i < 32; i++) {
343 if (!(change_bitmap & (1 << i)))
346 ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
347 if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
348 [ix] == i + 32 * block) {
349 err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
350 pr_debug("propagate_pkey_ev: slave %d,"
351 " port %d, ix %d (%d)\n",
352 slave, port_num, ix, err);
363 static void node_desc_override(struct ib_device *dev,
368 if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
369 mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
370 mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
371 mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
372 spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
373 memcpy(((struct ib_smp *) mad)->data, dev->node_desc,
374 IB_DEVICE_NODE_DESC_MAX);
375 spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
379 static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
381 int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
382 struct ib_mad_send_buf *send_buf;
383 struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
388 send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
389 IB_MGMT_MAD_DATA, GFP_ATOMIC,
390 IB_MGMT_BASE_VERSION);
391 if (IS_ERR(send_buf))
394 * We rely here on the fact that MLX QPs don't use the
395 * address handle after the send is posted (this is
396 * wrong following the IB spec strictly, but we know
397 * it's OK for our devices).
399 spin_lock_irqsave(&dev->sm_lock, flags);
400 memcpy(send_buf->mad, mad, sizeof *mad);
401 if ((send_buf->ah = dev->sm_ah[port_num - 1]))
402 ret = ib_post_send_mad(send_buf, NULL);
405 spin_unlock_irqrestore(&dev->sm_lock, flags);
408 ib_free_send_mad(send_buf);
412 static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
413 struct ib_sa_mad *sa_mad)
417 /* dispatch to different sa handlers */
418 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
419 case IB_SA_ATTR_MC_MEMBER_REC:
420 ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
428 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
430 struct mlx4_ib_dev *dev = to_mdev(ibdev);
433 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
434 if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
441 static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
442 u8 port, u16 pkey, u16 *ix)
445 u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
448 if (slave == mlx4_master_func_num(dev->dev))
449 return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
451 unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
453 for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
454 if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
457 pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
459 ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
462 if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
463 if (slot_pkey & 0x8000) {
467 /* take first partial pkey index found */
468 if (partial_ix == 0xFF)
469 partial_ix = pkey_ix;
474 if (partial_ix < 0xFF) {
475 *ix = (u16) partial_ix;
482 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
483 enum ib_qp_type dest_qpt, struct ib_wc *wc,
484 struct ib_grh *grh, struct ib_mad *mad)
488 struct ib_send_wr *bad_wr;
489 struct mlx4_ib_demux_pv_ctx *tun_ctx;
490 struct mlx4_ib_demux_pv_qp *tun_qp;
491 struct mlx4_rcv_tunnel_mad *tun_mad;
492 struct ib_ah_attr attr;
494 struct ib_qp *src_qp = NULL;
495 unsigned tun_tx_ix = 0;
500 u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
502 if (dest_qpt > IB_QPT_GSI)
505 tun_ctx = dev->sriov.demux[port-1].tun[slave];
507 /* check if proxy qp created */
508 if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
512 tun_qp = &tun_ctx->qp[0];
514 tun_qp = &tun_ctx->qp[1];
516 /* compute P_Key index to put in tunnel header for slave */
519 ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
523 ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
526 tun_pkey_ix = pkey_ix;
528 tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
530 dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
532 /* get tunnel tx data buf for slave */
535 /* create ah. Just need an empty one with the port num for the post send.
536 * The driver will set the force loopback bit in post_send */
537 memset(&attr, 0, sizeof attr);
538 attr.port_num = port;
540 memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
541 attr.ah_flags = IB_AH_GRH;
543 ah = ib_create_ah(tun_ctx->pd, &attr);
547 /* allocate tunnel tx buf after pass failure returns */
548 spin_lock(&tun_qp->tx_lock);
549 if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
550 (MLX4_NUM_TUNNEL_BUFS - 1))
553 tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
554 spin_unlock(&tun_qp->tx_lock);
558 tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
559 if (tun_qp->tx_ring[tun_tx_ix].ah)
560 ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
561 tun_qp->tx_ring[tun_tx_ix].ah = ah;
562 ib_dma_sync_single_for_cpu(&dev->ib_dev,
563 tun_qp->tx_ring[tun_tx_ix].buf.map,
564 sizeof (struct mlx4_rcv_tunnel_mad),
567 /* copy over to tunnel buffer */
569 memcpy(&tun_mad->grh, grh, sizeof *grh);
570 memcpy(&tun_mad->mad, mad, sizeof *mad);
572 /* adjust tunnel data */
573 tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
574 tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
575 tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
579 if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
582 if (vlan != wc->vlan_id) {
583 /* Packet vlan is not the VST-assigned vlan.
589 /* Remove the vlan tag before forwarding
590 * the packet to the VF.
598 tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
599 memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
600 memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
602 tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
603 tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
606 ib_dma_sync_single_for_device(&dev->ib_dev,
607 tun_qp->tx_ring[tun_tx_ix].buf.map,
608 sizeof (struct mlx4_rcv_tunnel_mad),
611 list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
612 list.length = sizeof (struct mlx4_rcv_tunnel_mad);
613 list.lkey = tun_ctx->pd->local_dma_lkey;
617 wr.remote_qkey = IB_QP_SET_QKEY;
618 wr.remote_qpn = dqpn;
620 wr.wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
621 wr.wr.sg_list = &list;
623 wr.wr.opcode = IB_WR_SEND;
624 wr.wr.send_flags = IB_SEND_SIGNALED;
626 ret = ib_post_send(src_qp, &wr.wr, &bad_wr);
630 spin_lock(&tun_qp->tx_lock);
631 tun_qp->tx_ix_tail++;
632 spin_unlock(&tun_qp->tx_lock);
633 tun_qp->tx_ring[tun_tx_ix].ah = NULL;
639 static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
640 struct ib_wc *wc, struct ib_grh *grh,
643 struct mlx4_ib_dev *dev = to_mdev(ibdev);
649 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
655 if (!(wc->wc_flags & IB_WC_GRH)) {
656 mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
659 if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
660 mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
663 err = mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave);
664 if (err && mlx4_is_mf_bonded(dev->dev)) {
665 other_port = (port == 1) ? 2 : 1;
666 err = mlx4_get_slave_from_roce_gid(dev->dev, other_port, grh->dgid.raw, &slave);
669 pr_debug("resolved slave %d from gid %pI6 wire port %d other %d\n",
670 slave, grh->dgid.raw, port, other_port);
674 mlx4_ib_warn(ibdev, "failed matching grh\n");
677 if (slave >= dev->dev->caps.sqp_demux) {
678 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
679 slave, dev->dev->caps.sqp_demux);
683 if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
686 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
688 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
693 /* Initially assume that this mad is for us */
694 slave = mlx4_master_func_num(dev->dev);
696 /* See if the slave id is encoded in a response mad */
697 if (mad->mad_hdr.method & 0x80) {
698 slave_id = (u8 *) &mad->mad_hdr.tid;
700 if (slave != 255) /*255 indicates the dom0*/
701 *slave_id = 0; /* remap tid */
704 /* If a grh is present, we demux according to it */
705 if (wc->wc_flags & IB_WC_GRH) {
706 slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
708 mlx4_ib_warn(ibdev, "failed matching grh\n");
712 /* Class-specific handling */
713 switch (mad->mad_hdr.mgmt_class) {
714 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
715 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
716 /* 255 indicates the dom0 */
717 if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
718 if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
720 /* for a VF. drop unsolicited MADs */
721 if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
722 mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
723 slave, mad->mad_hdr.mgmt_class,
724 mad->mad_hdr.method);
729 case IB_MGMT_CLASS_SUBN_ADM:
730 if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
731 (struct ib_sa_mad *) mad))
734 case IB_MGMT_CLASS_CM:
735 if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
738 case IB_MGMT_CLASS_DEVICE_MGMT:
739 if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
743 /* Drop unsupported classes for slaves in tunnel mode */
744 if (slave != mlx4_master_func_num(dev->dev)) {
745 pr_debug("dropping unsupported ingress mad from class:%d "
746 "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
750 /*make sure that no slave==255 was not handled yet.*/
751 if (slave >= dev->dev->caps.sqp_demux) {
752 mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
753 slave, dev->dev->caps.sqp_demux);
757 err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
759 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
764 static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
765 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
766 const struct ib_mad *in_mad, struct ib_mad *out_mad)
768 u16 slid, prev_lid = 0;
770 struct ib_port_attr pattr;
772 if (in_wc && in_wc->qp->qp_num) {
773 pr_debug("received MAD: slid:%d sqpn:%d "
774 "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
775 in_wc->slid, in_wc->src_qp,
776 in_wc->dlid_path_bits,
779 in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
780 be16_to_cpu(in_mad->mad_hdr.attr_id));
781 if (in_wc->wc_flags & IB_WC_GRH) {
782 pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
783 (unsigned long long)be64_to_cpu(in_grh->sgid.global.subnet_prefix),
784 (unsigned long long)be64_to_cpu(in_grh->sgid.global.interface_id));
785 pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
786 (unsigned long long)be64_to_cpu(in_grh->dgid.global.subnet_prefix),
787 (unsigned long long)be64_to_cpu(in_grh->dgid.global.interface_id));
791 slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
793 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
794 forward_trap(to_mdev(ibdev), port_num, in_mad);
795 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
798 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
799 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
800 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
801 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
802 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
803 return IB_MAD_RESULT_SUCCESS;
806 * Don't process SMInfo queries -- the SMA can't handle them.
808 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
809 return IB_MAD_RESULT_SUCCESS;
810 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
811 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
812 in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 ||
813 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
814 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
815 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
816 return IB_MAD_RESULT_SUCCESS;
818 return IB_MAD_RESULT_SUCCESS;
820 if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
821 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
822 in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
823 in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
824 !ib_query_port(ibdev, port_num, &pattr))
825 prev_lid = pattr.lid;
827 err = mlx4_MAD_IFC(to_mdev(ibdev),
828 (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
829 (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
830 MLX4_MAD_IFC_NET_VIEW,
831 port_num, in_wc, in_grh, in_mad, out_mad);
833 return IB_MAD_RESULT_FAILURE;
835 if (!out_mad->mad_hdr.status) {
836 smp_snoop(ibdev, port_num, in_mad, prev_lid);
837 /* slaves get node desc from FW */
838 if (!mlx4_is_slave(to_mdev(ibdev)->dev))
839 node_desc_override(ibdev, out_mad);
842 /* set return bit in status of directed route responses */
843 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
844 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
846 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
847 /* no response for trap repress */
848 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
850 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
853 static void edit_counter(struct mlx4_counter *cnt, void *counters,
857 case IB_PMA_PORT_COUNTERS:
859 struct ib_pma_portcounters *pma_cnt =
860 (struct ib_pma_portcounters *)counters;
862 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
863 (be64_to_cpu(cnt->tx_bytes) >> 2));
864 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
865 (be64_to_cpu(cnt->rx_bytes) >> 2));
866 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
867 be64_to_cpu(cnt->tx_frames));
868 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
869 be64_to_cpu(cnt->rx_frames));
872 case IB_PMA_PORT_COUNTERS_EXT:
874 struct ib_pma_portcounters_ext *pma_cnt_ext =
875 (struct ib_pma_portcounters_ext *)counters;
877 pma_cnt_ext->port_xmit_data =
878 cpu_to_be64(be64_to_cpu(cnt->tx_bytes) >> 2);
879 pma_cnt_ext->port_rcv_data =
880 cpu_to_be64(be64_to_cpu(cnt->rx_bytes) >> 2);
881 pma_cnt_ext->port_xmit_packets = cnt->tx_frames;
882 pma_cnt_ext->port_rcv_packets = cnt->rx_frames;
890 static int iboe_process_mad_port_info(void *out_mad)
892 struct ib_class_port_info cpi = {};
894 cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
895 memcpy(out_mad, &cpi, sizeof(cpi));
896 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
899 static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
900 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
901 const struct ib_mad *in_mad, struct ib_mad *out_mad)
903 struct mlx4_counter counter_stats;
904 struct mlx4_ib_dev *dev = to_mdev(ibdev);
905 struct counter_index *tmp_counter;
906 int err = IB_MAD_RESULT_FAILURE, stats_avail = 0;
908 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
911 if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)
912 return iboe_process_mad_port_info((void *)(out_mad->data + 40));
914 memset(&counter_stats, 0, sizeof(counter_stats));
915 mutex_lock(&dev->counters_table[port_num - 1].mutex);
916 list_for_each_entry(tmp_counter,
917 &dev->counters_table[port_num - 1].counters_list,
919 err = mlx4_get_counter_stats(dev->dev,
923 err = IB_MAD_RESULT_FAILURE;
929 mutex_unlock(&dev->counters_table[port_num - 1].mutex);
931 memset(out_mad->data, 0, sizeof out_mad->data);
932 switch (counter_stats.counter_mode & 0xf) {
934 edit_counter(&counter_stats,
935 (void *)(out_mad->data + 40),
936 in_mad->mad_hdr.attr_id);
937 err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
940 err = IB_MAD_RESULT_FAILURE;
947 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
948 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
949 const struct ib_mad_hdr *in, size_t in_mad_size,
950 struct ib_mad_hdr *out, size_t *out_mad_size,
951 u16 *out_mad_pkey_index)
953 struct mlx4_ib_dev *dev = to_mdev(ibdev);
954 const struct ib_mad *in_mad = (const struct ib_mad *)in;
955 struct ib_mad *out_mad = (struct ib_mad *)out;
956 enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
958 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
959 *out_mad_size != sizeof(*out_mad)))
960 return IB_MAD_RESULT_FAILURE;
962 /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
963 * queries, should be called only by VFs and for that specific purpose
965 if (link == IB_LINK_LAYER_INFINIBAND) {
966 if (mlx4_is_slave(dev->dev) &&
967 (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
968 (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS ||
969 in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT ||
970 in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO)))
971 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
972 in_grh, in_mad, out_mad);
974 return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
975 in_grh, in_mad, out_mad);
978 if (link == IB_LINK_LAYER_ETHERNET)
979 return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
980 in_grh, in_mad, out_mad);
985 static void send_handler(struct ib_mad_agent *agent,
986 struct ib_mad_send_wc *mad_send_wc)
988 if (mad_send_wc->send_buf->context[0])
989 ib_destroy_ah(mad_send_wc->send_buf->context[0]);
990 ib_free_send_mad(mad_send_wc->send_buf);
993 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
995 struct ib_mad_agent *agent;
998 enum rdma_link_layer ll;
1000 for (p = 0; p < dev->num_ports; ++p) {
1001 ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
1002 for (q = 0; q <= 1; ++q) {
1003 if (ll == IB_LINK_LAYER_INFINIBAND) {
1004 agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
1005 q ? IB_QPT_GSI : IB_QPT_SMI,
1006 NULL, 0, send_handler,
1008 if (IS_ERR(agent)) {
1009 ret = PTR_ERR(agent);
1012 dev->send_agent[p][q] = agent;
1014 dev->send_agent[p][q] = NULL;
1021 for (p = 0; p < dev->num_ports; ++p)
1022 for (q = 0; q <= 1; ++q)
1023 if (dev->send_agent[p][q])
1024 ib_unregister_mad_agent(dev->send_agent[p][q]);
1029 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
1031 struct ib_mad_agent *agent;
1034 for (p = 0; p < dev->num_ports; ++p) {
1035 for (q = 0; q <= 1; ++q) {
1036 agent = dev->send_agent[p][q];
1038 dev->send_agent[p][q] = NULL;
1039 ib_unregister_mad_agent(agent);
1044 ib_destroy_ah(dev->sm_ah[p]);
1048 static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
1050 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
1052 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1053 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1054 MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
1057 static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
1059 /* re-configure the alias-guid and mcg's */
1060 if (mlx4_is_master(dev->dev)) {
1061 mlx4_ib_invalidate_all_guid_record(dev, port_num);
1063 if (!dev->sriov.is_going_down) {
1064 mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
1065 mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
1066 MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
1070 /* Update the sl to vl table from inside client rereg
1071 * only if in secure-host mode (snooping is not possible)
1072 * and the sl-to-vl change event is not generated by FW.
1074 if (!mlx4_is_slave(dev->dev) &&
1075 dev->dev->flags & MLX4_FLAG_SECURE_HOST &&
1076 !(dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT)) {
1077 if (mlx4_is_master(dev->dev))
1078 /* already in work queue from mlx4_ib_event queueing
1079 * mlx4_handle_port_mgmt_change_event, which calls
1080 * this procedure. Therefore, call sl2vl_update directly.
1082 mlx4_ib_sl2vl_update(dev, port_num);
1084 mlx4_sched_ib_sl2vl_update_work(dev, port_num);
1086 mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
1089 static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
1090 struct mlx4_eqe *eqe)
1092 __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
1093 GET_MASK_FROM_EQE(eqe));
1096 static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
1097 u32 guid_tbl_blk_num, u32 change_bitmap)
1099 struct ib_smp *in_mad = NULL;
1100 struct ib_smp *out_mad = NULL;
1103 if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
1106 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
1107 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1108 if (!in_mad || !out_mad) {
1109 mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
1113 guid_tbl_blk_num *= 4;
1115 for (i = 0; i < 4; i++) {
1116 if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1118 memset(in_mad, 0, sizeof *in_mad);
1119 memset(out_mad, 0, sizeof *out_mad);
1121 in_mad->base_version = 1;
1122 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1123 in_mad->class_version = 1;
1124 in_mad->method = IB_MGMT_METHOD_GET;
1125 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
1126 in_mad->attr_mod = cpu_to_be32(guid_tbl_blk_num + i);
1128 if (mlx4_MAD_IFC(dev,
1129 MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1130 port_num, NULL, NULL, in_mad, out_mad)) {
1131 mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1135 mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1137 (u8 *)(&((struct ib_smp *)out_mad)->data));
1138 mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1140 (u8 *)(&((struct ib_smp *)out_mad)->data));
1149 void handle_port_mgmt_change_event(struct work_struct *work)
1151 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1152 struct mlx4_ib_dev *dev = ew->ib_dev;
1153 struct mlx4_eqe *eqe = &(ew->ib_eqe);
1154 u8 port = eqe->event.port_mgmt_change.port;
1159 switch (eqe->subtype) {
1160 case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1161 changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1163 /* Update the SM ah - This should be done before handling
1164 the other changed attributes so that MADs can be sent to the SM */
1165 if (changed_attr & MSTR_SM_CHANGE_MASK) {
1166 u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1167 u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1168 update_sm_ah(dev, port, lid, sl);
1171 /* Check if it is a lid change event */
1172 if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1173 handle_lid_change_event(dev, port);
1175 /* Generate GUID changed event */
1176 if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1177 if (mlx4_is_master(dev->dev)) {
1181 if (!eqe->event.port_mgmt_change.params.port_info.gid_prefix)
1182 err = __mlx4_ib_query_gid(&dev->ib_dev, port, 0, &gid, 1);
1184 gid.global.subnet_prefix =
1185 eqe->event.port_mgmt_change.params.port_info.gid_prefix;
1187 pr_warn("Could not change QP1 subnet prefix for port %d: query_gid error (%d)\n",
1190 pr_debug("Changing QP1 subnet prefix for port %d. old=0x%llx. new=0x%llx\n",
1192 (long long)atomic64_read(&dev->sriov.demux[port - 1].subnet_prefix),
1193 (long long)be64_to_cpu(gid.global.subnet_prefix));
1194 atomic64_set(&dev->sriov.demux[port - 1].subnet_prefix,
1195 be64_to_cpu(gid.global.subnet_prefix));
1198 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1199 /*if master, notify all slaves*/
1200 if (mlx4_is_master(dev->dev))
1201 mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1202 MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1205 if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1206 handle_client_rereg_event(dev, port);
1209 case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1210 mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1211 if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1212 propagate_pkey_ev(dev, port, eqe);
1214 case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1215 /* paravirtualized master's guid is guid 0 -- does not change */
1216 if (!mlx4_is_master(dev->dev))
1217 mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1218 /*if master, notify relevant slaves*/
1219 else if (!dev->sriov.is_going_down) {
1220 tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1221 change_bitmap = GET_MASK_FROM_EQE(eqe);
1222 handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1226 case MLX4_DEV_PMC_SUBTYPE_SL_TO_VL_MAP:
1227 /* cache sl to vl mapping changes for use in
1228 * filling QP1 LRH VL field when sending packets
1230 if (!mlx4_is_slave(dev->dev)) {
1231 union sl2vl_tbl_to_u64 sl2vl64;
1234 for (jj = 0; jj < 8; jj++) {
1236 eqe->event.port_mgmt_change.params.sl2vl_tbl_change_info.sl2vl_table[jj];
1237 pr_debug("sl2vl[%d] = %02x\n", jj, sl2vl64.sl8[jj]);
1239 atomic64_set(&dev->sl2vl[port - 1], sl2vl64.sl64);
1243 pr_warn("Unsupported subtype 0x%x for "
1244 "Port Management Change event\n", eqe->subtype);
1250 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1251 enum ib_event_type type)
1253 struct ib_event event;
1255 event.device = &dev->ib_dev;
1256 event.element.port_num = port_num;
1259 ib_dispatch_event(&event);
1262 static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1264 unsigned long flags;
1265 struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1266 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1267 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1268 if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1269 queue_work(ctx->wq, &ctx->work);
1270 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1273 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1274 struct mlx4_ib_demux_pv_qp *tun_qp,
1277 struct ib_sge sg_list;
1278 struct ib_recv_wr recv_wr, *bad_recv_wr;
1281 size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1282 sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1284 sg_list.addr = tun_qp->ring[index].map;
1285 sg_list.length = size;
1286 sg_list.lkey = ctx->pd->local_dma_lkey;
1288 recv_wr.next = NULL;
1289 recv_wr.sg_list = &sg_list;
1290 recv_wr.num_sge = 1;
1291 recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1292 MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1293 ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1294 size, DMA_FROM_DEVICE);
1295 return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1298 static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1299 int slave, struct ib_sa_mad *sa_mad)
1303 /* dispatch to different sa handlers */
1304 switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1305 case IB_SA_ATTR_MC_MEMBER_REC:
1306 ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1314 static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1316 int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1318 return (qpn >= proxy_start && qpn <= proxy_start + 1);
1322 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1323 enum ib_qp_type dest_qpt, u16 pkey_index,
1324 u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1325 u8 *s_mac, u16 vlan_id, struct ib_mad *mad)
1329 struct ib_send_wr *bad_wr;
1330 struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1331 struct mlx4_ib_demux_pv_qp *sqp;
1332 struct mlx4_mad_snd_buf *sqp_mad;
1334 struct ib_qp *send_qp = NULL;
1335 unsigned wire_tx_ix = 0;
1342 sqp_ctx = dev->sriov.sqps[port-1];
1344 /* check if proxy qp created */
1345 if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1348 if (dest_qpt == IB_QPT_SMI) {
1350 sqp = &sqp_ctx->qp[0];
1351 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1354 sqp = &sqp_ctx->qp[1];
1355 wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1361 sgid_index = attr->grh.sgid_index;
1362 attr->grh.sgid_index = 0;
1363 ah = ib_create_ah(sqp_ctx->pd, attr);
1366 attr->grh.sgid_index = sgid_index;
1367 to_mah(ah)->av.ib.gid_index = sgid_index;
1368 /* get rid of force-loopback bit */
1369 to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1370 spin_lock(&sqp->tx_lock);
1371 if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1372 (MLX4_NUM_TUNNEL_BUFS - 1))
1375 wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1376 spin_unlock(&sqp->tx_lock);
1380 sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1381 if (sqp->tx_ring[wire_tx_ix].ah)
1382 ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1383 sqp->tx_ring[wire_tx_ix].ah = ah;
1384 ib_dma_sync_single_for_cpu(&dev->ib_dev,
1385 sqp->tx_ring[wire_tx_ix].buf.map,
1386 sizeof (struct mlx4_mad_snd_buf),
1389 memcpy(&sqp_mad->payload, mad, sizeof *mad);
1391 ib_dma_sync_single_for_device(&dev->ib_dev,
1392 sqp->tx_ring[wire_tx_ix].buf.map,
1393 sizeof (struct mlx4_mad_snd_buf),
1396 list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1397 list.length = sizeof (struct mlx4_mad_snd_buf);
1398 list.lkey = sqp_ctx->pd->local_dma_lkey;
1402 wr.pkey_index = wire_pkey_ix;
1403 wr.remote_qkey = qkey;
1404 wr.remote_qpn = remote_qpn;
1406 wr.wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1407 wr.wr.sg_list = &list;
1409 wr.wr.opcode = IB_WR_SEND;
1410 wr.wr.send_flags = IB_SEND_SIGNALED;
1412 memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1413 if (vlan_id < 0x1000)
1414 vlan_id |= (attr->sl & 7) << 13;
1415 to_mah(ah)->av.eth.vlan = cpu_to_be16(vlan_id);
1418 ret = ib_post_send(send_qp, &wr.wr, &bad_wr);
1422 spin_lock(&sqp->tx_lock);
1424 spin_unlock(&sqp->tx_lock);
1425 sqp->tx_ring[wire_tx_ix].ah = NULL;
1431 static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1433 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1435 return mlx4_get_base_gid_ix(dev->dev, slave, port);
1438 static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1439 struct ib_ah_attr *ah_attr)
1441 if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1442 ah_attr->grh.sgid_index = slave;
1444 ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1447 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1449 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1450 struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1451 int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1452 struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1453 struct mlx4_ib_ah ah;
1454 struct ib_ah_attr ah_attr;
1460 /* Get slave that sent this packet */
1461 if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1462 wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1463 (wc->src_qp & 0x1) != ctx->port - 1 ||
1465 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1468 slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1469 if (slave != ctx->slave) {
1470 mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1471 "belongs to another slave\n", wc->src_qp);
1475 /* Map transaction ID */
1476 ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1477 sizeof (struct mlx4_tunnel_mad),
1479 switch (tunnel->mad.mad_hdr.method) {
1480 case IB_MGMT_METHOD_SET:
1481 case IB_MGMT_METHOD_GET:
1482 case IB_MGMT_METHOD_REPORT:
1483 case IB_SA_METHOD_GET_TABLE:
1484 case IB_SA_METHOD_DELETE:
1485 case IB_SA_METHOD_GET_MULTI:
1486 case IB_SA_METHOD_GET_TRACE_TBL:
1487 slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1489 mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1490 "class:%d slave:%d\n", *slave_id,
1491 tunnel->mad.mad_hdr.mgmt_class, slave);
1499 /* Class-specific handling */
1500 switch (tunnel->mad.mad_hdr.mgmt_class) {
1501 case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1502 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1503 if (slave != mlx4_master_func_num(dev->dev) &&
1504 !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1507 case IB_MGMT_CLASS_SUBN_ADM:
1508 if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1509 (struct ib_sa_mad *) &tunnel->mad))
1512 case IB_MGMT_CLASS_CM:
1513 if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1514 (struct ib_mad *) &tunnel->mad))
1517 case IB_MGMT_CLASS_DEVICE_MGMT:
1518 if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1519 tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1523 /* Drop unsupported classes for slaves in tunnel mode */
1524 if (slave != mlx4_master_func_num(dev->dev)) {
1525 mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1526 "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1531 /* We are using standard ib_core services to send the mad, so generate a
1532 * stadard address handle by decoding the tunnelled mlx4_ah fields */
1533 memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1534 ah.ibah.device = ctx->ib_dev;
1536 port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1537 port = mlx4_slave_convert_port(dev->dev, slave, port);
1540 ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1542 mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1543 if (ah_attr.ah_flags & IB_AH_GRH)
1544 fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1546 memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1547 vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1548 /* if slave have default vlan use it */
1549 mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1550 &vlan_id, &ah_attr.sl);
1552 mlx4_ib_send_to_wire(dev, slave, ctx->port,
1553 is_proxy_qp0(dev, wc->src_qp, slave) ?
1554 IB_QPT_SMI : IB_QPT_GSI,
1555 be16_to_cpu(tunnel->hdr.pkey_index),
1556 be32_to_cpu(tunnel->hdr.remote_qpn),
1557 be32_to_cpu(tunnel->hdr.qkey),
1558 &ah_attr, wc->smac, vlan_id, &tunnel->mad);
1561 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1562 enum ib_qp_type qp_type, int is_tun)
1565 struct mlx4_ib_demux_pv_qp *tun_qp;
1566 int rx_buf_size, tx_buf_size;
1568 if (qp_type > IB_QPT_GSI)
1571 tun_qp = &ctx->qp[qp_type];
1573 tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1578 tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1579 sizeof (struct mlx4_ib_tun_tx_buf),
1581 if (!tun_qp->tx_ring) {
1582 kfree(tun_qp->ring);
1583 tun_qp->ring = NULL;
1588 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1589 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1591 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1592 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1595 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1596 tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1597 if (!tun_qp->ring[i].addr)
1599 tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1600 tun_qp->ring[i].addr,
1603 if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1604 kfree(tun_qp->ring[i].addr);
1609 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1610 tun_qp->tx_ring[i].buf.addr =
1611 kmalloc(tx_buf_size, GFP_KERNEL);
1612 if (!tun_qp->tx_ring[i].buf.addr)
1614 tun_qp->tx_ring[i].buf.map =
1615 ib_dma_map_single(ctx->ib_dev,
1616 tun_qp->tx_ring[i].buf.addr,
1619 if (ib_dma_mapping_error(ctx->ib_dev,
1620 tun_qp->tx_ring[i].buf.map)) {
1621 kfree(tun_qp->tx_ring[i].buf.addr);
1624 tun_qp->tx_ring[i].ah = NULL;
1626 spin_lock_init(&tun_qp->tx_lock);
1627 tun_qp->tx_ix_head = 0;
1628 tun_qp->tx_ix_tail = 0;
1629 tun_qp->proxy_qpt = qp_type;
1636 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1637 tx_buf_size, DMA_TO_DEVICE);
1638 kfree(tun_qp->tx_ring[i].buf.addr);
1640 kfree(tun_qp->tx_ring);
1641 tun_qp->tx_ring = NULL;
1642 i = MLX4_NUM_TUNNEL_BUFS;
1646 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1647 rx_buf_size, DMA_FROM_DEVICE);
1648 kfree(tun_qp->ring[i].addr);
1650 kfree(tun_qp->ring);
1651 tun_qp->ring = NULL;
1655 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1656 enum ib_qp_type qp_type, int is_tun)
1659 struct mlx4_ib_demux_pv_qp *tun_qp;
1660 int rx_buf_size, tx_buf_size;
1662 if (qp_type > IB_QPT_GSI)
1665 tun_qp = &ctx->qp[qp_type];
1667 rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1668 tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1670 rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1671 tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1675 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1676 ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1677 rx_buf_size, DMA_FROM_DEVICE);
1678 kfree(tun_qp->ring[i].addr);
1681 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1682 ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1683 tx_buf_size, DMA_TO_DEVICE);
1684 kfree(tun_qp->tx_ring[i].buf.addr);
1685 if (tun_qp->tx_ring[i].ah)
1686 ib_destroy_ah(tun_qp->tx_ring[i].ah);
1688 kfree(tun_qp->tx_ring);
1689 kfree(tun_qp->ring);
1692 static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1694 struct mlx4_ib_demux_pv_ctx *ctx;
1695 struct mlx4_ib_demux_pv_qp *tun_qp;
1698 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1699 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1701 while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1702 tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1703 if (wc.status == IB_WC_SUCCESS) {
1704 switch (wc.opcode) {
1706 mlx4_ib_multiplex_mad(ctx, &wc);
1707 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1709 (MLX4_NUM_TUNNEL_BUFS - 1));
1711 pr_err("Failed reposting tunnel "
1712 "buf:%lld\n", (unsigned long long)wc.wr_id);
1715 pr_debug("received tunnel send completion:"
1716 "wrid=0x%llx, status=0x%x\n",
1717 (unsigned long long)wc.wr_id, wc.status);
1718 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1719 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1720 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1722 spin_lock(&tun_qp->tx_lock);
1723 tun_qp->tx_ix_tail++;
1724 spin_unlock(&tun_qp->tx_lock);
1731 pr_debug("mlx4_ib: completion error in tunnel: %d."
1732 " status = %d, wrid = 0x%llx\n",
1733 ctx->slave, wc.status, (unsigned long long)wc.wr_id);
1734 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1735 ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1736 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1737 tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1739 spin_lock(&tun_qp->tx_lock);
1740 tun_qp->tx_ix_tail++;
1741 spin_unlock(&tun_qp->tx_lock);
1747 static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1749 struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1751 /* It's worse than that! He's dead, Jim! */
1752 pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1753 event->event, sqp->port);
1756 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1757 enum ib_qp_type qp_type, int create_tun)
1760 struct mlx4_ib_demux_pv_qp *tun_qp;
1761 struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1762 struct ib_qp_attr attr;
1763 int qp_attr_mask_INIT;
1765 if (qp_type > IB_QPT_GSI)
1768 tun_qp = &ctx->qp[qp_type];
1770 memset(&qp_init_attr, 0, sizeof qp_init_attr);
1771 qp_init_attr.init_attr.send_cq = ctx->cq;
1772 qp_init_attr.init_attr.recv_cq = ctx->cq;
1773 qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1774 qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1775 qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1776 qp_init_attr.init_attr.cap.max_send_sge = 1;
1777 qp_init_attr.init_attr.cap.max_recv_sge = 1;
1779 qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1780 qp_init_attr.init_attr.create_flags =
1781 (enum ib_qp_create_flags)MLX4_IB_SRIOV_TUNNEL_QP;
1782 qp_init_attr.port = ctx->port;
1783 qp_init_attr.slave = ctx->slave;
1784 qp_init_attr.proxy_qp_type = qp_type;
1785 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1786 IB_QP_QKEY | IB_QP_PORT;
1788 qp_init_attr.init_attr.qp_type = qp_type;
1789 qp_init_attr.init_attr.create_flags =
1790 (enum ib_qp_create_flags)MLX4_IB_SRIOV_SQP;
1791 qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1793 qp_init_attr.init_attr.port_num = ctx->port;
1794 qp_init_attr.init_attr.qp_context = ctx;
1795 qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1796 tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1797 if (IS_ERR(tun_qp->qp)) {
1798 ret = PTR_ERR(tun_qp->qp);
1800 pr_err("Couldn't create %s QP (%d)\n",
1801 create_tun ? "tunnel" : "special", ret);
1805 memset(&attr, 0, sizeof attr);
1806 attr.qp_state = IB_QPS_INIT;
1809 ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1810 ctx->port, IB_DEFAULT_PKEY_FULL,
1812 if (ret || !create_tun)
1814 to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1815 attr.qkey = IB_QP1_QKEY;
1816 attr.port_num = ctx->port;
1817 ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1819 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1820 create_tun ? "tunnel" : "special", ret);
1823 attr.qp_state = IB_QPS_RTR;
1824 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1826 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1827 create_tun ? "tunnel" : "special", ret);
1830 attr.qp_state = IB_QPS_RTS;
1832 ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1834 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1835 create_tun ? "tunnel" : "special", ret);
1839 for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1840 ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1842 pr_err(" mlx4_ib_post_pv_buf error"
1843 " (err = %d, i = %d)\n", ret, i);
1850 ib_destroy_qp(tun_qp->qp);
1856 * IB MAD completion callback for real SQPs
1858 static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1860 struct mlx4_ib_demux_pv_ctx *ctx;
1861 struct mlx4_ib_demux_pv_qp *sqp;
1866 ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1867 ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1869 while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1870 sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1871 if (wc.status == IB_WC_SUCCESS) {
1872 switch (wc.opcode) {
1874 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1875 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1876 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1878 spin_lock(&sqp->tx_lock);
1880 spin_unlock(&sqp->tx_lock);
1883 mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1884 (sqp->ring[wc.wr_id &
1885 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1886 grh = &(((struct mlx4_mad_rcv_buf *)
1887 (sqp->ring[wc.wr_id &
1888 (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1889 mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1890 if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1891 (MLX4_NUM_TUNNEL_BUFS - 1)))
1892 pr_err("Failed reposting SQP "
1893 "buf:%lld\n", (unsigned long long)wc.wr_id);
1900 pr_debug("mlx4_ib: completion error in tunnel: %d."
1901 " status = %d, wrid = 0x%llx\n",
1902 ctx->slave, wc.status, (unsigned long long)wc.wr_id);
1903 if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1904 ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1905 (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1906 sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1908 spin_lock(&sqp->tx_lock);
1910 spin_unlock(&sqp->tx_lock);
1916 static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1917 struct mlx4_ib_demux_pv_ctx **ret_ctx)
1919 struct mlx4_ib_demux_pv_ctx *ctx;
1922 ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1924 pr_err("failed allocating pv resource context "
1925 "for port %d, slave %d\n", port, slave);
1929 ctx->ib_dev = &dev->ib_dev;
1936 static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1938 if (dev->sriov.demux[port - 1].tun[slave]) {
1939 kfree(dev->sriov.demux[port - 1].tun[slave]);
1940 dev->sriov.demux[port - 1].tun[slave] = NULL;
1944 static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1945 int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1948 struct ib_cq_init_attr cq_attr = {};
1950 if (ctx->state != DEMUX_PV_STATE_DOWN)
1953 ctx->state = DEMUX_PV_STATE_STARTING;
1954 /* have QP0 only if link layer is IB */
1955 if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1956 IB_LINK_LAYER_INFINIBAND)
1960 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1962 pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1967 ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1969 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1973 cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1977 cq_attr.cqe = cq_size;
1978 ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1979 NULL, ctx, &cq_attr);
1980 if (IS_ERR(ctx->cq)) {
1981 ret = PTR_ERR(ctx->cq);
1982 pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1986 ctx->pd = ib_alloc_pd(ctx->ib_dev, 0);
1987 if (IS_ERR(ctx->pd)) {
1988 ret = PTR_ERR(ctx->pd);
1989 pr_err("Couldn't create tunnel PD (%d)\n", ret);
1994 ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1996 pr_err("Couldn't create %s QP0 (%d)\n",
1997 create_tun ? "tunnel for" : "", ret);
2002 ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
2004 pr_err("Couldn't create %s QP1 (%d)\n",
2005 create_tun ? "tunnel for" : "", ret);
2010 INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
2012 INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
2014 ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
2016 ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
2018 pr_err("Couldn't arm tunnel cq (%d)\n", ret);
2021 ctx->state = DEMUX_PV_STATE_ACTIVE;
2026 ib_destroy_qp(ctx->qp[1].qp);
2027 ctx->qp[1].qp = NULL;
2032 ib_destroy_qp(ctx->qp[0].qp);
2033 ctx->qp[0].qp = NULL;
2036 ib_dealloc_pd(ctx->pd);
2040 ib_destroy_cq(ctx->cq);
2044 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
2048 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
2050 ctx->state = DEMUX_PV_STATE_DOWN;
2054 static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
2055 struct mlx4_ib_demux_pv_ctx *ctx, int flush)
2059 if (ctx->state > DEMUX_PV_STATE_DOWN) {
2060 ctx->state = DEMUX_PV_STATE_DOWNING;
2062 flush_workqueue(ctx->wq);
2064 ib_destroy_qp(ctx->qp[0].qp);
2065 ctx->qp[0].qp = NULL;
2066 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
2068 ib_destroy_qp(ctx->qp[1].qp);
2069 ctx->qp[1].qp = NULL;
2070 mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
2071 ib_dealloc_pd(ctx->pd);
2073 ib_destroy_cq(ctx->cq);
2075 ctx->state = DEMUX_PV_STATE_DOWN;
2079 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
2080 int port, int do_init)
2085 clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
2086 /* for master, destroy real sqp resources */
2087 if (slave == mlx4_master_func_num(dev->dev))
2088 destroy_pv_resources(dev, slave, port,
2089 dev->sriov.sqps[port - 1], 1);
2090 /* destroy the tunnel qp resources */
2091 destroy_pv_resources(dev, slave, port,
2092 dev->sriov.demux[port - 1].tun[slave], 1);
2096 /* create the tunnel qp resources */
2097 ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
2098 dev->sriov.demux[port - 1].tun[slave]);
2100 /* for master, create the real sqp resources */
2101 if (!ret && slave == mlx4_master_func_num(dev->dev))
2102 ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
2103 dev->sriov.sqps[port - 1]);
2107 void mlx4_ib_tunnels_update_work(struct work_struct *work)
2109 struct mlx4_ib_demux_work *dmxw;
2111 dmxw = container_of(work, struct mlx4_ib_demux_work, work);
2112 mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
2118 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
2119 struct mlx4_ib_demux_ctx *ctx,
2126 ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
2127 sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
2133 ctx->ib_dev = &dev->ib_dev;
2136 i < min(dev->dev->caps.sqp_demux,
2137 (u16)(dev->dev->persist->num_vfs + 1));
2139 struct mlx4_active_ports actv_ports =
2140 mlx4_get_active_ports(dev->dev, i);
2142 if (!test_bit(port - 1, actv_ports.ports))
2145 ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
2152 ret = mlx4_ib_mcg_port_init(ctx);
2154 pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2158 snprintf(name, sizeof name, "mlx4_ibt%d", port);
2159 ctx->wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2161 pr_err("Failed to create tunnelling WQ for port %d\n", port);
2166 snprintf(name, sizeof name, "mlx4_ibud%d", port);
2167 ctx->ud_wq = alloc_ordered_workqueue(name, WQ_MEM_RECLAIM);
2169 pr_err("Failed to create up/down WQ for port %d\n", port);
2177 destroy_workqueue(ctx->wq);
2181 mlx4_ib_mcg_port_cleanup(ctx, 1);
2183 for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2184 free_pv_object(dev, i, port);
2190 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2192 if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2193 sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2194 flush_workqueue(sqp_ctx->wq);
2195 if (sqp_ctx->has_smi) {
2196 ib_destroy_qp(sqp_ctx->qp[0].qp);
2197 sqp_ctx->qp[0].qp = NULL;
2198 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2200 ib_destroy_qp(sqp_ctx->qp[1].qp);
2201 sqp_ctx->qp[1].qp = NULL;
2202 mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2203 ib_dealloc_pd(sqp_ctx->pd);
2205 ib_destroy_cq(sqp_ctx->cq);
2207 sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2211 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2215 struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2216 mlx4_ib_mcg_port_cleanup(ctx, 1);
2217 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2220 if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2221 ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2223 flush_workqueue(ctx->wq);
2224 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2225 destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2226 free_pv_object(dev, i, ctx->port);
2229 destroy_workqueue(ctx->ud_wq);
2230 destroy_workqueue(ctx->wq);
2234 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2238 if (!mlx4_is_master(dev->dev))
2240 /* initialize or tear down tunnel QPs for the master */
2241 for (i = 0; i < dev->dev->caps.num_ports; i++)
2242 mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2246 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2251 if (!mlx4_is_mfunc(dev->dev))
2254 dev->sriov.is_going_down = 0;
2255 spin_lock_init(&dev->sriov.going_down_lock);
2256 mlx4_ib_cm_paravirt_init(dev);
2258 mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2260 if (mlx4_is_slave(dev->dev)) {
2261 mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2265 for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2266 if (i == mlx4_master_func_num(dev->dev))
2267 mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2269 mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2272 err = mlx4_ib_init_alias_guid_service(dev);
2274 mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2277 err = mlx4_ib_device_register_sysfs(dev);
2279 mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2283 mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2284 dev->dev->caps.sqp_demux);
2285 for (i = 0; i < dev->num_ports; i++) {
2287 err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2290 dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2291 atomic64_set(&dev->sriov.demux[i].subnet_prefix,
2292 be64_to_cpu(gid.global.subnet_prefix));
2293 err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2294 &dev->sriov.sqps[i]);
2297 err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2301 mlx4_ib_master_tunnels(dev, 1);
2305 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2308 free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2309 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2311 mlx4_ib_device_unregister_sysfs(dev);
2314 mlx4_ib_destroy_alias_guid_service(dev);
2317 mlx4_ib_cm_paravirt_clean(dev, -1);
2322 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2325 unsigned long flags;
2327 if (!mlx4_is_mfunc(dev->dev))
2330 spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2331 dev->sriov.is_going_down = 1;
2332 spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2333 if (mlx4_is_master(dev->dev)) {
2334 for (i = 0; i < dev->num_ports; i++) {
2335 flush_workqueue(dev->sriov.demux[i].ud_wq);
2336 mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2337 kfree(dev->sriov.sqps[i]);
2338 dev->sriov.sqps[i] = NULL;
2339 mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2342 mlx4_ib_cm_paravirt_clean(dev, -1);
2343 mlx4_ib_destroy_alias_guid_service(dev);
2344 mlx4_ib_device_unregister_sysfs(dev);