2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #define LINUXKPI_PARAM_PREFIX mlx4_
36 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/errno.h>
39 #include <linux/etherdevice.h>
40 #include <linux/netdevice.h>
41 #include <linux/inetdevice.h>
42 #include <linux/if_vlan.h>
44 #include <linux/rcupdate.h>
45 #include <linux/notifier.h>
46 #include <linux/delay.h>
50 #include <rdma/ib_smi.h>
51 #include <rdma/ib_user_verbs.h>
52 #include <rdma/ib_addr.h>
53 #include <rdma/ib_cache.h>
55 #include <dev/mlx4/driver.h>
56 #include <dev/mlx4/cmd.h>
57 #include <dev/mlx4/qp.h>
58 #include <linux/sched.h>
59 #include <linux/page.h>
60 #include <linux/printk.h>
62 #include <rdma/mlx4-abi.h>
65 #define DRV_NAME MLX4_IB_DRV_NAME
67 #define DRV_VERSION "3.6.0"
69 #define DRV_RELDATE "December 2020"
71 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
72 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
73 #define MLX4_IB_CARD_REV_A0 0xA0
75 MODULE_AUTHOR("Roland Dreier");
76 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
77 MODULE_LICENSE("Dual BSD/GPL");
79 int mlx4_ib_sm_guid_assign = 0;
80 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
81 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
83 static const char mlx4_ib_version[] =
84 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
85 DRV_VERSION " (" DRV_RELDATE ")\n";
87 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
89 static struct workqueue_struct *wq;
91 static void init_query_mad(struct ib_smp *mad)
93 mad->base_version = 1;
94 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
95 mad->class_version = 1;
96 mad->method = IB_MGMT_METHOD_GET;
99 static int check_flow_steering_support(struct mlx4_dev *dev)
101 int eth_num_ports = 0;
102 int ib_num_ports = 0;
104 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
108 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
110 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
112 dmfs &= (!ib_num_ports ||
113 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
115 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
116 if (ib_num_ports && mlx4_is_mfunc(dev)) {
117 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
124 static int num_ib_ports(struct mlx4_dev *dev)
129 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
135 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device, u8 port_num)
137 struct mlx4_ib_dev *ibdev = to_mdev(device);
138 struct net_device *dev;
141 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
145 if (mlx4_is_bonded(ibdev->dev)) {
146 struct net_device *upper = NULL;
148 upper = netdev_master_upper_dev_get_rcu(dev);
150 struct net_device *active;
152 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
166 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
167 struct mlx4_ib_dev *ibdev,
170 struct mlx4_cmd_mailbox *mailbox;
172 struct mlx4_dev *dev = ibdev->dev;
174 union ib_gid *gid_tbl;
176 mailbox = mlx4_alloc_cmd_mailbox(dev);
180 gid_tbl = mailbox->buf;
182 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
183 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
185 err = mlx4_cmd(dev, mailbox->dma,
186 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
187 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
189 if (mlx4_is_bonded(dev))
190 err += mlx4_cmd(dev, mailbox->dma,
191 MLX4_SET_PORT_GID_TABLE << 8 | 2,
192 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
195 mlx4_free_cmd_mailbox(dev, mailbox);
199 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
200 struct mlx4_ib_dev *ibdev,
203 struct mlx4_cmd_mailbox *mailbox;
205 struct mlx4_dev *dev = ibdev->dev;
216 mailbox = mlx4_alloc_cmd_mailbox(dev);
220 gid_tbl = mailbox->buf;
221 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
222 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
223 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
224 gid_tbl[i].version = 2;
225 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
228 memset(&gid_tbl[i].gid, 0, 12);
232 err = mlx4_cmd(dev, mailbox->dma,
233 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
234 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
236 if (mlx4_is_bonded(dev))
237 err += mlx4_cmd(dev, mailbox->dma,
238 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
239 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
242 mlx4_free_cmd_mailbox(dev, mailbox);
246 static int mlx4_ib_update_gids(struct gid_entry *gids,
247 struct mlx4_ib_dev *ibdev,
250 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
251 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
253 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
256 static int mlx4_ib_add_gid(struct ib_device *device,
259 const union ib_gid *gid,
260 const struct ib_gid_attr *attr,
263 struct mlx4_ib_dev *ibdev = to_mdev(device);
264 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
265 struct mlx4_port_gid_table *port_gid_table;
266 int free = -1, found = -1;
270 struct gid_entry *gids = NULL;
272 if (!rdma_cap_roce_gid_table(device, port_num))
275 if (port_num > MLX4_MAX_PORTS)
281 port_gid_table = &iboe->gids[port_num - 1];
282 spin_lock_bh(&iboe->lock);
283 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
284 if (!memcmp(&port_gid_table->gids[i].gid, gid, sizeof(*gid)) &&
285 (port_gid_table->gids[i].gid_type == attr->gid_type)) {
289 if (free < 0 && !memcmp(&port_gid_table->gids[i].gid, &zgid, sizeof(*gid)))
290 free = i; /* HW has space */
297 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
298 if (!port_gid_table->gids[free].ctx) {
301 *context = port_gid_table->gids[free].ctx;
302 memcpy(&port_gid_table->gids[free].gid, gid, sizeof(*gid));
303 port_gid_table->gids[free].gid_type = attr->gid_type;
304 port_gid_table->gids[free].ctx->real_index = free;
305 port_gid_table->gids[free].ctx->refcount = 1;
310 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
314 if (!ret && hw_update) {
315 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
319 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
320 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
321 gids[i].gid_type = port_gid_table->gids[i].gid_type;
325 spin_unlock_bh(&iboe->lock);
327 if (!ret && hw_update) {
328 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
335 static int mlx4_ib_del_gid(struct ib_device *device,
340 struct gid_cache_context *ctx = *context;
341 struct mlx4_ib_dev *ibdev = to_mdev(device);
342 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
343 struct mlx4_port_gid_table *port_gid_table;
346 struct gid_entry *gids = NULL;
348 if (!rdma_cap_roce_gid_table(device, port_num))
351 if (port_num > MLX4_MAX_PORTS)
354 port_gid_table = &iboe->gids[port_num - 1];
355 spin_lock_bh(&iboe->lock);
358 if (!ctx->refcount) {
359 unsigned int real_index = ctx->real_index;
361 memcpy(&port_gid_table->gids[real_index].gid, &zgid, sizeof(zgid));
362 kfree(port_gid_table->gids[real_index].ctx);
363 port_gid_table->gids[real_index].ctx = NULL;
367 if (!ret && hw_update) {
370 gids = kmalloc(sizeof(*gids) * MLX4_MAX_PORT_GIDS, GFP_ATOMIC);
374 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
376 &port_gid_table->gids[i].gid,
377 sizeof(union ib_gid));
379 port_gid_table->gids[i].gid_type;
383 spin_unlock_bh(&iboe->lock);
385 if (!ret && hw_update) {
386 ret = mlx4_ib_update_gids(gids, ibdev, port_num);
392 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
393 u8 port_num, int index)
395 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
396 struct gid_cache_context *ctx = NULL;
398 struct mlx4_port_gid_table *port_gid_table;
399 int real_index = -EINVAL;
403 struct ib_gid_attr attr;
405 if (port_num > MLX4_MAX_PORTS)
408 if (mlx4_is_bonded(ibdev->dev))
411 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
414 ret = ib_get_cached_gid(&ibdev->ib_dev, port_num, index, &gid, &attr);
421 if (!memcmp(&gid, &zgid, sizeof(gid)))
424 spin_lock_irqsave(&iboe->lock, flags);
425 port_gid_table = &iboe->gids[port_num - 1];
427 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
428 if (!memcmp(&port_gid_table->gids[i].gid, &gid, sizeof(gid)) &&
429 attr.gid_type == port_gid_table->gids[i].gid_type) {
430 ctx = port_gid_table->gids[i].ctx;
434 real_index = ctx->real_index;
435 spin_unlock_irqrestore(&iboe->lock, flags);
439 static int mlx4_ib_query_device(struct ib_device *ibdev,
440 struct ib_device_attr *props,
441 struct ib_udata *uhw)
443 struct mlx4_ib_dev *dev = to_mdev(ibdev);
444 struct ib_smp *in_mad = NULL;
445 struct ib_smp *out_mad = NULL;
448 struct mlx4_uverbs_ex_query_device cmd;
449 struct mlx4_uverbs_ex_query_device_resp resp = {.comp_mask = 0};
450 struct mlx4_clock_params clock_params;
453 if (uhw->inlen < sizeof(cmd))
456 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
467 resp.response_length = offsetof(typeof(resp), response_length) +
468 sizeof(resp.response_length);
469 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
470 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
471 if (!in_mad || !out_mad)
474 init_query_mad(in_mad);
475 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
477 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
478 1, NULL, NULL, in_mad, out_mad);
482 memset(props, 0, sizeof *props);
484 have_ib_ports = num_ib_ports(dev->dev);
486 props->fw_ver = dev->dev->caps.fw_ver;
487 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
488 IB_DEVICE_PORT_ACTIVE_EVENT |
489 IB_DEVICE_SYS_IMAGE_GUID |
490 IB_DEVICE_RC_RNR_NAK_GEN |
491 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
492 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
493 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
494 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
495 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
496 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
497 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
498 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
499 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
500 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
501 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
502 if (dev->dev->caps.max_gso_sz &&
503 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
504 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
505 props->device_cap_flags |= IB_DEVICE_UD_TSO;
506 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
507 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
508 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
509 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
510 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
511 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
512 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
513 props->device_cap_flags |= IB_DEVICE_XRC;
514 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
515 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
516 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
517 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
518 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
520 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
522 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
523 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
525 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
527 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
529 props->vendor_part_id = dev->dev->persist->pdev->device;
530 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
531 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
533 props->max_mr_size = ~0ull;
534 props->page_size_cap = dev->dev->caps.page_size_cap;
535 props->max_qp = dev->dev->quotas.qp;
536 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
537 props->max_sge = min(dev->dev->caps.max_sq_sg,
538 dev->dev->caps.max_rq_sg);
539 props->max_sge_rd = MLX4_MAX_SGE_RD;
540 props->max_cq = dev->dev->quotas.cq;
541 props->max_cqe = dev->dev->caps.max_cqes;
542 props->max_mr = dev->dev->quotas.mpt;
543 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
544 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
545 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
546 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
547 props->max_srq = dev->dev->quotas.srq;
548 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
549 props->max_srq_sge = dev->dev->caps.max_srq_sge;
550 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
551 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
552 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
553 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
554 props->masked_atomic_cap = props->atomic_cap;
555 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
556 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
557 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
558 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
559 props->max_mcast_grp;
560 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
561 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
562 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
564 if (!mlx4_is_slave(dev->dev))
565 err = mlx4_get_internal_clock_params(dev->dev, &clock_params);
567 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
568 resp.response_length += sizeof(resp.hca_core_clock_offset);
569 if (!err && !mlx4_is_slave(dev->dev)) {
570 resp.comp_mask |= QUERY_DEVICE_RESP_MASK_TIMESTAMP;
571 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
576 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
587 static enum rdma_link_layer
588 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
590 struct mlx4_dev *dev = to_mdev(device)->dev;
592 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
593 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
596 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
597 struct ib_port_attr *props, int netw_view)
599 struct ib_smp *in_mad = NULL;
600 struct ib_smp *out_mad = NULL;
601 int ext_active_speed;
602 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
605 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
606 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
607 if (!in_mad || !out_mad)
610 init_query_mad(in_mad);
611 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
612 in_mad->attr_mod = cpu_to_be32(port);
614 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
615 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
617 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
623 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
624 props->lmc = out_mad->data[34] & 0x7;
625 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
626 props->sm_sl = out_mad->data[36] & 0xf;
627 props->state = out_mad->data[32] & 0xf;
628 props->phys_state = out_mad->data[33] >> 4;
629 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
631 props->gid_tbl_len = out_mad->data[50];
633 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
634 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
635 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
636 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
637 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
638 props->active_width = out_mad->data[31] & 0xf;
639 props->active_speed = out_mad->data[35] >> 4;
640 props->max_mtu = out_mad->data[41] & 0xf;
641 props->active_mtu = out_mad->data[36] >> 4;
642 props->subnet_timeout = out_mad->data[51] & 0x1f;
643 props->max_vl_num = out_mad->data[37] >> 4;
644 props->init_type_reply = out_mad->data[41] >> 4;
646 /* Check if extended speeds (EDR/FDR/...) are supported */
647 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
648 ext_active_speed = out_mad->data[62] >> 4;
650 switch (ext_active_speed) {
652 props->active_speed = IB_SPEED_FDR;
655 props->active_speed = IB_SPEED_EDR;
660 /* If reported active speed is QDR, check if is FDR-10 */
661 if (props->active_speed == IB_SPEED_QDR) {
662 init_query_mad(in_mad);
663 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
664 in_mad->attr_mod = cpu_to_be32(port);
666 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
667 NULL, NULL, in_mad, out_mad);
671 /* Checking LinkSpeedActive for FDR-10 */
672 if (out_mad->data[15] & 0x1)
673 props->active_speed = IB_SPEED_FDR10;
676 /* Avoid wrong speed value returned by FW if the IB link is down. */
677 if (props->state == IB_PORT_DOWN)
678 props->active_speed = IB_SPEED_SDR;
686 static u8 state_to_phys_state(enum ib_port_state state)
688 return state == IB_PORT_ACTIVE ? 5 : 3;
691 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
692 struct ib_port_attr *props, int netw_view)
695 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
696 struct mlx4_ib_iboe *iboe = &mdev->iboe;
697 struct net_device *ndev;
699 struct mlx4_cmd_mailbox *mailbox;
701 int is_bonded = mlx4_is_bonded(mdev->dev);
703 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
705 return PTR_ERR(mailbox);
707 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
708 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
713 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
714 IB_WIDTH_4X : IB_WIDTH_1X;
715 props->active_speed = IB_SPEED_QDR;
716 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
717 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
718 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
719 props->pkey_tbl_len = 1;
720 props->max_mtu = IB_MTU_4096;
721 props->max_vl_num = 2;
722 props->state = IB_PORT_DOWN;
723 props->phys_state = state_to_phys_state(props->state);
724 props->active_mtu = IB_MTU_256;
725 spin_lock_bh(&iboe->lock);
726 ndev = iboe->netdevs[port - 1];
727 if (ndev && is_bonded) {
729 rcu_read_lock(); /* required to get upper dev */
730 ndev = netdev_master_upper_dev_get_rcu(ndev);
737 tmp = iboe_get_mtu(ndev->if_mtu);
738 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
740 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
741 IB_PORT_ACTIVE : IB_PORT_DOWN;
742 props->phys_state = state_to_phys_state(props->state);
744 spin_unlock_bh(&iboe->lock);
746 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
750 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
751 struct ib_port_attr *props, int netw_view)
755 memset(props, 0, sizeof *props);
757 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
758 ib_link_query_port(ibdev, port, props, netw_view) :
759 eth_link_query_port(ibdev, port, props, netw_view);
764 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
765 struct ib_port_attr *props)
767 /* returns host view */
768 return __mlx4_ib_query_port(ibdev, port, props, 0);
771 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
772 union ib_gid *gid, int netw_view)
774 struct ib_smp *in_mad = NULL;
775 struct ib_smp *out_mad = NULL;
777 struct mlx4_ib_dev *dev = to_mdev(ibdev);
779 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
781 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
782 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
783 if (!in_mad || !out_mad)
786 init_query_mad(in_mad);
787 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
788 in_mad->attr_mod = cpu_to_be32(port);
790 if (mlx4_is_mfunc(dev->dev) && netw_view)
791 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
793 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
797 memcpy(gid->raw, out_mad->data + 8, 8);
799 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
801 /* For any index > 0, return the null guid */
808 init_query_mad(in_mad);
809 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
810 in_mad->attr_mod = cpu_to_be32(index / 8);
812 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
813 NULL, NULL, in_mad, out_mad);
817 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
821 memset(gid->raw + 8, 0, 8);
827 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
832 if (rdma_protocol_ib(ibdev, port))
833 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
835 if (!rdma_protocol_roce(ibdev, port))
838 if (!rdma_cap_roce_gid_table(ibdev, port))
841 ret = ib_get_cached_gid(ibdev, port, index, gid, NULL);
842 if (ret == -EAGAIN) {
843 memcpy(gid, &zgid, sizeof(*gid));
850 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u8 port, u64 *sl2vl_tbl)
852 union sl2vl_tbl_to_u64 sl2vl64;
853 struct ib_smp *in_mad = NULL;
854 struct ib_smp *out_mad = NULL;
855 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
859 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
864 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
865 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
866 if (!in_mad || !out_mad)
869 init_query_mad(in_mad);
870 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
871 in_mad->attr_mod = 0;
873 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
874 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
876 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
881 for (jj = 0; jj < 8; jj++)
882 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
883 *sl2vl_tbl = sl2vl64.sl64;
891 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
897 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
898 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
900 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
902 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
906 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
910 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
911 u16 *pkey, int netw_view)
913 struct ib_smp *in_mad = NULL;
914 struct ib_smp *out_mad = NULL;
915 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
918 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
919 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
920 if (!in_mad || !out_mad)
923 init_query_mad(in_mad);
924 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
925 in_mad->attr_mod = cpu_to_be32(index / 32);
927 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
928 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
930 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
935 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
943 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
945 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
948 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
949 struct ib_device_modify *props)
951 struct mlx4_cmd_mailbox *mailbox;
954 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
957 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
960 if (mlx4_is_slave(to_mdev(ibdev)->dev))
963 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
964 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
965 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
968 * If possible, pass node desc to FW, so it can generate
969 * a 144 trap. If cmd fails, just ignore.
971 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
975 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
976 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
977 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
979 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
984 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
987 struct mlx4_cmd_mailbox *mailbox;
990 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
992 return PTR_ERR(mailbox);
994 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
995 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
996 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
998 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
999 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
1002 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1003 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1006 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1010 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
1011 struct ib_port_modify *props)
1013 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1014 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1015 struct ib_port_attr attr;
1019 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1020 * of whether port link layer is ETH or IB. For ETH ports, qkey
1021 * violations and port capabilities are not meaningful.
1026 mutex_lock(&mdev->cap_mask_mutex);
1028 err = mlx4_ib_query_port(ibdev, port, &attr);
1032 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1033 ~props->clr_port_cap_mask;
1035 err = mlx4_ib_SET_PORT(mdev, port,
1036 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1040 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1044 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
1045 struct ib_udata *udata)
1047 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1048 struct mlx4_ib_ucontext *context;
1049 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1050 struct mlx4_ib_alloc_ucontext_resp resp;
1053 if (!dev->ib_active)
1054 return ERR_PTR(-EAGAIN);
1056 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1057 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1058 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1059 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1061 resp.dev_caps = dev->dev->caps.userspace_caps;
1062 resp.qp_tab_size = dev->dev->caps.num_qps;
1063 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1064 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1065 resp.cqe_size = dev->dev->caps.cqe_size;
1068 context = kzalloc(sizeof(*context), GFP_KERNEL);
1070 return ERR_PTR(-ENOMEM);
1072 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1075 return ERR_PTR(err);
1078 INIT_LIST_HEAD(&context->db_page_list);
1079 mutex_init(&context->db_page_mutex);
1081 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1082 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1084 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1087 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1089 return ERR_PTR(-EFAULT);
1092 return &context->ibucontext;
1095 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1097 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1099 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1105 static void mlx4_ib_vma_open(struct vm_area_struct *area)
1107 /* vma_open is called when a new VMA is created on top of our VMA.
1108 * This is done through either mremap flow or split_vma (usually due
1109 * to mlock, madvise, munmap, etc.). We do not support a clone of the
1110 * vma, as this VMA is strongly hardware related. Therefore we set the
1111 * vm_ops of the newly created/cloned VMA to NULL, to prevent it from
1112 * calling us again and trying to do incorrect actions. We assume that
1113 * the original vma size is exactly a single page that there will be no
1114 * "splitting" operations on.
1116 area->vm_ops = NULL;
1119 static void mlx4_ib_vma_close(struct vm_area_struct *area)
1121 struct mlx4_ib_vma_private_data *mlx4_ib_vma_priv_data;
1123 /* It's guaranteed that all VMAs opened on a FD are closed before the
1124 * file itself is closed, therefore no sync is needed with the regular
1125 * closing flow. (e.g. mlx4_ib_dealloc_ucontext) However need a sync
1126 * with accessing the vma as part of mlx4_ib_disassociate_ucontext.
1127 * The close operation is usually called under mm->mmap_sem except when
1128 * process is exiting. The exiting case is handled explicitly as part
1129 * of mlx4_ib_disassociate_ucontext.
1131 mlx4_ib_vma_priv_data = (struct mlx4_ib_vma_private_data *)
1132 area->vm_private_data;
1134 /* set the vma context pointer to null in the mlx4_ib driver's private
1135 * data to protect against a race condition in mlx4_ib_dissassociate_ucontext().
1137 mlx4_ib_vma_priv_data->vma = NULL;
1140 static const struct vm_operations_struct mlx4_ib_vm_ops = {
1141 .open = mlx4_ib_vma_open,
1142 .close = mlx4_ib_vma_close
1145 static void mlx4_ib_set_vma_data(struct vm_area_struct *vma,
1146 struct mlx4_ib_vma_private_data *vma_private_data)
1148 vma_private_data->vma = vma;
1149 vma->vm_private_data = vma_private_data;
1150 vma->vm_ops = &mlx4_ib_vm_ops;
1153 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1155 struct mlx4_ib_dev *dev = to_mdev(context->device);
1156 struct mlx4_ib_ucontext *mucontext = to_mucontext(context);
1158 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
1161 if (vma->vm_pgoff == 0) {
1162 /* We prevent double mmaping on same context */
1163 if (mucontext->hw_bar_info[HW_BAR_DB].vma)
1166 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1168 if (io_remap_pfn_range(vma, vma->vm_start,
1169 to_mucontext(context)->uar.pfn,
1170 PAGE_SIZE, vma->vm_page_prot))
1173 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_DB]);
1175 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
1176 /* We prevent double mmaping on same context */
1177 if (mucontext->hw_bar_info[HW_BAR_BF].vma)
1180 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1182 if (io_remap_pfn_range(vma, vma->vm_start,
1183 to_mucontext(context)->uar.pfn +
1184 dev->dev->caps.num_uars,
1185 PAGE_SIZE, vma->vm_page_prot))
1188 mlx4_ib_set_vma_data(vma, &mucontext->hw_bar_info[HW_BAR_BF]);
1190 } else if (vma->vm_pgoff == 3) {
1191 struct mlx4_clock_params params;
1194 /* We prevent double mmaping on same context */
1195 if (mucontext->hw_bar_info[HW_BAR_CLOCK].vma)
1198 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1203 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1204 if (io_remap_pfn_range(vma, vma->vm_start,
1205 (pci_resource_start(dev->dev->persist->pdev,
1209 PAGE_SIZE, vma->vm_page_prot))
1212 mlx4_ib_set_vma_data(vma,
1213 &mucontext->hw_bar_info[HW_BAR_CLOCK]);
1221 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
1222 struct ib_ucontext *context,
1223 struct ib_udata *udata)
1225 struct mlx4_ib_pd *pd;
1228 pd = kmalloc(sizeof *pd, GFP_KERNEL);
1230 return ERR_PTR(-ENOMEM);
1232 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1235 return ERR_PTR(err);
1239 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
1240 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1242 return ERR_PTR(-EFAULT);
1248 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
1250 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1256 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
1257 struct ib_ucontext *context,
1258 struct ib_udata *udata)
1260 struct mlx4_ib_xrcd *xrcd;
1261 struct ib_cq_init_attr cq_attr = {};
1264 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1265 return ERR_PTR(-ENOSYS);
1267 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
1269 return ERR_PTR(-ENOMEM);
1271 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
1275 xrcd->pd = ib_alloc_pd(ibdev, 0);
1276 if (IS_ERR(xrcd->pd)) {
1277 err = PTR_ERR(xrcd->pd);
1282 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
1283 if (IS_ERR(xrcd->cq)) {
1284 err = PTR_ERR(xrcd->cq);
1288 return &xrcd->ibxrcd;
1291 ib_dealloc_pd(xrcd->pd);
1293 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
1296 return ERR_PTR(err);
1299 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1301 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1302 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1303 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1309 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1311 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1312 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1313 struct mlx4_ib_gid_entry *ge;
1315 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1320 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1321 ge->port = mqp->port;
1325 mutex_lock(&mqp->mutex);
1326 list_add_tail(&ge->list, &mqp->gid_list);
1327 mutex_unlock(&mqp->mutex);
1332 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1333 struct mlx4_ib_counters *ctr_table)
1335 struct counter_index *counter, *tmp_count;
1337 mutex_lock(&ctr_table->mutex);
1338 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1340 if (counter->allocated)
1341 mlx4_counter_free(ibdev->dev, counter->index);
1342 list_del(&counter->list);
1345 mutex_unlock(&ctr_table->mutex);
1348 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1351 struct net_device *ndev;
1357 spin_lock_bh(&mdev->iboe.lock);
1358 ndev = mdev->iboe.netdevs[mqp->port - 1];
1361 spin_unlock_bh(&mdev->iboe.lock);
1371 struct mlx4_ib_steering {
1372 struct list_head list;
1373 struct mlx4_flow_reg_id reg_id;
1377 #define LAST_ETH_FIELD vlan_tag
1378 #define LAST_IB_FIELD sl
1379 #define LAST_IPV4_FIELD dst_ip
1380 #define LAST_TCP_UDP_FIELD src_port
1382 /* Field is the last supported field */
1383 #define FIELDS_NOT_SUPPORTED(filter, field)\
1384 memchr_inv((void *)&filter.field +\
1385 sizeof(filter.field), 0,\
1387 offsetof(typeof(filter), field) -\
1388 sizeof(filter.field))
1390 static int parse_flow_attr(struct mlx4_dev *dev,
1392 union ib_flow_spec *ib_spec,
1393 struct _rule_hw *mlx4_spec)
1395 enum mlx4_net_trans_rule_id type;
1397 switch (ib_spec->type) {
1398 case IB_FLOW_SPEC_ETH:
1399 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1402 type = MLX4_NET_TRANS_RULE_ID_ETH;
1403 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1405 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1407 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1408 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1410 case IB_FLOW_SPEC_IB:
1411 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1414 type = MLX4_NET_TRANS_RULE_ID_IB;
1415 mlx4_spec->ib.l3_qpn =
1416 cpu_to_be32(qp_num);
1417 mlx4_spec->ib.qpn_mask =
1418 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1422 case IB_FLOW_SPEC_IPV4:
1423 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1426 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1427 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1428 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1429 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1430 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1433 case IB_FLOW_SPEC_TCP:
1434 case IB_FLOW_SPEC_UDP:
1435 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1438 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1439 MLX4_NET_TRANS_RULE_ID_TCP :
1440 MLX4_NET_TRANS_RULE_ID_UDP;
1441 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1442 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1443 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1444 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1450 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1451 mlx4_hw_rule_sz(dev, type) < 0)
1453 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1454 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1455 return mlx4_hw_rule_sz(dev, type);
1458 struct default_rules {
1459 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1460 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1461 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1464 static const struct default_rules default_table[] = {
1466 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1467 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1468 .rules_create_list = {IB_FLOW_SPEC_IB},
1469 .link_layer = IB_LINK_LAYER_INFINIBAND
1473 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1474 struct ib_flow_attr *flow_attr)
1478 const struct default_rules *pdefault_rules = default_table;
1479 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1481 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1482 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1483 memset(&field_types, 0, sizeof(field_types));
1485 if (link_layer != pdefault_rules->link_layer)
1488 ib_flow = flow_attr + 1;
1489 /* we assume the specs are sorted */
1490 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1491 j < flow_attr->num_of_specs; k++) {
1492 union ib_flow_spec *current_flow =
1493 (union ib_flow_spec *)ib_flow;
1495 /* same layer but different type */
1496 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1497 (pdefault_rules->mandatory_fields[k] &
1498 IB_FLOW_SPEC_LAYER_MASK)) &&
1499 (current_flow->type !=
1500 pdefault_rules->mandatory_fields[k]))
1503 /* same layer, try match next one */
1504 if (current_flow->type ==
1505 pdefault_rules->mandatory_fields[k]) {
1508 ((union ib_flow_spec *)ib_flow)->size;
1512 ib_flow = flow_attr + 1;
1513 for (j = 0; j < flow_attr->num_of_specs;
1514 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1515 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1516 /* same layer and same type */
1517 if (((union ib_flow_spec *)ib_flow)->type ==
1518 pdefault_rules->mandatory_not_fields[k])
1527 static int __mlx4_ib_create_default_rules(
1528 struct mlx4_ib_dev *mdev,
1530 const struct default_rules *pdefault_rules,
1531 struct _rule_hw *mlx4_spec) {
1535 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1537 union ib_flow_spec ib_spec;
1538 switch (pdefault_rules->rules_create_list[i]) {
1542 case IB_FLOW_SPEC_IB:
1543 ib_spec.type = IB_FLOW_SPEC_IB;
1544 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1551 /* We must put empty rule, qpn is being ignored */
1552 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1555 pr_info("invalid parsing\n");
1559 mlx4_spec = (void *)mlx4_spec + ret;
1565 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1567 enum mlx4_net_trans_promisc_mode flow_type,
1573 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1574 struct mlx4_cmd_mailbox *mailbox;
1575 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1578 static const u16 __mlx4_domain[] = {
1579 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1580 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1581 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1582 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1585 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1586 pr_err("Invalid priority value %d\n", flow_attr->priority);
1590 if (domain >= IB_FLOW_DOMAIN_NUM) {
1591 pr_err("Invalid domain value %d\n", domain);
1595 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1598 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1599 if (IS_ERR(mailbox))
1600 return PTR_ERR(mailbox);
1601 ctrl = mailbox->buf;
1603 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1604 flow_attr->priority);
1605 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1606 ctrl->port = flow_attr->port;
1607 ctrl->qpn = cpu_to_be32(qp->qp_num);
1609 ib_flow = flow_attr + 1;
1610 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1611 /* Add default flows */
1612 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1613 if (default_flow >= 0) {
1614 ret = __mlx4_ib_create_default_rules(
1615 mdev, qp, default_table + default_flow,
1616 mailbox->buf + size);
1618 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1623 for (i = 0; i < flow_attr->num_of_specs; i++) {
1624 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1625 mailbox->buf + size);
1627 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1630 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1634 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1635 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1638 pr_err("mcg table is full. Fail to register network rule.\n");
1639 else if (ret == -ENXIO)
1640 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1642 pr_err("Invalid argument. Fail to register network rule.\n");
1644 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1648 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1651 err = mlx4_cmd(dev, reg_id, 0, 0,
1652 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1655 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1660 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1664 union ib_flow_spec *ib_spec;
1665 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1668 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1669 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1670 return 0; /* do nothing */
1672 ib_flow = flow_attr + 1;
1673 ib_spec = (union ib_flow_spec *)ib_flow;
1675 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1676 return 0; /* do nothing */
1678 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1679 flow_attr->port, qp->qp_num,
1680 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1685 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1686 struct ib_flow_attr *flow_attr,
1687 enum mlx4_net_trans_promisc_mode *type)
1691 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1692 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1693 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1697 if (flow_attr->num_of_specs == 0) {
1698 type[0] = MLX4_FS_MC_SNIFFER;
1699 type[1] = MLX4_FS_UC_SNIFFER;
1701 union ib_flow_spec *ib_spec;
1703 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1704 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1707 /* if all is zero than MC and UC */
1708 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1709 type[0] = MLX4_FS_MC_SNIFFER;
1710 type[1] = MLX4_FS_UC_SNIFFER;
1712 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1713 ib_spec->eth.mask.dst_mac[1],
1714 ib_spec->eth.mask.dst_mac[2],
1715 ib_spec->eth.mask.dst_mac[3],
1716 ib_spec->eth.mask.dst_mac[4],
1717 ib_spec->eth.mask.dst_mac[5]};
1719 /* Above xor was only on MC bit, non empty mask is valid
1720 * only if this bit is set and rest are zero.
1722 if (!is_zero_ether_addr(&mac[0]))
1725 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1726 type[0] = MLX4_FS_MC_SNIFFER;
1728 type[0] = MLX4_FS_UC_SNIFFER;
1735 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1736 struct ib_flow_attr *flow_attr,
1739 int err = 0, i = 0, j = 0;
1740 struct mlx4_ib_flow *mflow;
1741 enum mlx4_net_trans_promisc_mode type[2];
1742 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1743 int is_bonded = mlx4_is_bonded(dev);
1745 if (flow_attr->port < 1 || flow_attr->port > qp->device->phys_port_cnt)
1746 return ERR_PTR(-EINVAL);
1748 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1749 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1750 return ERR_PTR(-EOPNOTSUPP);
1752 memset(type, 0, sizeof(type));
1754 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1760 switch (flow_attr->type) {
1761 case IB_FLOW_ATTR_NORMAL:
1762 /* If dont trap flag (continue match) is set, under specific
1763 * condition traffic be replicated to given qp,
1764 * without stealing it
1766 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1767 err = mlx4_ib_add_dont_trap_rule(dev,
1773 type[0] = MLX4_FS_REGULAR;
1777 case IB_FLOW_ATTR_ALL_DEFAULT:
1778 type[0] = MLX4_FS_ALL_DEFAULT;
1781 case IB_FLOW_ATTR_MC_DEFAULT:
1782 type[0] = MLX4_FS_MC_DEFAULT;
1785 case IB_FLOW_ATTR_SNIFFER:
1786 type[0] = MLX4_FS_MIRROR_RX_PORT;
1787 type[1] = MLX4_FS_MIRROR_SX_PORT;
1795 while (i < ARRAY_SIZE(type) && type[i]) {
1796 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1797 &mflow->reg_id[i].id);
1799 goto err_create_flow;
1801 /* Application always sees one port so the mirror rule
1802 * must be on port #2
1804 flow_attr->port = 2;
1805 err = __mlx4_ib_create_flow(qp, flow_attr,
1807 &mflow->reg_id[j].mirror);
1808 flow_attr->port = 1;
1810 goto err_create_flow;
1817 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1818 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1819 &mflow->reg_id[i].id);
1821 goto err_create_flow;
1824 flow_attr->port = 2;
1825 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1826 &mflow->reg_id[j].mirror);
1827 flow_attr->port = 1;
1829 goto err_create_flow;
1832 /* function to create mirror rule */
1836 return &mflow->ibflow;
1840 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1841 mflow->reg_id[i].id);
1846 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1847 mflow->reg_id[j].mirror);
1852 return ERR_PTR(err);
1855 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1859 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1860 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1862 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1863 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1866 if (mflow->reg_id[i].mirror) {
1867 err = __mlx4_ib_destroy_flow(mdev->dev,
1868 mflow->reg_id[i].mirror);
1879 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1882 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1883 struct mlx4_dev *dev = mdev->dev;
1884 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1885 struct mlx4_ib_steering *ib_steering = NULL;
1886 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1887 struct mlx4_flow_reg_id reg_id;
1889 if (mdev->dev->caps.steering_mode ==
1890 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1891 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1896 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1898 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1901 pr_err("multicast attach op failed, err %d\n", err);
1906 if (mlx4_is_bonded(dev)) {
1907 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1908 (mqp->port == 1) ? 2 : 1,
1910 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1911 prot, ®_id.mirror);
1916 err = add_gid_entry(ibqp, gid);
1921 memcpy(ib_steering->gid.raw, gid->raw, 16);
1922 ib_steering->reg_id = reg_id;
1923 mutex_lock(&mqp->mutex);
1924 list_add(&ib_steering->list, &mqp->steering_rules);
1925 mutex_unlock(&mqp->mutex);
1930 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1933 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1934 prot, reg_id.mirror);
1941 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1943 struct mlx4_ib_gid_entry *ge;
1944 struct mlx4_ib_gid_entry *tmp;
1945 struct mlx4_ib_gid_entry *ret = NULL;
1947 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1948 if (!memcmp(raw, ge->gid.raw, 16)) {
1957 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1960 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1961 struct mlx4_dev *dev = mdev->dev;
1962 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1963 struct net_device *ndev;
1964 struct mlx4_ib_gid_entry *ge;
1965 struct mlx4_flow_reg_id reg_id = {0, 0};
1966 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1968 if (mdev->dev->caps.steering_mode ==
1969 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1970 struct mlx4_ib_steering *ib_steering;
1972 mutex_lock(&mqp->mutex);
1973 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1974 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1975 list_del(&ib_steering->list);
1979 mutex_unlock(&mqp->mutex);
1980 if (&ib_steering->list == &mqp->steering_rules) {
1981 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1984 reg_id = ib_steering->reg_id;
1988 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1993 if (mlx4_is_bonded(dev)) {
1994 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1995 prot, reg_id.mirror);
2000 mutex_lock(&mqp->mutex);
2001 ge = find_gid_entry(mqp, gid->raw);
2003 spin_lock_bh(&mdev->iboe.lock);
2004 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
2007 spin_unlock_bh(&mdev->iboe.lock);
2010 list_del(&ge->list);
2013 pr_warn("could not find mgid entry\n");
2015 mutex_unlock(&mqp->mutex);
2020 static int init_node_data(struct mlx4_ib_dev *dev)
2022 struct ib_smp *in_mad = NULL;
2023 struct ib_smp *out_mad = NULL;
2024 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
2027 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
2028 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
2029 if (!in_mad || !out_mad)
2032 init_query_mad(in_mad);
2033 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
2034 if (mlx4_is_master(dev->dev))
2035 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
2037 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2041 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
2043 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
2045 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
2049 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
2050 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2058 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
2061 struct mlx4_ib_dev *dev =
2062 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2063 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
2066 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
2069 struct mlx4_ib_dev *dev =
2070 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2071 return sprintf(buf, "%x\n", dev->dev->rev_id);
2074 static ssize_t show_board(struct device *device, struct device_attribute *attr,
2077 struct mlx4_ib_dev *dev =
2078 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
2079 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
2080 dev->dev->board_id);
2083 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
2084 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
2085 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
2087 static struct device_attribute *mlx4_class_attributes[] = {
2093 struct diag_counter {
2098 #define DIAG_COUNTER(_name, _offset) \
2099 { .name = #_name, .offset = _offset }
2101 static const struct diag_counter diag_basic[] = {
2102 DIAG_COUNTER(rq_num_lle, 0x00),
2103 DIAG_COUNTER(sq_num_lle, 0x04),
2104 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2105 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2106 DIAG_COUNTER(rq_num_lpe, 0x18),
2107 DIAG_COUNTER(sq_num_lpe, 0x1C),
2108 DIAG_COUNTER(rq_num_wrfe, 0x20),
2109 DIAG_COUNTER(sq_num_wrfe, 0x24),
2110 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2111 DIAG_COUNTER(sq_num_bre, 0x34),
2112 DIAG_COUNTER(sq_num_rire, 0x44),
2113 DIAG_COUNTER(rq_num_rire, 0x48),
2114 DIAG_COUNTER(sq_num_rae, 0x4C),
2115 DIAG_COUNTER(rq_num_rae, 0x50),
2116 DIAG_COUNTER(sq_num_roe, 0x54),
2117 DIAG_COUNTER(sq_num_tree, 0x5C),
2118 DIAG_COUNTER(sq_num_rree, 0x64),
2119 DIAG_COUNTER(rq_num_rnr, 0x68),
2120 DIAG_COUNTER(sq_num_rnr, 0x6C),
2121 DIAG_COUNTER(rq_num_oos, 0x100),
2122 DIAG_COUNTER(sq_num_oos, 0x104),
2125 static const struct diag_counter diag_ext[] = {
2126 DIAG_COUNTER(rq_num_dup, 0x130),
2127 DIAG_COUNTER(sq_num_to, 0x134),
2130 static const struct diag_counter diag_device_only[] = {
2131 DIAG_COUNTER(num_cqovf, 0x1A0),
2132 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2135 static struct rdma_hw_stats *mlx4_ib_alloc_hw_stats(struct ib_device *ibdev,
2138 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2139 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2141 if (!diag[!!port_num].name)
2144 return rdma_alloc_hw_stats_struct(diag[!!port_num].name,
2145 diag[!!port_num].num_counters,
2146 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2149 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2150 struct rdma_hw_stats *stats,
2153 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2154 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2155 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2156 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2160 ret = mlx4_query_diag_counters(dev->dev,
2161 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2162 diag[!!port].offset, hw_value,
2163 diag[!!port].num_counters, port);
2168 for (i = 0; i < diag[!!port].num_counters; i++)
2169 stats->value[i] = hw_value[i];
2171 return diag[!!port].num_counters;
2174 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2182 num_counters = ARRAY_SIZE(diag_basic);
2184 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2185 num_counters += ARRAY_SIZE(diag_ext);
2188 num_counters += ARRAY_SIZE(diag_device_only);
2190 *name = kcalloc(num_counters, sizeof(**name), GFP_KERNEL);
2194 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2198 *num = num_counters;
2207 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2215 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2216 name[i] = diag_basic[i].name;
2217 offset[i] = diag_basic[i].offset;
2220 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2221 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2222 name[j] = diag_ext[i].name;
2223 offset[j] = diag_ext[i].offset;
2228 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2229 name[j] = diag_device_only[i].name;
2230 offset[j] = diag_device_only[i].offset;
2235 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2237 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2240 bool per_port = !!(ibdev->dev->caps.flags2 &
2241 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2243 if (mlx4_is_slave(ibdev->dev))
2246 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2247 /* i == 1 means we are building port counters */
2251 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].name,
2253 &diag[i].num_counters, i);
2257 mlx4_ib_fill_diag_counters(ibdev, diag[i].name,
2261 ibdev->ib_dev.get_hw_stats = mlx4_ib_get_hw_stats;
2262 ibdev->ib_dev.alloc_hw_stats = mlx4_ib_alloc_hw_stats;
2268 kfree(diag[i - 1].name);
2269 kfree(diag[i - 1].offset);
2275 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2279 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2280 kfree(ibdev->diag_counters[i].offset);
2281 kfree(ibdev->diag_counters[i].name);
2285 #define MLX4_IB_INVALID_MAC ((u64)-1)
2286 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2287 struct net_device *dev,
2291 u64 release_mac = MLX4_IB_INVALID_MAC;
2292 struct mlx4_ib_qp *qp;
2294 new_smac = mlx4_mac_to_u64(IF_LLADDR(dev));
2296 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2298 /* no need for update QP1 and mac registration in non-SRIOV */
2299 if (!mlx4_is_mfunc(ibdev->dev))
2302 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2303 qp = ibdev->qp1_proxy[port - 1];
2307 struct mlx4_update_qp_params update_params;
2309 mutex_lock(&qp->mutex);
2310 old_smac = qp->pri.smac;
2311 if (new_smac == old_smac)
2314 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2316 if (new_smac_index < 0)
2319 update_params.smac_index = new_smac_index;
2320 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2322 release_mac = new_smac;
2325 /* if old port was zero, no mac was yet registered for this QP */
2326 if (qp->pri.smac_port)
2327 release_mac = old_smac;
2328 qp->pri.smac = new_smac;
2329 qp->pri.smac_port = port;
2330 qp->pri.smac_index = new_smac_index;
2334 if (release_mac != MLX4_IB_INVALID_MAC)
2335 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2337 mutex_unlock(&qp->mutex);
2338 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2341 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2342 struct net_device *dev,
2343 unsigned long event)
2346 struct mlx4_ib_iboe *iboe;
2347 int update_qps_port = -1;
2350 iboe = &ibdev->iboe;
2352 spin_lock_bh(&iboe->lock);
2353 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2355 iboe->netdevs[port - 1] =
2356 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2358 if (dev == iboe->netdevs[port - 1] &&
2359 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2360 event == NETDEV_UP || event == NETDEV_CHANGE))
2361 update_qps_port = port;
2364 spin_unlock_bh(&iboe->lock);
2366 if (update_qps_port > 0)
2367 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2370 static int mlx4_ib_netdev_event(struct notifier_block *this,
2371 unsigned long event, void *ptr)
2373 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2374 struct mlx4_ib_dev *ibdev;
2376 if (!net_eq(dev_net(dev), &init_net))
2379 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2380 mlx4_ib_scan_netdevs(ibdev, dev, event);
2385 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2391 if (mlx4_is_master(ibdev->dev)) {
2392 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2394 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2396 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2398 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2399 /* master has the identity virt2phys pkey mapping */
2400 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2401 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2402 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2403 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2407 /* initialize pkey cache */
2408 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2410 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2412 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2418 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2420 int i, j, eq = 0, total_eqs = 0;
2422 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2423 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2424 if (!ibdev->eq_table)
2427 for (i = 1; i <= dev->caps.num_ports; i++) {
2428 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2430 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2432 ibdev->eq_table[eq] = total_eqs;
2433 if (!mlx4_assign_eq(dev, i,
2434 &ibdev->eq_table[eq]))
2437 ibdev->eq_table[eq] = -1;
2441 for (i = eq; i < dev->caps.num_comp_vectors;
2442 ibdev->eq_table[i++] = -1)
2445 /* Advertise the new number of EQs to clients */
2446 ibdev->ib_dev.num_comp_vectors = eq;
2449 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2452 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2454 /* no eqs were allocated */
2455 if (!ibdev->eq_table)
2458 /* Reset the advertised EQ number */
2459 ibdev->ib_dev.num_comp_vectors = 0;
2461 for (i = 0; i < total_eqs; i++)
2462 mlx4_release_eq(dev, ibdev->eq_table[i]);
2464 kfree(ibdev->eq_table);
2465 ibdev->eq_table = NULL;
2468 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2469 struct ib_port_immutable *immutable)
2471 struct ib_port_attr attr;
2472 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2475 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2479 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2480 immutable->gid_tbl_len = attr.gid_tbl_len;
2482 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2483 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2485 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2486 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2487 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2488 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2489 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2492 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2497 static void get_fw_ver_str(struct ib_device *device, char *str,
2500 struct mlx4_ib_dev *dev =
2501 container_of(device, struct mlx4_ib_dev, ib_dev);
2502 snprintf(str, str_len, "%d.%d.%d",
2503 (int) (dev->dev->caps.fw_ver >> 32),
2504 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2505 (int) dev->dev->caps.fw_ver & 0xffff);
2508 static void *mlx4_ib_add(struct mlx4_dev *dev)
2510 struct mlx4_ib_dev *ibdev;
2514 struct mlx4_ib_iboe *iboe;
2515 int ib_num_ports = 0;
2516 int num_req_counters;
2519 struct counter_index *new_counter_index = NULL;
2521 pr_info_once("%s", mlx4_ib_version);
2524 mlx4_foreach_ib_transport_port(i, dev)
2527 /* No point in registering a device with no ports... */
2531 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2533 dev_err(&dev->persist->pdev->dev,
2534 "Device struct alloc failed\n");
2538 iboe = &ibdev->iboe;
2540 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2543 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2546 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2548 if (!ibdev->uar_map)
2550 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2553 ibdev->bond_next_port = 0;
2555 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2556 ibdev->ib_dev.owner = THIS_MODULE;
2557 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2558 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2559 ibdev->num_ports = num_ports;
2560 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2561 1 : ibdev->num_ports;
2562 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2563 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2564 ibdev->ib_dev.get_netdev = mlx4_ib_get_netdev;
2565 ibdev->ib_dev.add_gid = mlx4_ib_add_gid;
2566 ibdev->ib_dev.del_gid = mlx4_ib_del_gid;
2568 if (dev->caps.userspace_caps)
2569 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2571 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2573 ibdev->ib_dev.uverbs_cmd_mask =
2574 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2575 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2576 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2577 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2578 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2579 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2580 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2581 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2582 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2583 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2584 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2585 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2586 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2587 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2588 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2589 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2590 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2591 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2592 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2593 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2594 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2595 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2596 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2597 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2599 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2600 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2601 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2602 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2603 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2604 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2605 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2606 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2607 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2608 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2609 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2610 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2611 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2612 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2613 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2614 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2615 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2616 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2617 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2618 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2619 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2620 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2621 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2622 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2623 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2624 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2625 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2626 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2627 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2628 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2629 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2630 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2631 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2632 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2633 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2634 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2635 ibdev->ib_dev.alloc_mr = mlx4_ib_alloc_mr;
2636 ibdev->ib_dev.map_mr_sg = mlx4_ib_map_mr_sg;
2637 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2638 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2639 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2640 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2641 ibdev->ib_dev.get_dev_fw_str = get_fw_ver_str;
2643 if (!mlx4_is_slave(ibdev->dev)) {
2644 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2645 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2646 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2647 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2650 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2651 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2652 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2653 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2655 ibdev->ib_dev.uverbs_cmd_mask |=
2656 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2657 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2660 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2661 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2662 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2663 ibdev->ib_dev.uverbs_cmd_mask |=
2664 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2665 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2668 if (check_flow_steering_support(dev)) {
2669 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2670 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2671 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2673 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2674 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2675 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2678 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2679 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE) |
2680 (1ull << IB_USER_VERBS_EX_CMD_CREATE_CQ) |
2681 (1ull << IB_USER_VERBS_EX_CMD_CREATE_QP);
2683 mlx4_ib_alloc_eqs(dev, ibdev);
2685 spin_lock_init(&iboe->lock);
2687 if (init_node_data(ibdev))
2689 mlx4_init_sl2vl_tbl(ibdev);
2691 for (i = 0; i < ibdev->num_ports; ++i) {
2692 mutex_init(&ibdev->counters_table[i].mutex);
2693 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2696 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2697 for (i = 0; i < num_req_counters; ++i) {
2698 mutex_init(&ibdev->qp1_proxy_lock[i]);
2700 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2701 IB_LINK_LAYER_ETHERNET) {
2702 err = mlx4_counter_alloc(ibdev->dev, &counter_index);
2703 /* if failed to allocate a new counter, use default */
2706 mlx4_get_default_counter_index(dev,
2710 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2711 counter_index = mlx4_get_default_counter_index(dev,
2714 new_counter_index = kmalloc(sizeof(*new_counter_index),
2716 if (!new_counter_index) {
2718 mlx4_counter_free(ibdev->dev, counter_index);
2721 new_counter_index->index = counter_index;
2722 new_counter_index->allocated = allocated;
2723 list_add_tail(&new_counter_index->list,
2724 &ibdev->counters_table[i].counters_list);
2725 ibdev->counters_table[i].default_counter = counter_index;
2726 pr_info("counter index %d for port %d allocated %d\n",
2727 counter_index, i + 1, allocated);
2729 if (mlx4_is_bonded(dev))
2730 for (i = 1; i < ibdev->num_ports ; ++i) {
2732 kmalloc(sizeof(struct counter_index),
2734 if (!new_counter_index)
2736 new_counter_index->index = counter_index;
2737 new_counter_index->allocated = 0;
2738 list_add_tail(&new_counter_index->list,
2739 &ibdev->counters_table[i].counters_list);
2740 ibdev->counters_table[i].default_counter =
2744 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2747 spin_lock_init(&ibdev->sm_lock);
2748 mutex_init(&ibdev->cap_mask_mutex);
2749 INIT_LIST_HEAD(&ibdev->qp_list);
2750 spin_lock_init(&ibdev->reset_flow_resource_lock);
2752 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2754 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2755 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2756 MLX4_IB_UC_STEER_QPN_ALIGN,
2757 &ibdev->steer_qpn_base, 0);
2761 ibdev->ib_uc_qpns_bitmap =
2762 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2765 if (!ibdev->ib_uc_qpns_bitmap) {
2766 dev_err(&dev->persist->pdev->dev,
2767 "bit map alloc failed\n");
2768 goto err_steer_qp_release;
2771 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2773 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2774 dev, ibdev->steer_qpn_base,
2775 ibdev->steer_qpn_base +
2776 ibdev->steer_qpn_count - 1);
2778 goto err_steer_free_bitmap;
2781 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2782 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2784 if (mlx4_ib_alloc_diag_counters(ibdev))
2785 goto err_steer_free_bitmap;
2787 if (ib_register_device(&ibdev->ib_dev, NULL))
2788 goto err_diag_counters;
2790 if (mlx4_ib_mad_init(ibdev))
2793 if (mlx4_ib_init_sriov(ibdev))
2796 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE ||
2797 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2798 if (!iboe->nb.notifier_call) {
2799 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2800 err = register_netdevice_notifier(&iboe->nb);
2802 iboe->nb.notifier_call = NULL;
2806 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2807 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2814 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2815 if (device_create_file(&ibdev->ib_dev.dev,
2816 mlx4_class_attributes[j]))
2820 ibdev->ib_active = true;
2822 if (mlx4_is_mfunc(ibdev->dev))
2825 /* create paravirt contexts for any VFs which are active */
2826 if (mlx4_is_master(ibdev->dev)) {
2827 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2828 if (j == mlx4_master_func_num(ibdev->dev))
2830 if (mlx4_is_slave_active(ibdev->dev, j))
2831 do_slave_init(ibdev, j, 1);
2837 if (ibdev->iboe.nb.notifier_call) {
2838 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2839 pr_warn("failure unregistering notifier\n");
2840 ibdev->iboe.nb.notifier_call = NULL;
2842 flush_workqueue(wq);
2844 mlx4_ib_close_sriov(ibdev);
2847 mlx4_ib_mad_cleanup(ibdev);
2850 ib_unregister_device(&ibdev->ib_dev);
2853 mlx4_ib_diag_cleanup(ibdev);
2855 err_steer_free_bitmap:
2856 kfree(ibdev->ib_uc_qpns_bitmap);
2858 err_steer_qp_release:
2859 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2860 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2861 ibdev->steer_qpn_count);
2863 for (i = 0; i < ibdev->num_ports; ++i)
2864 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2867 iounmap(ibdev->uar_map);
2870 mlx4_uar_free(dev, &ibdev->priv_uar);
2873 mlx4_pd_free(dev, ibdev->priv_pdn);
2876 ib_dealloc_device(&ibdev->ib_dev);
2881 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2885 WARN_ON(!dev->ib_uc_qpns_bitmap);
2887 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2888 dev->steer_qpn_count,
2889 get_count_order(count));
2893 *qpn = dev->steer_qpn_base + offset;
2897 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2900 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2903 BUG_ON(qpn < dev->steer_qpn_base);
2905 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2906 qpn - dev->steer_qpn_base,
2907 get_count_order(count));
2910 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2915 struct ib_flow_attr *flow = NULL;
2916 struct ib_flow_spec_ib *ib_spec;
2919 flow_size = sizeof(struct ib_flow_attr) +
2920 sizeof(struct ib_flow_spec_ib);
2921 flow = kzalloc(flow_size, GFP_KERNEL);
2924 flow->port = mqp->port;
2925 flow->num_of_specs = 1;
2926 flow->size = flow_size;
2927 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2928 ib_spec->type = IB_FLOW_SPEC_IB;
2929 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2930 /* Add an empty rule for IB L2 */
2931 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2933 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2938 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2944 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2946 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2949 ibdev->ib_active = false;
2950 flush_workqueue(wq);
2952 mlx4_ib_close_sriov(ibdev);
2953 mlx4_ib_mad_cleanup(ibdev);
2954 ib_unregister_device(&ibdev->ib_dev);
2955 mlx4_ib_diag_cleanup(ibdev);
2956 if (ibdev->iboe.nb.notifier_call) {
2957 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2958 pr_warn("failure unregistering notifier\n");
2959 ibdev->iboe.nb.notifier_call = NULL;
2962 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2963 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2964 ibdev->steer_qpn_count);
2965 kfree(ibdev->ib_uc_qpns_bitmap);
2968 iounmap(ibdev->uar_map);
2969 for (p = 0; p < ibdev->num_ports; ++p)
2970 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2972 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2973 mlx4_CLOSE_PORT(dev, p);
2975 mlx4_ib_free_eqs(dev, ibdev);
2977 mlx4_uar_free(dev, &ibdev->priv_uar);
2978 mlx4_pd_free(dev, ibdev->priv_pdn);
2979 ib_dealloc_device(&ibdev->ib_dev);
2982 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2984 struct mlx4_ib_demux_work **dm = NULL;
2985 struct mlx4_dev *dev = ibdev->dev;
2987 unsigned long flags;
2988 struct mlx4_active_ports actv_ports;
2990 unsigned int first_port;
2992 if (!mlx4_is_master(dev))
2995 actv_ports = mlx4_get_active_ports(dev, slave);
2996 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2997 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2999 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3001 pr_err("failed to allocate memory for tunneling qp update\n");
3005 for (i = 0; i < ports; i++) {
3006 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3008 pr_err("failed to allocate memory for tunneling qp update work struct\n");
3013 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3014 dm[i]->port = first_port + i + 1;
3015 dm[i]->slave = slave;
3016 dm[i]->do_init = do_init;
3019 /* initialize or tear down tunnel QPs for the slave */
3020 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3021 if (!ibdev->sriov.is_going_down) {
3022 for (i = 0; i < ports; i++)
3023 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3024 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3026 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3027 for (i = 0; i < ports; i++)
3035 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3037 struct mlx4_ib_qp *mqp;
3038 unsigned long flags_qp;
3039 unsigned long flags_cq;
3040 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3041 struct list_head cq_notify_list;
3042 struct mlx4_cq *mcq;
3043 unsigned long flags;
3045 pr_warn("mlx4_ib_handle_catas_error was started\n");
3046 INIT_LIST_HEAD(&cq_notify_list);
3048 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3049 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3051 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3052 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3053 if (mqp->sq.tail != mqp->sq.head) {
3054 send_mcq = to_mcq(mqp->ibqp.send_cq);
3055 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3056 if (send_mcq->mcq.comp &&
3057 mqp->ibqp.send_cq->comp_handler) {
3058 if (!send_mcq->mcq.reset_notify_added) {
3059 send_mcq->mcq.reset_notify_added = 1;
3060 list_add_tail(&send_mcq->mcq.reset_notify,
3064 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3066 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3067 /* Now, handle the QP's receive queue */
3068 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3069 /* no handling is needed for SRQ */
3070 if (!mqp->ibqp.srq) {
3071 if (mqp->rq.tail != mqp->rq.head) {
3072 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3073 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3074 if (recv_mcq->mcq.comp &&
3075 mqp->ibqp.recv_cq->comp_handler) {
3076 if (!recv_mcq->mcq.reset_notify_added) {
3077 recv_mcq->mcq.reset_notify_added = 1;
3078 list_add_tail(&recv_mcq->mcq.reset_notify,
3082 spin_unlock_irqrestore(&recv_mcq->lock,
3086 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3089 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3092 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3093 pr_warn("mlx4_ib_handle_catas_error ended\n");
3096 static void handle_bonded_port_state_event(struct work_struct *work)
3098 struct ib_event_work *ew =
3099 container_of(work, struct ib_event_work, work);
3100 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3101 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3103 struct ib_event ibev;
3106 spin_lock_bh(&ibdev->iboe.lock);
3107 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3108 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3109 enum ib_port_state curr_port_state;
3115 (netif_running(curr_netdev) &&
3116 netif_carrier_ok(curr_netdev)) ?
3117 IB_PORT_ACTIVE : IB_PORT_DOWN;
3119 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3120 curr_port_state : IB_PORT_ACTIVE;
3122 spin_unlock_bh(&ibdev->iboe.lock);
3124 ibev.device = &ibdev->ib_dev;
3125 ibev.element.port_num = 1;
3126 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3127 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3129 ib_dispatch_event(&ibev);
3132 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3137 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3139 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3143 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3146 static void ib_sl2vl_update_work(struct work_struct *work)
3148 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3149 struct mlx4_ib_dev *mdev = ew->ib_dev;
3150 int port = ew->port;
3152 mlx4_ib_sl2vl_update(mdev, port);
3157 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3160 struct ib_event_work *ew;
3162 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3164 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3167 queue_work(wq, &ew->work);
3169 pr_err("failed to allocate memory for sl2vl update work\n");
3173 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3174 enum mlx4_dev_event event, unsigned long param)
3176 struct ib_event ibev;
3177 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3178 struct mlx4_eqe *eqe = NULL;
3179 struct ib_event_work *ew;
3182 if (mlx4_is_bonded(dev) &&
3183 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3184 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3185 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3188 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3190 queue_work(wq, &ew->work);
3194 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3195 eqe = (struct mlx4_eqe *)param;
3200 case MLX4_DEV_EVENT_PORT_UP:
3201 if (p > ibdev->num_ports)
3203 if (!mlx4_is_slave(dev) &&
3204 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3205 IB_LINK_LAYER_INFINIBAND) {
3206 if (mlx4_is_master(dev))
3207 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3208 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3209 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3210 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3212 ibev.event = IB_EVENT_PORT_ACTIVE;
3215 case MLX4_DEV_EVENT_PORT_DOWN:
3216 if (p > ibdev->num_ports)
3218 ibev.event = IB_EVENT_PORT_ERR;
3221 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3222 ibdev->ib_active = false;
3223 ibev.event = IB_EVENT_DEVICE_FATAL;
3224 mlx4_ib_handle_catas_error(ibdev);
3227 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3228 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3230 pr_err("failed to allocate memory for events work\n");
3234 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3235 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3237 /* need to queue only for port owner, which uses GEN_EQE */
3238 if (mlx4_is_master(dev))
3239 queue_work(wq, &ew->work);
3241 handle_port_mgmt_change_event(&ew->work);
3244 case MLX4_DEV_EVENT_SLAVE_INIT:
3245 /* here, p is the slave id */
3246 do_slave_init(ibdev, p, 1);
3247 if (mlx4_is_master(dev)) {
3250 for (i = 1; i <= ibdev->num_ports; i++) {
3251 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3252 == IB_LINK_LAYER_INFINIBAND)
3253 mlx4_ib_slave_alias_guid_event(ibdev,
3260 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3261 if (mlx4_is_master(dev)) {
3264 for (i = 1; i <= ibdev->num_ports; i++) {
3265 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3266 == IB_LINK_LAYER_INFINIBAND)
3267 mlx4_ib_slave_alias_guid_event(ibdev,
3272 /* here, p is the slave id */
3273 do_slave_init(ibdev, p, 0);
3280 ibev.device = ibdev_ptr;
3281 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3283 ib_dispatch_event(&ibev);
3286 static struct mlx4_interface mlx4_ib_interface = {
3288 .remove = mlx4_ib_remove,
3289 .event = mlx4_ib_event,
3290 .protocol = MLX4_PROT_IB_IPV6,
3291 .flags = MLX4_INTFF_BONDING
3294 static int __init mlx4_ib_init(void)
3298 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3302 err = mlx4_ib_mcg_init();
3306 err = mlx4_register_interface(&mlx4_ib_interface);
3313 mlx4_ib_mcg_destroy();
3316 destroy_workqueue(wq);
3320 static void __exit mlx4_ib_cleanup(void)
3322 mlx4_unregister_interface(&mlx4_ib_interface);
3323 mlx4_ib_mcg_destroy();
3324 destroy_workqueue(wq);
3327 module_init_order(mlx4_ib_init, SI_ORDER_SEVENTH);
3328 module_exit_order(mlx4_ib_cleanup, SI_ORDER_SEVENTH);
3331 mlx4ib_evhand(module_t mod, int event, void *arg)
3336 static moduledata_t mlx4ib_mod = {
3338 .evhand = mlx4ib_evhand,
3341 DECLARE_MODULE(mlx4ib, mlx4ib_mod, SI_SUB_LAST, SI_ORDER_ANY);
3342 MODULE_DEPEND(mlx4ib, mlx4, 1, 1, 1);
3343 MODULE_DEPEND(mlx4ib, ibcore, 1, 1, 1);
3344 MODULE_DEPEND(mlx4ib, linuxkpi, 1, 1, 1);