2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
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5 * modification, are permitted provided that the following conditions
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28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/hardirq.h>
31 #include <dev/mlx5/driver.h>
32 #include <rdma/ib_verbs.h>
33 #include <dev/mlx5/cq.h>
34 #include "mlx5_core.h"
36 void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn)
38 struct mlx5_core_cq *cq;
39 struct mlx5_cq_table *table = &dev->priv.cq_table;
41 if (cqn < MLX5_CQ_LINEAR_ARRAY_SIZE) {
42 struct mlx5_cq_linear_array_entry *entry;
44 entry = &table->linear_array[cqn];
45 spin_lock(&entry->lock);
49 "Completion event for bogus CQ 0x%x\n", cqn);
54 spin_unlock(&entry->lock);
58 spin_lock(&table->lock);
59 cq = radix_tree_lookup(&table->tree, cqn);
61 atomic_inc(&cq->refcount);
62 spin_unlock(&table->lock);
65 mlx5_core_warn(dev, "Completion event for bogus CQ 0x%x\n", cqn);
73 if (atomic_dec_and_test(&cq->refcount))
77 void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type)
79 struct mlx5_cq_table *table = &dev->priv.cq_table;
80 struct mlx5_core_cq *cq;
82 spin_lock(&table->lock);
84 cq = radix_tree_lookup(&table->tree, cqn);
86 atomic_inc(&cq->refcount);
88 spin_unlock(&table->lock);
91 mlx5_core_warn(dev, "Async event for bogus CQ 0x%x\n", cqn);
95 cq->event(cq, event_type);
97 if (atomic_dec_and_test(&cq->refcount))
102 int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
103 struct mlx5_create_cq_mbox_in *in, int inlen)
106 struct mlx5_cq_table *table = &dev->priv.cq_table;
107 struct mlx5_create_cq_mbox_out out;
108 struct mlx5_destroy_cq_mbox_in din;
109 struct mlx5_destroy_cq_mbox_out dout;
111 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_CQ);
112 memset(&out, 0, sizeof(out));
113 err = mlx5_cmd_exec(dev, in, inlen, &out, sizeof(out));
118 return mlx5_cmd_status_to_err(&out.hdr);
120 cq->cqn = be32_to_cpu(out.cqn) & 0xffffff;
123 atomic_set(&cq->refcount, 1);
124 init_completion(&cq->free);
126 spin_lock_irq(&table->lock);
127 err = radix_tree_insert(&table->tree, cq->cqn, cq);
128 spin_unlock_irq(&table->lock);
132 if (cq->cqn < MLX5_CQ_LINEAR_ARRAY_SIZE) {
133 struct mlx5_cq_linear_array_entry *entry;
135 entry = &table->linear_array[cq->cqn];
136 spin_lock_irq(&entry->lock);
138 spin_unlock_irq(&entry->lock);
141 cq->pid = curthread->td_proc->p_pid;
146 memset(&din, 0, sizeof(din));
147 memset(&dout, 0, sizeof(dout));
148 din.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_CQ);
149 din.cqn = cpu_to_be32(cq->cqn);
150 mlx5_cmd_exec(dev, &din, sizeof(din), &dout, sizeof(dout));
153 EXPORT_SYMBOL(mlx5_core_create_cq);
155 int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
157 struct mlx5_cq_table *table = &dev->priv.cq_table;
158 struct mlx5_destroy_cq_mbox_in in;
159 struct mlx5_destroy_cq_mbox_out out;
160 struct mlx5_core_cq *tmp;
163 if (cq->cqn < MLX5_CQ_LINEAR_ARRAY_SIZE) {
164 struct mlx5_cq_linear_array_entry *entry;
166 entry = &table->linear_array[cq->cqn];
167 spin_lock_irq(&entry->lock);
169 spin_unlock_irq(&entry->lock);
172 spin_lock_irq(&table->lock);
173 tmp = radix_tree_delete(&table->tree, cq->cqn);
174 spin_unlock_irq(&table->lock);
176 mlx5_core_warn(dev, "cq 0x%x not found in tree\n", cq->cqn);
180 mlx5_core_warn(dev, "corruption on srqn 0x%x\n", cq->cqn);
184 memset(&in, 0, sizeof(in));
185 memset(&out, 0, sizeof(out));
186 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_CQ);
187 in.cqn = cpu_to_be32(cq->cqn);
188 err = mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));
192 if (out.hdr.status) {
193 err = mlx5_cmd_status_to_err(&out.hdr);
197 synchronize_irq(cq->irqn);
199 if (atomic_dec_and_test(&cq->refcount))
201 wait_for_completion(&cq->free);
207 EXPORT_SYMBOL(mlx5_core_destroy_cq);
209 int mlx5_core_query_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
210 struct mlx5_query_cq_mbox_out *out)
212 struct mlx5_query_cq_mbox_in in;
215 memset(&in, 0, sizeof(in));
216 memset(out, 0, sizeof(*out));
218 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_CQ);
219 in.cqn = cpu_to_be32(cq->cqn);
220 err = mlx5_cmd_exec(dev, &in, sizeof(in), out, sizeof(*out));
225 return mlx5_cmd_status_to_err(&out->hdr);
229 EXPORT_SYMBOL(mlx5_core_query_cq);
232 int mlx5_core_modify_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
233 struct mlx5_modify_cq_mbox_in *in, int in_sz)
235 struct mlx5_modify_cq_mbox_out out;
238 memset(&out, 0, sizeof(out));
239 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_MODIFY_CQ);
240 err = mlx5_cmd_exec(dev, in, in_sz, &out, sizeof(out));
245 return mlx5_cmd_status_to_err(&out.hdr);
249 EXPORT_SYMBOL(mlx5_core_modify_cq);
251 int mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
252 struct mlx5_core_cq *cq,
256 struct mlx5_modify_cq_mbox_in in;
258 memset(&in, 0, sizeof(in));
260 in.cqn = cpu_to_be32(cq->cqn);
261 in.ctx.cq_period = cpu_to_be16(cq_period);
262 in.ctx.cq_max_count = cpu_to_be16(cq_max_count);
263 in.field_select = cpu_to_be32(MLX5_CQ_MODIFY_PERIOD |
264 MLX5_CQ_MODIFY_COUNT);
266 return mlx5_core_modify_cq(dev, cq, &in, sizeof(in));
269 int mlx5_core_modify_cq_moderation_mode(struct mlx5_core_dev *dev,
270 struct mlx5_core_cq *cq,
275 struct mlx5_modify_cq_mbox_in in;
277 memset(&in, 0, sizeof(in));
279 in.cqn = cpu_to_be32(cq->cqn);
280 in.ctx.cq_period = cpu_to_be16(cq_period);
281 in.ctx.cq_max_count = cpu_to_be16(cq_max_count);
282 in.ctx.cqe_sz_flags = (cq_mode & 2) >> 1;
283 in.ctx.st = (cq_mode & 1) << 7;
284 in.field_select = cpu_to_be32(MLX5_CQ_MODIFY_PERIOD |
285 MLX5_CQ_MODIFY_COUNT |
286 MLX5_CQ_MODIFY_PERIOD_MODE);
288 return mlx5_core_modify_cq(dev, cq, &in, sizeof(in));
291 int mlx5_init_cq_table(struct mlx5_core_dev *dev)
293 struct mlx5_cq_table *table = &dev->priv.cq_table;
297 spin_lock_init(&table->lock);
298 for (x = 0; x != MLX5_CQ_LINEAR_ARRAY_SIZE; x++)
299 spin_lock_init(&table->linear_array[x].lock);
300 INIT_RADIX_TREE(&table->tree, GFP_ATOMIC);
306 void mlx5_cleanup_cq_table(struct mlx5_core_dev *dev)