2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
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5 * modification, are permitted provided that the following conditions
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28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/hardirq.h>
31 #include <dev/mlx5/driver.h>
32 #include <rdma/ib_verbs.h>
33 #include <dev/mlx5/cq.h>
34 #include "mlx5_core.h"
36 void mlx5_cq_completion(struct mlx5_core_dev *dev, u32 cqn)
38 struct mlx5_core_cq *cq;
39 struct mlx5_cq_table *table = &dev->priv.cq_table;
41 if (cqn < MLX5_CQ_LINEAR_ARRAY_SIZE) {
42 struct mlx5_cq_linear_array_entry *entry;
44 entry = &table->linear_array[cqn];
45 spin_lock(&entry->lock);
49 "Completion event for bogus CQ 0x%x\n", cqn);
54 spin_unlock(&entry->lock);
58 spin_lock(&table->lock);
59 cq = radix_tree_lookup(&table->tree, cqn);
61 atomic_inc(&cq->refcount);
62 spin_unlock(&table->lock);
65 mlx5_core_warn(dev, "Completion event for bogus CQ 0x%x\n", cqn);
73 if (atomic_dec_and_test(&cq->refcount))
77 void mlx5_cq_event(struct mlx5_core_dev *dev, u32 cqn, int event_type)
79 struct mlx5_cq_table *table = &dev->priv.cq_table;
80 struct mlx5_core_cq *cq;
82 spin_lock(&table->lock);
84 cq = radix_tree_lookup(&table->tree, cqn);
86 atomic_inc(&cq->refcount);
88 spin_unlock(&table->lock);
91 mlx5_core_warn(dev, "Async event for bogus CQ 0x%x\n", cqn);
95 cq->event(cq, event_type);
97 if (atomic_dec_and_test(&cq->refcount))
102 int mlx5_core_create_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
105 struct mlx5_cq_table *table = &dev->priv.cq_table;
106 u32 out[MLX5_ST_SZ_DW(create_cq_out)] = {0};
107 u32 din[MLX5_ST_SZ_DW(destroy_cq_in)] = {0};
108 u32 dout[MLX5_ST_SZ_DW(destroy_cq_out)] = {0};
111 MLX5_SET(create_cq_in, in, opcode, MLX5_CMD_OP_CREATE_CQ);
112 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
116 cq->cqn = MLX5_GET(create_cq_out, out, cqn);
119 atomic_set(&cq->refcount, 1);
120 init_completion(&cq->free);
122 spin_lock_irq(&table->lock);
123 err = radix_tree_insert(&table->tree, cq->cqn, cq);
124 spin_unlock_irq(&table->lock);
128 if (cq->cqn < MLX5_CQ_LINEAR_ARRAY_SIZE) {
129 struct mlx5_cq_linear_array_entry *entry;
131 entry = &table->linear_array[cq->cqn];
132 spin_lock_irq(&entry->lock);
134 spin_unlock_irq(&entry->lock);
137 cq->pid = curthread->td_proc->p_pid;
142 MLX5_SET(destroy_cq_in, din, opcode, MLX5_CMD_OP_DESTROY_CQ);
143 MLX5_SET(destroy_cq_in, din, cqn, cq->cqn);
144 mlx5_cmd_exec(dev, din, sizeof(din), dout, sizeof(dout));
147 EXPORT_SYMBOL(mlx5_core_create_cq);
149 int mlx5_core_destroy_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq)
151 struct mlx5_cq_table *table = &dev->priv.cq_table;
152 u32 out[MLX5_ST_SZ_DW(destroy_cq_out)] = {0};
153 u32 in[MLX5_ST_SZ_DW(destroy_cq_in)] = {0};
154 struct mlx5_core_cq *tmp;
157 if (cq->cqn < MLX5_CQ_LINEAR_ARRAY_SIZE) {
158 struct mlx5_cq_linear_array_entry *entry;
160 entry = &table->linear_array[cq->cqn];
161 spin_lock_irq(&entry->lock);
163 spin_unlock_irq(&entry->lock);
166 spin_lock_irq(&table->lock);
167 tmp = radix_tree_delete(&table->tree, cq->cqn);
168 spin_unlock_irq(&table->lock);
170 mlx5_core_warn(dev, "cq 0x%x not found in tree\n", cq->cqn);
174 mlx5_core_warn(dev, "corruption on srqn 0x%x\n", cq->cqn);
178 MLX5_SET(destroy_cq_in, in, opcode, MLX5_CMD_OP_DESTROY_CQ);
179 MLX5_SET(destroy_cq_in, in, cqn, cq->cqn);
180 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
184 synchronize_irq(cq->irqn);
186 if (atomic_dec_and_test(&cq->refcount))
188 wait_for_completion(&cq->free);
194 EXPORT_SYMBOL(mlx5_core_destroy_cq);
196 int mlx5_core_query_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
197 u32 *out, int outlen)
199 u32 in[MLX5_ST_SZ_DW(query_cq_in)] = {0};
201 MLX5_SET(query_cq_in, in, opcode, MLX5_CMD_OP_QUERY_CQ);
202 MLX5_SET(query_cq_in, in, cqn, cq->cqn);
204 return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
206 EXPORT_SYMBOL(mlx5_core_query_cq);
209 int mlx5_core_modify_cq(struct mlx5_core_dev *dev, struct mlx5_core_cq *cq,
212 u32 out[MLX5_ST_SZ_DW(modify_cq_out)] = {0};
214 MLX5_SET(modify_cq_in, in, opcode, MLX5_CMD_OP_MODIFY_CQ);
215 return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
217 EXPORT_SYMBOL(mlx5_core_modify_cq);
219 int mlx5_core_modify_cq_moderation(struct mlx5_core_dev *dev,
220 struct mlx5_core_cq *cq,
224 u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {0};
227 MLX5_SET(modify_cq_in, in, cqn, cq->cqn);
228 cqc = MLX5_ADDR_OF(modify_cq_in, in, cq_context);
229 MLX5_SET(cqc, cqc, cq_period, cq_period);
230 MLX5_SET(cqc, cqc, cq_max_count, cq_max_count);
231 MLX5_SET(modify_cq_in, in,
232 modify_field_select_resize_field_select.modify_field_select.modify_field_select,
233 MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT);
235 return mlx5_core_modify_cq(dev, cq, in, sizeof(in));
238 int mlx5_core_modify_cq_moderation_mode(struct mlx5_core_dev *dev,
239 struct mlx5_core_cq *cq,
244 u32 in[MLX5_ST_SZ_DW(modify_cq_in)] = {0};
247 MLX5_SET(modify_cq_in, in, cqn, cq->cqn);
248 cqc = MLX5_ADDR_OF(modify_cq_in, in, cq_context);
249 MLX5_SET(cqc, cqc, cq_period, cq_period);
250 MLX5_SET(cqc, cqc, cq_max_count, cq_max_count);
251 MLX5_SET(cqc, cqc, cq_period_mode, cq_mode);
252 MLX5_SET(modify_cq_in, in,
253 modify_field_select_resize_field_select.modify_field_select.modify_field_select,
254 MLX5_CQ_MODIFY_PERIOD | MLX5_CQ_MODIFY_COUNT | MLX5_CQ_MODIFY_PERIOD_MODE);
256 return mlx5_core_modify_cq(dev, cq, in, sizeof(in));
259 int mlx5_init_cq_table(struct mlx5_core_dev *dev)
261 struct mlx5_cq_table *table = &dev->priv.cq_table;
265 memset(table, 0, sizeof(*table));
266 spin_lock_init(&table->lock);
267 for (x = 0; x != MLX5_CQ_LINEAR_ARRAY_SIZE; x++)
268 spin_lock_init(&table->linear_array[x].lock);
269 INIT_RADIX_TREE(&table->tree, GFP_ATOMIC);
275 void mlx5_cleanup_cq_table(struct mlx5_core_dev *dev)