2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <dev/mlx5/driver.h>
29 #include <linux/module.h>
30 #include "mlx5_core.h"
32 static int mlx5_cmd_query_adapter(struct mlx5_core_dev *dev, u32 *out,
35 u32 in[MLX5_ST_SZ_DW(query_adapter_in)];
38 memset(in, 0, sizeof(in));
40 MLX5_SET(query_adapter_in, in, opcode, MLX5_CMD_OP_QUERY_ADAPTER);
42 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
46 int mlx5_query_board_id(struct mlx5_core_dev *dev)
49 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out);
52 out = kzalloc(outlen, GFP_KERNEL);
54 err = mlx5_cmd_query_adapter(dev, out, outlen);
59 MLX5_ADDR_OF(query_adapter_out, out,
60 query_adapter_struct.vsd_contd_psid),
61 MLX5_FLD_SZ_BYTES(query_adapter_out,
62 query_adapter_struct.vsd_contd_psid));
70 int mlx5_core_query_vendor_id(struct mlx5_core_dev *mdev, u32 *vendor_id)
73 int outlen = MLX5_ST_SZ_BYTES(query_adapter_out);
76 out = kzalloc(outlen, GFP_KERNEL);
78 err = mlx5_cmd_query_adapter(mdev, out, outlen);
82 *vendor_id = MLX5_GET(query_adapter_out, out,
83 query_adapter_struct.ieee_vendor_id);
90 EXPORT_SYMBOL(mlx5_core_query_vendor_id);
92 static int mlx5_core_query_special_contexts(struct mlx5_core_dev *dev)
94 u32 in[MLX5_ST_SZ_DW(query_special_contexts_in)];
95 u32 out[MLX5_ST_SZ_DW(query_special_contexts_out)];
98 memset(in, 0, sizeof(in));
99 memset(out, 0, sizeof(out));
101 MLX5_SET(query_special_contexts_in, in, opcode,
102 MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS);
103 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
107 dev->special_contexts.resd_lkey = MLX5_GET(query_special_contexts_out,
113 static int mlx5_get_qcam_reg(struct mlx5_core_dev *dev)
115 return mlx5_query_qcam_reg(dev, dev->caps.qcam,
116 MLX5_QCAM_FEATURE_ENHANCED_FEATURES,
117 MLX5_QCAM_REGS_FIRST_128);
120 int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
124 err = mlx5_core_get_caps(dev, MLX5_CAP_GENERAL);
128 if (MLX5_CAP_GEN(dev, eth_net_offloads)) {
129 err = mlx5_core_get_caps(dev, MLX5_CAP_ETHERNET_OFFLOADS);
134 if (MLX5_CAP_GEN(dev, pg)) {
135 err = mlx5_core_get_caps(dev, MLX5_CAP_ODP);
140 if (MLX5_CAP_GEN(dev, atomic)) {
141 err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC);
146 if (MLX5_CAP_GEN(dev, roce)) {
147 err = mlx5_core_get_caps(dev, MLX5_CAP_ROCE);
152 if ((MLX5_CAP_GEN(dev, port_type) ==
153 MLX5_CMD_HCA_CAP_PORT_TYPE_ETHERNET &&
154 MLX5_CAP_GEN(dev, nic_flow_table)) ||
155 (MLX5_CAP_GEN(dev, port_type) == MLX5_CMD_HCA_CAP_PORT_TYPE_IB &&
156 MLX5_CAP_GEN(dev, ipoib_enhanced_offloads))) {
157 err = mlx5_core_get_caps(dev, MLX5_CAP_FLOW_TABLE);
163 MLX5_CAP_GEN(dev, eswitch_flow_table)) {
164 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH_FLOW_TABLE);
169 if (MLX5_CAP_GEN(dev, vport_group_manager)) {
170 err = mlx5_core_get_caps(dev, MLX5_CAP_ESWITCH);
175 if (MLX5_CAP_GEN(dev, snapshot)) {
176 err = mlx5_core_get_caps(dev, MLX5_CAP_SNAPSHOT);
181 if (MLX5_CAP_GEN(dev, ipoib_enhanced_offloads)) {
182 err = mlx5_core_get_caps(dev, MLX5_CAP_EOIB_OFFLOADS);
187 if (MLX5_CAP_GEN(dev, debug)) {
188 err = mlx5_core_get_caps(dev, MLX5_CAP_DEBUG);
193 if (MLX5_CAP_GEN(dev, qos)) {
194 err = mlx5_core_get_caps(dev, MLX5_CAP_QOS);
199 if (MLX5_CAP_GEN(dev, qcam_reg)) {
200 err = mlx5_get_qcam_reg(dev);
205 err = mlx5_core_query_special_contexts(dev);
212 int mlx5_cmd_init_hca(struct mlx5_core_dev *dev)
214 u32 in[MLX5_ST_SZ_DW(init_hca_in)];
215 u32 out[MLX5_ST_SZ_DW(init_hca_out)];
217 memset(in, 0, sizeof(in));
219 MLX5_SET(init_hca_in, in, opcode, MLX5_CMD_OP_INIT_HCA);
221 memset(out, 0, sizeof(out));
222 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
225 int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev)
227 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0};
228 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0};
230 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA);
231 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
234 int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev)
236 u32 out[MLX5_ST_SZ_DW(teardown_hca_out)] = {0};
237 u32 in[MLX5_ST_SZ_DW(teardown_hca_in)] = {0};
241 if (!MLX5_CAP_GEN(dev, force_teardown)) {
242 mlx5_core_dbg(dev, "force teardown is not supported in the firmware\n");
246 MLX5_SET(teardown_hca_in, in, opcode, MLX5_CMD_OP_TEARDOWN_HCA);
247 MLX5_SET(teardown_hca_in, in, profile, MLX5_TEARDOWN_HCA_IN_PROFILE_FORCE_CLOSE);
249 ret = mlx5_cmd_exec_polling(dev, in, sizeof(in), out, sizeof(out));
253 force_state = MLX5_GET(teardown_hca_out, out, force_state);
254 if (force_state == MLX5_TEARDOWN_HCA_OUT_FORCE_STATE_FAIL) {
255 mlx5_core_err(dev, "teardown with force mode failed\n");
262 int mlx5_core_set_dc_cnak_trace(struct mlx5_core_dev *dev, int enable,
265 u32 in[MLX5_ST_SZ_DW(set_dc_cnak_trace_in)] = {0};
266 u32 out[MLX5_ST_SZ_DW(set_dc_cnak_trace_out)] = {0};
270 MLX5_SET(set_dc_cnak_trace_in, in, opcode, MLX5_CMD_OP_SET_DC_CNAK_TRACE);
271 MLX5_SET(set_dc_cnak_trace_in, in, enable, enable);
272 pas = MLX5_ADDR_OF(set_dc_cnak_trace_in, in, pas);
273 be_addr = cpu_to_be64(addr);
274 memcpy(MLX5_ADDR_OF(cmd_pas, pas, pa_h), &be_addr, sizeof(be_addr));
276 return mlx5_cmd_exec(dev, &in, sizeof(in), &out, sizeof(out));