2 * Copyright (c) 2018, 2019 Mellanox Technologies, Ltd. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
29 #include <sys/param.h>
30 #include <sys/systm.h>
32 #include <sys/fcntl.h>
33 #include <dev/mlx5/driver.h>
34 #include <dev/mlx5/device.h>
35 #include <dev/mlx5/mlx5_core/mlx5_core.h>
36 #include <dev/mlx5/mlx5io.h>
38 extern const struct mlx5_crspace_regmap mlx5_crspace_regmap_mt4117[];
39 extern const struct mlx5_crspace_regmap mlx5_crspace_regmap_mt4115[];
40 extern const struct mlx5_crspace_regmap mlx5_crspace_regmap_connectx5[];
42 static MALLOC_DEFINE(M_MLX5_DUMP, "MLX5DUMP", "MLX5 Firmware dump");
45 mlx5_fwdump_getsize(const struct mlx5_crspace_regmap *rege)
47 const struct mlx5_crspace_regmap *r;
50 for (sz = 0, r = rege; r->cnt != 0; r++)
56 mlx5_fwdump_destroy_dd(struct mlx5_core_dev *mdev)
59 mtx_assert(&mdev->dump_lock, MA_OWNED);
60 free(mdev->dump_data, M_MLX5_DUMP);
61 mdev->dump_data = NULL;
65 mlx5_fwdump_prep(struct mlx5_core_dev *mdev)
70 u32 addr, in, out, next_addr;
72 mdev->dump_data = NULL;
73 error = mlx5_vsc_find_cap(mdev);
75 /* Inability to create a firmware dump is not fatal. */
76 device_printf((&mdev->pdev->dev)->bsddev, "WARN: "
77 "mlx5_fwdump_prep failed %d\n", error);
80 error = mlx5_vsc_lock(mdev);
83 error = mlx5_vsc_set_space(mdev, MLX5_VSC_DOMAIN_SCAN_CRSPACE);
85 mlx5_core_warn(mdev, "VSC scan space is not supported\n");
88 dev = mdev->pdev->dev.bsddev;
89 vsc_addr = mdev->vsc_addr;
91 mlx5_core_warn(mdev, "Cannot read vsc, no address\n");
96 for (sz = 1, addr = 0;;) {
97 MLX5_VSC_SET(vsc_addr, &in, address, addr);
98 pci_write_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, in, 4);
99 error = mlx5_vsc_wait_on_flag(mdev, 1);
102 "Failed waiting for read complete flag, error %d\n", error);
105 pci_read_config(dev, vsc_addr + MLX5_VSC_DATA_OFFSET, 4);
106 out = pci_read_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, 4);
107 next_addr = MLX5_VSC_GET(vsc_addr, &out, address);
108 if (next_addr == 0 || next_addr == addr)
110 if (next_addr != addr + 4)
114 mdev->dump_rege = malloc(sz * sizeof(struct mlx5_crspace_regmap),
115 M_MLX5_DUMP, M_WAITOK | M_ZERO);
117 for (i = 0, addr = 0;;) {
119 mdev->dump_rege[i].cnt++;
120 MLX5_VSC_SET(vsc_addr, &in, address, addr);
121 pci_write_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, in, 4);
122 error = mlx5_vsc_wait_on_flag(mdev, 1);
125 "Failed waiting for read complete flag, error %d\n", error);
126 free(mdev->dump_rege, M_MLX5_DUMP);
127 mdev->dump_rege = NULL;
130 pci_read_config(dev, vsc_addr + MLX5_VSC_DATA_OFFSET, 4);
131 out = pci_read_config(dev, vsc_addr + MLX5_VSC_ADDR_OFFSET, 4);
132 next_addr = MLX5_VSC_GET(vsc_addr, &out, address);
133 if (next_addr == 0 || next_addr == addr)
135 if (next_addr != addr + 4)
136 mdev->dump_rege[++i].addr = next_addr;
140 ("inconsistent hw crspace reads: sz %u i %u addr %#lx",
141 sz, i, (unsigned long)addr));
143 mdev->dump_size = mlx5_fwdump_getsize(mdev->dump_rege);
144 mdev->dump_data = malloc(mdev->dump_size * sizeof(uint32_t),
145 M_MLX5_DUMP, M_WAITOK | M_ZERO);
146 mdev->dump_valid = false;
147 mdev->dump_copyout = false;
150 mlx5_vsc_unlock(mdev);
154 mlx5_fwdump(struct mlx5_core_dev *mdev)
156 const struct mlx5_crspace_regmap *r;
160 dev_info(&mdev->pdev->dev, "Issuing FW dump\n");
161 mtx_lock(&mdev->dump_lock);
162 if (mdev->dump_data == NULL)
164 if (mdev->dump_valid) {
166 dev_warn(&mdev->pdev->dev,
167 "Only one FW dump can be captured aborting FW dump\n");
171 /* mlx5_vsc already warns, be silent. */
172 error = mlx5_vsc_lock(mdev);
175 error = mlx5_vsc_set_space(mdev, MLX5_VSC_DOMAIN_PROTECTED_CRSPACE);
178 for (i = 0, r = mdev->dump_rege; r->cnt != 0; r++) {
179 for (ri = 0; ri < r->cnt; ri++) {
180 error = mlx5_vsc_read(mdev, r->addr + ri * 4,
181 &mdev->dump_data[i]);
187 mdev->dump_valid = true;
189 mlx5_vsc_unlock(mdev);
191 mtx_unlock(&mdev->dump_lock);
195 mlx5_fwdump_clean(struct mlx5_core_dev *mdev)
198 mtx_lock(&mdev->dump_lock);
199 while (mdev->dump_copyout)
200 msleep(&mdev->dump_copyout, &mdev->dump_lock, 0, "mlx5fwc", 0);
201 mlx5_fwdump_destroy_dd(mdev);
202 mtx_unlock(&mdev->dump_lock);
203 free(mdev->dump_rege, M_MLX5_DUMP);
207 mlx5_fwdump_reset(struct mlx5_core_dev *mdev)
212 mtx_lock(&mdev->dump_lock);
213 if (mdev->dump_data != NULL) {
214 while (mdev->dump_copyout) {
215 msleep(&mdev->dump_copyout, &mdev->dump_lock,
218 mdev->dump_valid = false;
222 mtx_unlock(&mdev->dump_lock);
227 mlx5_dbsf_to_core(const struct mlx5_tool_addr *devaddr,
228 struct mlx5_core_dev **mdev)
231 struct pci_dev *pdev;
233 dev = pci_find_dbsf(devaddr->domain, devaddr->bus, devaddr->slot,
237 if (device_get_devclass(dev) != mlx5_core_driver.bsdclass)
239 pdev = device_get_softc(dev);
240 *mdev = pci_get_drvdata(pdev);
247 mlx5_fwdump_copyout(struct mlx5_core_dev *mdev, struct mlx5_fwdump_get *fwg)
249 const struct mlx5_crspace_regmap *r;
250 struct mlx5_fwdump_reg rv, *urv;
254 mtx_lock(&mdev->dump_lock);
255 if (mdev->dump_data == NULL) {
256 mtx_unlock(&mdev->dump_lock);
259 if (fwg->buf == NULL) {
260 fwg->reg_filled = mdev->dump_size;
261 mtx_unlock(&mdev->dump_lock);
264 if (!mdev->dump_valid) {
265 mtx_unlock(&mdev->dump_lock);
268 mdev->dump_copyout = true;
269 mtx_unlock(&mdev->dump_lock);
272 for (i = 0, r = mdev->dump_rege; r->cnt != 0; r++) {
273 for (ri = 0; ri < r->cnt; ri++) {
274 if (i >= fwg->reg_cnt)
276 rv.addr = r->addr + ri * 4;
277 rv.val = mdev->dump_data[i];
278 error = copyout(&rv, urv, sizeof(rv));
287 mtx_lock(&mdev->dump_lock);
288 mdev->dump_copyout = false;
289 wakeup(&mdev->dump_copyout);
290 mtx_unlock(&mdev->dump_lock);
295 mlx5_fw_reset(struct mlx5_core_dev *mdev)
300 error = -mlx5_set_mfrl_reg(mdev, MLX5_FRL_LEVEL3);
302 dev = mdev->pdev->dev.bsddev;
304 bus = device_get_parent(dev);
305 error = BUS_RESET_CHILD(device_get_parent(bus), bus,
313 mlx5_ctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
316 struct mlx5_core_dev *mdev;
317 struct mlx5_fwdump_get *fwg;
318 struct mlx5_tool_addr *devaddr;
319 struct mlx5_fw_update *fu;
320 struct firmware fake_fw;
325 case MLX5_FWDUMP_GET:
326 if ((fflag & FREAD) == 0) {
330 fwg = (struct mlx5_fwdump_get *)data;
331 devaddr = &fwg->devaddr;
332 error = mlx5_dbsf_to_core(devaddr, &mdev);
335 error = mlx5_fwdump_copyout(mdev, fwg);
337 case MLX5_FWDUMP_RESET:
338 if ((fflag & FWRITE) == 0) {
342 devaddr = (struct mlx5_tool_addr *)data;
343 error = mlx5_dbsf_to_core(devaddr, &mdev);
345 error = mlx5_fwdump_reset(mdev);
347 case MLX5_FWDUMP_FORCE:
348 if ((fflag & FWRITE) == 0) {
352 devaddr = (struct mlx5_tool_addr *)data;
353 error = mlx5_dbsf_to_core(devaddr, &mdev);
359 if ((fflag & FWRITE) == 0) {
363 fu = (struct mlx5_fw_update *)data;
364 if (fu->img_fw_data_len > 10 * 1024 * 1024) {
368 devaddr = &fu->devaddr;
369 error = mlx5_dbsf_to_core(devaddr, &mdev);
372 bzero(&fake_fw, sizeof(fake_fw));
373 fake_fw.name = "umlx_fw_up";
374 fake_fw.datasize = fu->img_fw_data_len;
376 fake_fw.data = (void *)kmem_malloc(fu->img_fw_data_len,
378 if (fake_fw.data == NULL) {
382 error = copyin(fu->img_fw_data, __DECONST(void *, fake_fw.data),
383 fu->img_fw_data_len);
385 error = -mlx5_firmware_flash(mdev, &fake_fw);
386 kmem_free((vm_offset_t)fake_fw.data, fu->img_fw_data_len);
389 if ((fflag & FWRITE) == 0) {
393 devaddr = (struct mlx5_tool_addr *)data;
394 error = mlx5_dbsf_to_core(devaddr, &mdev);
397 error = mlx5_fw_reset(mdev);
406 static struct cdevsw mlx5_ctl_devsw = {
407 .d_version = D_VERSION,
408 .d_ioctl = mlx5_ctl_ioctl,
411 static struct cdev *mlx5_ctl_dev;
416 struct make_dev_args mda;
419 make_dev_args_init(&mda);
420 mda.mda_flags = MAKEDEV_WAITOK | MAKEDEV_CHECKNAME;
421 mda.mda_devsw = &mlx5_ctl_devsw;
422 mda.mda_uid = UID_ROOT;
423 mda.mda_gid = GID_OPERATOR;
425 error = make_dev_s(&mda, &mlx5_ctl_dev, "mlx5ctl");
433 if (mlx5_ctl_dev != NULL)
434 destroy_dev(mlx5_ctl_dev);