sys/dev/mlx5/mlx5_core/mlx5_health.c

   1 /*-
   2  * Copyright (c) 2013-2015, Mellanox Technologies, Ltd.  All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  *
  25  * $FreeBSD$
  26  */
  27
  28 #include <linux/kernel.h>
  29 #include <linux/module.h>
  30 #include <linux/random.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/hardirq.h>
  33 #include <linux/delay.h>
  34 #include <dev/mlx5/driver.h>
  35 #include <dev/mlx5/mlx5_ifc.h>
  36 #include "mlx5_core.h"
  37
  38 #define MLX5_HEALTH_POLL_INTERVAL       (2 * HZ)
  39 #define MAX_MISSES                      3
  40
  41 enum {
  42         MLX5_NIC_IFC_FULL               = 0,
  43         MLX5_NIC_IFC_DISABLED           = 1,
  44         MLX5_NIC_IFC_NO_DRAM_NIC        = 2,
  45         MLX5_NIC_IFC_SW_RESET           = 7,
  46 };
  47
  48 enum {
  49         MLX5_DROP_NEW_HEALTH_WORK,
  50         MLX5_DROP_NEW_RECOVERY_WORK,
  51 };
  52
  53 enum  {
  54         MLX5_SENSOR_NO_ERR              = 0,
  55         MLX5_SENSOR_PCI_COMM_ERR        = 1,
  56         MLX5_SENSOR_PCI_ERR             = 2,
  57         MLX5_SENSOR_NIC_DISABLED        = 3,
  58         MLX5_SENSOR_NIC_SW_RESET        = 4,
  59         MLX5_SENSOR_FW_SYND_RFR         = 5,
  60 };
  61
  62 static int lock_sem_sw_reset(struct mlx5_core_dev *dev)
  63 {
  64         int ret;
  65
  66         /* Lock GW access */
  67         ret = -mlx5_vsc_lock(dev);
  68         if (ret) {
  69                 mlx5_core_warn(dev, "Timed out locking gateway %d\n", ret);
  70                 return ret;
  71         }
  72
  73         ret = -mlx5_vsc_lock_addr_space(dev, MLX5_SEMAPHORE_SW_RESET);
  74         if (ret) {
  75                 if (ret == -EBUSY)
  76                         mlx5_core_dbg(dev, "SW reset FW semaphore already locked, another function will handle the reset\n");
  77                 else
  78                         mlx5_core_warn(dev, "SW reset semaphore lock return %d\n", ret);
  79         }
  80
  81         /* Unlock GW access */
  82         mlx5_vsc_unlock(dev);
  83
  84         return ret;
  85 }
  86
  87 static int unlock_sem_sw_reset(struct mlx5_core_dev *dev)
  88 {
  89         int ret;
  90
  91         /* Lock GW access */
  92         ret = -mlx5_vsc_lock(dev);
  93         if (ret) {
  94                 mlx5_core_warn(dev, "Timed out locking gateway %d\n", ret);
  95                 return ret;
  96         }
  97
  98         ret = -mlx5_vsc_unlock_addr_space(dev, MLX5_SEMAPHORE_SW_RESET);
  99
 100         /* Unlock GW access */
 101         mlx5_vsc_unlock(dev);
 102
 103         return ret;
 104 }
 105
 106 static u8 get_nic_mode(struct mlx5_core_dev *dev)
 107 {
 108         return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7;
 109 }
 110
 111 static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev)
 112 {
 113         struct mlx5_core_health *health = &dev->priv.health;
 114         struct mlx5_health_buffer __iomem *h = health->health;
 115         u32 rfr = ioread32be(&h->rfr) >> MLX5_RFR_OFFSET;
 116         u8 synd = ioread8(&h->synd);
 117
 118         if (rfr && synd)
 119                 mlx5_core_dbg(dev, "FW requests reset, synd: %d\n", synd);
 120         return rfr && synd;
 121 }
 122
 123 static void mlx5_trigger_cmd_completions(struct mlx5_core_dev *dev)
 124 {
 125         unsigned long flags;
 126         u64 vector;
 127
 128         /* wait for pending handlers to complete */
 129         synchronize_irq(dev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector);
 130         spin_lock_irqsave(&dev->cmd.alloc_lock, flags);
 131         vector = ~dev->cmd.bitmask & ((1ul << (1 << dev->cmd.log_sz)) - 1);
 132         if (!vector)
 133                 goto no_trig;
 134
 135         vector |= MLX5_TRIGGERED_CMD_COMP;
 136         spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
 137
 138         mlx5_core_dbg(dev, "vector 0x%jx\n", (uintmax_t)vector);
 139         mlx5_cmd_comp_handler(dev, vector);
 140         return;
 141
 142 no_trig:
 143         spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
 144 }
 145
 146 static bool sensor_pci_no_comm(struct mlx5_core_dev *dev)
 147 {
 148         struct mlx5_core_health *health = &dev->priv.health;
 149         struct mlx5_health_buffer __iomem *h = health->health;
 150         bool err = ioread32be(&h->fw_ver) == 0xffffffff;
 151
 152         return err;
 153 }
 154
 155 static bool sensor_nic_disabled(struct mlx5_core_dev *dev)
 156 {
 157         return get_nic_mode(dev) == MLX5_NIC_IFC_DISABLED;
 158 }
 159
 160 static bool sensor_nic_sw_reset(struct mlx5_core_dev *dev)
 161 {
 162         return get_nic_mode(dev) == MLX5_NIC_IFC_SW_RESET;
 163 }
 164
 165 static u32 check_fatal_sensors(struct mlx5_core_dev *dev)
 166 {
 167         if (sensor_pci_no_comm(dev))
 168                 return MLX5_SENSOR_PCI_COMM_ERR;
 169         if (pci_channel_offline(dev->pdev))
 170                 return MLX5_SENSOR_PCI_ERR;
 171         if (sensor_nic_disabled(dev))
 172                 return MLX5_SENSOR_NIC_DISABLED;
 173         if (sensor_nic_sw_reset(dev))
 174                 return MLX5_SENSOR_NIC_SW_RESET;
 175         if (sensor_fw_synd_rfr(dev))
 176                 return MLX5_SENSOR_FW_SYND_RFR;
 177
 178         return MLX5_SENSOR_NO_ERR;
 179 }
 180
 181 static void reset_fw_if_needed(struct mlx5_core_dev *dev)
 182 {
 183         bool supported = (ioread32be(&dev->iseg->initializing) >>
 184                           MLX5_FW_RESET_SUPPORTED_OFFSET) & 1;
 185         u32 cmdq_addr, fatal_error;
 186
 187         if (!supported)
 188                 return;
 189
 190         /* The reset only needs to be issued by one PF. The health buffer is
 191          * shared between all functions, and will be cleared during a reset.
 192          * Check again to avoid a redundant 2nd reset. If the fatal erros was
 193          * PCI related a reset won't help.
 194          */
 195         fatal_error = check_fatal_sensors(dev);
 196         if (fatal_error == MLX5_SENSOR_PCI_COMM_ERR ||
 197             fatal_error == MLX5_SENSOR_NIC_DISABLED ||
 198             fatal_error == MLX5_SENSOR_NIC_SW_RESET) {
 199                 mlx5_core_warn(dev, "Not issuing FW reset. Either it's already done or won't help.\n");
 200                 return;
 201         }
 202
 203         mlx5_core_warn(dev, "Issuing FW Reset\n");
 204         /* Write the NIC interface field to initiate the reset, the command
 205          * interface address also resides here, don't overwrite it.
 206          */
 207         cmdq_addr = ioread32be(&dev->iseg->cmdq_addr_l_sz);
 208         iowrite32be((cmdq_addr & 0xFFFFF000) |
 209                     MLX5_NIC_IFC_SW_RESET << MLX5_NIC_IFC_OFFSET,
 210                     &dev->iseg->cmdq_addr_l_sz);
 211 }
 212
 213 #define MLX5_CRDUMP_WAIT_MS     60000
 214 #define MLX5_FW_RESET_WAIT_MS   1000
 215 #define MLX5_NIC_STATE_POLL_MS  5
 216 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
 217 {
 218         unsigned long end, delay_ms = MLX5_CRDUMP_WAIT_MS;
 219         u32 fatal_error;
 220         int lock = -EBUSY;
 221
 222         mutex_lock(&dev->intf_state_mutex);
 223         if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
 224                 goto unlock;
 225                 return;
 226         }
 227
 228         fatal_error = check_fatal_sensors(dev);
 229
 230         if (fatal_error || force) {
 231                 if (!force)
 232                         mlx5_core_err(dev, "internal state error detected\n");
 233                 dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR;
 234                 mlx5_trigger_cmd_completions(dev);
 235         }
 236
 237         if (force)
 238                 goto err_state_done;
 239
 240         if (fatal_error == MLX5_SENSOR_FW_SYND_RFR) {
 241                 /* Get cr-dump and reset FW semaphore */
 242                 if (mlx5_core_is_pf(dev))
 243                         lock = lock_sem_sw_reset(dev);
 244
 245                 /* Execute cr-dump and SW reset */
 246                 if (lock != -EBUSY) {
 247                         mlx5_fwdump(dev);
 248                         reset_fw_if_needed(dev);
 249                         delay_ms = MLX5_FW_RESET_WAIT_MS;
 250                 }
 251         }
 252
 253         /* Recover from SW reset */
 254         end = jiffies + msecs_to_jiffies(delay_ms);
 255         do {
 256                 if (sensor_nic_disabled(dev))
 257                         break;
 258
 259                 msleep(MLX5_NIC_STATE_POLL_MS);
 260         } while (!time_after(jiffies, end));
 261
 262         if (!sensor_nic_disabled(dev)) {
 263                 dev_err(&dev->pdev->dev, "NIC IFC still %d after %lums.\n",
 264                         get_nic_mode(dev), delay_ms);
 265         }
 266
 267         /* Release FW semaphore if you are the lock owner */
 268         if (!lock)
 269                 unlock_sem_sw_reset(dev);
 270
 271         mlx5_core_err(dev, "system error event triggered\n");
 272
 273 err_state_done:
 274         mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0);
 275 unlock:
 276         mutex_unlock(&dev->intf_state_mutex);
 277 }
 278
 279 static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
 280 {
 281         u8 nic_mode = get_nic_mode(dev);
 282
 283         if (nic_mode == MLX5_NIC_IFC_SW_RESET) {
 284                 /* The IFC mode field is 3 bits, so it will read 0x7 in two cases:
 285                  * 1. PCI has been disabled (ie. PCI-AER, PF driver unloaded
 286                  *    and this is a VF), this is not recoverable by SW reset.
 287                  *    Logging of this is handled elsewhere.
 288                  * 2. FW reset has been issued by another function, driver can
 289                  *    be reloaded to recover after the mode switches to
 290                  *    MLX5_NIC_IFC_DISABLED.
 291                  */
 292                 if (dev->priv.health.fatal_error != MLX5_SENSOR_PCI_COMM_ERR)
 293                         mlx5_core_warn(dev, "NIC SW reset is already progress\n");
 294                 else
 295                         mlx5_core_warn(dev, "Communication with FW over the PCI link is down\n");
 296         } else {
 297                 mlx5_core_warn(dev, "NIC mode %d\n", nic_mode);
 298         }
 299
 300         mlx5_disable_device(dev);
 301 }
 302
 303 #define MLX5_FW_RESET_WAIT_MS   1000
 304 #define MLX5_NIC_STATE_POLL_MS  5
 305 static void health_recover(struct work_struct *work)
 306 {
 307         unsigned long end = jiffies + msecs_to_jiffies(MLX5_FW_RESET_WAIT_MS);
 308         struct mlx5_core_health *health;
 309         struct delayed_work *dwork;
 310         struct mlx5_core_dev *dev;
 311         struct mlx5_priv *priv;
 312         bool recover = true;
 313         u8 nic_mode;
 314
 315         dwork = container_of(work, struct delayed_work, work);
 316         health = container_of(dwork, struct mlx5_core_health, recover_work);
 317         priv = container_of(health, struct mlx5_priv, health);
 318         dev = container_of(priv, struct mlx5_core_dev, priv);
 319
 320         mtx_lock(&Giant);       /* XXX newbus needs this */
 321
 322         if (sensor_pci_no_comm(dev)) {
 323                 dev_err(&dev->pdev->dev, "health recovery flow aborted, PCI reads still not working\n");
 324                 recover = false;
 325         }
 326
 327         nic_mode = get_nic_mode(dev);
 328         while (nic_mode != MLX5_NIC_IFC_DISABLED &&
 329                !time_after(jiffies, end)) {
 330                 msleep(MLX5_NIC_STATE_POLL_MS);
 331                 nic_mode = get_nic_mode(dev);
 332         }
 333
 334         if (nic_mode != MLX5_NIC_IFC_DISABLED) {
 335                 dev_err(&dev->pdev->dev, "health recovery flow aborted, unexpected NIC IFC mode %d.\n",
 336                         nic_mode);
 337                 recover = false;
 338         }
 339
 340         if (recover) {
 341                 dev_err(&dev->pdev->dev, "starting health recovery flow\n");
 342                 mlx5_recover_device(dev);
 343         }
 344
 345         mtx_unlock(&Giant);
 346 }
 347
 348 /* How much time to wait until health resetting the driver (in msecs) */
 349 #define MLX5_RECOVERY_DELAY_MSECS 60000
 350 #define MLX5_RECOVERY_NO_DELAY 0
 351 static unsigned long get_recovery_delay(struct mlx5_core_dev *dev)
 352 {
 353         return dev->priv.health.fatal_error == MLX5_SENSOR_PCI_ERR ||
 354                 dev->priv.health.fatal_error == MLX5_SENSOR_PCI_COMM_ERR        ?
 355                 MLX5_RECOVERY_DELAY_MSECS : MLX5_RECOVERY_NO_DELAY;
 356 }
 357
 358 static void health_care(struct work_struct *work)
 359 {
 360         struct mlx5_core_health *health;
 361         unsigned long recover_delay;
 362         struct mlx5_core_dev *dev;
 363         struct mlx5_priv *priv;
 364         unsigned long flags;
 365
 366         health = container_of(work, struct mlx5_core_health, work);
 367         priv = container_of(health, struct mlx5_priv, health);
 368         dev = container_of(priv, struct mlx5_core_dev, priv);
 369
 370         mlx5_core_warn(dev, "handling bad device here\n");
 371         mlx5_handle_bad_state(dev);
 372         recover_delay = msecs_to_jiffies(get_recovery_delay(dev));
 373
 374         spin_lock_irqsave(&health->wq_lock, flags);
 375         if (!test_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags)) {
 376                 mlx5_core_warn(dev, "Scheduling recovery work with %lums delay\n",
 377                                recover_delay);
 378                 schedule_delayed_work(&health->recover_work, recover_delay);
 379         } else {
 380                 dev_err(&dev->pdev->dev,
 381                         "new health works are not permitted at this stage\n");
 382         }
 383         spin_unlock_irqrestore(&health->wq_lock, flags);
 384 }
 385
 386 static int get_next_poll_jiffies(void)
 387 {
 388         unsigned long next;
 389
 390         get_random_bytes(&next, sizeof(next));
 391         next %= HZ;
 392         next += jiffies + MLX5_HEALTH_POLL_INTERVAL;
 393
 394         return next;
 395 }
 396
 397 void mlx5_trigger_health_work(struct mlx5_core_dev *dev)
 398 {
 399         struct mlx5_core_health *health = &dev->priv.health;
 400         unsigned long flags;
 401
 402         spin_lock_irqsave(&health->wq_lock, flags);
 403         if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags))
 404                 queue_work(health->wq, &health->work);
 405         else
 406                 dev_err(&dev->pdev->dev,
 407                         "new health works are not permitted at this stage\n");
 408         spin_unlock_irqrestore(&health->wq_lock, flags);
 409 }
 410
 411 static const char *hsynd_str(u8 synd)
 412 {
 413         switch (synd) {
 414         case MLX5_HEALTH_SYNDR_FW_ERR:
 415                 return "firmware internal error";
 416         case MLX5_HEALTH_SYNDR_IRISC_ERR:
 417                 return "irisc not responding";
 418         case MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR:
 419                 return "unrecoverable hardware error";
 420         case MLX5_HEALTH_SYNDR_CRC_ERR:
 421                 return "firmware CRC error";
 422         case MLX5_HEALTH_SYNDR_FETCH_PCI_ERR:
 423                 return "ICM fetch PCI error";
 424         case MLX5_HEALTH_SYNDR_HW_FTL_ERR:
 425                 return "HW fatal error\n";
 426         case MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR:
 427                 return "async EQ buffer overrun";
 428         case MLX5_HEALTH_SYNDR_EQ_ERR:
 429                 return "EQ error";
 430         case MLX5_HEALTH_SYNDR_EQ_INV:
 431                 return "Invalid EQ referenced";
 432         case MLX5_HEALTH_SYNDR_FFSER_ERR:
 433                 return "FFSER error";
 434         case MLX5_HEALTH_SYNDR_HIGH_TEMP:
 435                 return "High temprature";
 436         default:
 437                 return "unrecognized error";
 438         }
 439 }
 440
 441 static void print_health_info(struct mlx5_core_dev *dev)
 442 {
 443         struct mlx5_core_health *health = &dev->priv.health;
 444         struct mlx5_health_buffer __iomem *h = health->health;
 445         char fw_str[18];
 446         u32 fw;
 447         int i;
 448
 449         /* If the syndrom is 0, the device is OK and no need to print buffer */
 450         if (!ioread8(&h->synd))
 451                 return;
 452
 453         for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
 454                 printf("mlx5_core: INFO: ""assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i));
 455
 456         printf("mlx5_core: INFO: ""assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
 457         printf("mlx5_core: INFO: ""assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
 458         snprintf(fw_str, sizeof(fw_str), "%d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev));
 459         printf("mlx5_core: INFO: ""fw_ver %s\n", fw_str);
 460         printf("mlx5_core: INFO: ""hw_id 0x%08x\n", ioread32be(&h->hw_id));
 461         printf("mlx5_core: INFO: ""irisc_index %d\n", ioread8(&h->irisc_index));
 462         printf("mlx5_core: INFO: ""synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd)));
 463         printf("mlx5_core: INFO: ""ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
 464         fw = ioread32be(&h->fw_ver);
 465         printf("mlx5_core: INFO: ""raw fw_ver 0x%08x\n", fw);
 466 }
 467
 468 static void poll_health(unsigned long data)
 469 {
 470         struct mlx5_core_dev *dev = (struct mlx5_core_dev *)data;
 471         struct mlx5_core_health *health = &dev->priv.health;
 472         u32 fatal_error;
 473         u32 count;
 474
 475         if (dev->state != MLX5_DEVICE_STATE_UP)
 476                 return;
 477
 478         if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
 479                 goto out;
 480
 481         count = ioread32be(health->health_counter);
 482         if (count == health->prev)
 483                 ++health->miss_counter;
 484         else
 485                 health->miss_counter = 0;
 486
 487         health->prev = count;
 488         if (health->miss_counter == MAX_MISSES) {
 489                 mlx5_core_err(dev, "device's health compromised - reached miss count\n");
 490                 print_health_info(dev);
 491         }
 492
 493         fatal_error = check_fatal_sensors(dev);
 494
 495         if (fatal_error && !health->fatal_error) {
 496                 mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error);
 497                 dev->priv.health.fatal_error = fatal_error;
 498                 print_health_info(dev);
 499                 mlx5_trigger_health_work(dev);
 500         }
 501
 502 out:
 503         mod_timer(&health->timer, get_next_poll_jiffies());
 504 }
 505
 506 void mlx5_start_health_poll(struct mlx5_core_dev *dev)
 507 {
 508         struct mlx5_core_health *health = &dev->priv.health;
 509
 510         init_timer(&health->timer);
 511         health->fatal_error = MLX5_SENSOR_NO_ERR;
 512         clear_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
 513         clear_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
 514         health->health = &dev->iseg->health;
 515         health->health_counter = &dev->iseg->health_counter;
 516
 517         setup_timer(&health->timer, poll_health, (unsigned long)dev);
 518         mod_timer(&health->timer,
 519                   round_jiffies(jiffies + MLX5_HEALTH_POLL_INTERVAL));
 520 }
 521
 522 void mlx5_stop_health_poll(struct mlx5_core_dev *dev)
 523 {
 524         struct mlx5_core_health *health = &dev->priv.health;
 525
 526         del_timer_sync(&health->timer);
 527 }
 528
 529 void mlx5_drain_health_wq(struct mlx5_core_dev *dev)
 530 {
 531         struct mlx5_core_health *health = &dev->priv.health;
 532         unsigned long flags;
 533
 534         spin_lock_irqsave(&health->wq_lock, flags);
 535         set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
 536         set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
 537         spin_unlock_irqrestore(&health->wq_lock, flags);
 538         cancel_delayed_work_sync(&health->recover_work);
 539         cancel_work_sync(&health->work);
 540 }
 541
 542 void mlx5_drain_health_recovery(struct mlx5_core_dev *dev)
 543 {
 544         struct mlx5_core_health *health = &dev->priv.health;
 545         unsigned long flags;
 546
 547         spin_lock_irqsave(&health->wq_lock, flags);
 548         set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
 549         spin_unlock_irqrestore(&health->wq_lock, flags);
 550         cancel_delayed_work_sync(&dev->priv.health.recover_work);
 551 }
 552
 553 void mlx5_health_cleanup(struct mlx5_core_dev *dev)
 554 {
 555         struct mlx5_core_health *health = &dev->priv.health;
 556
 557         destroy_workqueue(health->wq);
 558 }
 559
 560 #define HEALTH_NAME "mlx5_health"
 561 int mlx5_health_init(struct mlx5_core_dev *dev)
 562 {
 563         struct mlx5_core_health *health;
 564         char *name;
 565         int len;
 566
 567         health = &dev->priv.health;
 568         len = strlen(HEALTH_NAME) + strlen(dev_name(&dev->pdev->dev));
 569         name = kmalloc(len + 1, GFP_KERNEL);
 570         if (!name)
 571                 return -ENOMEM;
 572
 573         snprintf(name, len, "%s:%s", HEALTH_NAME, dev_name(&dev->pdev->dev));
 574         health->wq = create_singlethread_workqueue(name);
 575         kfree(name);
 576         if (!health->wq)
 577                 return -ENOMEM;
 578
 579         spin_lock_init(&health->wq_lock);
 580         INIT_WORK(&health->work, health_care);
 581         INIT_DELAYED_WORK(&health->recover_work, health_recover);
 582
 583         return 0;
 584 }