sys/dev/mlx5/mlx5_core/mlx5_health.c

   1 /*-
   2  * Copyright (c) 2013-2017, Mellanox Technologies, Ltd.  All rights reserved.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  *
  25  * $FreeBSD$
  26  */
  27
  28 #include <linux/kernel.h>
  29 #include <linux/module.h>
  30 #include <linux/random.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/hardirq.h>
  33 #include <linux/delay.h>
  34 #include <dev/mlx5/driver.h>
  35 #include <dev/mlx5/mlx5_ifc.h>
  36 #include "mlx5_core.h"
  37
  38 #define MLX5_HEALTH_POLL_INTERVAL       (2 * HZ)
  39 #define MAX_MISSES                      3
  40
  41 enum {
  42         MLX5_NIC_IFC_FULL               = 0,
  43         MLX5_NIC_IFC_DISABLED           = 1,
  44         MLX5_NIC_IFC_NO_DRAM_NIC        = 2,
  45         MLX5_NIC_IFC_SW_RESET           = 7,
  46 };
  47
  48 enum {
  49         MLX5_DROP_NEW_HEALTH_WORK,
  50         MLX5_DROP_NEW_RECOVERY_WORK,
  51 };
  52
  53 enum  {
  54         MLX5_SENSOR_NO_ERR              = 0,
  55         MLX5_SENSOR_PCI_COMM_ERR        = 1,
  56         MLX5_SENSOR_PCI_ERR             = 2,
  57         MLX5_SENSOR_NIC_DISABLED        = 3,
  58         MLX5_SENSOR_NIC_SW_RESET        = 4,
  59         MLX5_SENSOR_FW_SYND_RFR         = 5,
  60 };
  61
  62 static int lock_sem_sw_reset(struct mlx5_core_dev *dev)
  63 {
  64         int ret;
  65
  66         /* Lock GW access */
  67         ret = -mlx5_vsc_lock(dev);
  68         if (ret) {
  69                 mlx5_core_warn(dev, "Timed out locking gateway %d\n", ret);
  70                 return ret;
  71         }
  72
  73         ret = -mlx5_vsc_lock_addr_space(dev, MLX5_SEMAPHORE_SW_RESET);
  74         if (ret) {
  75                 if (ret == -EBUSY)
  76                         mlx5_core_dbg(dev, "SW reset FW semaphore already locked, another function will handle the reset\n");
  77                 else
  78                         mlx5_core_warn(dev, "SW reset semaphore lock return %d\n", ret);
  79         }
  80
  81         /* Unlock GW access */
  82         mlx5_vsc_unlock(dev);
  83
  84         return ret;
  85 }
  86
  87 static int unlock_sem_sw_reset(struct mlx5_core_dev *dev)
  88 {
  89         int ret;
  90
  91         /* Lock GW access */
  92         ret = -mlx5_vsc_lock(dev);
  93         if (ret) {
  94                 mlx5_core_warn(dev, "Timed out locking gateway %d\n", ret);
  95                 return ret;
  96         }
  97
  98         ret = -mlx5_vsc_unlock_addr_space(dev, MLX5_SEMAPHORE_SW_RESET);
  99
 100         /* Unlock GW access */
 101         mlx5_vsc_unlock(dev);
 102
 103         return ret;
 104 }
 105
 106 static u8 get_nic_mode(struct mlx5_core_dev *dev)
 107 {
 108         return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 7;
 109 }
 110
 111 static bool sensor_fw_synd_rfr(struct mlx5_core_dev *dev)
 112 {
 113         struct mlx5_core_health *health = &dev->priv.health;
 114         struct mlx5_health_buffer __iomem *h = health->health;
 115         u32 rfr = ioread32be(&h->rfr) >> MLX5_RFR_OFFSET;
 116         u8 synd = ioread8(&h->synd);
 117
 118         if (rfr && synd)
 119                 mlx5_core_dbg(dev, "FW requests reset, synd: %d\n", synd);
 120         return rfr && synd;
 121 }
 122
 123 static void mlx5_trigger_cmd_completions(struct mlx5_core_dev *dev)
 124 {
 125         unsigned long flags;
 126         u64 vector;
 127
 128         /* wait for pending handlers to complete */
 129         synchronize_irq(dev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector);
 130         spin_lock_irqsave(&dev->cmd.alloc_lock, flags);
 131         vector = ~dev->cmd.bitmask & ((1ul << (1 << dev->cmd.log_sz)) - 1);
 132         if (!vector)
 133                 goto no_trig;
 134
 135         vector |= MLX5_TRIGGERED_CMD_COMP;
 136         spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
 137
 138         mlx5_core_dbg(dev, "vector 0x%jx\n", (uintmax_t)vector);
 139         mlx5_cmd_comp_handler(dev, vector);
 140         return;
 141
 142 no_trig:
 143         spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags);
 144 }
 145
 146 static bool sensor_pci_no_comm(struct mlx5_core_dev *dev)
 147 {
 148         struct mlx5_core_health *health = &dev->priv.health;
 149         struct mlx5_health_buffer __iomem *h = health->health;
 150         bool err = ioread32be(&h->fw_ver) == 0xffffffff;
 151
 152         return err;
 153 }
 154
 155 static bool sensor_nic_disabled(struct mlx5_core_dev *dev)
 156 {
 157         return get_nic_mode(dev) == MLX5_NIC_IFC_DISABLED;
 158 }
 159
 160 static bool sensor_nic_sw_reset(struct mlx5_core_dev *dev)
 161 {
 162         return get_nic_mode(dev) == MLX5_NIC_IFC_SW_RESET;
 163 }
 164
 165 static u32 check_fatal_sensors(struct mlx5_core_dev *dev)
 166 {
 167         if (sensor_pci_no_comm(dev))
 168                 return MLX5_SENSOR_PCI_COMM_ERR;
 169         if (pci_channel_offline(dev->pdev))
 170                 return MLX5_SENSOR_PCI_ERR;
 171         if (sensor_nic_disabled(dev))
 172                 return MLX5_SENSOR_NIC_DISABLED;
 173         if (sensor_nic_sw_reset(dev))
 174                 return MLX5_SENSOR_NIC_SW_RESET;
 175         if (sensor_fw_synd_rfr(dev))
 176                 return MLX5_SENSOR_FW_SYND_RFR;
 177
 178         return MLX5_SENSOR_NO_ERR;
 179 }
 180
 181 static void reset_fw_if_needed(struct mlx5_core_dev *dev)
 182 {
 183         bool supported = (ioread32be(&dev->iseg->initializing) >>
 184                           MLX5_FW_RESET_SUPPORTED_OFFSET) & 1;
 185         u32 cmdq_addr, fatal_error;
 186
 187         if (!supported)
 188                 return;
 189
 190         /* The reset only needs to be issued by one PF. The health buffer is
 191          * shared between all functions, and will be cleared during a reset.
 192          * Check again to avoid a redundant 2nd reset. If the fatal erros was
 193          * PCI related a reset won't help.
 194          */
 195         fatal_error = check_fatal_sensors(dev);
 196         if (fatal_error == MLX5_SENSOR_PCI_COMM_ERR ||
 197             fatal_error == MLX5_SENSOR_NIC_DISABLED ||
 198             fatal_error == MLX5_SENSOR_NIC_SW_RESET) {
 199                 mlx5_core_warn(dev, "Not issuing FW reset. Either it's already done or won't help.\n");
 200                 return;
 201         }
 202
 203         mlx5_core_warn(dev, "Issuing FW Reset\n");
 204         /* Write the NIC interface field to initiate the reset, the command
 205          * interface address also resides here, don't overwrite it.
 206          */
 207         cmdq_addr = ioread32be(&dev->iseg->cmdq_addr_l_sz);
 208         iowrite32be((cmdq_addr & 0xFFFFF000) |
 209                     MLX5_NIC_IFC_SW_RESET << MLX5_NIC_IFC_OFFSET,
 210                     &dev->iseg->cmdq_addr_l_sz);
 211 }
 212
 213 #define MLX5_CRDUMP_WAIT_MS     60000
 214 #define MLX5_FW_RESET_WAIT_MS   1000
 215 #define MLX5_NIC_STATE_POLL_MS  5
 216 void mlx5_enter_error_state(struct mlx5_core_dev *dev, bool force)
 217 {
 218         unsigned long end, delay_ms = MLX5_CRDUMP_WAIT_MS;
 219         u32 fatal_error;
 220         int lock = -EBUSY;
 221
 222         fatal_error = check_fatal_sensors(dev);
 223
 224         if (fatal_error || force) {
 225                 if (xchg(&dev->state, MLX5_DEVICE_STATE_INTERNAL_ERROR) ==
 226                     MLX5_DEVICE_STATE_INTERNAL_ERROR)
 227                         return;
 228                 if (!force)
 229                         mlx5_core_err(dev, "internal state error detected\n");
 230                 mlx5_trigger_cmd_completions(dev);
 231         }
 232
 233         mutex_lock(&dev->intf_state_mutex);
 234
 235         if (force)
 236                 goto err_state_done;
 237
 238         if (fatal_error == MLX5_SENSOR_FW_SYND_RFR) {
 239                 /* Get cr-dump and reset FW semaphore */
 240                 if (mlx5_core_is_pf(dev))
 241                         lock = lock_sem_sw_reset(dev);
 242
 243                 /* Execute cr-dump and SW reset */
 244                 if (lock != -EBUSY) {
 245                         mlx5_fwdump(dev);
 246                         reset_fw_if_needed(dev);
 247                         delay_ms = MLX5_FW_RESET_WAIT_MS;
 248                 }
 249         }
 250
 251         /* Recover from SW reset */
 252         end = jiffies + msecs_to_jiffies(delay_ms);
 253         do {
 254                 if (sensor_nic_disabled(dev))
 255                         break;
 256
 257                 msleep(MLX5_NIC_STATE_POLL_MS);
 258         } while (!time_after(jiffies, end));
 259
 260         if (!sensor_nic_disabled(dev)) {
 261                 dev_err(&dev->pdev->dev, "NIC IFC still %d after %lums.\n",
 262                         get_nic_mode(dev), delay_ms);
 263         }
 264
 265         /* Release FW semaphore if you are the lock owner */
 266         if (!lock)
 267                 unlock_sem_sw_reset(dev);
 268
 269         mlx5_core_err(dev, "system error event triggered\n");
 270
 271 err_state_done:
 272         mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0);
 273         mutex_unlock(&dev->intf_state_mutex);
 274 }
 275
 276 static void mlx5_handle_bad_state(struct mlx5_core_dev *dev)
 277 {
 278         u8 nic_mode = get_nic_mode(dev);
 279
 280         if (nic_mode == MLX5_NIC_IFC_SW_RESET) {
 281                 /* The IFC mode field is 3 bits, so it will read 0x7 in two cases:
 282                  * 1. PCI has been disabled (ie. PCI-AER, PF driver unloaded
 283                  *    and this is a VF), this is not recoverable by SW reset.
 284                  *    Logging of this is handled elsewhere.
 285                  * 2. FW reset has been issued by another function, driver can
 286                  *    be reloaded to recover after the mode switches to
 287                  *    MLX5_NIC_IFC_DISABLED.
 288                  */
 289                 if (dev->priv.health.fatal_error != MLX5_SENSOR_PCI_COMM_ERR)
 290                         mlx5_core_warn(dev, "NIC SW reset is already progress\n");
 291                 else
 292                         mlx5_core_warn(dev, "Communication with FW over the PCI link is down\n");
 293         } else {
 294                 mlx5_core_warn(dev, "NIC mode %d\n", nic_mode);
 295         }
 296
 297         mlx5_disable_device(dev);
 298 }
 299
 300 #define MLX5_FW_RESET_WAIT_MS   1000
 301 #define MLX5_NIC_STATE_POLL_MS  5
 302 static void health_recover(struct work_struct *work)
 303 {
 304         unsigned long end = jiffies + msecs_to_jiffies(MLX5_FW_RESET_WAIT_MS);
 305         struct mlx5_core_health *health;
 306         struct delayed_work *dwork;
 307         struct mlx5_core_dev *dev;
 308         struct mlx5_priv *priv;
 309         bool recover = true;
 310         u8 nic_mode;
 311
 312         dwork = container_of(work, struct delayed_work, work);
 313         health = container_of(dwork, struct mlx5_core_health, recover_work);
 314         priv = container_of(health, struct mlx5_priv, health);
 315         dev = container_of(priv, struct mlx5_core_dev, priv);
 316
 317         mtx_lock(&Giant);       /* XXX newbus needs this */
 318
 319         if (sensor_pci_no_comm(dev)) {
 320                 dev_err(&dev->pdev->dev, "health recovery flow aborted, PCI reads still not working\n");
 321                 recover = false;
 322         }
 323
 324         nic_mode = get_nic_mode(dev);
 325         while (nic_mode != MLX5_NIC_IFC_DISABLED &&
 326                !time_after(jiffies, end)) {
 327                 msleep(MLX5_NIC_STATE_POLL_MS);
 328                 nic_mode = get_nic_mode(dev);
 329         }
 330
 331         if (nic_mode != MLX5_NIC_IFC_DISABLED) {
 332                 dev_err(&dev->pdev->dev, "health recovery flow aborted, unexpected NIC IFC mode %d.\n",
 333                         nic_mode);
 334                 recover = false;
 335         }
 336
 337         if (recover) {
 338                 dev_err(&dev->pdev->dev, "starting health recovery flow\n");
 339                 mlx5_recover_device(dev);
 340         }
 341
 342         mtx_unlock(&Giant);
 343 }
 344
 345 /* How much time to wait until health resetting the driver (in msecs) */
 346 #define MLX5_RECOVERY_DELAY_MSECS 60000
 347 #define MLX5_RECOVERY_NO_DELAY 0
 348 static unsigned long get_recovery_delay(struct mlx5_core_dev *dev)
 349 {
 350         return dev->priv.health.fatal_error == MLX5_SENSOR_PCI_ERR ||
 351                 dev->priv.health.fatal_error == MLX5_SENSOR_PCI_COMM_ERR        ?
 352                 MLX5_RECOVERY_DELAY_MSECS : MLX5_RECOVERY_NO_DELAY;
 353 }
 354
 355 static void health_care(struct work_struct *work)
 356 {
 357         struct mlx5_core_health *health;
 358         unsigned long recover_delay;
 359         struct mlx5_core_dev *dev;
 360         struct mlx5_priv *priv;
 361         unsigned long flags;
 362
 363         health = container_of(work, struct mlx5_core_health, work);
 364         priv = container_of(health, struct mlx5_priv, health);
 365         dev = container_of(priv, struct mlx5_core_dev, priv);
 366
 367         mlx5_core_warn(dev, "handling bad device here\n");
 368         mlx5_handle_bad_state(dev);
 369         recover_delay = msecs_to_jiffies(get_recovery_delay(dev));
 370
 371         spin_lock_irqsave(&health->wq_lock, flags);
 372         if (!test_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags)) {
 373                 mlx5_core_warn(dev, "Scheduling recovery work with %lums delay\n",
 374                                recover_delay);
 375                 schedule_delayed_work(&health->recover_work, recover_delay);
 376         } else {
 377                 dev_err(&dev->pdev->dev,
 378                         "new health works are not permitted at this stage\n");
 379         }
 380         spin_unlock_irqrestore(&health->wq_lock, flags);
 381 }
 382
 383 static int get_next_poll_jiffies(void)
 384 {
 385         unsigned long next;
 386
 387         get_random_bytes(&next, sizeof(next));
 388         next %= HZ;
 389         next += jiffies + MLX5_HEALTH_POLL_INTERVAL;
 390
 391         return next;
 392 }
 393
 394 void mlx5_trigger_health_work(struct mlx5_core_dev *dev)
 395 {
 396         struct mlx5_core_health *health = &dev->priv.health;
 397         unsigned long flags;
 398
 399         spin_lock_irqsave(&health->wq_lock, flags);
 400         if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags))
 401                 queue_work(health->wq, &health->work);
 402         else
 403                 dev_err(&dev->pdev->dev,
 404                         "new health works are not permitted at this stage\n");
 405         spin_unlock_irqrestore(&health->wq_lock, flags);
 406 }
 407
 408 static const char *hsynd_str(u8 synd)
 409 {
 410         switch (synd) {
 411         case MLX5_HEALTH_SYNDR_FW_ERR:
 412                 return "firmware internal error";
 413         case MLX5_HEALTH_SYNDR_IRISC_ERR:
 414                 return "irisc not responding";
 415         case MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR:
 416                 return "unrecoverable hardware error";
 417         case MLX5_HEALTH_SYNDR_CRC_ERR:
 418                 return "firmware CRC error";
 419         case MLX5_HEALTH_SYNDR_FETCH_PCI_ERR:
 420                 return "ICM fetch PCI error";
 421         case MLX5_HEALTH_SYNDR_HW_FTL_ERR:
 422                 return "HW fatal error\n";
 423         case MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR:
 424                 return "async EQ buffer overrun";
 425         case MLX5_HEALTH_SYNDR_EQ_ERR:
 426                 return "EQ error";
 427         case MLX5_HEALTH_SYNDR_EQ_INV:
 428                 return "Invalid EQ referenced";
 429         case MLX5_HEALTH_SYNDR_FFSER_ERR:
 430                 return "FFSER error";
 431         case MLX5_HEALTH_SYNDR_HIGH_TEMP:
 432                 return "High temprature";
 433         default:
 434                 return "unrecognized error";
 435         }
 436 }
 437
 438 static void print_health_info(struct mlx5_core_dev *dev)
 439 {
 440         struct mlx5_core_health *health = &dev->priv.health;
 441         struct mlx5_health_buffer __iomem *h = health->health;
 442         char fw_str[18];
 443         u32 fw;
 444         int i;
 445
 446         /* If the syndrom is 0, the device is OK and no need to print buffer */
 447         if (!ioread8(&h->synd))
 448                 return;
 449
 450         for (i = 0; i < ARRAY_SIZE(h->assert_var); i++)
 451                 printf("mlx5_core: INFO: ""assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i));
 452
 453         printf("mlx5_core: INFO: ""assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr));
 454         printf("mlx5_core: INFO: ""assert_callra 0x%08x\n", ioread32be(&h->assert_callra));
 455         snprintf(fw_str, sizeof(fw_str), "%d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev));
 456         printf("mlx5_core: INFO: ""fw_ver %s\n", fw_str);
 457         printf("mlx5_core: INFO: ""hw_id 0x%08x\n", ioread32be(&h->hw_id));
 458         printf("mlx5_core: INFO: ""irisc_index %d\n", ioread8(&h->irisc_index));
 459         printf("mlx5_core: INFO: ""synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd)));
 460         printf("mlx5_core: INFO: ""ext_synd 0x%04x\n", ioread16be(&h->ext_synd));
 461         fw = ioread32be(&h->fw_ver);
 462         printf("mlx5_core: INFO: ""raw fw_ver 0x%08x\n", fw);
 463 }
 464
 465 static void poll_health(unsigned long data)
 466 {
 467         struct mlx5_core_dev *dev = (struct mlx5_core_dev *)data;
 468         struct mlx5_core_health *health = &dev->priv.health;
 469         u32 fatal_error;
 470         u32 count;
 471
 472         if (dev->state != MLX5_DEVICE_STATE_UP)
 473                 return;
 474
 475         if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
 476                 goto out;
 477
 478         count = ioread32be(health->health_counter);
 479         if (count == health->prev)
 480                 ++health->miss_counter;
 481         else
 482                 health->miss_counter = 0;
 483
 484         health->prev = count;
 485         if (health->miss_counter == MAX_MISSES) {
 486                 mlx5_core_err(dev, "device's health compromised - reached miss count\n");
 487                 print_health_info(dev);
 488         }
 489
 490         fatal_error = check_fatal_sensors(dev);
 491
 492         if (fatal_error && !health->fatal_error) {
 493                 mlx5_core_err(dev, "Fatal error %u detected\n", fatal_error);
 494                 dev->priv.health.fatal_error = fatal_error;
 495                 print_health_info(dev);
 496                 mlx5_trigger_health_work(dev);
 497         }
 498
 499 out:
 500         mod_timer(&health->timer, get_next_poll_jiffies());
 501 }
 502
 503 void mlx5_start_health_poll(struct mlx5_core_dev *dev)
 504 {
 505         struct mlx5_core_health *health = &dev->priv.health;
 506
 507         init_timer(&health->timer);
 508         health->fatal_error = MLX5_SENSOR_NO_ERR;
 509         clear_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
 510         clear_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
 511         health->health = &dev->iseg->health;
 512         health->health_counter = &dev->iseg->health_counter;
 513
 514         setup_timer(&health->timer, poll_health, (unsigned long)dev);
 515         mod_timer(&health->timer,
 516                   round_jiffies(jiffies + MLX5_HEALTH_POLL_INTERVAL));
 517 }
 518
 519 void mlx5_stop_health_poll(struct mlx5_core_dev *dev)
 520 {
 521         struct mlx5_core_health *health = &dev->priv.health;
 522
 523         del_timer_sync(&health->timer);
 524 }
 525
 526 void mlx5_drain_health_wq(struct mlx5_core_dev *dev)
 527 {
 528         struct mlx5_core_health *health = &dev->priv.health;
 529         unsigned long flags;
 530
 531         spin_lock_irqsave(&health->wq_lock, flags);
 532         set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
 533         set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
 534         spin_unlock_irqrestore(&health->wq_lock, flags);
 535         cancel_delayed_work_sync(&health->recover_work);
 536         cancel_work_sync(&health->work);
 537 }
 538
 539 void mlx5_drain_health_recovery(struct mlx5_core_dev *dev)
 540 {
 541         struct mlx5_core_health *health = &dev->priv.health;
 542         unsigned long flags;
 543
 544         spin_lock_irqsave(&health->wq_lock, flags);
 545         set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
 546         spin_unlock_irqrestore(&health->wq_lock, flags);
 547         cancel_delayed_work_sync(&dev->priv.health.recover_work);
 548 }
 549
 550 void mlx5_health_cleanup(struct mlx5_core_dev *dev)
 551 {
 552         struct mlx5_core_health *health = &dev->priv.health;
 553
 554         destroy_workqueue(health->wq);
 555 }
 556
 557 #define HEALTH_NAME "mlx5_health"
 558 int mlx5_health_init(struct mlx5_core_dev *dev)
 559 {
 560         struct mlx5_core_health *health;
 561         char *name;
 562         int len;
 563
 564         health = &dev->priv.health;
 565         len = strlen(HEALTH_NAME) + strlen(dev_name(&dev->pdev->dev));
 566         name = kmalloc(len + 1, GFP_KERNEL);
 567         if (!name)
 568                 return -ENOMEM;
 569
 570         snprintf(name, len, "%s:%s", HEALTH_NAME, dev_name(&dev->pdev->dev));
 571         health->wq = create_singlethread_workqueue(name);
 572         kfree(name);
 573         if (!health->wq)
 574                 return -ENOMEM;
 575
 576         spin_lock_init(&health->wq_lock);
 577         INIT_WORK(&health->work, health_care);
 578         INIT_DELAYED_WORK(&health->recover_work, health_recover);
 579
 580         return 0;
 581 }