2 * Copyright (c) 2013-2017, Mellanox Technologies, Ltd. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
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8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
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15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <dev/mlx5/driver.h>
31 #include "mlx5_core.h"
35 /* Finds an entry where we can register the given rate
36 * If the rate already exists, return the entry where it is registered,
37 * otherwise return the first available entry.
38 * If the table is full, return NULL
40 static struct mlx5_rl_entry *find_rl_entry(struct mlx5_rl_table *table,
43 struct mlx5_rl_entry *ret_entry = NULL;
44 struct mlx5_rl_entry *entry;
47 for (i = 0; i < table->max_size; i++) {
48 entry = table->rl_entry + i;
49 if (entry->rate == rate && entry->burst == burst)
51 if (ret_entry == NULL && entry->rate == 0)
58 static int mlx5_set_rate_limit_cmd(struct mlx5_core_dev *dev,
59 u32 rate, u32 burst, u16 index)
61 u32 in[MLX5_ST_SZ_DW(set_rate_limit_in)] = {0};
62 u32 out[MLX5_ST_SZ_DW(set_rate_limit_out)] = {0};
64 MLX5_SET(set_rate_limit_in, in, opcode,
65 MLX5_CMD_OP_SET_RATE_LIMIT);
66 MLX5_SET(set_rate_limit_in, in, rate_limit_index, index);
67 MLX5_SET(set_rate_limit_in, in, rate_limit, rate);
69 if (MLX5_CAP_QOS(dev, packet_pacing_burst_bound))
70 MLX5_SET(set_rate_limit_in, in, burst_upper_bound, burst);
72 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
75 bool mlx5_rl_is_in_range(const struct mlx5_core_dev *dev, u32 rate, u32 burst)
77 const struct mlx5_rl_table *table = &dev->priv.rl_table;
79 return (rate <= table->max_rate && rate >= table->min_rate &&
82 EXPORT_SYMBOL(mlx5_rl_is_in_range);
84 int mlx5_rl_add_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst, u16 *index)
86 struct mlx5_rl_table *table = &dev->priv.rl_table;
87 struct mlx5_rl_entry *entry;
90 mutex_lock(&table->rl_lock);
92 if (!rate || !mlx5_rl_is_in_range(dev, rate, burst)) {
93 mlx5_core_err(dev, "Invalid rate: %u, should be %u to %u\n",
94 rate, table->min_rate, table->max_rate);
99 entry = find_rl_entry(table, rate, burst);
101 mlx5_core_err(dev, "Max number of %u rates reached\n",
106 if (entry->refcount == 0xFFFFFFFFU) {
107 /* out of refcounts */
110 } else if (entry->refcount != 0) {
111 /* rate already configured */
115 err = mlx5_set_rate_limit_cmd(dev, rate, burst, entry->index);
117 mlx5_core_err(dev, "Failed configuring rate: %u (%d)\n",
122 entry->burst = burst;
125 *index = entry->index;
128 mutex_unlock(&table->rl_lock);
131 EXPORT_SYMBOL(mlx5_rl_add_rate);
133 void mlx5_rl_remove_rate(struct mlx5_core_dev *dev, u32 rate, u32 burst)
135 struct mlx5_rl_table *table = &dev->priv.rl_table;
136 struct mlx5_rl_entry *entry = NULL;
138 /* 0 is a reserved value for unlimited rate */
142 mutex_lock(&table->rl_lock);
143 entry = find_rl_entry(table, rate, burst);
144 if (!entry || !entry->refcount) {
145 mlx5_core_warn(dev, "Rate %u is not configured\n", rate);
150 if (!entry->refcount) {
151 /* need to remove rate */
152 mlx5_set_rate_limit_cmd(dev, 0, 0, entry->index);
158 mutex_unlock(&table->rl_lock);
160 EXPORT_SYMBOL(mlx5_rl_remove_rate);
162 int mlx5_init_rl_table(struct mlx5_core_dev *dev)
164 struct mlx5_rl_table *table = &dev->priv.rl_table;
167 mutex_init(&table->rl_lock);
168 if (!MLX5_CAP_GEN(dev, qos) || !MLX5_CAP_QOS(dev, packet_pacing)) {
173 /* First entry is reserved for unlimited rate */
174 table->max_size = MLX5_CAP_QOS(dev, packet_pacing_rate_table_size) - 1;
175 table->max_rate = MLX5_CAP_QOS(dev, packet_pacing_max_rate);
176 table->min_rate = MLX5_CAP_QOS(dev, packet_pacing_min_rate);
178 table->rl_entry = kcalloc(table->max_size, sizeof(struct mlx5_rl_entry),
180 if (!table->rl_entry)
183 /* The index represents the index in HW rate limit table
184 * Index 0 is reserved for unlimited rate
186 for (i = 0; i < table->max_size; i++)
187 table->rl_entry[i].index = i + 1;
192 void mlx5_cleanup_rl_table(struct mlx5_core_dev *dev)
194 struct mlx5_rl_table *table = &dev->priv.rl_table;
197 /* Clear all configured rates */
198 for (i = 0; i < table->max_size; i++)
199 if (table->rl_entry[i].rate)
200 mlx5_set_rate_limit_cmd(dev, 0, 0,
201 table->rl_entry[i].index);
203 kfree(dev->priv.rl_table.rl_entry);