2 * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
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15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/io-mapping.h>
31 #include <dev/mlx5/driver.h>
32 #include "mlx5_core.h"
34 int mlx5_cmd_alloc_uar(struct mlx5_core_dev *dev, u32 *uarn)
36 u32 in[MLX5_ST_SZ_DW(alloc_uar_in)];
37 u32 out[MLX5_ST_SZ_DW(alloc_uar_out)];
40 memset(in, 0, sizeof(in));
42 MLX5_SET(alloc_uar_in, in, opcode, MLX5_CMD_OP_ALLOC_UAR);
44 memset(out, 0, sizeof(out));
45 err = mlx5_cmd_exec_check_status(dev, in, sizeof(in), out, sizeof(out));
49 *uarn = MLX5_GET(alloc_uar_out, out, uar);
53 EXPORT_SYMBOL(mlx5_cmd_alloc_uar);
55 int mlx5_cmd_free_uar(struct mlx5_core_dev *dev, u32 uarn)
57 u32 in[MLX5_ST_SZ_DW(dealloc_uar_in)];
58 u32 out[MLX5_ST_SZ_DW(dealloc_uar_out)];
60 memset(in, 0, sizeof(in));
62 MLX5_SET(dealloc_uar_in, in, opcode, MLX5_CMD_OP_DEALLOC_UAR);
63 MLX5_SET(dealloc_uar_in, in, uar, uarn);
65 memset(out, 0, sizeof(out));
66 return mlx5_cmd_exec_check_status(dev, in, sizeof(in),
69 EXPORT_SYMBOL(mlx5_cmd_free_uar);
71 static int need_uuar_lock(int uuarn)
73 int tot_uuars = NUM_DRIVER_UARS * MLX5_BF_REGS_PER_PAGE;
75 if (uuarn == 0 || tot_uuars - NUM_LOW_LAT_UUARS)
81 int mlx5_alloc_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari)
83 int tot_uuars = NUM_DRIVER_UARS * MLX5_BF_REGS_PER_PAGE;
89 uuari->num_uars = NUM_DRIVER_UARS;
90 uuari->num_low_latency_uuars = NUM_LOW_LAT_UUARS;
92 mutex_init(&uuari->lock);
93 uuari->uars = kcalloc(uuari->num_uars, sizeof(*uuari->uars), GFP_KERNEL);
95 uuari->bfs = kcalloc(tot_uuars, sizeof(*uuari->bfs), GFP_KERNEL);
97 uuari->bitmap = kcalloc(BITS_TO_LONGS(tot_uuars), sizeof(*uuari->bitmap),
100 uuari->count = kcalloc(tot_uuars, sizeof(*uuari->count), GFP_KERNEL);
102 for (i = 0; i < uuari->num_uars; i++) {
103 err = mlx5_cmd_alloc_uar(dev, &uuari->uars[i].index);
107 addr = pci_resource_start(dev->pdev, 0) +
108 ((phys_addr_t)(uuari->uars[i].index) << PAGE_SHIFT);
109 uuari->uars[i].map = ioremap(addr, PAGE_SIZE);
110 if (!uuari->uars[i].map) {
111 mlx5_cmd_free_uar(dev, uuari->uars[i].index);
115 mlx5_core_dbg(dev, "allocated uar index 0x%x, mmaped at %p\n",
116 uuari->uars[i].index, uuari->uars[i].map);
119 for (i = 0; i < tot_uuars; i++) {
122 bf->buf_size = (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) / 2;
123 bf->uar = &uuari->uars[i / MLX5_BF_REGS_PER_PAGE];
124 bf->regreg = uuari->uars[i / MLX5_BF_REGS_PER_PAGE].map;
125 bf->reg = NULL; /* Add WC support */
126 bf->offset = (i % MLX5_BF_REGS_PER_PAGE) *
127 (1 << MLX5_CAP_GEN(dev, log_bf_reg_size)) +
129 bf->need_lock = need_uuar_lock(i);
130 spin_lock_init(&bf->lock);
131 spin_lock_init(&bf->lock32);
138 for (i--; i >= 0; i--) {
139 iounmap(uuari->uars[i].map);
140 mlx5_cmd_free_uar(dev, uuari->uars[i].index);
144 kfree(uuari->bitmap);
152 int mlx5_free_uuars(struct mlx5_core_dev *dev, struct mlx5_uuar_info *uuari)
154 int i = uuari->num_uars;
156 for (i--; i >= 0; i--) {
157 iounmap(uuari->uars[i].map);
158 mlx5_cmd_free_uar(dev, uuari->uars[i].index);
162 kfree(uuari->bitmap);
169 int mlx5_alloc_map_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar)
172 phys_addr_t uar_bar_start;
175 err = mlx5_cmd_alloc_uar(mdev, &uar->index);
177 mlx5_core_warn(mdev, "mlx5_cmd_alloc_uar() failed, %d\n", err);
181 uar_bar_start = pci_resource_start(mdev->pdev, 0);
182 pfn = (uar_bar_start >> PAGE_SHIFT) + uar->index;
183 uar->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
185 mlx5_core_warn(mdev, "ioremap() failed, %d\n", err);
190 if (mdev->priv.bf_mapping)
191 uar->bf_map = io_mapping_map_wc(mdev->priv.bf_mapping,
192 uar->index << PAGE_SHIFT);
197 mlx5_cmd_free_uar(mdev, uar->index);
201 EXPORT_SYMBOL(mlx5_alloc_map_uar);
203 void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar)
205 io_mapping_unmap(uar->bf_map);
207 mlx5_cmd_free_uar(mdev, uar->index);
209 EXPORT_SYMBOL(mlx5_unmap_free_uar);