2 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <net/sff8472.h>
32 mlx5e_create_stats(struct sysctl_ctx_list *ctx,
33 struct sysctl_oid_list *parent, const char *buffer,
34 const char **desc, unsigned num, u64 * arg)
36 struct sysctl_oid *node;
41 node = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO,
42 buffer, CTLFLAG_RD, NULL, "Statistics");
45 for (x = 0; x != num; x++) {
46 SYSCTL_ADD_UQUAD(ctx, SYSCTL_CHILDREN(node), OID_AUTO,
47 desc[2 * x], CTLFLAG_RD, arg + x, desc[2 * x + 1]);
52 mlx5e_ethtool_sync_tx_completion_fact(struct mlx5e_priv *priv)
55 * Limit the maximum distance between completion events to
56 * half of the currently set TX queue size.
58 * The maximum number of queue entries a single IP packet can
59 * consume is given by MLX5_SEND_WQE_MAX_WQEBBS.
61 * The worst case max value is then given as below:
63 uint64_t max = priv->params_ethtool.tx_queue_size /
64 (2 * MLX5_SEND_WQE_MAX_WQEBBS);
67 * Update the maximum completion factor value in case the
68 * tx_queue_size field changed. Ensure we don't overflow
75 priv->params_ethtool.tx_completion_fact_max = max;
78 * Verify that the current TX completion factor is within the
81 if (priv->params_ethtool.tx_completion_fact < 1)
82 priv->params_ethtool.tx_completion_fact = 1;
83 else if (priv->params_ethtool.tx_completion_fact > max)
84 priv->params_ethtool.tx_completion_fact = max;
88 mlx5e_getmaxrate(struct mlx5e_priv *priv)
90 struct mlx5_core_dev *mdev = priv->mdev;
91 u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
92 u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
97 err = -mlx5_query_port_tc_rate_limit(mdev, max_bw_value, max_bw_unit);
101 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
102 switch (max_bw_unit[i]) {
103 case MLX5_100_MBPS_UNIT:
104 priv->params_ethtool.max_bw_value[i] = max_bw_value[i] * MLX5E_100MB;
107 priv->params_ethtool.max_bw_value[i] = max_bw_value[i] * MLX5E_1GB;
109 case MLX5_BW_NO_LIMIT:
110 priv->params_ethtool.max_bw_value[i] = 0;
113 priv->params_ethtool.max_bw_value[i] = -1;
114 WARN_ONCE(true, "non-supported BW unit");
124 mlx5e_get_dscp(struct mlx5e_priv *priv)
126 struct mlx5_core_dev *mdev = priv->mdev;
129 if (MLX5_CAP_GEN(mdev, qcam_reg) == 0 ||
130 MLX5_CAP_QCAM_REG(mdev, qpts) == 0 ||
131 MLX5_CAP_QCAM_REG(mdev, qpdpm) == 0)
135 err = -mlx5_query_dscp2prio(mdev, priv->params_ethtool.dscp2prio);
139 err = -mlx5_query_trust_state(mdev, &priv->params_ethtool.trust_state);
148 mlx5e_tc_maxrate_handler(SYSCTL_HANDLER_ARGS)
150 struct mlx5e_priv *priv = arg1;
151 int prio_index = arg2;
152 struct mlx5_core_dev *mdev = priv->mdev;
153 u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
154 u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
157 u64 result = priv->params_ethtool.max_bw_value[prio_index];
158 const u64 upper_limit_mbps = 255 * MLX5E_100MB;
159 const u64 upper_limit_gbps = 255 * MLX5E_1GB;
162 err = sysctl_handle_64(oidp, &result, 0, req);
163 if (err || !req->newptr ||
164 result == priv->params_ethtool.max_bw_value[prio_index])
167 if (result % MLX5E_100MB) {
172 memset(max_bw_value, 0, sizeof(max_bw_value));
173 memset(max_bw_unit, 0, sizeof(max_bw_unit));
175 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
176 bw_val = (i == prio_index) ? result : priv->params_ethtool.max_bw_value[i];
179 max_bw_unit[i] = MLX5_BW_NO_LIMIT;
180 } else if (bw_val > upper_limit_gbps) {
182 max_bw_unit[i] = MLX5_BW_NO_LIMIT;
183 } else if (bw_val <= upper_limit_mbps) {
184 max_bw_value[i] = howmany(bw_val, MLX5E_100MB);
185 max_bw_unit[i] = MLX5_100_MBPS_UNIT;
187 max_bw_value[i] = howmany(bw_val, MLX5E_1GB);
188 max_bw_unit[i] = MLX5_GBPS_UNIT;
192 err = -mlx5_modify_port_tc_rate_limit(mdev, max_bw_value, max_bw_unit);
196 priv->params_ethtool.max_bw_value[prio_index] = result;
203 mlx5e_get_prio_tc(struct mlx5e_priv *priv)
205 struct mlx5_core_dev *mdev = priv->mdev;
210 if (!MLX5_CAP_GEN(priv->mdev, ets)) {
215 for (i = 0; i <= mlx5_max_tc(priv->mdev); i++) {
216 err = -mlx5_query_port_prio_tc(mdev, i, &(priv->params_ethtool.prio_tc[i]));
226 mlx5e_prio_to_tc_handler(SYSCTL_HANDLER_ARGS)
228 struct mlx5e_priv *priv = arg1;
229 int prio_index = arg2;
230 struct mlx5_core_dev *mdev = priv->mdev;
232 uint8_t result = priv->params_ethtool.prio_tc[prio_index];
235 err = sysctl_handle_8(oidp, &result, 0, req);
236 if (err || !req->newptr ||
237 result == priv->params_ethtool.prio_tc[prio_index])
240 if (result > mlx5_max_tc(mdev)) {
245 err = -mlx5_set_port_prio_tc(mdev, prio_index, result);
249 priv->params_ethtool.prio_tc[prio_index] = result;
257 mlx5e_trust_state_handler(SYSCTL_HANDLER_ARGS)
259 struct mlx5e_priv *priv = arg1;
260 struct mlx5_core_dev *mdev = priv->mdev;
265 result = priv->params_ethtool.trust_state;
266 err = sysctl_handle_8(oidp, &result, 0, req);
267 if (err || !req->newptr ||
268 result == priv->params_ethtool.trust_state)
272 case MLX5_QPTS_TRUST_PCP:
273 case MLX5_QPTS_TRUST_DSCP:
275 case MLX5_QPTS_TRUST_BOTH:
276 if (!MLX5_CAP_QCAM_FEATURE(mdev, qpts_trust_both)) {
286 err = -mlx5_set_trust_state(mdev, result);
290 priv->params_ethtool.trust_state = result;
297 mlx5e_dscp_prio_handler(SYSCTL_HANDLER_ARGS)
299 struct mlx5e_priv *priv = arg1;
300 int prio_index = arg2;
301 struct mlx5_core_dev *mdev = priv->mdev;
302 uint8_t dscp2prio[MLX5_MAX_SUPPORTED_DSCP];
307 err = SYSCTL_OUT(req, priv->params_ethtool.dscp2prio + prio_index,
308 sizeof(priv->params_ethtool.dscp2prio) / 8);
309 if (err || !req->newptr)
312 memcpy(dscp2prio, priv->params_ethtool.dscp2prio, sizeof(dscp2prio));
313 err = SYSCTL_IN(req, dscp2prio + prio_index, sizeof(dscp2prio) / 8);
316 for (x = 0; x != MLX5_MAX_SUPPORTED_DSCP; x++) {
317 if (dscp2prio[x] > 7) {
322 err = -mlx5_set_dscp2prio(mdev, dscp2prio);
326 /* update local array */
327 memcpy(priv->params_ethtool.dscp2prio, dscp2prio,
328 sizeof(priv->params_ethtool.dscp2prio));
334 #define MLX5_PARAM_OFFSET(n) \
335 __offsetof(struct mlx5e_priv, params_ethtool.n)
338 mlx5e_ethtool_handler(SYSCTL_HANDLER_ARGS)
340 struct mlx5e_priv *priv = arg1;
347 value = priv->params_ethtool.arg[arg2];
349 error = sysctl_handle_64(oidp, &value, 0, req);
350 if (error || req->newptr == NULL ||
351 value == priv->params_ethtool.arg[arg2])
354 /* assign new value */
355 priv->params_ethtool.arg[arg2] = value;
359 /* check if device is gone */
364 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
365 mode_modify = MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify);
367 switch (MLX5_PARAM_OFFSET(arg[arg2])) {
368 case MLX5_PARAM_OFFSET(rx_coalesce_usecs):
369 /* import RX coal time */
370 if (priv->params_ethtool.rx_coalesce_usecs < 1)
371 priv->params_ethtool.rx_coalesce_usecs = 0;
372 else if (priv->params_ethtool.rx_coalesce_usecs >
373 MLX5E_FLD_MAX(cqc, cq_period)) {
374 priv->params_ethtool.rx_coalesce_usecs =
375 MLX5E_FLD_MAX(cqc, cq_period);
377 priv->params.rx_cq_moderation_usec =
378 priv->params_ethtool.rx_coalesce_usecs;
380 /* check to avoid down and up the network interface */
382 error = mlx5e_refresh_channel_params(priv);
385 case MLX5_PARAM_OFFSET(rx_coalesce_pkts):
386 /* import RX coal pkts */
387 if (priv->params_ethtool.rx_coalesce_pkts < 1)
388 priv->params_ethtool.rx_coalesce_pkts = 0;
389 else if (priv->params_ethtool.rx_coalesce_pkts >
390 MLX5E_FLD_MAX(cqc, cq_max_count)) {
391 priv->params_ethtool.rx_coalesce_pkts =
392 MLX5E_FLD_MAX(cqc, cq_max_count);
394 priv->params.rx_cq_moderation_pkts =
395 priv->params_ethtool.rx_coalesce_pkts;
397 /* check to avoid down and up the network interface */
399 error = mlx5e_refresh_channel_params(priv);
402 case MLX5_PARAM_OFFSET(tx_coalesce_usecs):
403 /* import TX coal time */
404 if (priv->params_ethtool.tx_coalesce_usecs < 1)
405 priv->params_ethtool.tx_coalesce_usecs = 0;
406 else if (priv->params_ethtool.tx_coalesce_usecs >
407 MLX5E_FLD_MAX(cqc, cq_period)) {
408 priv->params_ethtool.tx_coalesce_usecs =
409 MLX5E_FLD_MAX(cqc, cq_period);
411 priv->params.tx_cq_moderation_usec =
412 priv->params_ethtool.tx_coalesce_usecs;
414 /* check to avoid down and up the network interface */
416 error = mlx5e_refresh_channel_params(priv);
419 case MLX5_PARAM_OFFSET(tx_coalesce_pkts):
420 /* import TX coal pkts */
421 if (priv->params_ethtool.tx_coalesce_pkts < 1)
422 priv->params_ethtool.tx_coalesce_pkts = 0;
423 else if (priv->params_ethtool.tx_coalesce_pkts >
424 MLX5E_FLD_MAX(cqc, cq_max_count)) {
425 priv->params_ethtool.tx_coalesce_pkts =
426 MLX5E_FLD_MAX(cqc, cq_max_count);
428 priv->params.tx_cq_moderation_pkts =
429 priv->params_ethtool.tx_coalesce_pkts;
431 /* check to avoid down and up the network interface */
433 error = mlx5e_refresh_channel_params(priv);
436 case MLX5_PARAM_OFFSET(tx_queue_size):
437 /* network interface must be down */
439 mlx5e_close_locked(priv->ifp);
441 /* import TX queue size */
442 if (priv->params_ethtool.tx_queue_size <
443 (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
444 priv->params_ethtool.tx_queue_size =
445 (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
446 } else if (priv->params_ethtool.tx_queue_size >
447 priv->params_ethtool.tx_queue_size_max) {
448 priv->params_ethtool.tx_queue_size =
449 priv->params_ethtool.tx_queue_size_max;
451 /* store actual TX queue size */
452 priv->params.log_sq_size =
453 order_base_2(priv->params_ethtool.tx_queue_size);
454 priv->params_ethtool.tx_queue_size =
455 1 << priv->params.log_sq_size;
457 /* verify TX completion factor */
458 mlx5e_ethtool_sync_tx_completion_fact(priv);
460 /* restart network interface, if any */
462 mlx5e_open_locked(priv->ifp);
465 case MLX5_PARAM_OFFSET(rx_queue_size):
466 /* network interface must be down */
468 mlx5e_close_locked(priv->ifp);
470 /* import RX queue size */
471 if (priv->params_ethtool.rx_queue_size <
472 (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
473 priv->params_ethtool.rx_queue_size =
474 (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
475 } else if (priv->params_ethtool.rx_queue_size >
476 priv->params_ethtool.rx_queue_size_max) {
477 priv->params_ethtool.rx_queue_size =
478 priv->params_ethtool.rx_queue_size_max;
480 /* store actual RX queue size */
481 priv->params.log_rq_size =
482 order_base_2(priv->params_ethtool.rx_queue_size);
483 priv->params_ethtool.rx_queue_size =
484 1 << priv->params.log_rq_size;
486 /* update least number of RX WQEs */
487 priv->params.min_rx_wqes = min(
488 priv->params_ethtool.rx_queue_size - 1,
489 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES);
491 /* restart network interface, if any */
493 mlx5e_open_locked(priv->ifp);
496 case MLX5_PARAM_OFFSET(channels_rsss):
497 /* network interface must be down */
499 mlx5e_close_locked(priv->ifp);
501 /* import number of channels */
502 if (priv->params_ethtool.channels_rsss < 1)
503 priv->params_ethtool.channels_rsss = 1;
504 else if (priv->params_ethtool.channels_rsss > 128)
505 priv->params_ethtool.channels_rsss = 128;
507 priv->params.channels_rsss = priv->params_ethtool.channels_rsss;
509 /* restart network interface, if any */
511 mlx5e_open_locked(priv->ifp);
514 case MLX5_PARAM_OFFSET(channels):
515 /* network interface must be down */
517 mlx5e_close_locked(priv->ifp);
519 /* import number of channels */
520 if (priv->params_ethtool.channels < 1)
521 priv->params_ethtool.channels = 1;
522 else if (priv->params_ethtool.channels >
523 (u64) priv->mdev->priv.eq_table.num_comp_vectors) {
524 priv->params_ethtool.channels =
525 (u64) priv->mdev->priv.eq_table.num_comp_vectors;
527 priv->params.num_channels = priv->params_ethtool.channels;
529 /* restart network interface, if any */
531 mlx5e_open_locked(priv->ifp);
534 case MLX5_PARAM_OFFSET(rx_coalesce_mode):
535 /* network interface must be down */
536 if (was_opened != 0 && mode_modify == 0)
537 mlx5e_close_locked(priv->ifp);
539 /* import RX coalesce mode */
540 if (priv->params_ethtool.rx_coalesce_mode != 0)
541 priv->params_ethtool.rx_coalesce_mode = 1;
542 priv->params.rx_cq_moderation_mode =
543 priv->params_ethtool.rx_coalesce_mode;
545 /* restart network interface, if any */
546 if (was_opened != 0) {
547 if (mode_modify == 0)
548 mlx5e_open_locked(priv->ifp);
550 error = mlx5e_refresh_channel_params(priv);
554 case MLX5_PARAM_OFFSET(tx_coalesce_mode):
555 /* network interface must be down */
556 if (was_opened != 0 && mode_modify == 0)
557 mlx5e_close_locked(priv->ifp);
559 /* import TX coalesce mode */
560 if (priv->params_ethtool.tx_coalesce_mode != 0)
561 priv->params_ethtool.tx_coalesce_mode = 1;
562 priv->params.tx_cq_moderation_mode =
563 priv->params_ethtool.tx_coalesce_mode;
565 /* restart network interface, if any */
566 if (was_opened != 0) {
567 if (mode_modify == 0)
568 mlx5e_open_locked(priv->ifp);
570 error = mlx5e_refresh_channel_params(priv);
574 case MLX5_PARAM_OFFSET(hw_lro):
575 /* network interface must be down */
577 mlx5e_close_locked(priv->ifp);
579 /* import HW LRO mode */
580 if (priv->params_ethtool.hw_lro != 0) {
581 if ((priv->ifp->if_capenable & IFCAP_LRO) &&
582 MLX5_CAP_ETH(priv->mdev, lro_cap)) {
583 priv->params.hw_lro_en = 1;
584 priv->params_ethtool.hw_lro = 1;
586 priv->params.hw_lro_en = 0;
587 priv->params_ethtool.hw_lro = 0;
590 if_printf(priv->ifp, "Can't enable HW LRO: "
591 "The HW or SW LRO feature is disabled\n");
594 priv->params.hw_lro_en = 0;
596 /* restart network interface, if any */
598 mlx5e_open_locked(priv->ifp);
601 case MLX5_PARAM_OFFSET(cqe_zipping):
602 /* network interface must be down */
604 mlx5e_close_locked(priv->ifp);
606 /* import CQE zipping mode */
607 if (priv->params_ethtool.cqe_zipping &&
608 MLX5_CAP_GEN(priv->mdev, cqe_compression)) {
609 priv->params.cqe_zipping_en = true;
610 priv->params_ethtool.cqe_zipping = 1;
612 priv->params.cqe_zipping_en = false;
613 priv->params_ethtool.cqe_zipping = 0;
615 /* restart network interface, if any */
617 mlx5e_open_locked(priv->ifp);
620 case MLX5_PARAM_OFFSET(tx_bufring_disable):
621 /* rangecheck input value */
622 priv->params_ethtool.tx_bufring_disable =
623 priv->params_ethtool.tx_bufring_disable ? 1 : 0;
625 /* reconfigure the sendqueues, if any */
627 mlx5e_close_locked(priv->ifp);
628 mlx5e_open_locked(priv->ifp);
632 case MLX5_PARAM_OFFSET(tx_completion_fact):
633 /* network interface must be down */
635 mlx5e_close_locked(priv->ifp);
637 /* verify parameter */
638 mlx5e_ethtool_sync_tx_completion_fact(priv);
640 /* restart network interface, if any */
642 mlx5e_open_locked(priv->ifp);
645 case MLX5_PARAM_OFFSET(modify_tx_dma):
646 /* check if network interface is opened */
648 priv->params_ethtool.modify_tx_dma =
649 priv->params_ethtool.modify_tx_dma ? 1 : 0;
650 /* modify tx according to value */
651 mlx5e_modify_tx_dma(priv, value != 0);
653 /* if closed force enable tx */
654 priv->params_ethtool.modify_tx_dma = 0;
658 case MLX5_PARAM_OFFSET(modify_rx_dma):
659 /* check if network interface is opened */
661 priv->params_ethtool.modify_rx_dma =
662 priv->params_ethtool.modify_rx_dma ? 1 : 0;
663 /* modify rx according to value */
664 mlx5e_modify_rx_dma(priv, value != 0);
666 /* if closed force enable rx */
667 priv->params_ethtool.modify_rx_dma = 0;
671 case MLX5_PARAM_OFFSET(diag_pci_enable):
672 priv->params_ethtool.diag_pci_enable =
673 priv->params_ethtool.diag_pci_enable ? 1 : 0;
675 error = -mlx5_core_set_diagnostics_full(priv->mdev,
676 priv->params_ethtool.diag_pci_enable,
677 priv->params_ethtool.diag_general_enable);
680 case MLX5_PARAM_OFFSET(diag_general_enable):
681 priv->params_ethtool.diag_general_enable =
682 priv->params_ethtool.diag_general_enable ? 1 : 0;
684 error = -mlx5_core_set_diagnostics_full(priv->mdev,
685 priv->params_ethtool.diag_pci_enable,
686 priv->params_ethtool.diag_general_enable);
689 case MLX5_PARAM_OFFSET(mc_local_lb):
690 priv->params_ethtool.mc_local_lb =
691 priv->params_ethtool.mc_local_lb ? 1 : 0;
693 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb)) {
694 error = mlx5_nic_vport_modify_local_lb(priv->mdev,
695 MLX5_LOCAL_MC_LB, priv->params_ethtool.mc_local_lb);
701 case MLX5_PARAM_OFFSET(uc_local_lb):
702 priv->params_ethtool.uc_local_lb =
703 priv->params_ethtool.uc_local_lb ? 1 : 0;
705 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb)) {
706 error = mlx5_nic_vport_modify_local_lb(priv->mdev,
707 MLX5_LOCAL_UC_LB, priv->params_ethtool.uc_local_lb);
722 * Read the first three bytes of the eeprom in order to get the needed info
723 * for the whole reading.
724 * Byte 0 - Identifier byte
725 * Byte 1 - Revision byte
726 * Byte 2 - Status byte
729 mlx5e_get_eeprom_info(struct mlx5e_priv *priv, struct mlx5e_eeprom *eeprom)
731 struct mlx5_core_dev *dev = priv->mdev;
736 ret = mlx5_query_module_num(dev, &eeprom->module_num);
738 if_printf(priv->ifp, "%s:%d: Failed query module error=%d\n",
739 __func__, __LINE__, ret);
743 /* Read the first three bytes to get Identifier, Revision and Status */
744 ret = mlx5_query_eeprom(dev, eeprom->i2c_addr, eeprom->page_num,
745 eeprom->device_addr, MLX5E_EEPROM_INFO_BYTES, eeprom->module_num, &data,
748 if_printf(priv->ifp, "%s:%d: Failed query eeprom module error=0x%x\n",
749 __func__, __LINE__, ret);
753 switch (data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) {
754 case SFF_8024_ID_QSFP:
755 eeprom->type = MLX5E_ETH_MODULE_SFF_8436;
756 eeprom->len = MLX5E_ETH_MODULE_SFF_8436_LEN;
758 case SFF_8024_ID_QSFPPLUS:
759 case SFF_8024_ID_QSFP28:
760 if ((data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) == SFF_8024_ID_QSFP28 ||
761 ((data & MLX5_EEPROM_REVISION_ID_BYTE_MASK) >> 8) >= 0x3) {
762 eeprom->type = MLX5E_ETH_MODULE_SFF_8636;
763 eeprom->len = MLX5E_ETH_MODULE_SFF_8636_LEN;
765 eeprom->type = MLX5E_ETH_MODULE_SFF_8436;
766 eeprom->len = MLX5E_ETH_MODULE_SFF_8436_LEN;
768 if ((data & MLX5_EEPROM_PAGE_3_VALID_BIT_MASK) == 0)
769 eeprom->page_valid = 1;
771 case SFF_8024_ID_SFP:
772 eeprom->type = MLX5E_ETH_MODULE_SFF_8472;
773 eeprom->len = MLX5E_ETH_MODULE_SFF_8472_LEN;
776 if_printf(priv->ifp, "%s:%d: Not recognized cable type = 0x%x(%s)\n",
777 __func__, __LINE__, data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK,
778 sff_8024_id[data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK]);
784 /* Read both low and high pages of the eeprom */
786 mlx5e_get_eeprom(struct mlx5e_priv *priv, struct mlx5e_eeprom *ee)
788 struct mlx5_core_dev *dev = priv->mdev;
795 /* Read low page of the eeprom */
796 while (ee->device_addr < ee->len) {
797 ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num, ee->device_addr,
798 ee->len - ee->device_addr, ee->module_num,
799 ee->data + (ee->device_addr / 4), &size_read);
801 if_printf(priv->ifp, "%s:%d: Failed reading eeprom, "
802 "error = 0x%02x\n", __func__, __LINE__, ret);
805 ee->device_addr += size_read;
808 /* Read high page of the eeprom */
809 if (ee->page_valid) {
810 ee->device_addr = MLX5E_EEPROM_HIGH_PAGE_OFFSET;
811 ee->page_num = MLX5E_EEPROM_HIGH_PAGE;
813 while (ee->device_addr < MLX5E_EEPROM_PAGE_LENGTH) {
814 ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num,
815 ee->device_addr, MLX5E_EEPROM_PAGE_LENGTH - ee->device_addr,
816 ee->module_num, ee->data + (ee->len / 4) +
817 ((ee->device_addr - MLX5E_EEPROM_HIGH_PAGE_OFFSET) / 4),
820 if_printf(priv->ifp, "%s:%d: Failed reading eeprom, "
821 "error = 0x%02x\n", __func__, __LINE__, ret);
824 ee->device_addr += size_read;
831 mlx5e_print_eeprom(struct mlx5e_eeprom *eeprom)
835 int byte_to_write = 0;
836 int line_length = 16;
838 printf("\nOffset\t\tValues\n");
839 printf("------\t\t------");
840 while (byte_to_write < eeprom->len) {
841 printf("\n0x%04X\t\t", byte_to_write);
842 for (index_in_row = 0; index_in_row < line_length; index_in_row++) {
843 printf("%02X ", ((u8 *)eeprom->data)[byte_to_write]);
848 if (eeprom->page_valid) {
849 row = MLX5E_EEPROM_HIGH_PAGE_OFFSET;
850 printf("\n\nUpper Page 0x03\n");
851 printf("\nOffset\t\tValues\n");
852 printf("------\t\t------");
853 while (row < MLX5E_EEPROM_PAGE_LENGTH) {
854 printf("\n0x%04X\t\t", row);
855 for (index_in_row = 0; index_in_row < line_length; index_in_row++) {
856 printf("%02X ", ((u8 *)eeprom->data)[byte_to_write]);
865 * Read cable EEPROM module information by first inspecting the first
866 * three bytes to get the initial information for a whole reading.
867 * Information will be printed to dmesg.
870 mlx5e_read_eeprom(SYSCTL_HANDLER_ARGS)
872 struct mlx5e_priv *priv = arg1;
873 struct mlx5e_eeprom eeprom;
878 error = sysctl_handle_int(oidp, &result, 0, req);
879 if (error || !req->newptr)
882 /* Check if device is gone */
889 eeprom.i2c_addr = MLX5E_I2C_ADDR_LOW;
890 eeprom.device_addr = 0;
891 eeprom.page_num = MLX5E_EEPROM_LOW_PAGE;
892 eeprom.page_valid = 0;
894 /* Read three first bytes to get important info */
895 error = mlx5e_get_eeprom_info(priv, &eeprom);
897 if_printf(priv->ifp, "%s:%d: Failed reading eeprom's "
898 "initial information\n", __func__, __LINE__);
903 * Allocate needed length buffer and additional space for
906 eeprom.data = malloc(eeprom.len + MLX5E_EEPROM_PAGE_LENGTH,
907 M_MLX5EN, M_WAITOK | M_ZERO);
909 /* Read the whole eeprom information */
910 error = mlx5e_get_eeprom(priv, &eeprom);
912 if_printf(priv->ifp, "%s:%d: Failed reading eeprom\n",
916 * Continue printing partial information in case of
920 mlx5e_print_eeprom(&eeprom);
921 free(eeprom.data, M_MLX5EN);
928 static const char *mlx5e_params_desc[] = {
929 MLX5E_PARAMS(MLX5E_STATS_DESC)
932 static const char *mlx5e_port_stats_debug_desc[] = {
933 MLX5E_PORT_STATS_DEBUG(MLX5E_STATS_DESC)
937 mlx5e_ethtool_debug_channel_info(SYSCTL_HANDLER_ARGS)
939 struct mlx5e_priv *priv;
941 struct mlx5e_channel *c;
947 error = sysctl_wire_old_buffer(req, 0);
950 if (sbuf_new_for_sysctl(&sb, NULL, 128, req) == NULL)
952 sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
955 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0)
957 for (i = 0; i < priv->params.num_channels; i++) {
958 c = priv->channel[i];
960 sbuf_printf(&sb, "channel %d rq %d cq %d\n",
961 c->ix, rq->rqn, rq->cq.mcq.cqn);
962 for (tc = 0; tc < c->num_tc; tc++) {
964 sbuf_printf(&sb, "channel %d tc %d sq %d cq %d\n",
965 c->ix, tc, sq->sqn, sq->cq.mcq.cqn);
970 error = sbuf_finish(&sb);
976 mlx5e_ethtool_debug_stats(SYSCTL_HANDLER_ARGS)
978 struct mlx5e_priv *priv = arg1;
979 int error, sys_debug;
981 sys_debug = priv->sysctl_debug;
982 error = sysctl_handle_int(oidp, &priv->sysctl_debug, 0, req);
983 if (error != 0 || !req->newptr)
985 priv->sysctl_debug = priv->sysctl_debug != 0;
986 if (sys_debug == priv->sysctl_debug)
990 if (priv->sysctl_debug) {
991 mlx5e_create_stats(&priv->stats.port_stats_debug.ctx,
992 SYSCTL_CHILDREN(priv->sysctl_ifnet), "debug_stats",
993 mlx5e_port_stats_debug_desc, MLX5E_PORT_STATS_DEBUG_NUM,
994 priv->stats.port_stats_debug.arg);
995 SYSCTL_ADD_PROC(&priv->sysctl_ctx_channel_debug,
996 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
998 CTLFLAG_RD | CTLFLAG_MPSAFE | CTLTYPE_STRING, priv, 0,
999 mlx5e_ethtool_debug_channel_info, "S", "");
1001 sysctl_ctx_free(&priv->stats.port_stats_debug.ctx);
1002 sysctl_ctx_free(&priv->sysctl_ctx_channel_debug);
1009 mlx5e_create_diagnostics(struct mlx5e_priv *priv)
1011 struct mlx5_core_diagnostics_entry entry;
1012 struct sysctl_ctx_list *ctx;
1013 struct sysctl_oid *node;
1016 /* sysctl context we are using */
1017 ctx = &priv->sysctl_ctx;
1019 /* create root node */
1020 node = SYSCTL_ADD_NODE(ctx,
1021 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1022 "diagnostics", CTLFLAG_RD, NULL, "Diagnostics");
1026 /* create PCI diagnostics */
1027 for (x = 0; x != MLX5_CORE_PCI_DIAGNOSTICS_NUM; x++) {
1028 entry = mlx5_core_pci_diagnostics_table[x];
1029 if (mlx5_core_supports_diagnostics(priv->mdev, entry.counter_id) == 0)
1031 SYSCTL_ADD_UQUAD(ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1032 entry.desc, CTLFLAG_RD, priv->params_pci.array + x,
1033 "PCI diagnostics counter");
1036 /* create general diagnostics */
1037 for (x = 0; x != MLX5_CORE_GENERAL_DIAGNOSTICS_NUM; x++) {
1038 entry = mlx5_core_general_diagnostics_table[x];
1039 if (mlx5_core_supports_diagnostics(priv->mdev, entry.counter_id) == 0)
1041 SYSCTL_ADD_UQUAD(ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1042 entry.desc, CTLFLAG_RD, priv->params_general.array + x,
1043 "General diagnostics counter");
1048 mlx5e_create_ethtool(struct mlx5e_priv *priv)
1050 struct mlx5_core_dev *mdev = priv->mdev;
1051 struct sysctl_oid *node, *qos_node;
1052 const char *pnameunit;
1056 /* set some defaults */
1057 priv->params_ethtool.tx_queue_size_max = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
1058 priv->params_ethtool.rx_queue_size_max = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
1059 priv->params_ethtool.tx_queue_size = 1 << priv->params.log_sq_size;
1060 priv->params_ethtool.rx_queue_size = 1 << priv->params.log_rq_size;
1061 priv->params_ethtool.channels = priv->params.num_channels;
1062 priv->params_ethtool.channels_rsss = priv->params.channels_rsss;
1063 priv->params_ethtool.coalesce_pkts_max = MLX5E_FLD_MAX(cqc, cq_max_count);
1064 priv->params_ethtool.coalesce_usecs_max = MLX5E_FLD_MAX(cqc, cq_period);
1065 priv->params_ethtool.rx_coalesce_mode = priv->params.rx_cq_moderation_mode;
1066 priv->params_ethtool.rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
1067 priv->params_ethtool.rx_coalesce_pkts = priv->params.rx_cq_moderation_pkts;
1068 priv->params_ethtool.tx_coalesce_mode = priv->params.tx_cq_moderation_mode;
1069 priv->params_ethtool.tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
1070 priv->params_ethtool.tx_coalesce_pkts = priv->params.tx_cq_moderation_pkts;
1071 priv->params_ethtool.hw_lro = priv->params.hw_lro_en;
1072 priv->params_ethtool.cqe_zipping = priv->params.cqe_zipping_en;
1073 mlx5e_ethtool_sync_tx_completion_fact(priv);
1075 /* get default values for local loopback, if any */
1076 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb)) {
1080 err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_MC_LB, &val);
1082 priv->params_ethtool.mc_local_lb = val;
1084 err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_UC_LB, &val);
1086 priv->params_ethtool.uc_local_lb = val;
1089 /* create root node */
1090 node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1091 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1092 "conf", CTLFLAG_RW, NULL, "Configuration");
1095 for (x = 0; x != MLX5E_PARAMS_NUM; x++) {
1096 /* check for read-only parameter */
1097 if (strstr(mlx5e_params_desc[2 * x], "_max") != NULL ||
1098 strstr(mlx5e_params_desc[2 * x], "_mtu") != NULL) {
1099 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1100 mlx5e_params_desc[2 * x], CTLTYPE_U64 | CTLFLAG_RD |
1101 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1102 mlx5e_params_desc[2 * x + 1]);
1104 #if (__FreeBSD_version < 1100000)
1108 * NOTE: In FreeBSD-11 and newer the
1109 * CTLFLAG_RWTUN flag will take care of
1110 * loading default sysctl value from the
1111 * kernel environment, if any:
1113 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1114 mlx5e_params_desc[2 * x], CTLTYPE_U64 | CTLFLAG_RWTUN |
1115 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1116 mlx5e_params_desc[2 * x + 1]);
1118 #if (__FreeBSD_version < 1100000)
1119 /* compute path for sysctl */
1120 snprintf(path, sizeof(path), "dev.mce.%d.conf.%s",
1121 device_get_unit(priv->mdev->pdev->dev.bsddev),
1122 mlx5e_params_desc[2 * x]);
1124 /* try to fetch tunable, if any */
1125 if (TUNABLE_QUAD_FETCH(path, &priv->params_ethtool.arg[x]))
1126 mlx5e_ethtool_handler(NULL, priv, x, NULL);
1131 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1132 "debug_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv,
1133 0, &mlx5e_ethtool_debug_stats, "I", "Extended debug statistics");
1135 pnameunit = device_get_nameunit(priv->mdev->pdev->dev.bsddev);
1137 SYSCTL_ADD_STRING(&priv->sysctl_ctx, SYSCTL_CHILDREN(node),
1138 OID_AUTO, "device_name", CTLFLAG_RD,
1139 __DECONST(void *, pnameunit), 0,
1142 /* EEPROM support */
1143 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO, "eeprom_info",
1144 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
1145 mlx5e_read_eeprom, "I", "EEPROM information");
1147 /* Diagnostics support */
1148 mlx5e_create_diagnostics(priv);
1150 /* create qos node */
1151 qos_node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1152 SYSCTL_CHILDREN(node), OID_AUTO,
1153 "qos", CTLFLAG_RW, NULL, "Quality Of Service configuration");
1157 /* Prioriry rate limit support */
1158 if (mlx5e_getmaxrate(priv))
1161 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
1163 snprintf(name, sizeof(name), "tc_%d_max_rate", i);
1164 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1165 OID_AUTO, name, CTLTYPE_U64 | CTLFLAG_RW | CTLFLAG_MPSAFE,
1166 priv, i, mlx5e_tc_maxrate_handler, "QU",
1167 "Max rate for priority, specified in kilobits, where kilo=1000, \
1168 max_rate must be divisible by 100000");
1171 if (mlx5e_get_prio_tc(priv))
1174 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
1176 snprintf(name, sizeof(name), "prio_%d_to_tc", i);
1177 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1178 OID_AUTO, name, CTLTYPE_U8 | CTLFLAG_RW | CTLFLAG_MPSAFE,
1179 priv, i, mlx5e_prio_to_tc_handler, "CU",
1180 "Set priority to traffic class");
1184 if (mlx5e_get_dscp(priv) == 0) {
1185 for (i = 0; i != MLX5_MAX_SUPPORTED_DSCP; i += 8) {
1187 snprintf(name, sizeof(name), "dscp_%d_%d_prio", i, i + 7);
1188 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1189 OID_AUTO, name, CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1190 priv, i, mlx5e_dscp_prio_handler, "CU",
1191 "Set DSCP to priority mapping, 0..7");
1193 #define A "Set trust state, 1:PCP 2:DSCP"
1195 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1196 OID_AUTO, "trust_state", CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1197 priv, 0, mlx5e_trust_state_handler, "CU",
1198 MLX5_CAP_QCAM_FEATURE(mdev, qpts_trust_both) ?