2 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND
14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <net/sff8472.h>
32 mlx5e_create_stats(struct sysctl_ctx_list *ctx,
33 struct sysctl_oid_list *parent, const char *buffer,
34 const char **desc, unsigned num, u64 * arg)
36 struct sysctl_oid *node;
41 node = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO,
42 buffer, CTLFLAG_RD, NULL, "Statistics");
45 for (x = 0; x != num; x++) {
46 SYSCTL_ADD_UQUAD(ctx, SYSCTL_CHILDREN(node), OID_AUTO,
47 desc[2 * x], CTLFLAG_RD, arg + x, desc[2 * x + 1]);
52 mlx5e_ethtool_sync_tx_completion_fact(struct mlx5e_priv *priv)
55 * Limit the maximum distance between completion events to
56 * half of the currently set TX queue size.
58 * The maximum number of queue entries a single IP packet can
59 * consume is given by MLX5_SEND_WQE_MAX_WQEBBS.
61 * The worst case max value is then given as below:
63 uint64_t max = priv->params_ethtool.tx_queue_size /
64 (2 * MLX5_SEND_WQE_MAX_WQEBBS);
67 * Update the maximum completion factor value in case the
68 * tx_queue_size field changed. Ensure we don't overflow
75 priv->params_ethtool.tx_completion_fact_max = max;
78 * Verify that the current TX completion factor is within the
81 if (priv->params_ethtool.tx_completion_fact < 1)
82 priv->params_ethtool.tx_completion_fact = 1;
83 else if (priv->params_ethtool.tx_completion_fact > max)
84 priv->params_ethtool.tx_completion_fact = max;
88 mlx5e_getmaxrate(struct mlx5e_priv *priv)
90 struct mlx5_core_dev *mdev = priv->mdev;
91 u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
92 u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
97 err = -mlx5_query_port_tc_rate_limit(mdev, max_bw_value, max_bw_unit);
101 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
102 switch (max_bw_unit[i]) {
103 case MLX5_100_MBPS_UNIT:
104 priv->params_ethtool.max_bw_value[i] = max_bw_value[i] * MLX5E_100MB;
107 priv->params_ethtool.max_bw_value[i] = max_bw_value[i] * MLX5E_1GB;
109 case MLX5_BW_NO_LIMIT:
110 priv->params_ethtool.max_bw_value[i] = 0;
113 priv->params_ethtool.max_bw_value[i] = -1;
114 WARN_ONCE(true, "non-supported BW unit");
124 mlx5e_get_max_alloc(struct mlx5e_priv *priv)
126 struct mlx5_core_dev *mdev = priv->mdev;
131 err = -mlx5_query_port_tc_bw_alloc(mdev, priv->params_ethtool.max_bw_share);
133 /* set default value */
134 for (x = 0; x != IEEE_8021QAZ_MAX_TCS; x++) {
135 priv->params_ethtool.max_bw_share[x] =
136 100 / IEEE_8021QAZ_MAX_TCS;
138 err = -mlx5_set_port_tc_bw_alloc(mdev,
139 priv->params_ethtool.max_bw_share);
147 mlx5e_get_dscp(struct mlx5e_priv *priv)
149 struct mlx5_core_dev *mdev = priv->mdev;
152 if (MLX5_CAP_GEN(mdev, qcam_reg) == 0 ||
153 MLX5_CAP_QCAM_REG(mdev, qpts) == 0 ||
154 MLX5_CAP_QCAM_REG(mdev, qpdpm) == 0)
158 err = -mlx5_query_dscp2prio(mdev, priv->params_ethtool.dscp2prio);
162 err = -mlx5_query_trust_state(mdev, &priv->params_ethtool.trust_state);
171 mlx5e_tc_get_parameters(struct mlx5e_priv *priv,
172 u64 *new_bw_value, u8 *max_bw_value, u8 *max_bw_unit)
174 const u64 upper_limit_mbps = 255 * MLX5E_100MB;
175 const u64 upper_limit_gbps = 255 * MLX5E_1GB;
179 memset(max_bw_value, 0, IEEE_8021QAZ_MAX_TCS);
180 memset(max_bw_unit, 0, IEEE_8021QAZ_MAX_TCS);
182 for (i = 0; i <= mlx5_max_tc(priv->mdev); i++) {
183 temp = (new_bw_value != NULL) ?
184 new_bw_value[i] : priv->params_ethtool.max_bw_value[i];
187 max_bw_unit[i] = MLX5_BW_NO_LIMIT;
188 } else if (temp > upper_limit_gbps) {
189 max_bw_unit[i] = MLX5_BW_NO_LIMIT;
190 } else if (temp <= upper_limit_mbps) {
191 max_bw_value[i] = howmany(temp, MLX5E_100MB);
192 max_bw_unit[i] = MLX5_100_MBPS_UNIT;
194 max_bw_value[i] = howmany(temp, MLX5E_1GB);
195 max_bw_unit[i] = MLX5_GBPS_UNIT;
201 mlx5e_tc_maxrate_handler(SYSCTL_HANDLER_ARGS)
203 struct mlx5e_priv *priv = arg1;
204 struct mlx5_core_dev *mdev = priv->mdev;
205 u8 max_bw_unit[IEEE_8021QAZ_MAX_TCS];
206 u8 max_bw_value[IEEE_8021QAZ_MAX_TCS];
207 u64 new_bw_value[IEEE_8021QAZ_MAX_TCS];
208 u8 max_rates = mlx5_max_tc(mdev) + 1;
213 err = SYSCTL_OUT(req, priv->params_ethtool.max_bw_value,
214 sizeof(priv->params_ethtool.max_bw_value[0]) * max_rates);
215 if (err || !req->newptr)
217 err = SYSCTL_IN(req, new_bw_value,
218 sizeof(new_bw_value[0]) * max_rates);
222 /* range check input value */
223 for (x = 0; x != max_rates; x++) {
224 if (new_bw_value[x] % MLX5E_100MB) {
230 mlx5e_tc_get_parameters(priv, new_bw_value, max_bw_value, max_bw_unit);
232 err = -mlx5_modify_port_tc_rate_limit(mdev, max_bw_value, max_bw_unit);
236 memcpy(priv->params_ethtool.max_bw_value, new_bw_value,
237 sizeof(priv->params_ethtool.max_bw_value));
244 mlx5e_tc_rate_share_handler(SYSCTL_HANDLER_ARGS)
246 struct mlx5e_priv *priv = arg1;
247 struct mlx5_core_dev *mdev = priv->mdev;
248 u8 max_bw_share[IEEE_8021QAZ_MAX_TCS];
249 u8 max_rates = mlx5_max_tc(mdev) + 1;
255 err = SYSCTL_OUT(req, priv->params_ethtool.max_bw_share, max_rates);
256 if (err || !req->newptr)
258 err = SYSCTL_IN(req, max_bw_share, max_rates);
262 /* range check input value */
263 for (sum = i = 0; i != max_rates; i++) {
264 if (max_bw_share[i] < 1 || max_bw_share[i] > 100) {
268 sum += max_bw_share[i];
271 /* sum of values should be as close to 100 as possible */
272 if (sum < (100 - max_rates + 1) || sum > 100) {
277 err = -mlx5_set_port_tc_bw_alloc(mdev, max_bw_share);
281 memcpy(priv->params_ethtool.max_bw_share, max_bw_share,
282 sizeof(priv->params_ethtool.max_bw_share));
289 mlx5e_get_prio_tc(struct mlx5e_priv *priv)
291 struct mlx5_core_dev *mdev = priv->mdev;
296 if (!MLX5_CAP_GEN(priv->mdev, ets)) {
301 for (i = 0; i <= mlx5_max_tc(priv->mdev); i++) {
302 err = -mlx5_query_port_prio_tc(mdev, i, &(priv->params_ethtool.prio_tc[i]));
311 mlx5e_prio_to_tc_handler(SYSCTL_HANDLER_ARGS)
313 struct mlx5e_priv *priv = arg1;
314 int prio_index = arg2;
315 struct mlx5_core_dev *mdev = priv->mdev;
320 result = priv->params_ethtool.prio_tc[prio_index];
321 err = sysctl_handle_8(oidp, &result, 0, req);
322 if (err || !req->newptr ||
323 result == priv->params_ethtool.prio_tc[prio_index])
326 if (result > mlx5_max_tc(mdev)) {
331 err = -mlx5_set_port_prio_tc(mdev, prio_index, result);
335 priv->params_ethtool.prio_tc[prio_index] = result;
343 mlx5e_trust_state_handler(SYSCTL_HANDLER_ARGS)
345 struct mlx5e_priv *priv = arg1;
346 struct mlx5_core_dev *mdev = priv->mdev;
351 result = priv->params_ethtool.trust_state;
352 err = sysctl_handle_8(oidp, &result, 0, req);
353 if (err || !req->newptr ||
354 result == priv->params_ethtool.trust_state)
358 case MLX5_QPTS_TRUST_PCP:
359 case MLX5_QPTS_TRUST_DSCP:
361 case MLX5_QPTS_TRUST_BOTH:
362 if (!MLX5_CAP_QCAM_FEATURE(mdev, qpts_trust_both)) {
372 err = -mlx5_set_trust_state(mdev, result);
376 priv->params_ethtool.trust_state = result;
378 /* update inline mode */
379 mlx5e_refresh_sq_inline(priv);
381 mlx5e_rl_refresh_sq_inline(&priv->rl);
389 mlx5e_dscp_prio_handler(SYSCTL_HANDLER_ARGS)
391 struct mlx5e_priv *priv = arg1;
392 int prio_index = arg2;
393 struct mlx5_core_dev *mdev = priv->mdev;
394 uint8_t dscp2prio[MLX5_MAX_SUPPORTED_DSCP];
399 err = SYSCTL_OUT(req, priv->params_ethtool.dscp2prio + prio_index,
400 sizeof(priv->params_ethtool.dscp2prio) / 8);
401 if (err || !req->newptr)
404 memcpy(dscp2prio, priv->params_ethtool.dscp2prio, sizeof(dscp2prio));
405 err = SYSCTL_IN(req, dscp2prio + prio_index, sizeof(dscp2prio) / 8);
408 for (x = 0; x != MLX5_MAX_SUPPORTED_DSCP; x++) {
409 if (dscp2prio[x] > 7) {
414 err = -mlx5_set_dscp2prio(mdev, dscp2prio);
418 /* update local array */
419 memcpy(priv->params_ethtool.dscp2prio, dscp2prio,
420 sizeof(priv->params_ethtool.dscp2prio));
426 #define MLX5_PARAM_OFFSET(n) \
427 __offsetof(struct mlx5e_priv, params_ethtool.n)
430 mlx5e_ethtool_handler(SYSCTL_HANDLER_ARGS)
432 struct mlx5e_priv *priv = arg1;
439 value = priv->params_ethtool.arg[arg2];
441 error = sysctl_handle_64(oidp, &value, 0, req);
442 if (error || req->newptr == NULL ||
443 value == priv->params_ethtool.arg[arg2])
446 /* assign new value */
447 priv->params_ethtool.arg[arg2] = value;
451 /* check if device is gone */
456 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
457 mode_modify = MLX5_CAP_GEN(priv->mdev, cq_period_mode_modify);
459 switch (MLX5_PARAM_OFFSET(arg[arg2])) {
460 case MLX5_PARAM_OFFSET(rx_coalesce_usecs):
461 /* import RX coal time */
462 if (priv->params_ethtool.rx_coalesce_usecs < 1)
463 priv->params_ethtool.rx_coalesce_usecs = 0;
464 else if (priv->params_ethtool.rx_coalesce_usecs >
465 MLX5E_FLD_MAX(cqc, cq_period)) {
466 priv->params_ethtool.rx_coalesce_usecs =
467 MLX5E_FLD_MAX(cqc, cq_period);
469 priv->params.rx_cq_moderation_usec =
470 priv->params_ethtool.rx_coalesce_usecs;
472 /* check to avoid down and up the network interface */
474 error = mlx5e_refresh_channel_params(priv);
477 case MLX5_PARAM_OFFSET(rx_coalesce_pkts):
478 /* import RX coal pkts */
479 if (priv->params_ethtool.rx_coalesce_pkts < 1)
480 priv->params_ethtool.rx_coalesce_pkts = 0;
481 else if (priv->params_ethtool.rx_coalesce_pkts >
482 MLX5E_FLD_MAX(cqc, cq_max_count)) {
483 priv->params_ethtool.rx_coalesce_pkts =
484 MLX5E_FLD_MAX(cqc, cq_max_count);
486 priv->params.rx_cq_moderation_pkts =
487 priv->params_ethtool.rx_coalesce_pkts;
489 /* check to avoid down and up the network interface */
491 error = mlx5e_refresh_channel_params(priv);
494 case MLX5_PARAM_OFFSET(tx_coalesce_usecs):
495 /* import TX coal time */
496 if (priv->params_ethtool.tx_coalesce_usecs < 1)
497 priv->params_ethtool.tx_coalesce_usecs = 0;
498 else if (priv->params_ethtool.tx_coalesce_usecs >
499 MLX5E_FLD_MAX(cqc, cq_period)) {
500 priv->params_ethtool.tx_coalesce_usecs =
501 MLX5E_FLD_MAX(cqc, cq_period);
503 priv->params.tx_cq_moderation_usec =
504 priv->params_ethtool.tx_coalesce_usecs;
506 /* check to avoid down and up the network interface */
508 error = mlx5e_refresh_channel_params(priv);
511 case MLX5_PARAM_OFFSET(tx_coalesce_pkts):
512 /* import TX coal pkts */
513 if (priv->params_ethtool.tx_coalesce_pkts < 1)
514 priv->params_ethtool.tx_coalesce_pkts = 0;
515 else if (priv->params_ethtool.tx_coalesce_pkts >
516 MLX5E_FLD_MAX(cqc, cq_max_count)) {
517 priv->params_ethtool.tx_coalesce_pkts =
518 MLX5E_FLD_MAX(cqc, cq_max_count);
520 priv->params.tx_cq_moderation_pkts =
521 priv->params_ethtool.tx_coalesce_pkts;
523 /* check to avoid down and up the network interface */
525 error = mlx5e_refresh_channel_params(priv);
528 case MLX5_PARAM_OFFSET(tx_queue_size):
529 /* network interface must be down */
531 mlx5e_close_locked(priv->ifp);
533 /* import TX queue size */
534 if (priv->params_ethtool.tx_queue_size <
535 (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
536 priv->params_ethtool.tx_queue_size =
537 (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
538 } else if (priv->params_ethtool.tx_queue_size >
539 priv->params_ethtool.tx_queue_size_max) {
540 priv->params_ethtool.tx_queue_size =
541 priv->params_ethtool.tx_queue_size_max;
543 /* store actual TX queue size */
544 priv->params.log_sq_size =
545 order_base_2(priv->params_ethtool.tx_queue_size);
546 priv->params_ethtool.tx_queue_size =
547 1 << priv->params.log_sq_size;
549 /* verify TX completion factor */
550 mlx5e_ethtool_sync_tx_completion_fact(priv);
552 /* restart network interface, if any */
554 mlx5e_open_locked(priv->ifp);
557 case MLX5_PARAM_OFFSET(rx_queue_size):
558 /* network interface must be down */
560 mlx5e_close_locked(priv->ifp);
562 /* import RX queue size */
563 if (priv->params_ethtool.rx_queue_size <
564 (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
565 priv->params_ethtool.rx_queue_size =
566 (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
567 } else if (priv->params_ethtool.rx_queue_size >
568 priv->params_ethtool.rx_queue_size_max) {
569 priv->params_ethtool.rx_queue_size =
570 priv->params_ethtool.rx_queue_size_max;
572 /* store actual RX queue size */
573 priv->params.log_rq_size =
574 order_base_2(priv->params_ethtool.rx_queue_size);
575 priv->params_ethtool.rx_queue_size =
576 1 << priv->params.log_rq_size;
578 /* update least number of RX WQEs */
579 priv->params.min_rx_wqes = min(
580 priv->params_ethtool.rx_queue_size - 1,
581 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES);
583 /* restart network interface, if any */
585 mlx5e_open_locked(priv->ifp);
588 case MLX5_PARAM_OFFSET(channels_rsss):
589 /* network interface must be down */
591 mlx5e_close_locked(priv->ifp);
593 /* import number of channels */
594 if (priv->params_ethtool.channels_rsss < 1)
595 priv->params_ethtool.channels_rsss = 1;
596 else if (priv->params_ethtool.channels_rsss > 128)
597 priv->params_ethtool.channels_rsss = 128;
599 priv->params.channels_rsss = priv->params_ethtool.channels_rsss;
601 /* restart network interface, if any */
603 mlx5e_open_locked(priv->ifp);
606 case MLX5_PARAM_OFFSET(channels):
607 /* network interface must be down */
609 mlx5e_close_locked(priv->ifp);
611 /* import number of channels */
612 if (priv->params_ethtool.channels < 1)
613 priv->params_ethtool.channels = 1;
614 else if (priv->params_ethtool.channels >
615 (u64) priv->mdev->priv.eq_table.num_comp_vectors) {
616 priv->params_ethtool.channels =
617 (u64) priv->mdev->priv.eq_table.num_comp_vectors;
619 priv->params.num_channels = priv->params_ethtool.channels;
621 /* restart network interface, if any */
623 mlx5e_open_locked(priv->ifp);
626 case MLX5_PARAM_OFFSET(rx_coalesce_mode):
627 /* network interface must be down */
628 if (was_opened != 0 && mode_modify == 0)
629 mlx5e_close_locked(priv->ifp);
631 /* import RX coalesce mode */
632 if (priv->params_ethtool.rx_coalesce_mode > 3)
633 priv->params_ethtool.rx_coalesce_mode = 3;
634 priv->params.rx_cq_moderation_mode =
635 priv->params_ethtool.rx_coalesce_mode;
637 /* restart network interface, if any */
638 if (was_opened != 0) {
639 if (mode_modify == 0)
640 mlx5e_open_locked(priv->ifp);
642 error = mlx5e_refresh_channel_params(priv);
646 case MLX5_PARAM_OFFSET(tx_coalesce_mode):
647 /* network interface must be down */
648 if (was_opened != 0 && mode_modify == 0)
649 mlx5e_close_locked(priv->ifp);
651 /* import TX coalesce mode */
652 if (priv->params_ethtool.tx_coalesce_mode != 0)
653 priv->params_ethtool.tx_coalesce_mode = 1;
654 priv->params.tx_cq_moderation_mode =
655 priv->params_ethtool.tx_coalesce_mode;
657 /* restart network interface, if any */
658 if (was_opened != 0) {
659 if (mode_modify == 0)
660 mlx5e_open_locked(priv->ifp);
662 error = mlx5e_refresh_channel_params(priv);
666 case MLX5_PARAM_OFFSET(hw_lro):
667 /* network interface must be down */
669 mlx5e_close_locked(priv->ifp);
671 /* import HW LRO mode */
672 if (priv->params_ethtool.hw_lro != 0 &&
673 MLX5_CAP_ETH(priv->mdev, lro_cap)) {
674 priv->params_ethtool.hw_lro = 1;
675 /* check if feature should actually be enabled */
676 if (priv->ifp->if_capenable & IFCAP_LRO) {
677 priv->params.hw_lro_en = true;
679 priv->params.hw_lro_en = false;
681 if_printf(priv->ifp, "To enable HW LRO "
682 "please also enable LRO via ifconfig(8).\n");
685 /* return an error if HW does not support this feature */
686 if (priv->params_ethtool.hw_lro != 0)
688 priv->params.hw_lro_en = false;
689 priv->params_ethtool.hw_lro = 0;
691 /* restart network interface, if any */
693 mlx5e_open_locked(priv->ifp);
696 case MLX5_PARAM_OFFSET(cqe_zipping):
697 /* network interface must be down */
699 mlx5e_close_locked(priv->ifp);
701 /* import CQE zipping mode */
702 if (priv->params_ethtool.cqe_zipping &&
703 MLX5_CAP_GEN(priv->mdev, cqe_compression)) {
704 priv->params.cqe_zipping_en = true;
705 priv->params_ethtool.cqe_zipping = 1;
707 priv->params.cqe_zipping_en = false;
708 priv->params_ethtool.cqe_zipping = 0;
710 /* restart network interface, if any */
712 mlx5e_open_locked(priv->ifp);
715 case MLX5_PARAM_OFFSET(tx_completion_fact):
716 /* network interface must be down */
718 mlx5e_close_locked(priv->ifp);
720 /* verify parameter */
721 mlx5e_ethtool_sync_tx_completion_fact(priv);
723 /* restart network interface, if any */
725 mlx5e_open_locked(priv->ifp);
728 case MLX5_PARAM_OFFSET(modify_tx_dma):
729 /* check if network interface is opened */
731 priv->params_ethtool.modify_tx_dma =
732 priv->params_ethtool.modify_tx_dma ? 1 : 0;
733 /* modify tx according to value */
734 mlx5e_modify_tx_dma(priv, value != 0);
736 /* if closed force enable tx */
737 priv->params_ethtool.modify_tx_dma = 0;
741 case MLX5_PARAM_OFFSET(modify_rx_dma):
742 /* check if network interface is opened */
744 priv->params_ethtool.modify_rx_dma =
745 priv->params_ethtool.modify_rx_dma ? 1 : 0;
746 /* modify rx according to value */
747 mlx5e_modify_rx_dma(priv, value != 0);
749 /* if closed force enable rx */
750 priv->params_ethtool.modify_rx_dma = 0;
754 case MLX5_PARAM_OFFSET(diag_pci_enable):
755 priv->params_ethtool.diag_pci_enable =
756 priv->params_ethtool.diag_pci_enable ? 1 : 0;
758 error = -mlx5_core_set_diagnostics_full(priv->mdev,
759 priv->params_ethtool.diag_pci_enable,
760 priv->params_ethtool.diag_general_enable);
763 case MLX5_PARAM_OFFSET(diag_general_enable):
764 priv->params_ethtool.diag_general_enable =
765 priv->params_ethtool.diag_general_enable ? 1 : 0;
767 error = -mlx5_core_set_diagnostics_full(priv->mdev,
768 priv->params_ethtool.diag_pci_enable,
769 priv->params_ethtool.diag_general_enable);
772 case MLX5_PARAM_OFFSET(mc_local_lb):
773 priv->params_ethtool.mc_local_lb =
774 priv->params_ethtool.mc_local_lb ? 1 : 0;
776 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb)) {
777 error = mlx5_nic_vport_modify_local_lb(priv->mdev,
778 MLX5_LOCAL_MC_LB, priv->params_ethtool.mc_local_lb);
784 case MLX5_PARAM_OFFSET(uc_local_lb):
785 priv->params_ethtool.uc_local_lb =
786 priv->params_ethtool.uc_local_lb ? 1 : 0;
788 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb)) {
789 error = mlx5_nic_vport_modify_local_lb(priv->mdev,
790 MLX5_LOCAL_UC_LB, priv->params_ethtool.uc_local_lb);
805 * Read the first three bytes of the eeprom in order to get the needed info
806 * for the whole reading.
807 * Byte 0 - Identifier byte
808 * Byte 1 - Revision byte
809 * Byte 2 - Status byte
812 mlx5e_get_eeprom_info(struct mlx5e_priv *priv, struct mlx5e_eeprom *eeprom)
814 struct mlx5_core_dev *dev = priv->mdev;
819 ret = mlx5_query_module_num(dev, &eeprom->module_num);
821 if_printf(priv->ifp, "%s:%d: Failed query module error=%d\n",
822 __func__, __LINE__, ret);
826 /* Read the first three bytes to get Identifier, Revision and Status */
827 ret = mlx5_query_eeprom(dev, eeprom->i2c_addr, eeprom->page_num,
828 eeprom->device_addr, MLX5E_EEPROM_INFO_BYTES, eeprom->module_num, &data,
831 if_printf(priv->ifp, "%s:%d: Failed query eeprom module error=0x%x\n",
832 __func__, __LINE__, ret);
836 switch (data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) {
837 case SFF_8024_ID_QSFP:
838 eeprom->type = MLX5E_ETH_MODULE_SFF_8436;
839 eeprom->len = MLX5E_ETH_MODULE_SFF_8436_LEN;
841 case SFF_8024_ID_QSFPPLUS:
842 case SFF_8024_ID_QSFP28:
843 if ((data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK) == SFF_8024_ID_QSFP28 ||
844 ((data & MLX5_EEPROM_REVISION_ID_BYTE_MASK) >> 8) >= 0x3) {
845 eeprom->type = MLX5E_ETH_MODULE_SFF_8636;
846 eeprom->len = MLX5E_ETH_MODULE_SFF_8636_LEN;
848 eeprom->type = MLX5E_ETH_MODULE_SFF_8436;
849 eeprom->len = MLX5E_ETH_MODULE_SFF_8436_LEN;
851 if ((data & MLX5_EEPROM_PAGE_3_VALID_BIT_MASK) == 0)
852 eeprom->page_valid = 1;
854 case SFF_8024_ID_SFP:
855 eeprom->type = MLX5E_ETH_MODULE_SFF_8472;
856 eeprom->len = MLX5E_ETH_MODULE_SFF_8472_LEN;
859 if_printf(priv->ifp, "%s:%d: Not recognized cable type = 0x%x(%s)\n",
860 __func__, __LINE__, data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK,
861 sff_8024_id[data & MLX5_EEPROM_IDENTIFIER_BYTE_MASK]);
867 /* Read both low and high pages of the eeprom */
869 mlx5e_get_eeprom(struct mlx5e_priv *priv, struct mlx5e_eeprom *ee)
871 struct mlx5_core_dev *dev = priv->mdev;
878 /* Read low page of the eeprom */
879 while (ee->device_addr < ee->len) {
880 ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num, ee->device_addr,
881 ee->len - ee->device_addr, ee->module_num,
882 ee->data + (ee->device_addr / 4), &size_read);
884 if_printf(priv->ifp, "%s:%d: Failed reading eeprom, "
885 "error = 0x%02x\n", __func__, __LINE__, ret);
888 ee->device_addr += size_read;
891 /* Read high page of the eeprom */
892 if (ee->page_valid) {
893 ee->device_addr = MLX5E_EEPROM_HIGH_PAGE_OFFSET;
894 ee->page_num = MLX5E_EEPROM_HIGH_PAGE;
896 while (ee->device_addr < MLX5E_EEPROM_PAGE_LENGTH) {
897 ret = mlx5_query_eeprom(dev, ee->i2c_addr, ee->page_num,
898 ee->device_addr, MLX5E_EEPROM_PAGE_LENGTH - ee->device_addr,
899 ee->module_num, ee->data + (ee->len / 4) +
900 ((ee->device_addr - MLX5E_EEPROM_HIGH_PAGE_OFFSET) / 4),
903 if_printf(priv->ifp, "%s:%d: Failed reading eeprom, "
904 "error = 0x%02x\n", __func__, __LINE__, ret);
907 ee->device_addr += size_read;
914 mlx5e_print_eeprom(struct mlx5e_eeprom *eeprom)
918 int byte_to_write = 0;
919 int line_length = 16;
921 printf("\nOffset\t\tValues\n");
922 printf("------\t\t------");
923 while (byte_to_write < eeprom->len) {
924 printf("\n0x%04X\t\t", byte_to_write);
925 for (index_in_row = 0; index_in_row < line_length; index_in_row++) {
926 printf("%02X ", ((u8 *)eeprom->data)[byte_to_write]);
931 if (eeprom->page_valid) {
932 row = MLX5E_EEPROM_HIGH_PAGE_OFFSET;
933 printf("\n\nUpper Page 0x03\n");
934 printf("\nOffset\t\tValues\n");
935 printf("------\t\t------");
936 while (row < MLX5E_EEPROM_PAGE_LENGTH) {
937 printf("\n0x%04X\t\t", row);
938 for (index_in_row = 0; index_in_row < line_length; index_in_row++) {
939 printf("%02X ", ((u8 *)eeprom->data)[byte_to_write]);
948 * Read cable EEPROM module information by first inspecting the first
949 * three bytes to get the initial information for a whole reading.
950 * Information will be printed to dmesg.
953 mlx5e_read_eeprom(SYSCTL_HANDLER_ARGS)
955 struct mlx5e_priv *priv = arg1;
956 struct mlx5e_eeprom eeprom;
961 error = sysctl_handle_int(oidp, &result, 0, req);
962 if (error || !req->newptr)
965 /* Check if device is gone */
972 eeprom.i2c_addr = MLX5E_I2C_ADDR_LOW;
973 eeprom.device_addr = 0;
974 eeprom.page_num = MLX5E_EEPROM_LOW_PAGE;
975 eeprom.page_valid = 0;
977 /* Read three first bytes to get important info */
978 error = mlx5e_get_eeprom_info(priv, &eeprom);
980 if_printf(priv->ifp, "%s:%d: Failed reading eeprom's "
981 "initial information\n", __func__, __LINE__);
986 * Allocate needed length buffer and additional space for
989 eeprom.data = malloc(eeprom.len + MLX5E_EEPROM_PAGE_LENGTH,
990 M_MLX5EN, M_WAITOK | M_ZERO);
992 /* Read the whole eeprom information */
993 error = mlx5e_get_eeprom(priv, &eeprom);
995 if_printf(priv->ifp, "%s:%d: Failed reading eeprom\n",
999 * Continue printing partial information in case of
1003 mlx5e_print_eeprom(&eeprom);
1004 free(eeprom.data, M_MLX5EN);
1011 static const char *mlx5e_params_desc[] = {
1012 MLX5E_PARAMS(MLX5E_STATS_DESC)
1015 static const char *mlx5e_port_stats_debug_desc[] = {
1016 MLX5E_PORT_STATS_DEBUG(MLX5E_STATS_DESC)
1020 mlx5e_ethtool_debug_channel_info(SYSCTL_HANDLER_ARGS)
1022 struct mlx5e_priv *priv;
1024 struct mlx5e_channel *c;
1025 struct mlx5e_sq *sq;
1026 struct mlx5e_rq *rq;
1030 error = sysctl_wire_old_buffer(req, 0);
1033 if (sbuf_new_for_sysctl(&sb, NULL, 128, req) == NULL)
1035 sbuf_clear_flags(&sb, SBUF_INCLUDENUL);
1038 if (test_bit(MLX5E_STATE_OPENED, &priv->state) == 0)
1040 for (i = 0; i < priv->params.num_channels; i++) {
1041 c = &priv->channel[i];
1043 sbuf_printf(&sb, "channel %d rq %d cq %d\n",
1044 c->ix, rq->rqn, rq->cq.mcq.cqn);
1045 for (tc = 0; tc < c->num_tc; tc++) {
1047 sbuf_printf(&sb, "channel %d tc %d sq %d cq %d\n",
1048 c->ix, tc, sq->sqn, sq->cq.mcq.cqn);
1053 error = sbuf_finish(&sb);
1059 mlx5e_ethtool_debug_stats(SYSCTL_HANDLER_ARGS)
1061 struct mlx5e_priv *priv = arg1;
1066 if (priv->gone != 0) {
1070 sys_debug = priv->sysctl_debug;
1071 error = sysctl_handle_int(oidp, &sys_debug, 0, req);
1072 if (error != 0 || !req->newptr)
1074 sys_debug = sys_debug ? 1 : 0;
1075 if (sys_debug == priv->sysctl_debug)
1078 if ((priv->sysctl_debug = sys_debug)) {
1079 mlx5e_create_stats(&priv->stats.port_stats_debug.ctx,
1080 SYSCTL_CHILDREN(priv->sysctl_ifnet), "debug_stats",
1081 mlx5e_port_stats_debug_desc, MLX5E_PORT_STATS_DEBUG_NUM,
1082 priv->stats.port_stats_debug.arg);
1083 SYSCTL_ADD_PROC(&priv->stats.port_stats_debug.ctx,
1084 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1086 CTLFLAG_RD | CTLFLAG_MPSAFE | CTLTYPE_STRING, priv, 0,
1087 mlx5e_ethtool_debug_channel_info, "S", "");
1089 sysctl_ctx_free(&priv->stats.port_stats_debug.ctx);
1097 mlx5e_create_diagnostics(struct mlx5e_priv *priv)
1099 struct mlx5_core_diagnostics_entry entry;
1100 struct sysctl_ctx_list *ctx;
1101 struct sysctl_oid *node;
1104 /* sysctl context we are using */
1105 ctx = &priv->sysctl_ctx;
1107 /* create root node */
1108 node = SYSCTL_ADD_NODE(ctx,
1109 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1110 "diagnostics", CTLFLAG_RD, NULL, "Diagnostics");
1114 /* create PCI diagnostics */
1115 for (x = 0; x != MLX5_CORE_PCI_DIAGNOSTICS_NUM; x++) {
1116 entry = mlx5_core_pci_diagnostics_table[x];
1117 if (mlx5_core_supports_diagnostics(priv->mdev, entry.counter_id) == 0)
1119 SYSCTL_ADD_UQUAD(ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1120 entry.desc, CTLFLAG_RD, priv->params_pci.array + x,
1121 "PCI diagnostics counter");
1124 /* create general diagnostics */
1125 for (x = 0; x != MLX5_CORE_GENERAL_DIAGNOSTICS_NUM; x++) {
1126 entry = mlx5_core_general_diagnostics_table[x];
1127 if (mlx5_core_supports_diagnostics(priv->mdev, entry.counter_id) == 0)
1129 SYSCTL_ADD_UQUAD(ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1130 entry.desc, CTLFLAG_RD, priv->params_general.array + x,
1131 "General diagnostics counter");
1136 mlx5e_create_ethtool(struct mlx5e_priv *priv)
1138 struct mlx5_core_dev *mdev = priv->mdev;
1139 struct sysctl_oid *node, *qos_node;
1140 const char *pnameunit;
1144 /* set some defaults */
1145 priv->params_ethtool.tx_queue_size_max = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
1146 priv->params_ethtool.rx_queue_size_max = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
1147 priv->params_ethtool.tx_queue_size = 1 << priv->params.log_sq_size;
1148 priv->params_ethtool.rx_queue_size = 1 << priv->params.log_rq_size;
1149 priv->params_ethtool.channels = priv->params.num_channels;
1150 priv->params_ethtool.channels_rsss = priv->params.channels_rsss;
1151 priv->params_ethtool.coalesce_pkts_max = MLX5E_FLD_MAX(cqc, cq_max_count);
1152 priv->params_ethtool.coalesce_usecs_max = MLX5E_FLD_MAX(cqc, cq_period);
1153 priv->params_ethtool.rx_coalesce_mode = priv->params.rx_cq_moderation_mode;
1154 priv->params_ethtool.rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
1155 priv->params_ethtool.rx_coalesce_pkts = priv->params.rx_cq_moderation_pkts;
1156 priv->params_ethtool.tx_coalesce_mode = priv->params.tx_cq_moderation_mode;
1157 priv->params_ethtool.tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
1158 priv->params_ethtool.tx_coalesce_pkts = priv->params.tx_cq_moderation_pkts;
1159 priv->params_ethtool.hw_lro = priv->params.hw_lro_en;
1160 priv->params_ethtool.cqe_zipping = priv->params.cqe_zipping_en;
1161 mlx5e_ethtool_sync_tx_completion_fact(priv);
1163 /* get default values for local loopback, if any */
1164 if (MLX5_CAP_GEN(priv->mdev, disable_local_lb)) {
1168 err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_MC_LB, &val);
1170 priv->params_ethtool.mc_local_lb = val;
1172 err = mlx5_nic_vport_query_local_lb(priv->mdev, MLX5_LOCAL_UC_LB, &val);
1174 priv->params_ethtool.uc_local_lb = val;
1177 /* create root node */
1178 node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1179 SYSCTL_CHILDREN(priv->sysctl_ifnet), OID_AUTO,
1180 "conf", CTLFLAG_RW, NULL, "Configuration");
1183 for (x = 0; x != MLX5E_PARAMS_NUM; x++) {
1184 /* check for read-only parameter */
1185 if (strstr(mlx5e_params_desc[2 * x], "_max") != NULL ||
1186 strstr(mlx5e_params_desc[2 * x], "_mtu") != NULL) {
1187 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1188 mlx5e_params_desc[2 * x], CTLTYPE_U64 | CTLFLAG_RD |
1189 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1190 mlx5e_params_desc[2 * x + 1]);
1192 #if (__FreeBSD_version < 1100000)
1196 * NOTE: In FreeBSD-11 and newer the
1197 * CTLFLAG_RWTUN flag will take care of
1198 * loading default sysctl value from the
1199 * kernel environment, if any:
1201 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1202 mlx5e_params_desc[2 * x], CTLTYPE_U64 | CTLFLAG_RWTUN |
1203 CTLFLAG_MPSAFE, priv, x, &mlx5e_ethtool_handler, "QU",
1204 mlx5e_params_desc[2 * x + 1]);
1206 #if (__FreeBSD_version < 1100000)
1207 /* compute path for sysctl */
1208 snprintf(path, sizeof(path), "dev.mce.%d.conf.%s",
1209 device_get_unit(priv->mdev->pdev->dev.bsddev),
1210 mlx5e_params_desc[2 * x]);
1212 /* try to fetch tunable, if any */
1213 if (TUNABLE_QUAD_FETCH(path, &priv->params_ethtool.arg[x]))
1214 mlx5e_ethtool_handler(NULL, priv, x, NULL);
1219 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO,
1220 "debug_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv,
1221 0, &mlx5e_ethtool_debug_stats, "I", "Extended debug statistics");
1223 pnameunit = device_get_nameunit(priv->mdev->pdev->dev.bsddev);
1225 SYSCTL_ADD_STRING(&priv->sysctl_ctx, SYSCTL_CHILDREN(node),
1226 OID_AUTO, "device_name", CTLFLAG_RD,
1227 __DECONST(void *, pnameunit), 0,
1230 /* EEPROM support */
1231 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(node), OID_AUTO, "eeprom_info",
1232 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
1233 mlx5e_read_eeprom, "I", "EEPROM information");
1235 /* Diagnostics support */
1236 mlx5e_create_diagnostics(priv);
1238 /* create qos node */
1239 qos_node = SYSCTL_ADD_NODE(&priv->sysctl_ctx,
1240 SYSCTL_CHILDREN(node), OID_AUTO,
1241 "qos", CTLFLAG_RW, NULL, "Quality Of Service configuration");
1242 if (qos_node == NULL)
1245 /* Priority rate limit support */
1246 if (mlx5e_getmaxrate(priv) == 0) {
1247 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1248 OID_AUTO, "tc_max_rate", CTLTYPE_U64 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1249 priv, 0, mlx5e_tc_maxrate_handler, "QU",
1250 "Max rate for priority, specified in kilobits, where kilo=1000, "
1251 "max_rate must be divisible by 100000");
1254 /* Bandwidth limiting by ratio */
1255 if (mlx5e_get_max_alloc(priv) == 0) {
1256 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1257 OID_AUTO, "tc_rate_share", CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1258 priv, 0, mlx5e_tc_rate_share_handler, "QU",
1259 "Specify bandwidth ratio from 1 to 100 "
1260 "for the available traffic classes");
1263 /* Priority to traffic class mapping */
1264 if (mlx5e_get_prio_tc(priv) == 0) {
1265 for (i = 0; i <= mlx5_max_tc(mdev); i++) {
1267 snprintf(name, sizeof(name), "prio_%d_to_tc", i);
1268 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1269 OID_AUTO, name, CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1270 priv, i, mlx5e_prio_to_tc_handler, "CU",
1271 "Set priority to traffic class");
1276 if (mlx5e_get_dscp(priv) == 0) {
1277 for (i = 0; i != MLX5_MAX_SUPPORTED_DSCP; i += 8) {
1279 snprintf(name, sizeof(name), "dscp_%d_%d_prio", i, i + 7);
1280 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1281 OID_AUTO, name, CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1282 priv, i, mlx5e_dscp_prio_handler, "CU",
1283 "Set DSCP to priority mapping, 0..7");
1285 #define A "Set trust state, 1:PCP 2:DSCP"
1287 SYSCTL_ADD_PROC(&priv->sysctl_ctx, SYSCTL_CHILDREN(qos_node),
1288 OID_AUTO, "trust_state", CTLTYPE_U8 | CTLFLAG_RWTUN | CTLFLAG_MPSAFE,
1289 priv, 0, mlx5e_trust_state_handler, "CU",
1290 MLX5_CAP_QCAM_FEATURE(mdev, qpts_trust_both) ?