2 * Copyright (c) 2006 Bernd Walter. All rights reserved.
3 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * Portions of this software may have been developed with reference to
27 * the SD Simplified Specification. The following disclaimer may apply:
29 * The following conditions apply to the release of the simplified
30 * specification ("Simplified Specification") by the SD Card Association and
31 * the SD Group. The Simplified Specification is a subset of the complete SD
32 * Specification which is owned by the SD Card Association and the SD
33 * Group. This Simplified Specification is provided on a non-confidential
34 * basis subject to the disclaimers below. Any implementation of the
35 * Simplified Specification may require a license from the SD Card
36 * Association, SD Group, SD-3C LLC or other third parties.
40 * The information contained in the Simplified Specification is presented only
41 * as a standard specification for SD Cards and SD Host/Ancillary products and
42 * is provided "AS-IS" without any representations or warranties of any
43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
44 * Card Association for any damages, any infringements of patents or other
45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
46 * parties, which may result from its use. No license is granted by
47 * implication, estoppel or otherwise under any patent or other rights of the
48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
50 * or the SD Card Association to disclose or distribute any technical
51 * information, know-how or other confidential information to any third party.
54 #include <sys/cdefs.h>
55 __FBSDID("$FreeBSD$");
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/malloc.h>
62 #include <sys/module.h>
63 #include <sys/mutex.h>
65 #include <sys/endian.h>
66 #include <sys/sysctl.h>
69 #include <dev/mmc/bridge.h>
70 #include <dev/mmc/mmc_private.h>
71 #include <dev/mmc/mmc_subr.h>
72 #include <dev/mmc/mmcreg.h>
73 #include <dev/mmc/mmcbrvar.h>
74 #include <dev/mmc/mmcvar.h>
77 #include "mmcbus_if.h"
79 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
85 uint32_t raw_cid[4]; /* Raw bits of the CID */
86 uint32_t raw_csd[4]; /* Raw bits of the CSD */
87 uint32_t raw_scr[2]; /* Raw bits of the SCR */
88 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
89 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
91 enum mmc_card_mode mode;
92 struct mmc_cid cid; /* cid decoded */
93 struct mmc_csd csd; /* csd decoded */
94 struct mmc_scr scr; /* scr decoded */
95 struct mmc_sd_status sd_status; /* SD_STATUS decoded */
96 u_char read_only; /* True when the device is read-only */
97 u_char bus_width; /* Bus width to use */
98 u_char high_cap; /* High Capacity card (block addressed) */
99 uint32_t sec_count; /* Card capacity in 512byte blocks */
100 uint32_t timings; /* Mask of bus timings supported */
101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
103 uint32_t tran_speed; /* Max speed in normal mode */
104 uint32_t hs_tran_speed; /* Max speed in high speed mode */
105 uint32_t erase_sector; /* Card native erase sector size */
106 uint32_t cmd6_time; /* Generic switch timeout [us] */
107 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
108 char card_sn_string[16];/* Formatted serial # for disk->d_ident */
111 #define CMD_RETRIES 3
113 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver");
115 static int mmc_debug;
116 TUNABLE_INT("hw.mmc.debug", &mmc_debug);
117 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
120 /* bus entry points */
121 static int mmc_acquire_bus(device_t busdev, device_t dev);
122 static int mmc_attach(device_t dev);
123 static int mmc_child_location_str(device_t dev, device_t child, char *buf,
125 static int mmc_detach(device_t dev);
126 static int mmc_probe(device_t dev);
127 static int mmc_read_ivar(device_t bus, device_t child, int which,
129 static int mmc_release_bus(device_t busdev, device_t dev);
130 static int mmc_resume(device_t dev);
131 static int mmc_suspend(device_t dev);
132 static int mmc_wait_for_request(device_t brdev, device_t reqdev,
133 struct mmc_request *req);
134 static int mmc_write_ivar(device_t bus, device_t child, int which,
137 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
138 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
139 #define MMC_LOCK_INIT(_sc) \
140 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
142 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
143 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
144 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
146 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
147 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
148 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
149 struct mmc_sd_status *sd_status);
150 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
151 uint32_t *rawsdstatus);
152 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
154 static int mmc_calculate_clock(struct mmc_softc *sc);
155 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid,
157 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid);
158 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd);
159 static void mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd);
160 static void mmc_delayed_attach(void *xsc);
161 static int mmc_delete_cards(struct mmc_softc *sc);
162 static void mmc_discover_cards(struct mmc_softc *sc);
163 static void mmc_format_card_id_string(struct mmc_ivars *ivar);
164 static void mmc_go_discovery(struct mmc_softc *sc);
165 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
167 static int mmc_highest_voltage(uint32_t ocr);
168 static void mmc_idle_cards(struct mmc_softc *sc);
169 static void mmc_ms_delay(int ms);
170 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
171 static void mmc_power_down(struct mmc_softc *sc);
172 static void mmc_power_up(struct mmc_softc *sc);
173 static void mmc_rescan_cards(struct mmc_softc *sc);
174 static void mmc_scan(struct mmc_softc *sc);
175 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
176 uint8_t value, uint8_t *res);
177 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
178 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
179 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
181 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd);
182 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
183 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
185 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp);
186 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
187 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar);
188 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar);
189 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
190 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
191 enum mmc_bus_timing timing);
192 static int mmc_test_bus_width(struct mmc_softc *sc);
193 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
194 enum mmc_bus_timing timing);
195 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
196 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
197 uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
198 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req);
199 static void mmc_wakeup(struct mmc_request *req);
205 DELAY(1000 * ms); /* XXX BAD */
209 mmc_probe(device_t dev)
212 device_set_desc(dev, "MMC/SD bus");
217 mmc_attach(device_t dev)
219 struct mmc_softc *sc;
221 sc = device_get_softc(dev);
225 /* We'll probe and attach our children later, but before / mount */
226 sc->config_intrhook.ich_func = mmc_delayed_attach;
227 sc->config_intrhook.ich_arg = sc;
228 if (config_intrhook_establish(&sc->config_intrhook) != 0)
229 device_printf(dev, "config_intrhook_establish failed\n");
234 mmc_detach(device_t dev)
236 struct mmc_softc *sc = device_get_softc(dev);
239 if ((err = mmc_delete_cards(sc)) != 0)
242 MMC_LOCK_DESTROY(sc);
248 mmc_suspend(device_t dev)
250 struct mmc_softc *sc = device_get_softc(dev);
253 err = bus_generic_suspend(dev);
261 mmc_resume(device_t dev)
263 struct mmc_softc *sc = device_get_softc(dev);
266 return (bus_generic_resume(dev));
270 mmc_acquire_bus(device_t busdev, device_t dev)
272 struct mmc_softc *sc;
273 struct mmc_ivars *ivar;
275 enum mmc_bus_timing timing;
277 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
280 sc = device_get_softc(busdev);
283 panic("mmc: host bridge didn't serialize us.");
289 * Keep track of the last rca that we've selected. If
290 * we're asked to do it again, don't. We never
291 * unselect unless the bus code itself wants the mmc
292 * bus, and constantly reselecting causes problems.
294 ivar = device_get_ivars(dev);
296 if (sc->last_rca != rca) {
297 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
298 device_printf(sc->dev, "Card at relative "
299 "address %d failed to select.\n", rca);
303 timing = mmcbr_get_timing(busdev);
304 /* Prepare bus width for the new card. */
305 if (bootverbose || mmc_debug) {
306 device_printf(busdev,
307 "setting bus width to %d bits %s timing\n",
308 (ivar->bus_width == bus_width_4) ? 4 :
309 (ivar->bus_width == bus_width_8) ? 8 : 1,
310 mmc_timing_to_string(timing));
312 if (mmc_set_card_bus_width(sc, ivar) != MMC_ERR_NONE) {
313 device_printf(sc->dev, "Card at relative "
314 "address %d failed to set bus width.\n",
318 if (isset(&ivar->vccq_120, timing))
319 mmcbr_set_vccq(busdev, vccq_120);
320 else if (isset(&ivar->vccq_180, timing))
321 mmcbr_set_vccq(busdev, vccq_180);
323 mmcbr_set_vccq(busdev, vccq_330);
324 if (mmcbr_switch_vccq(busdev) != 0) {
325 device_printf(sc->dev, "Failed to set VCCQ "
326 "for card at relative address %d.\n", rca);
329 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
330 device_printf(sc->dev, "Card at relative "
331 "address %d failed to set power class.\n",
335 mmcbr_set_bus_width(busdev, ivar->bus_width);
336 mmcbr_update_ios(busdev);
340 * If there's a card selected, stand down.
342 if (sc->last_rca != 0) {
343 mmc_select_card(sc, 0);
352 mmc_release_bus(device_t busdev, device_t dev)
354 struct mmc_softc *sc;
357 sc = device_get_softc(busdev);
361 panic("mmc: releasing unowned bus.");
362 if (sc->owner != dev)
363 panic("mmc: you don't own the bus. game over.");
365 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
375 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
378 return (ocr & MMC_OCR_VOLTAGE);
382 mmc_highest_voltage(uint32_t ocr)
386 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
387 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
394 mmc_wakeup(struct mmc_request *req)
396 struct mmc_softc *sc;
398 sc = (struct mmc_softc *)req->done_data;
400 req->flags |= MMC_REQ_DONE;
406 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
409 req->done = mmc_wakeup;
412 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
413 req->cmd->opcode, req->cmd->arg, req->cmd->flags);
414 if (req->cmd->data) {
415 printf(" data %d\n", (int)req->cmd->data->len);
419 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
421 while ((req->flags & MMC_REQ_DONE) == 0)
422 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
424 if (mmc_debug > 2 || (mmc_debug > 0 && req->cmd->error != MMC_ERR_NONE))
425 device_printf(sc->dev, "CMD%d RESULT: %d\n",
426 req->cmd->opcode, req->cmd->error);
431 mmc_wait_for_request(device_t brdev, device_t reqdev __unused,
432 struct mmc_request *req)
434 struct mmc_softc *sc = device_get_softc(brdev);
436 return (mmc_wait_for_req(sc, req));
440 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
441 uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
443 struct mmc_command cmd;
446 memset(&cmd, 0, sizeof(cmd));
451 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
455 if (flags & MMC_RSP_136)
456 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
464 mmc_idle_cards(struct mmc_softc *sc)
467 struct mmc_command cmd;
470 mmcbr_set_chip_select(dev, cs_high);
471 mmcbr_update_ios(dev);
474 memset(&cmd, 0, sizeof(cmd));
475 cmd.opcode = MMC_GO_IDLE_STATE;
477 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
479 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
482 mmcbr_set_chip_select(dev, cs_dontcare);
483 mmcbr_update_ios(dev);
488 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
490 struct mmc_command cmd;
491 int err = MMC_ERR_NONE, i;
493 memset(&cmd, 0, sizeof(cmd));
494 cmd.opcode = ACMD_SD_SEND_OP_COND;
496 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
499 for (i = 0; i < 1000; i++) {
500 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
502 if (err != MMC_ERR_NONE)
504 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
505 (ocr & MMC_OCR_VOLTAGE) == 0)
507 err = MMC_ERR_TIMEOUT;
510 if (rocr && err == MMC_ERR_NONE)
516 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
518 struct mmc_command cmd;
519 int err = MMC_ERR_NONE, i;
521 memset(&cmd, 0, sizeof(cmd));
522 cmd.opcode = MMC_SEND_OP_COND;
524 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
527 for (i = 0; i < 1000; i++) {
528 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
529 if (err != MMC_ERR_NONE)
531 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
532 (ocr & MMC_OCR_VOLTAGE) == 0)
534 err = MMC_ERR_TIMEOUT;
537 if (rocr && err == MMC_ERR_NONE)
543 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
545 struct mmc_command cmd;
548 memset(&cmd, 0, sizeof(cmd));
549 cmd.opcode = SD_SEND_IF_COND;
550 cmd.arg = (vhs << 8) + 0xAA;
551 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
554 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
559 mmc_power_up(struct mmc_softc *sc)
565 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
566 mmcbr_set_bus_mode(dev, opendrain);
567 mmcbr_set_chip_select(dev, cs_dontcare);
568 mmcbr_set_bus_width(dev, bus_width_1);
569 mmcbr_set_power_mode(dev, power_up);
570 mmcbr_set_clock(dev, 0);
571 mmcbr_update_ios(dev);
572 for (vccq = vccq_330; ; vccq--) {
573 mmcbr_set_vccq(dev, vccq);
574 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120)
579 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
580 mmcbr_set_timing(dev, bus_timing_normal);
581 mmcbr_set_power_mode(dev, power_on);
582 mmcbr_update_ios(dev);
587 mmc_power_down(struct mmc_softc *sc)
589 device_t dev = sc->dev;
591 mmcbr_set_bus_mode(dev, opendrain);
592 mmcbr_set_chip_select(dev, cs_dontcare);
593 mmcbr_set_bus_width(dev, bus_width_1);
594 mmcbr_set_power_mode(dev, power_off);
595 mmcbr_set_clock(dev, 0);
596 mmcbr_set_timing(dev, bus_timing_normal);
597 mmcbr_update_ios(dev);
601 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
605 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
606 return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
607 flags, NULL, CMD_RETRIES));
611 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
615 struct mmc_command cmd;
616 struct mmc_data data;
618 memset(&cmd, 0, sizeof(cmd));
619 memset(&data, 0, sizeof(data));
622 cmd.opcode = SD_SWITCH_FUNC;
623 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
624 cmd.arg = mode << 31; /* 0 - check, 1 - set */
625 cmd.arg |= 0x00FFFFFF;
626 cmd.arg &= ~(0xF << (grp * 4));
627 cmd.arg |= value << (grp * 4);
632 data.flags = MMC_DATA_READ;
634 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
639 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar)
641 struct mmc_command cmd;
645 if (mmcbr_get_mode(sc->dev) == mode_sd) {
646 memset(&cmd, 0, sizeof(cmd));
647 cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
648 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
649 cmd.arg = SD_CLR_CARD_DETECT;
650 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
654 memset(&cmd, 0, sizeof(cmd));
655 cmd.opcode = ACMD_SET_BUS_WIDTH;
656 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
657 switch (ivar->bus_width) {
659 cmd.arg = SD_BUS_WIDTH_1;
662 cmd.arg = SD_BUS_WIDTH_4;
665 return (MMC_ERR_INVALID);
667 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
670 switch (ivar->bus_width) {
672 value = EXT_CSD_BUS_WIDTH_1;
675 switch (mmcbr_get_timing(sc->dev)) {
676 case bus_timing_mmc_ddr52:
677 case bus_timing_mmc_hs200:
678 case bus_timing_mmc_hs400:
679 case bus_timing_mmc_hs400es:
680 value = EXT_CSD_BUS_WIDTH_4_DDR;
683 value = EXT_CSD_BUS_WIDTH_4;
688 switch (mmcbr_get_timing(sc->dev)) {
689 case bus_timing_mmc_ddr52:
690 case bus_timing_mmc_hs200:
691 case bus_timing_mmc_hs400:
692 case bus_timing_mmc_hs400es:
693 value = EXT_CSD_BUS_WIDTH_8_DDR;
696 value = EXT_CSD_BUS_WIDTH_8;
701 return (MMC_ERR_INVALID);
703 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
704 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
705 ivar->cmd6_time, true);
711 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar)
714 const uint8_t *ext_csd;
719 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4)
720 return (MMC_ERR_NONE);
723 ext_csd = ivar->raw_ext_csd;
724 clock = mmcbr_get_clock(dev);
725 switch (1 << mmcbr_get_vdd(dev)) {
726 case MMC_OCR_LOW_VOLTAGE:
727 if (clock <= MMC_TYPE_HS_26_MAX)
728 value = ext_csd[EXT_CSD_PWR_CL_26_195];
729 else if (clock <= MMC_TYPE_HS_52_MAX) {
730 if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 &&
731 ivar->bus_width >= bus_width_4)
732 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
734 value = ext_csd[EXT_CSD_PWR_CL_52_195];
735 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
736 value = ext_csd[EXT_CSD_PWR_CL_200_195];
738 case MMC_OCR_270_280:
739 case MMC_OCR_280_290:
740 case MMC_OCR_290_300:
741 case MMC_OCR_300_310:
742 case MMC_OCR_310_320:
743 case MMC_OCR_320_330:
744 case MMC_OCR_330_340:
745 case MMC_OCR_340_350:
746 case MMC_OCR_350_360:
747 if (clock <= MMC_TYPE_HS_26_MAX)
748 value = ext_csd[EXT_CSD_PWR_CL_26_360];
749 else if (clock <= MMC_TYPE_HS_52_MAX) {
750 if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 &&
751 ivar->bus_width >= bus_width_4)
752 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
754 value = ext_csd[EXT_CSD_PWR_CL_52_360];
755 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
756 if (ivar->bus_width == bus_width_8)
757 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
759 value = ext_csd[EXT_CSD_PWR_CL_200_360];
763 device_printf(dev, "No power class support for VDD 0x%x\n",
764 1 << mmcbr_get_vdd(dev));
765 return (MMC_ERR_INVALID);
768 if (ivar->bus_width == bus_width_8)
769 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
770 EXT_CSD_POWER_CLASS_8BIT_SHIFT;
772 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
773 EXT_CSD_POWER_CLASS_4BIT_SHIFT;
776 return (MMC_ERR_NONE);
778 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
779 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
783 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
784 enum mmc_bus_timing timing)
786 u_char switch_res[64];
790 if (mmcbr_get_mode(sc->dev) == mode_sd) {
792 case bus_timing_normal:
793 value = SD_SWITCH_NORMAL_MODE;
796 value = SD_SWITCH_HS_MODE;
799 return (MMC_ERR_INVALID);
801 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
803 if (err != MMC_ERR_NONE)
805 if ((switch_res[16] & 0xf) != value)
806 return (MMC_ERR_FAILED);
807 mmcbr_set_timing(sc->dev, timing);
808 mmcbr_update_ios(sc->dev);
811 case bus_timing_normal:
812 value = EXT_CSD_HS_TIMING_BC;
815 case bus_timing_mmc_ddr52:
816 value = EXT_CSD_HS_TIMING_HS;
819 return (MMC_ERR_INVALID);
821 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
822 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
823 ivar->cmd6_time, false);
824 if (err != MMC_ERR_NONE)
826 mmcbr_set_timing(sc->dev, timing);
827 mmcbr_update_ios(sc->dev);
828 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
834 static const uint8_t p8[8] = {
835 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
838 static const uint8_t p8ok[8] = {
839 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
842 static const uint8_t p4[4] = {
843 0x5A, 0x00, 0x00, 0x00
846 static const uint8_t p4ok[4] = {
847 0xA5, 0x00, 0x00, 0x00
851 mmc_test_bus_width(struct mmc_softc *sc)
853 struct mmc_command cmd;
854 struct mmc_data data;
858 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
859 mmcbr_set_bus_width(sc->dev, bus_width_8);
860 mmcbr_update_ios(sc->dev);
862 sc->squelched++; /* Errors are expected, squelch reporting. */
863 memset(&cmd, 0, sizeof(cmd));
864 memset(&data, 0, sizeof(data));
865 cmd.opcode = MMC_BUSTEST_W;
867 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
870 data.data = __DECONST(void *, p8);
872 data.flags = MMC_DATA_WRITE;
873 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
875 memset(&cmd, 0, sizeof(cmd));
876 memset(&data, 0, sizeof(data));
877 cmd.opcode = MMC_BUSTEST_R;
879 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
884 data.flags = MMC_DATA_READ;
885 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
888 mmcbr_set_bus_width(sc->dev, bus_width_1);
889 mmcbr_update_ios(sc->dev);
891 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
892 return (bus_width_8);
895 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
896 mmcbr_set_bus_width(sc->dev, bus_width_4);
897 mmcbr_update_ios(sc->dev);
899 sc->squelched++; /* Errors are expected, squelch reporting. */
900 memset(&cmd, 0, sizeof(cmd));
901 memset(&data, 0, sizeof(data));
902 cmd.opcode = MMC_BUSTEST_W;
904 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
907 data.data = __DECONST(void *, p4);
909 data.flags = MMC_DATA_WRITE;
910 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
912 memset(&cmd, 0, sizeof(cmd));
913 memset(&data, 0, sizeof(data));
914 cmd.opcode = MMC_BUSTEST_R;
916 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
921 data.flags = MMC_DATA_READ;
922 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
925 mmcbr_set_bus_width(sc->dev, bus_width_1);
926 mmcbr_update_ios(sc->dev);
928 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
929 return (bus_width_4);
931 return (bus_width_1);
935 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
937 const int i = (bit_len / 32) - (start / 32) - 1;
938 const int shift = start & 31;
939 uint32_t retval = bits[i] >> shift;
941 if (size + shift > 32)
942 retval |= bits[i - 1] << (32 - shift);
943 return (retval & ((1llu << size) - 1));
947 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
951 /* There's no version info, so we take it on faith */
952 memset(cid, 0, sizeof(*cid));
953 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
954 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
955 for (i = 0; i < 5; i++)
956 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
958 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
959 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
960 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
961 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
965 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p)
969 /* There's no version info, so we take it on faith */
970 memset(cid, 0, sizeof(*cid));
971 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
972 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
973 for (i = 0; i < 6; i++)
974 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
976 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
977 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
978 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
979 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
981 cid->mdt_year += 2013;
983 cid->mdt_year += 1997;
987 mmc_format_card_id_string(struct mmc_ivars *ivar)
994 * Format a card ID string for use by the mmcsd driver, it's what
995 * appears between the <> in the following:
996 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0
997 * 22.5MHz/4bit/128-block
999 * Also format just the card serial number, which the mmcsd driver will
1000 * use as the disk->d_ident string.
1002 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1003 * and our max formatted length is currently 55 bytes if every field
1004 * contains the largest value.
1006 * Sometimes the oid is two printable ascii chars; when it's not,
1007 * format it as 0xnnnn instead.
1009 c1 = (ivar->cid.oid >> 8) & 0x0ff;
1010 c2 = ivar->cid.oid & 0x0ff;
1011 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1012 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1014 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1015 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1016 "%08X", ivar->cid.psn);
1017 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1018 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1019 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1020 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1021 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1022 ivar->cid.mid, oidstr);
1025 static const int exp[8] = {
1026 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1029 static const int mant[16] = {
1030 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1033 static const int cur_min[8] = {
1034 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1037 static const int cur_max[8] = {
1038 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1042 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
1048 memset(csd, 0, sizeof(*csd));
1049 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1051 m = mmc_get_bits(raw_csd, 128, 115, 4);
1052 e = mmc_get_bits(raw_csd, 128, 112, 3);
1053 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1054 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1055 m = mmc_get_bits(raw_csd, 128, 99, 4);
1056 e = mmc_get_bits(raw_csd, 128, 96, 3);
1057 csd->tran_speed = exp[e] * 10000 * mant[m];
1058 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1059 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1060 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1061 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1062 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1063 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1064 csd->vdd_r_curr_min =
1065 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1066 csd->vdd_r_curr_max =
1067 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1068 csd->vdd_w_curr_min =
1069 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1070 csd->vdd_w_curr_max =
1071 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1072 m = mmc_get_bits(raw_csd, 128, 62, 12);
1073 e = mmc_get_bits(raw_csd, 128, 47, 3);
1074 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1075 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1076 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1077 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1078 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1079 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1080 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1081 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1082 } else if (v == 1) {
1083 m = mmc_get_bits(raw_csd, 128, 115, 4);
1084 e = mmc_get_bits(raw_csd, 128, 112, 3);
1085 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1086 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1087 m = mmc_get_bits(raw_csd, 128, 99, 4);
1088 e = mmc_get_bits(raw_csd, 128, 96, 3);
1089 csd->tran_speed = exp[e] * 10000 * mant[m];
1090 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1091 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1092 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1093 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1094 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1095 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1096 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1098 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1099 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1100 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1101 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1102 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1103 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1104 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1106 panic("unknown SD CSD version");
1110 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
1115 memset(csd, 0, sizeof(*csd));
1116 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1117 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1118 m = mmc_get_bits(raw_csd, 128, 115, 4);
1119 e = mmc_get_bits(raw_csd, 128, 112, 3);
1120 csd->tacc = exp[e] * mant[m] + 9 / 10;
1121 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1122 m = mmc_get_bits(raw_csd, 128, 99, 4);
1123 e = mmc_get_bits(raw_csd, 128, 96, 3);
1124 csd->tran_speed = exp[e] * 10000 * mant[m];
1125 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1126 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1127 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1128 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1129 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1130 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1131 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1132 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1133 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1134 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1135 m = mmc_get_bits(raw_csd, 128, 62, 12);
1136 e = mmc_get_bits(raw_csd, 128, 47, 3);
1137 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1138 csd->erase_blk_en = 0;
1139 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1140 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1141 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1142 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1143 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1144 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1145 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1149 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
1151 unsigned int scr_struct;
1153 memset(scr, 0, sizeof(*scr));
1155 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1156 if (scr_struct != 0) {
1157 printf("Unrecognised SCR structure version %d\n",
1161 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1162 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1166 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1167 struct mmc_sd_status *sd_status)
1170 memset(sd_status, 0, sizeof(*sd_status));
1172 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1173 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1174 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1175 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1176 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1177 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1178 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1179 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1180 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1181 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1185 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
1187 struct mmc_command cmd;
1190 memset(&cmd, 0, sizeof(cmd));
1191 cmd.opcode = MMC_ALL_SEND_CID;
1193 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1195 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1196 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1201 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd)
1203 struct mmc_command cmd;
1206 memset(&cmd, 0, sizeof(cmd));
1207 cmd.opcode = MMC_SEND_CSD;
1208 cmd.arg = rca << 16;
1209 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1211 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1212 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1217 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
1220 struct mmc_command cmd;
1221 struct mmc_data data;
1223 memset(&cmd, 0, sizeof(cmd));
1224 memset(&data, 0, sizeof(data));
1226 memset(rawscr, 0, 8);
1227 cmd.opcode = ACMD_SEND_SCR;
1228 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1234 data.flags = MMC_DATA_READ;
1236 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1237 rawscr[0] = be32toh(rawscr[0]);
1238 rawscr[1] = be32toh(rawscr[1]);
1243 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1245 struct mmc_command cmd;
1246 struct mmc_data data;
1249 memset(&cmd, 0, sizeof(cmd));
1250 memset(&data, 0, sizeof(data));
1252 memset(rawsdstatus, 0, 64);
1253 cmd.opcode = ACMD_SD_STATUS;
1254 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1258 data.data = rawsdstatus;
1260 data.flags = MMC_DATA_READ;
1262 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1263 for (i = 0; i < 16; i++)
1264 rawsdstatus[i] = be32toh(rawsdstatus[i]);
1269 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1271 struct mmc_command cmd;
1274 memset(&cmd, 0, sizeof(cmd));
1275 cmd.opcode = MMC_SET_RELATIVE_ADDR;
1276 cmd.arg = resp << 16;
1277 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1279 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1284 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1286 struct mmc_command cmd;
1289 memset(&cmd, 0, sizeof(cmd));
1290 cmd.opcode = SD_SEND_RELATIVE_ADDR;
1292 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1294 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1295 *resp = cmd.resp[0];
1300 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1302 struct mmc_command cmd;
1305 memset(&cmd, 0, sizeof(cmd));
1306 cmd.opcode = MMC_SET_BLOCKLEN;
1308 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1310 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1315 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1319 case bus_timing_normal:
1320 return (ivar->tran_speed);
1322 return (ivar->hs_tran_speed);
1323 case bus_timing_uhs_sdr12:
1324 return (SD_SDR12_MAX);
1325 case bus_timing_uhs_sdr25:
1326 return (SD_SDR25_MAX);
1327 case bus_timing_uhs_ddr50:
1328 return (SD_DDR50_MAX);
1329 case bus_timing_uhs_sdr50:
1330 return (SD_SDR50_MAX);
1331 case bus_timing_uhs_sdr104:
1332 return (SD_SDR104_MAX);
1333 case bus_timing_mmc_ddr52:
1334 return (MMC_TYPE_DDR52_MAX);
1335 case bus_timing_mmc_hs200:
1336 case bus_timing_mmc_hs400:
1337 case bus_timing_mmc_hs400es:
1338 return (MMC_TYPE_HS200_HS400ES_MAX);
1344 mmc_timing_to_string(enum mmc_bus_timing timing)
1348 case bus_timing_normal:
1349 return ("normal speed");
1351 return ("high speed");
1352 case bus_timing_uhs_sdr12:
1353 case bus_timing_uhs_sdr25:
1354 case bus_timing_uhs_sdr50:
1355 case bus_timing_uhs_sdr104:
1356 return ("single data rate");
1357 case bus_timing_uhs_ddr50:
1358 case bus_timing_mmc_ddr52:
1359 return ("dual data rate");
1360 case bus_timing_mmc_hs200:
1362 case bus_timing_mmc_hs400:
1364 case bus_timing_mmc_hs400es:
1365 return ("HS400 with enhanced strobe");
1371 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1373 enum mmc_bus_timing max_timing, timing;
1375 device_printf(dev, "Card at relative address 0x%04x%s:\n",
1376 ivar->rca, newcard ? " added" : "");
1377 device_printf(dev, " card: %s\n", ivar->card_id_string);
1378 max_timing = bus_timing_normal;
1379 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1380 if (isset(&ivar->timings, timing)) {
1381 max_timing = timing;
1385 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1386 (ivar->bus_width == bus_width_1 ? 1 :
1387 (ivar->bus_width == bus_width_4 ? 4 : 8)),
1388 mmc_timing_to_dtr(ivar, timing) / 1000000,
1389 mmc_timing_to_string(timing));
1390 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1391 ivar->sec_count, ivar->erase_sector,
1392 ivar->read_only ? ", read-only" : "");
1396 mmc_discover_cards(struct mmc_softc *sc)
1398 u_char switch_res[64];
1399 uint32_t raw_cid[4];
1400 struct mmc_ivars *ivar = NULL;
1403 int devcount, err, host_caps, i, newcard;
1404 uint32_t resp, sec_count, status;
1407 host_caps = mmcbr_get_caps(sc->dev);
1408 if (bootverbose || mmc_debug)
1409 device_printf(sc->dev, "Probing cards\n");
1411 sc->squelched++; /* Errors are expected, squelch reporting. */
1412 err = mmc_all_send_cid(sc, raw_cid);
1414 if (err == MMC_ERR_TIMEOUT)
1416 if (err != MMC_ERR_NONE) {
1417 device_printf(sc->dev, "Error reading CID %d\n", err);
1421 if ((err = device_get_children(sc->dev, &devlist,
1424 for (i = 0; i < devcount; i++) {
1425 ivar = device_get_ivars(devlist[i]);
1426 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1432 free(devlist, M_TEMP);
1433 if (bootverbose || mmc_debug) {
1434 device_printf(sc->dev,
1435 "%sard detected (CID %08x%08x%08x%08x)\n",
1436 newcard ? "New c" : "C",
1437 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1440 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1442 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1444 if (mmcbr_get_ro(sc->dev))
1445 ivar->read_only = 1;
1446 ivar->bus_width = bus_width_1;
1447 setbit(&ivar->timings, bus_timing_normal);
1448 ivar->mode = mmcbr_get_mode(sc->dev);
1449 if (ivar->mode == mode_sd) {
1450 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1451 err = mmc_send_relative_addr(sc, &resp);
1452 if (err != MMC_ERR_NONE) {
1453 device_printf(sc->dev,
1454 "Error getting RCA %d\n", err);
1457 ivar->rca = resp >> 16;
1459 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1460 if (err != MMC_ERR_NONE) {
1461 device_printf(sc->dev,
1462 "Error getting CSD %d\n", err);
1465 if (bootverbose || mmc_debug)
1466 device_printf(sc->dev,
1467 "%sard detected (CSD %08x%08x%08x%08x)\n",
1468 newcard ? "New c" : "C", ivar->raw_csd[0],
1469 ivar->raw_csd[1], ivar->raw_csd[2],
1471 mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1472 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1473 if (ivar->csd.csd_structure > 0)
1475 ivar->tran_speed = ivar->csd.tran_speed;
1476 ivar->erase_sector = ivar->csd.erase_sector *
1477 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1479 err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1481 if (err != MMC_ERR_NONE) {
1482 device_printf(sc->dev,
1483 "Error reading card status %d\n", err);
1486 if ((status & R1_CARD_IS_LOCKED) != 0) {
1487 device_printf(sc->dev,
1488 "Card is password protected, skipping.\n");
1492 /* Get card SCR. Card must be selected to fetch it. */
1493 err = mmc_select_card(sc, ivar->rca);
1494 if (err != MMC_ERR_NONE) {
1495 device_printf(sc->dev,
1496 "Error selecting card %d\n", err);
1499 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1500 if (err != MMC_ERR_NONE) {
1501 device_printf(sc->dev,
1502 "Error reading SCR %d\n", err);
1505 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1506 /* Get card switch capabilities (command class 10). */
1507 if ((ivar->scr.sda_vsn >= 1) &&
1508 (ivar->csd.ccc & (1 << 10))) {
1509 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1510 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1512 if (err == MMC_ERR_NONE &&
1513 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1514 setbit(&ivar->timings, bus_timing_hs);
1515 ivar->hs_tran_speed = SD_HS_MAX;
1520 * We deselect then reselect the card here. Some cards
1521 * become unselected and timeout with the above two
1522 * commands, although the state tables / diagrams in the
1523 * standard suggest they go back to the transfer state.
1524 * Other cards don't become deselected, and if we
1525 * attempt to blindly re-select them, we get timeout
1526 * errors from some controllers. So we deselect then
1527 * reselect to handle all situations. The only thing we
1528 * use from the sd_status is the erase sector size, but
1529 * it is still nice to get that right.
1531 mmc_select_card(sc, 0);
1532 (void)mmc_select_card(sc, ivar->rca);
1533 (void)mmc_app_sd_status(sc, ivar->rca,
1534 ivar->raw_sd_status);
1535 mmc_app_decode_sd_status(ivar->raw_sd_status,
1537 if (ivar->sd_status.au_size != 0) {
1538 ivar->erase_sector =
1539 16 << ivar->sd_status.au_size;
1541 /* Find max supported bus width. */
1542 if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1543 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1544 ivar->bus_width = bus_width_4;
1547 * Some cards that report maximum I/O block sizes
1548 * greater than 512 require the block length to be
1549 * set to 512, even though that is supposed to be
1550 * the default. Example:
1552 * Transcend 2GB SDSC card, CID:
1553 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1555 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1556 ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1557 mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1559 mmc_format_card_id_string(ivar);
1561 if (bootverbose || mmc_debug)
1562 mmc_log_card(sc->dev, ivar, newcard);
1565 child = device_add_child(sc->dev, NULL, -1);
1566 device_set_ivars(child, ivar);
1568 mmc_select_card(sc, 0);
1572 err = mmc_set_relative_addr(sc, ivar->rca);
1573 if (err != MMC_ERR_NONE) {
1574 device_printf(sc->dev, "Error setting RCA %d\n", err);
1578 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1579 if (err != MMC_ERR_NONE) {
1580 device_printf(sc->dev, "Error getting CSD %d\n", err);
1583 if (bootverbose || mmc_debug)
1584 device_printf(sc->dev,
1585 "%sard detected (CSD %08x%08x%08x%08x)\n",
1586 newcard ? "New c" : "C", ivar->raw_csd[0],
1587 ivar->raw_csd[1], ivar->raw_csd[2],
1590 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1591 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1592 ivar->tran_speed = ivar->csd.tran_speed;
1593 ivar->erase_sector = ivar->csd.erase_sector *
1594 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1596 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1597 if (err != MMC_ERR_NONE) {
1598 device_printf(sc->dev,
1599 "Error reading card status %d\n", err);
1602 if ((status & R1_CARD_IS_LOCKED) != 0) {
1603 device_printf(sc->dev,
1604 "Card is password protected, skipping.\n");
1608 err = mmc_select_card(sc, ivar->rca);
1609 if (err != MMC_ERR_NONE) {
1610 device_printf(sc->dev, "Error selecting card %d\n",
1615 /* Only MMC >= 4.x devices support EXT_CSD. */
1616 if (ivar->csd.spec_vers >= 4) {
1617 err = mmc_send_ext_csd(sc->dev, sc->dev,
1619 if (err != MMC_ERR_NONE) {
1620 device_printf(sc->dev,
1621 "Error reading EXT_CSD %d\n", err);
1624 /* Handle extended capacity from EXT_CSD */
1625 sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] +
1626 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1627 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1628 (ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1629 if (sec_count != 0) {
1630 ivar->sec_count = sec_count;
1633 /* Get device speeds beyond normal mode. */
1634 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1635 EXT_CSD_CARD_TYPE_HS_52) != 0) {
1636 setbit(&ivar->timings, bus_timing_hs);
1637 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1638 } else if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1639 EXT_CSD_CARD_TYPE_HS_26) != 0) {
1640 setbit(&ivar->timings, bus_timing_hs);
1641 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1643 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1644 EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1645 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1646 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1647 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1649 if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1650 EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1651 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1652 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1653 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1656 * Determine generic switch timeout (provided in
1657 * units of 10 ms), defaulting to 500 ms.
1659 ivar->cmd6_time = 500 * 1000;
1660 if (ivar->csd.spec_vers >= 6)
1661 ivar->cmd6_time = 10 *
1662 ivar->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME];
1663 /* Find max supported bus width. */
1664 ivar->bus_width = mmc_test_bus_width(sc);
1665 /* Handle HC erase sector size. */
1666 if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1667 ivar->erase_sector = 1024 *
1668 ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1669 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1670 EXT_CSD_CMD_SET_NORMAL,
1671 EXT_CSD_ERASE_GRP_DEF,
1672 EXT_CSD_ERASE_GRP_DEF_EN,
1673 ivar->cmd6_time, true);
1674 if (err != MMC_ERR_NONE) {
1675 device_printf(sc->dev,
1676 "Error setting erase group %d\n",
1684 * Some cards that report maximum I/O block sizes greater
1685 * than 512 require the block length to be set to 512, even
1686 * though that is supposed to be the default. Example:
1688 * Transcend 2GB SDSC card, CID:
1689 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1691 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1692 ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1693 mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1695 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid,
1696 ivar->raw_ext_csd[EXT_CSD_REV] >= 5);
1697 mmc_format_card_id_string(ivar);
1699 if (bootverbose || mmc_debug)
1700 mmc_log_card(sc->dev, ivar, newcard);
1703 child = device_add_child(sc->dev, NULL, -1);
1704 device_set_ivars(child, ivar);
1706 mmc_select_card(sc, 0);
1711 mmc_rescan_cards(struct mmc_softc *sc)
1713 struct mmc_ivars *ivar;
1715 int err, i, devcount;
1717 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1719 for (i = 0; i < devcount; i++) {
1720 ivar = device_get_ivars(devlist[i]);
1721 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1722 if (bootverbose || mmc_debug)
1723 device_printf(sc->dev,
1724 "Card at relative address %d lost.\n",
1726 device_delete_child(sc->dev, devlist[i]);
1727 free(ivar, M_DEVBUF);
1730 free(devlist, M_TEMP);
1731 mmc_select_card(sc, 0);
1735 mmc_delete_cards(struct mmc_softc *sc)
1737 struct mmc_ivars *ivar;
1739 int err, i, devcount;
1741 if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1743 for (i = 0; i < devcount; i++) {
1744 ivar = device_get_ivars(devlist[i]);
1745 if (bootverbose || mmc_debug)
1746 device_printf(sc->dev,
1747 "Card at relative address %d deleted.\n",
1749 device_delete_child(sc->dev, devlist[i]);
1750 free(ivar, M_DEVBUF);
1752 free(devlist, M_TEMP);
1757 mmc_go_discovery(struct mmc_softc *sc)
1764 if (mmcbr_get_power_mode(dev) != power_on) {
1766 * First, try SD modes
1768 sc->squelched++; /* Errors are expected, squelch reporting. */
1769 mmcbr_set_mode(dev, mode_sd);
1771 mmcbr_set_bus_mode(dev, pushpull);
1772 if (bootverbose || mmc_debug)
1773 device_printf(sc->dev, "Probing bus\n");
1775 err = mmc_send_if_cond(sc, 1);
1776 if ((bootverbose || mmc_debug) && err == 0)
1777 device_printf(sc->dev,
1778 "SD 2.0 interface conditions: OK\n");
1779 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
1780 if (bootverbose || mmc_debug)
1781 device_printf(sc->dev, "SD probe: failed\n");
1785 mmcbr_set_mode(dev, mode_mmc);
1786 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
1787 if (bootverbose || mmc_debug)
1788 device_printf(sc->dev,
1789 "MMC probe: failed\n");
1790 ocr = 0; /* Failed both, powerdown. */
1791 } else if (bootverbose || mmc_debug)
1792 device_printf(sc->dev,
1793 "MMC probe: OK (OCR: 0x%08x)\n", ocr);
1794 } else if (bootverbose || mmc_debug)
1795 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
1799 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
1800 if (mmcbr_get_ocr(dev) != 0)
1803 mmcbr_set_bus_mode(dev, opendrain);
1804 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
1805 mmcbr_update_ios(dev);
1806 /* XXX recompute vdd based on new cards? */
1809 * Make sure that we have a mutually agreeable voltage to at least
1810 * one card on the bus.
1812 if (bootverbose || mmc_debug)
1813 device_printf(sc->dev, "Current OCR: 0x%08x\n",
1814 mmcbr_get_ocr(dev));
1815 if (mmcbr_get_ocr(dev) == 0) {
1816 device_printf(sc->dev, "No compatible cards found on bus\n");
1817 mmc_delete_cards(sc);
1822 * Reselect the cards after we've idled them above.
1824 if (mmcbr_get_mode(dev) == mode_sd) {
1825 err = mmc_send_if_cond(sc, 1);
1826 mmc_send_app_op_cond(sc,
1827 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
1829 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
1830 mmc_discover_cards(sc);
1831 mmc_rescan_cards(sc);
1833 mmcbr_set_bus_mode(dev, pushpull);
1834 mmcbr_update_ios(dev);
1835 mmc_calculate_clock(sc);
1839 mmc_calculate_clock(struct mmc_softc *sc)
1842 struct mmc_ivars *ivar;
1843 int host_caps, i, nkid;
1844 uint32_t dtr, max_dtr;
1845 enum mmc_bus_timing max_timing, timing;
1848 max_dtr = mmcbr_get_f_max(sc->dev);
1849 host_caps = mmcbr_get_caps(sc->dev);
1850 if ((host_caps & MMC_CAP_MMC_DDR52) != 0)
1851 max_timing = bus_timing_mmc_ddr52;
1852 else if ((host_caps & MMC_CAP_HSPEED) != 0)
1853 max_timing = bus_timing_hs;
1855 max_timing = bus_timing_normal;
1856 if (device_get_children(sc->dev, &kids, &nkid) != 0)
1857 panic("can't get children");
1860 for (i = 0; i < nkid; i++) {
1861 ivar = device_get_ivars(kids[i]);
1862 if (isclr(&ivar->timings, max_timing)) {
1863 for (timing = max_timing; timing >=
1864 bus_timing_normal; timing--) {
1865 if (isset(&ivar->timings, timing)) {
1866 max_timing = timing;
1872 dtr = mmc_timing_to_dtr(ivar, max_timing);
1873 if (dtr < max_dtr) {
1878 } while (changed == true);
1879 if (bootverbose || mmc_debug) {
1880 device_printf(sc->dev,
1881 "setting transfer rate to %d.%03dMHz (%s timing)\n",
1882 max_dtr / 1000000, (max_dtr / 1000) % 1000,
1883 mmc_timing_to_string(max_timing));
1885 for (i = 0; i < nkid; i++) {
1886 ivar = device_get_ivars(kids[i]);
1887 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
1889 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE ||
1890 mmc_set_timing(sc, ivar, max_timing) != MMC_ERR_NONE)
1891 device_printf(sc->dev, "Card at relative address %d "
1892 "failed to set timing.\n", ivar->rca);
1894 mmc_select_card(sc, 0);
1896 mmcbr_set_clock(sc->dev, max_dtr);
1897 mmcbr_update_ios(sc->dev);
1902 mmc_scan(struct mmc_softc *sc)
1904 device_t dev = sc->dev;
1906 mmc_acquire_bus(dev, dev);
1907 mmc_go_discovery(sc);
1908 mmc_release_bus(dev, dev);
1910 bus_generic_attach(dev);
1914 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
1916 struct mmc_ivars *ivar = device_get_ivars(child);
1921 case MMC_IVAR_SPEC_VERS:
1922 *result = ivar->csd.spec_vers;
1924 case MMC_IVAR_DSR_IMP:
1925 *result = ivar->csd.dsr_imp;
1927 case MMC_IVAR_MEDIA_SIZE:
1928 *result = ivar->sec_count;
1931 *result = ivar->rca;
1933 case MMC_IVAR_SECTOR_SIZE:
1934 *result = MMC_SECTOR_SIZE;
1936 case MMC_IVAR_TRAN_SPEED:
1937 *result = mmcbr_get_clock(bus);
1939 case MMC_IVAR_READ_ONLY:
1940 *result = ivar->read_only;
1942 case MMC_IVAR_HIGH_CAP:
1943 *result = ivar->high_cap;
1945 case MMC_IVAR_CARD_TYPE:
1946 *result = ivar->mode;
1948 case MMC_IVAR_BUS_WIDTH:
1949 *result = ivar->bus_width;
1951 case MMC_IVAR_ERASE_SECTOR:
1952 *result = ivar->erase_sector;
1954 case MMC_IVAR_MAX_DATA:
1955 *result = mmcbr_get_max_data(bus);
1957 case MMC_IVAR_CARD_ID_STRING:
1958 *(char **)result = ivar->card_id_string;
1960 case MMC_IVAR_CARD_SN_STRING:
1961 *(char **)result = ivar->card_sn_string;
1968 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1972 * None are writable ATM
1978 mmc_delayed_attach(void *xsc)
1980 struct mmc_softc *sc = xsc;
1983 config_intrhook_disestablish(&sc->config_intrhook);
1987 mmc_child_location_str(device_t dev, device_t child, char *buf,
1991 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child));
1995 static device_method_t mmc_methods[] = {
1997 DEVMETHOD(device_probe, mmc_probe),
1998 DEVMETHOD(device_attach, mmc_attach),
1999 DEVMETHOD(device_detach, mmc_detach),
2000 DEVMETHOD(device_suspend, mmc_suspend),
2001 DEVMETHOD(device_resume, mmc_resume),
2004 DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2005 DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2006 DEVMETHOD(bus_child_location_str, mmc_child_location_str),
2008 /* MMC Bus interface */
2009 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2010 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2011 DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2016 driver_t mmc_driver = {
2019 sizeof(struct mmc_softc),
2021 devclass_t mmc_devclass;
2023 MODULE_VERSION(mmc, MMC_VERSION);