2 * Copyright (c) 2006 Bernd Walter. All rights reserved.
3 * Copyright (c) 2006 M. Warner Losh. All rights reserved.
4 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * Portions of this software may have been developed with reference to
27 * the SD Simplified Specification. The following disclaimer may apply:
29 * The following conditions apply to the release of the simplified
30 * specification ("Simplified Specification") by the SD Card Association and
31 * the SD Group. The Simplified Specification is a subset of the complete SD
32 * Specification which is owned by the SD Card Association and the SD
33 * Group. This Simplified Specification is provided on a non-confidential
34 * basis subject to the disclaimers below. Any implementation of the
35 * Simplified Specification may require a license from the SD Card
36 * Association, SD Group, SD-3C LLC or other third parties.
40 * The information contained in the Simplified Specification is presented only
41 * as a standard specification for SD Cards and SD Host/Ancillary products and
42 * is provided "AS-IS" without any representations or warranties of any
43 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
44 * Card Association for any damages, any infringements of patents or other
45 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
46 * parties, which may result from its use. No license is granted by
47 * implication, estoppel or otherwise under any patent or other rights of the
48 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
49 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
50 * or the SD Card Association to disclose or distribute any technical
51 * information, know-how or other confidential information to any third party.
54 #include <sys/cdefs.h>
55 __FBSDID("$FreeBSD$");
57 #include <sys/param.h>
58 #include <sys/systm.h>
59 #include <sys/kernel.h>
60 #include <sys/malloc.h>
62 #include <sys/module.h>
63 #include <sys/mutex.h>
65 #include <sys/endian.h>
66 #include <sys/sysctl.h>
69 #include <dev/mmc/bridge.h>
70 #include <dev/mmc/mmc_private.h>
71 #include <dev/mmc/mmc_subr.h>
72 #include <dev/mmc/mmcreg.h>
73 #include <dev/mmc/mmcbrvar.h>
74 #include <dev/mmc/mmcvar.h>
77 #include "mmcbus_if.h"
79 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
85 uint32_t raw_cid[4]; /* Raw bits of the CID */
86 uint32_t raw_csd[4]; /* Raw bits of the CSD */
87 uint32_t raw_scr[2]; /* Raw bits of the SCR */
88 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
89 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
91 u_char read_only; /* True when the device is read-only */
92 u_char high_cap; /* High Capacity device (block addressed) */
93 enum mmc_card_mode mode;
94 enum mmc_bus_width bus_width; /* Bus width to use */
95 struct mmc_cid cid; /* cid decoded */
96 struct mmc_csd csd; /* csd decoded */
97 struct mmc_scr scr; /* scr decoded */
98 struct mmc_sd_status sd_status; /* SD_STATUS decoded */
99 uint32_t sec_count; /* Card capacity in 512byte blocks */
100 uint32_t timings; /* Mask of bus timings supported */
101 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
102 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
103 uint32_t tran_speed; /* Max speed in normal mode */
104 uint32_t hs_tran_speed; /* Max speed in high speed mode */
105 uint32_t erase_sector; /* Card native erase sector size */
106 uint32_t cmd6_time; /* Generic switch timeout [us] */
107 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */
108 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
109 char card_sn_string[16];/* Formatted serial # for disk->d_ident */
112 #define CMD_RETRIES 3
114 static const struct mmc_quirk mmc_quirks[] = {
116 * For some SanDisk iNAND devices, the CMD38 argument needs to be
117 * provided in EXT_CSD[113].
119 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 },
120 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 },
121 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 },
122 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 },
123 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 },
126 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to
127 * unrecoverable data corruption.
129 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM },
130 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM },
132 { 0x0, 0x0, NULL, 0x0 }
135 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver");
137 static int mmc_debug;
138 TUNABLE_INT("hw.mmc.debug", &mmc_debug);
139 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
142 /* bus entry points */
143 static int mmc_acquire_bus(device_t busdev, device_t dev);
144 static int mmc_attach(device_t dev);
145 static int mmc_child_location_str(device_t dev, device_t child, char *buf,
147 static int mmc_detach(device_t dev);
148 static int mmc_probe(device_t dev);
149 static int mmc_read_ivar(device_t bus, device_t child, int which,
151 static int mmc_release_bus(device_t busdev, device_t dev);
152 static int mmc_resume(device_t dev);
153 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune);
154 static void mmc_retune_unpause(device_t busdev, device_t dev);
155 static int mmc_suspend(device_t dev);
156 static int mmc_wait_for_request(device_t busdev, device_t dev,
157 struct mmc_request *req);
158 static int mmc_write_ivar(device_t bus, device_t child, int which,
161 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
162 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
163 #define MMC_LOCK_INIT(_sc) \
164 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
166 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
167 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
168 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
170 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
171 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
172 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
173 struct mmc_sd_status *sd_status);
174 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
175 uint32_t *rawsdstatus);
176 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
178 static int mmc_calculate_clock(struct mmc_softc *sc);
179 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid,
181 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid);
182 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd);
183 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd);
184 static void mmc_delayed_attach(void *xsc);
185 static int mmc_delete_cards(struct mmc_softc *sc, bool final);
186 static void mmc_discover_cards(struct mmc_softc *sc);
187 static void mmc_format_card_id_string(struct mmc_ivars *ivar);
188 static void mmc_go_discovery(struct mmc_softc *sc);
189 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
191 static int mmc_highest_voltage(uint32_t ocr);
192 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing);
193 static void mmc_idle_cards(struct mmc_softc *sc);
194 static void mmc_ms_delay(int ms);
195 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
196 static void mmc_power_down(struct mmc_softc *sc);
197 static void mmc_power_up(struct mmc_softc *sc);
198 static void mmc_rescan_cards(struct mmc_softc *sc);
199 static int mmc_retune(device_t busdev, device_t dev, bool reset);
200 static void mmc_scan(struct mmc_softc *sc);
201 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
202 uint8_t value, uint8_t *res);
203 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
204 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
205 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
207 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd);
208 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
209 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
211 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp);
212 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
213 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
214 enum mmc_bus_timing timing);
215 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar);
216 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
217 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
218 enum mmc_bus_timing timing);
219 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
220 enum mmc_bus_timing timing);
221 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
223 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
224 uint32_t max_dtr, enum mmc_bus_timing max_timing);
225 static int mmc_test_bus_width(struct mmc_softc *sc);
226 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
227 enum mmc_bus_timing timing);
228 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
229 static void mmc_update_child_list(struct mmc_softc *sc);
230 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
231 uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
232 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req);
233 static void mmc_wakeup(struct mmc_request *req);
239 DELAY(1000 * ms); /* XXX BAD */
243 mmc_probe(device_t dev)
246 device_set_desc(dev, "MMC/SD bus");
251 mmc_attach(device_t dev)
253 struct mmc_softc *sc;
255 sc = device_get_softc(dev);
259 /* We'll probe and attach our children later, but before / mount */
260 sc->config_intrhook.ich_func = mmc_delayed_attach;
261 sc->config_intrhook.ich_arg = sc;
262 if (config_intrhook_establish(&sc->config_intrhook) != 0)
263 device_printf(dev, "config_intrhook_establish failed\n");
268 mmc_detach(device_t dev)
270 struct mmc_softc *sc = device_get_softc(dev);
273 err = mmc_delete_cards(sc, true);
277 MMC_LOCK_DESTROY(sc);
283 mmc_suspend(device_t dev)
285 struct mmc_softc *sc = device_get_softc(dev);
288 err = bus_generic_suspend(dev);
292 * We power down with the bus acquired here, mainly so that no device
293 * is selected any longer and sc->last_rca gets set to 0. Otherwise,
294 * the deselect as part of the bus acquisition in mmc_scan() may fail
295 * during resume, as the bus isn't powered up again before later in
296 * mmc_go_discovery().
298 err = mmc_acquire_bus(dev, dev);
302 err = mmc_release_bus(dev, dev);
307 mmc_resume(device_t dev)
309 struct mmc_softc *sc = device_get_softc(dev);
312 return (bus_generic_resume(dev));
316 mmc_acquire_bus(device_t busdev, device_t dev)
318 struct mmc_softc *sc;
319 struct mmc_ivars *ivar;
322 enum mmc_bus_timing timing;
324 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
327 sc = device_get_softc(busdev);
330 panic("mmc: host bridge didn't serialize us.");
336 * Keep track of the last rca that we've selected. If
337 * we're asked to do it again, don't. We never
338 * unselect unless the bus code itself wants the mmc
339 * bus, and constantly reselecting causes problems.
341 ivar = device_get_ivars(dev);
343 if (sc->last_rca != rca) {
344 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
345 device_printf(busdev, "Card at relative "
346 "address %d failed to select\n", rca);
350 timing = mmcbr_get_timing(busdev);
352 * For eMMC modes, setting/updating bus width and VCCQ
353 * only really is necessary if there actually is more
354 * than one device on the bus as generally that already
355 * had to be done by mmc_calculate_clock() or one of
356 * its calees. Moreover, setting the bus width anew
357 * can trigger re-tuning (via a CRC error on the next
358 * CMD), even if not switching between devices an the
359 * previously selected one is still tuned. Obviously,
360 * we need to re-tune the host controller if devices
361 * are actually switched, though.
363 if (timing >= bus_timing_mmc_ddr52 &&
364 sc->child_count == 1)
366 /* Prepare bus width for the new card. */
367 if (bootverbose || mmc_debug) {
368 device_printf(busdev,
369 "setting bus width to %d bits %s timing\n",
370 (ivar->bus_width == bus_width_4) ? 4 :
371 (ivar->bus_width == bus_width_8) ? 8 : 1,
372 mmc_timing_to_string(timing));
374 if (mmc_set_card_bus_width(sc, ivar, timing) !=
376 device_printf(busdev, "Card at relative "
377 "address %d failed to set bus width\n",
381 mmcbr_set_bus_width(busdev, ivar->bus_width);
382 mmcbr_update_ios(busdev);
383 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
384 device_printf(busdev, "Failed to set VCCQ "
385 "for card at relative address %d\n", rca);
388 if (timing >= bus_timing_mmc_hs200 &&
389 mmc_retune(busdev, dev, true) != 0) {
390 device_printf(busdev, "Card at relative "
391 "address %d failed to re-tune\n", rca);
397 * If there's a card selected, stand down.
399 if (sc->last_rca != 0) {
400 if (mmc_select_card(sc, 0) != MMC_ERR_NONE)
410 mmc_release_bus(device_t busdev, device_t dev)
412 struct mmc_softc *sc;
415 sc = device_get_softc(busdev);
419 panic("mmc: releasing unowned bus.");
420 if (sc->owner != dev)
421 panic("mmc: you don't own the bus. game over.");
423 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
433 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
436 return (ocr & MMC_OCR_VOLTAGE);
440 mmc_highest_voltage(uint32_t ocr)
444 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
445 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
452 mmc_wakeup(struct mmc_request *req)
454 struct mmc_softc *sc;
456 sc = (struct mmc_softc *)req->done_data;
458 req->flags |= MMC_REQ_DONE;
464 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
467 req->done = mmc_wakeup;
469 if (__predict_false(mmc_debug > 1)) {
470 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
471 req->cmd->opcode, req->cmd->arg, req->cmd->flags);
472 if (req->cmd->data) {
473 printf(" data %d\n", (int)req->cmd->data->len);
477 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
479 while ((req->flags & MMC_REQ_DONE) == 0)
480 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
482 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 &&
483 req->cmd->error != MMC_ERR_NONE)))
484 device_printf(sc->dev, "CMD%d RESULT: %d\n",
485 req->cmd->opcode, req->cmd->error);
490 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req)
492 struct mmc_softc *sc;
493 struct mmc_ivars *ivar;
495 enum mmc_retune_req retune_req;
497 sc = device_get_softc(busdev);
498 KASSERT(sc->owner != NULL,
499 ("%s: Request from %s without bus being acquired.", __func__,
500 device_get_nameunit(dev)));
503 * Unless no device is selected or re-tuning is already ongoing,
504 * execute re-tuning if a) the bridge is requesting to do so and
505 * re-tuning hasn't been otherwise paused, or b) if a child asked
506 * to be re-tuned prior to pausing (see also mmc_retune_pause()).
508 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 &&
509 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none &&
510 sc->retune_paused == 0) || sc->retune_needed == 1))) {
511 if (__predict_false(mmc_debug > 1)) {
512 device_printf(busdev,
513 "Re-tuning with%s circuit reset required\n",
514 retune_req == retune_req_reset ? "" : "out");
516 if (device_get_parent(dev) == busdev)
517 ivar = device_get_ivars(dev);
519 for (i = 0; i < sc->child_count; i++) {
520 ivar = device_get_ivars(sc->child_list[i]);
521 if (ivar->rca == sc->last_rca)
524 if (ivar->rca != sc->last_rca)
527 sc->retune_ongoing = 1;
528 err = mmc_retune(busdev, dev, retune_req == retune_req_reset);
529 sc->retune_ongoing = 0;
532 case MMC_ERR_FAILED: /* Re-tune error but still might work */
534 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */
536 case MMC_ERR_INVALID: /* Driver implementation b0rken */
537 default: /* Unknown error, should not happen */
540 sc->retune_needed = 0;
542 return (mmc_wait_for_req(sc, req));
546 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
547 uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
549 struct mmc_command cmd;
552 memset(&cmd, 0, sizeof(cmd));
557 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
561 if (flags & MMC_RSP_136)
562 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
570 mmc_idle_cards(struct mmc_softc *sc)
573 struct mmc_command cmd;
576 mmcbr_set_chip_select(dev, cs_high);
577 mmcbr_update_ios(dev);
580 memset(&cmd, 0, sizeof(cmd));
581 cmd.opcode = MMC_GO_IDLE_STATE;
583 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
585 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
588 mmcbr_set_chip_select(dev, cs_dontcare);
589 mmcbr_update_ios(dev);
594 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
596 struct mmc_command cmd;
597 int err = MMC_ERR_NONE, i;
599 memset(&cmd, 0, sizeof(cmd));
600 cmd.opcode = ACMD_SD_SEND_OP_COND;
602 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
605 for (i = 0; i < 1000; i++) {
606 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
608 if (err != MMC_ERR_NONE)
610 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
611 (ocr & MMC_OCR_VOLTAGE) == 0)
613 err = MMC_ERR_TIMEOUT;
616 if (rocr && err == MMC_ERR_NONE)
622 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
624 struct mmc_command cmd;
625 int err = MMC_ERR_NONE, i;
627 memset(&cmd, 0, sizeof(cmd));
628 cmd.opcode = MMC_SEND_OP_COND;
630 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
633 for (i = 0; i < 1000; i++) {
634 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
635 if (err != MMC_ERR_NONE)
637 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
638 (ocr & MMC_OCR_VOLTAGE) == 0)
640 err = MMC_ERR_TIMEOUT;
643 if (rocr && err == MMC_ERR_NONE)
649 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
651 struct mmc_command cmd;
654 memset(&cmd, 0, sizeof(cmd));
655 cmd.opcode = SD_SEND_IF_COND;
656 cmd.arg = (vhs << 8) + 0xAA;
657 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
660 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
665 mmc_power_up(struct mmc_softc *sc)
671 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
672 mmcbr_set_bus_mode(dev, opendrain);
673 mmcbr_set_chip_select(dev, cs_dontcare);
674 mmcbr_set_bus_width(dev, bus_width_1);
675 mmcbr_set_power_mode(dev, power_up);
676 mmcbr_set_clock(dev, 0);
677 mmcbr_update_ios(dev);
678 for (vccq = vccq_330; ; vccq--) {
679 mmcbr_set_vccq(dev, vccq);
680 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120)
685 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
686 mmcbr_set_timing(dev, bus_timing_normal);
687 mmcbr_set_power_mode(dev, power_on);
688 mmcbr_update_ios(dev);
693 mmc_power_down(struct mmc_softc *sc)
695 device_t dev = sc->dev;
697 mmcbr_set_bus_mode(dev, opendrain);
698 mmcbr_set_chip_select(dev, cs_dontcare);
699 mmcbr_set_bus_width(dev, bus_width_1);
700 mmcbr_set_power_mode(dev, power_off);
701 mmcbr_set_clock(dev, 0);
702 mmcbr_set_timing(dev, bus_timing_normal);
703 mmcbr_update_ios(dev);
707 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
711 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
713 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
714 flags, NULL, CMD_RETRIES);
720 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
724 struct mmc_command cmd;
725 struct mmc_data data;
727 memset(&cmd, 0, sizeof(cmd));
728 memset(&data, 0, sizeof(data));
731 cmd.opcode = SD_SWITCH_FUNC;
732 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
733 cmd.arg = mode << 31; /* 0 - check, 1 - set */
734 cmd.arg |= 0x00FFFFFF;
735 cmd.arg &= ~(0xF << (grp * 4));
736 cmd.arg |= value << (grp * 4);
741 data.flags = MMC_DATA_READ;
743 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
748 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
749 enum mmc_bus_timing timing)
751 struct mmc_command cmd;
755 if (mmcbr_get_mode(sc->dev) == mode_sd) {
756 memset(&cmd, 0, sizeof(cmd));
757 cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
758 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
759 cmd.arg = SD_CLR_CARD_DETECT;
760 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
764 memset(&cmd, 0, sizeof(cmd));
765 cmd.opcode = ACMD_SET_BUS_WIDTH;
766 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
767 switch (ivar->bus_width) {
769 cmd.arg = SD_BUS_WIDTH_1;
772 cmd.arg = SD_BUS_WIDTH_4;
775 return (MMC_ERR_INVALID);
777 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
780 switch (ivar->bus_width) {
782 if (timing == bus_timing_mmc_hs400 ||
783 timing == bus_timing_mmc_hs400es)
784 return (MMC_ERR_INVALID);
785 value = EXT_CSD_BUS_WIDTH_1;
789 case bus_timing_mmc_ddr52:
790 value = EXT_CSD_BUS_WIDTH_4_DDR;
792 case bus_timing_mmc_hs400:
793 case bus_timing_mmc_hs400es:
794 return (MMC_ERR_INVALID);
796 value = EXT_CSD_BUS_WIDTH_4;
803 case bus_timing_mmc_hs400es:
804 value = EXT_CSD_BUS_WIDTH_ES;
806 case bus_timing_mmc_ddr52:
807 case bus_timing_mmc_hs400:
808 value |= EXT_CSD_BUS_WIDTH_8_DDR;
811 value = EXT_CSD_BUS_WIDTH_8;
816 return (MMC_ERR_INVALID);
818 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
819 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
820 ivar->cmd6_time, true);
826 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar)
829 const uint8_t *ext_csd;
832 enum mmc_bus_timing timing;
833 enum mmc_bus_width bus_width;
836 timing = mmcbr_get_timing(dev);
837 bus_width = ivar->bus_width;
838 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 ||
839 timing == bus_timing_normal || bus_width == bus_width_1)
840 return (MMC_ERR_NONE);
843 ext_csd = ivar->raw_ext_csd;
844 clock = mmcbr_get_clock(dev);
845 switch (1 << mmcbr_get_vdd(dev)) {
846 case MMC_OCR_LOW_VOLTAGE:
847 if (clock <= MMC_TYPE_HS_26_MAX)
848 value = ext_csd[EXT_CSD_PWR_CL_26_195];
849 else if (clock <= MMC_TYPE_HS_52_MAX) {
850 if (timing >= bus_timing_mmc_ddr52 &&
851 bus_width >= bus_width_4)
852 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
854 value = ext_csd[EXT_CSD_PWR_CL_52_195];
855 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
856 value = ext_csd[EXT_CSD_PWR_CL_200_195];
858 case MMC_OCR_270_280:
859 case MMC_OCR_280_290:
860 case MMC_OCR_290_300:
861 case MMC_OCR_300_310:
862 case MMC_OCR_310_320:
863 case MMC_OCR_320_330:
864 case MMC_OCR_330_340:
865 case MMC_OCR_340_350:
866 case MMC_OCR_350_360:
867 if (clock <= MMC_TYPE_HS_26_MAX)
868 value = ext_csd[EXT_CSD_PWR_CL_26_360];
869 else if (clock <= MMC_TYPE_HS_52_MAX) {
870 if (timing == bus_timing_mmc_ddr52 &&
871 bus_width >= bus_width_4)
872 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
874 value = ext_csd[EXT_CSD_PWR_CL_52_360];
875 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
876 if (bus_width == bus_width_8)
877 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
879 value = ext_csd[EXT_CSD_PWR_CL_200_360];
883 device_printf(dev, "No power class support for VDD 0x%x\n",
884 1 << mmcbr_get_vdd(dev));
885 return (MMC_ERR_INVALID);
888 if (bus_width == bus_width_8)
889 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
890 EXT_CSD_POWER_CLASS_8BIT_SHIFT;
892 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
893 EXT_CSD_POWER_CLASS_4BIT_SHIFT;
896 return (MMC_ERR_NONE);
898 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
899 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
903 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
904 enum mmc_bus_timing timing)
906 u_char switch_res[64];
910 if (mmcbr_get_mode(sc->dev) == mode_sd) {
912 case bus_timing_normal:
913 value = SD_SWITCH_NORMAL_MODE;
916 value = SD_SWITCH_HS_MODE;
919 return (MMC_ERR_INVALID);
921 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
923 if (err != MMC_ERR_NONE)
925 if ((switch_res[16] & 0xf) != value)
926 return (MMC_ERR_FAILED);
927 mmcbr_set_timing(sc->dev, timing);
928 mmcbr_update_ios(sc->dev);
931 case bus_timing_normal:
932 value = EXT_CSD_HS_TIMING_BC;
935 case bus_timing_mmc_ddr52:
936 value = EXT_CSD_HS_TIMING_HS;
938 case bus_timing_mmc_hs200:
939 value = EXT_CSD_HS_TIMING_HS200;
941 case bus_timing_mmc_hs400:
942 case bus_timing_mmc_hs400es:
943 value = EXT_CSD_HS_TIMING_HS400;
946 return (MMC_ERR_INVALID);
948 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
949 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
950 ivar->cmd6_time, false);
951 if (err != MMC_ERR_NONE)
953 mmcbr_set_timing(sc->dev, timing);
954 mmcbr_update_ios(sc->dev);
955 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
962 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
963 enum mmc_bus_timing timing)
966 if (isset(&ivar->vccq_120, timing))
967 mmcbr_set_vccq(sc->dev, vccq_120);
968 else if (isset(&ivar->vccq_180, timing))
969 mmcbr_set_vccq(sc->dev, vccq_180);
971 mmcbr_set_vccq(sc->dev, vccq_330);
972 if (mmcbr_switch_vccq(sc->dev) != 0)
973 return (MMC_ERR_INVALID);
975 return (MMC_ERR_NONE);
978 static const uint8_t p8[8] = {
979 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
982 static const uint8_t p8ok[8] = {
983 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
986 static const uint8_t p4[4] = {
987 0x5A, 0x00, 0x00, 0x00
990 static const uint8_t p4ok[4] = {
991 0xA5, 0x00, 0x00, 0x00
995 mmc_test_bus_width(struct mmc_softc *sc)
997 struct mmc_command cmd;
998 struct mmc_data data;
1002 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
1003 mmcbr_set_bus_width(sc->dev, bus_width_8);
1004 mmcbr_update_ios(sc->dev);
1006 sc->squelched++; /* Errors are expected, squelch reporting. */
1007 memset(&cmd, 0, sizeof(cmd));
1008 memset(&data, 0, sizeof(data));
1009 cmd.opcode = MMC_BUSTEST_W;
1011 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1014 data.data = __DECONST(void *, p8);
1016 data.flags = MMC_DATA_WRITE;
1017 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1019 memset(&cmd, 0, sizeof(cmd));
1020 memset(&data, 0, sizeof(data));
1021 cmd.opcode = MMC_BUSTEST_R;
1023 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1028 data.flags = MMC_DATA_READ;
1029 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1032 mmcbr_set_bus_width(sc->dev, bus_width_1);
1033 mmcbr_update_ios(sc->dev);
1035 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
1036 return (bus_width_8);
1039 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
1040 mmcbr_set_bus_width(sc->dev, bus_width_4);
1041 mmcbr_update_ios(sc->dev);
1043 sc->squelched++; /* Errors are expected, squelch reporting. */
1044 memset(&cmd, 0, sizeof(cmd));
1045 memset(&data, 0, sizeof(data));
1046 cmd.opcode = MMC_BUSTEST_W;
1048 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1051 data.data = __DECONST(void *, p4);
1053 data.flags = MMC_DATA_WRITE;
1054 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1056 memset(&cmd, 0, sizeof(cmd));
1057 memset(&data, 0, sizeof(data));
1058 cmd.opcode = MMC_BUSTEST_R;
1060 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1065 data.flags = MMC_DATA_READ;
1066 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1069 mmcbr_set_bus_width(sc->dev, bus_width_1);
1070 mmcbr_update_ios(sc->dev);
1072 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
1073 return (bus_width_4);
1075 return (bus_width_1);
1079 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
1081 const int i = (bit_len / 32) - (start / 32) - 1;
1082 const int shift = start & 31;
1083 uint32_t retval = bits[i] >> shift;
1085 if (size + shift > 32)
1086 retval |= bits[i - 1] << (32 - shift);
1087 return (retval & ((1llu << size) - 1));
1091 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
1095 /* There's no version info, so we take it on faith */
1096 memset(cid, 0, sizeof(*cid));
1097 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1098 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
1099 for (i = 0; i < 5; i++)
1100 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1102 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
1103 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
1104 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
1105 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
1109 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p)
1113 /* There's no version info, so we take it on faith */
1114 memset(cid, 0, sizeof(*cid));
1115 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1116 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
1117 for (i = 0; i < 6; i++)
1118 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1120 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
1121 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
1122 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
1123 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
1125 cid->mdt_year += 2013;
1127 cid->mdt_year += 1997;
1131 mmc_format_card_id_string(struct mmc_ivars *ivar)
1138 * Format a card ID string for use by the mmcsd driver, it's what
1139 * appears between the <> in the following:
1140 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0
1141 * 22.5MHz/4bit/128-block
1143 * Also format just the card serial number, which the mmcsd driver will
1144 * use as the disk->d_ident string.
1146 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1147 * and our max formatted length is currently 55 bytes if every field
1148 * contains the largest value.
1150 * Sometimes the oid is two printable ascii chars; when it's not,
1151 * format it as 0xnnnn instead.
1153 c1 = (ivar->cid.oid >> 8) & 0x0ff;
1154 c2 = ivar->cid.oid & 0x0ff;
1155 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1156 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1158 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1159 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1160 "%08X", ivar->cid.psn);
1161 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1162 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1163 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1164 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1165 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1166 ivar->cid.mid, oidstr);
1169 static const int exp[8] = {
1170 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1173 static const int mant[16] = {
1174 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1177 static const int cur_min[8] = {
1178 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1181 static const int cur_max[8] = {
1182 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1186 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
1192 memset(csd, 0, sizeof(*csd));
1193 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1195 m = mmc_get_bits(raw_csd, 128, 115, 4);
1196 e = mmc_get_bits(raw_csd, 128, 112, 3);
1197 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1198 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1199 m = mmc_get_bits(raw_csd, 128, 99, 4);
1200 e = mmc_get_bits(raw_csd, 128, 96, 3);
1201 csd->tran_speed = exp[e] * 10000 * mant[m];
1202 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1203 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1204 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1205 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1206 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1207 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1208 csd->vdd_r_curr_min =
1209 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1210 csd->vdd_r_curr_max =
1211 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1212 csd->vdd_w_curr_min =
1213 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1214 csd->vdd_w_curr_max =
1215 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1216 m = mmc_get_bits(raw_csd, 128, 62, 12);
1217 e = mmc_get_bits(raw_csd, 128, 47, 3);
1218 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1219 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1220 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1221 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1222 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1223 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1224 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1225 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1226 return (MMC_ERR_NONE);
1227 } else if (v == 1) {
1228 m = mmc_get_bits(raw_csd, 128, 115, 4);
1229 e = mmc_get_bits(raw_csd, 128, 112, 3);
1230 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1231 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1232 m = mmc_get_bits(raw_csd, 128, 99, 4);
1233 e = mmc_get_bits(raw_csd, 128, 96, 3);
1234 csd->tran_speed = exp[e] * 10000 * mant[m];
1235 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1236 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1237 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1238 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1239 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1240 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1241 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1243 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1244 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1245 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1246 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1247 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1248 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1249 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1250 return (MMC_ERR_NONE);
1252 return (MMC_ERR_INVALID);
1256 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
1261 memset(csd, 0, sizeof(*csd));
1262 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1263 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1264 m = mmc_get_bits(raw_csd, 128, 115, 4);
1265 e = mmc_get_bits(raw_csd, 128, 112, 3);
1266 csd->tacc = exp[e] * mant[m] + 9 / 10;
1267 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1268 m = mmc_get_bits(raw_csd, 128, 99, 4);
1269 e = mmc_get_bits(raw_csd, 128, 96, 3);
1270 csd->tran_speed = exp[e] * 10000 * mant[m];
1271 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1272 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1273 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1274 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1275 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1276 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1277 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1278 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1279 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1280 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1281 m = mmc_get_bits(raw_csd, 128, 62, 12);
1282 e = mmc_get_bits(raw_csd, 128, 47, 3);
1283 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1284 csd->erase_blk_en = 0;
1285 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1286 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1287 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1288 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1289 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1290 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1291 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1295 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
1297 unsigned int scr_struct;
1299 memset(scr, 0, sizeof(*scr));
1301 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1302 if (scr_struct != 0) {
1303 printf("Unrecognised SCR structure version %d\n",
1307 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1308 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1312 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1313 struct mmc_sd_status *sd_status)
1316 memset(sd_status, 0, sizeof(*sd_status));
1318 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1319 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1320 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1321 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1322 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1323 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1324 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1325 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1326 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1327 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1331 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
1333 struct mmc_command cmd;
1336 memset(&cmd, 0, sizeof(cmd));
1337 cmd.opcode = MMC_ALL_SEND_CID;
1339 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1341 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1342 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1347 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd)
1349 struct mmc_command cmd;
1352 memset(&cmd, 0, sizeof(cmd));
1353 cmd.opcode = MMC_SEND_CSD;
1354 cmd.arg = rca << 16;
1355 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1357 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1358 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1363 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
1366 struct mmc_command cmd;
1367 struct mmc_data data;
1369 memset(&cmd, 0, sizeof(cmd));
1370 memset(&data, 0, sizeof(data));
1372 memset(rawscr, 0, 8);
1373 cmd.opcode = ACMD_SEND_SCR;
1374 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1380 data.flags = MMC_DATA_READ;
1382 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1383 rawscr[0] = be32toh(rawscr[0]);
1384 rawscr[1] = be32toh(rawscr[1]);
1389 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1391 struct mmc_command cmd;
1392 struct mmc_data data;
1395 memset(&cmd, 0, sizeof(cmd));
1396 memset(&data, 0, sizeof(data));
1398 memset(rawsdstatus, 0, 64);
1399 cmd.opcode = ACMD_SD_STATUS;
1400 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1404 data.data = rawsdstatus;
1406 data.flags = MMC_DATA_READ;
1408 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1409 for (i = 0; i < 16; i++)
1410 rawsdstatus[i] = be32toh(rawsdstatus[i]);
1415 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1417 struct mmc_command cmd;
1420 memset(&cmd, 0, sizeof(cmd));
1421 cmd.opcode = MMC_SET_RELATIVE_ADDR;
1422 cmd.arg = resp << 16;
1423 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1425 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1430 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1432 struct mmc_command cmd;
1435 memset(&cmd, 0, sizeof(cmd));
1436 cmd.opcode = SD_SEND_RELATIVE_ADDR;
1438 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1440 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1441 *resp = cmd.resp[0];
1446 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1448 struct mmc_command cmd;
1451 memset(&cmd, 0, sizeof(cmd));
1452 cmd.opcode = MMC_SET_BLOCKLEN;
1454 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1456 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1461 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1465 case bus_timing_normal:
1466 return (ivar->tran_speed);
1468 return (ivar->hs_tran_speed);
1469 case bus_timing_uhs_sdr12:
1470 return (SD_SDR12_MAX);
1471 case bus_timing_uhs_sdr25:
1472 return (SD_SDR25_MAX);
1473 case bus_timing_uhs_ddr50:
1474 return (SD_DDR50_MAX);
1475 case bus_timing_uhs_sdr50:
1476 return (SD_SDR50_MAX);
1477 case bus_timing_uhs_sdr104:
1478 return (SD_SDR104_MAX);
1479 case bus_timing_mmc_ddr52:
1480 return (MMC_TYPE_DDR52_MAX);
1481 case bus_timing_mmc_hs200:
1482 case bus_timing_mmc_hs400:
1483 case bus_timing_mmc_hs400es:
1484 return (MMC_TYPE_HS200_HS400ES_MAX);
1490 mmc_timing_to_string(enum mmc_bus_timing timing)
1494 case bus_timing_normal:
1495 return ("normal speed");
1497 return ("high speed");
1498 case bus_timing_uhs_sdr12:
1499 case bus_timing_uhs_sdr25:
1500 case bus_timing_uhs_sdr50:
1501 case bus_timing_uhs_sdr104:
1502 return ("single data rate");
1503 case bus_timing_uhs_ddr50:
1504 case bus_timing_mmc_ddr52:
1505 return ("dual data rate");
1506 case bus_timing_mmc_hs200:
1508 case bus_timing_mmc_hs400:
1510 case bus_timing_mmc_hs400es:
1511 return ("HS400 with enhanced strobe");
1517 mmc_host_timing(device_t dev, enum mmc_bus_timing timing)
1521 host_caps = mmcbr_get_caps(dev);
1523 #define HOST_TIMING_CAP(host_caps, cap) ({ \
1525 if (((host_caps) & (cap)) == (cap)) \
1533 case bus_timing_normal:
1536 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED));
1537 case bus_timing_uhs_sdr12:
1538 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12));
1539 case bus_timing_uhs_sdr25:
1540 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25));
1541 case bus_timing_uhs_ddr50:
1542 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50));
1543 case bus_timing_uhs_sdr50:
1544 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50));
1545 case bus_timing_uhs_sdr104:
1546 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104));
1547 case bus_timing_mmc_ddr52:
1548 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52));
1549 case bus_timing_mmc_hs200:
1550 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200));
1551 case bus_timing_mmc_hs400:
1552 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400));
1553 case bus_timing_mmc_hs400es:
1554 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 |
1555 MMC_CAP_MMC_ENH_STROBE));
1558 #undef HOST_TIMING_CAP
1564 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1566 enum mmc_bus_timing max_timing, timing;
1568 device_printf(dev, "Card at relative address 0x%04x%s:\n",
1569 ivar->rca, newcard ? " added" : "");
1570 device_printf(dev, " card: %s\n", ivar->card_id_string);
1571 max_timing = bus_timing_normal;
1572 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1573 if (isset(&ivar->timings, timing)) {
1574 max_timing = timing;
1578 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT);
1579 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1580 (ivar->bus_width == bus_width_1 ? 1 :
1581 (ivar->bus_width == bus_width_4 ? 4 : 8)),
1582 mmc_timing_to_dtr(ivar, timing) / 1000000,
1583 mmc_timing_to_string(timing));
1584 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1585 ivar->sec_count, ivar->erase_sector,
1586 ivar->read_only ? ", read-only" : "");
1590 mmc_discover_cards(struct mmc_softc *sc)
1592 u_char switch_res[64];
1593 uint32_t raw_cid[4];
1594 struct mmc_ivars *ivar = NULL;
1595 const struct mmc_quirk *quirk;
1596 const uint8_t *ext_csd;
1598 int err, host_caps, i, newcard;
1599 uint32_t resp, sec_count, status;
1604 host_caps = mmcbr_get_caps(sc->dev);
1605 if (bootverbose || mmc_debug)
1606 device_printf(sc->dev, "Probing cards\n");
1609 sc->squelched++; /* Errors are expected, squelch reporting. */
1610 err = mmc_all_send_cid(sc, raw_cid);
1612 if (err == MMC_ERR_TIMEOUT)
1614 if (err != MMC_ERR_NONE) {
1615 device_printf(sc->dev, "Error reading CID %d\n", err);
1619 for (i = 0; i < sc->child_count; i++) {
1620 ivar = device_get_ivars(sc->child_list[i]);
1621 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1627 if (bootverbose || mmc_debug) {
1628 device_printf(sc->dev,
1629 "%sard detected (CID %08x%08x%08x%08x)\n",
1630 newcard ? "New c" : "C",
1631 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1634 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1636 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1638 if (mmcbr_get_ro(sc->dev))
1639 ivar->read_only = 1;
1640 ivar->bus_width = bus_width_1;
1641 setbit(&ivar->timings, bus_timing_normal);
1642 ivar->mode = mmcbr_get_mode(sc->dev);
1643 if (ivar->mode == mode_sd) {
1644 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1645 err = mmc_send_relative_addr(sc, &resp);
1646 if (err != MMC_ERR_NONE) {
1647 device_printf(sc->dev,
1648 "Error getting RCA %d\n", err);
1651 ivar->rca = resp >> 16;
1653 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1654 if (err != MMC_ERR_NONE) {
1655 device_printf(sc->dev,
1656 "Error getting CSD %d\n", err);
1659 if (bootverbose || mmc_debug)
1660 device_printf(sc->dev,
1661 "%sard detected (CSD %08x%08x%08x%08x)\n",
1662 newcard ? "New c" : "C", ivar->raw_csd[0],
1663 ivar->raw_csd[1], ivar->raw_csd[2],
1665 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1666 if (err != MMC_ERR_NONE) {
1667 device_printf(sc->dev, "Error decoding CSD\n");
1670 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1671 if (ivar->csd.csd_structure > 0)
1673 ivar->tran_speed = ivar->csd.tran_speed;
1674 ivar->erase_sector = ivar->csd.erase_sector *
1675 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1677 err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1679 if (err != MMC_ERR_NONE) {
1680 device_printf(sc->dev,
1681 "Error reading card status %d\n", err);
1684 if ((status & R1_CARD_IS_LOCKED) != 0) {
1685 device_printf(sc->dev,
1686 "Card is password protected, skipping\n");
1690 /* Get card SCR. Card must be selected to fetch it. */
1691 err = mmc_select_card(sc, ivar->rca);
1692 if (err != MMC_ERR_NONE) {
1693 device_printf(sc->dev,
1694 "Error selecting card %d\n", err);
1697 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1698 if (err != MMC_ERR_NONE) {
1699 device_printf(sc->dev,
1700 "Error reading SCR %d\n", err);
1703 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1704 /* Get card switch capabilities (command class 10). */
1705 if ((ivar->scr.sda_vsn >= 1) &&
1706 (ivar->csd.ccc & (1 << 10))) {
1707 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1708 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1710 if (err == MMC_ERR_NONE &&
1711 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1712 setbit(&ivar->timings, bus_timing_hs);
1713 ivar->hs_tran_speed = SD_HS_MAX;
1718 * We deselect then reselect the card here. Some cards
1719 * become unselected and timeout with the above two
1720 * commands, although the state tables / diagrams in the
1721 * standard suggest they go back to the transfer state.
1722 * Other cards don't become deselected, and if we
1723 * attempt to blindly re-select them, we get timeout
1724 * errors from some controllers. So we deselect then
1725 * reselect to handle all situations. The only thing we
1726 * use from the sd_status is the erase sector size, but
1727 * it is still nice to get that right.
1729 (void)mmc_select_card(sc, 0);
1730 (void)mmc_select_card(sc, ivar->rca);
1731 (void)mmc_app_sd_status(sc, ivar->rca,
1732 ivar->raw_sd_status);
1733 mmc_app_decode_sd_status(ivar->raw_sd_status,
1735 if (ivar->sd_status.au_size != 0) {
1736 ivar->erase_sector =
1737 16 << ivar->sd_status.au_size;
1739 /* Find maximum supported bus width. */
1740 if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1741 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1742 ivar->bus_width = bus_width_4;
1747 err = mmc_set_relative_addr(sc, ivar->rca);
1748 if (err != MMC_ERR_NONE) {
1749 device_printf(sc->dev, "Error setting RCA %d\n", err);
1753 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1754 if (err != MMC_ERR_NONE) {
1755 device_printf(sc->dev, "Error getting CSD %d\n", err);
1758 if (bootverbose || mmc_debug)
1759 device_printf(sc->dev,
1760 "%sard detected (CSD %08x%08x%08x%08x)\n",
1761 newcard ? "New c" : "C", ivar->raw_csd[0],
1762 ivar->raw_csd[1], ivar->raw_csd[2],
1765 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1766 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1767 ivar->tran_speed = ivar->csd.tran_speed;
1768 ivar->erase_sector = ivar->csd.erase_sector *
1769 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1771 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1772 if (err != MMC_ERR_NONE) {
1773 device_printf(sc->dev,
1774 "Error reading card status %d\n", err);
1777 if ((status & R1_CARD_IS_LOCKED) != 0) {
1778 device_printf(sc->dev,
1779 "Card is password protected, skipping\n");
1783 err = mmc_select_card(sc, ivar->rca);
1784 if (err != MMC_ERR_NONE) {
1785 device_printf(sc->dev, "Error selecting card %d\n",
1791 /* Only MMC >= 4.x devices support EXT_CSD. */
1792 if (ivar->csd.spec_vers >= 4) {
1793 err = mmc_send_ext_csd(sc->dev, sc->dev,
1795 if (err != MMC_ERR_NONE) {
1796 device_printf(sc->dev,
1797 "Error reading EXT_CSD %d\n", err);
1800 ext_csd = ivar->raw_ext_csd;
1801 rev = ext_csd[EXT_CSD_REV];
1802 /* Handle extended capacity from EXT_CSD */
1803 sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]);
1804 if (sec_count != 0) {
1805 ivar->sec_count = sec_count;
1808 /* Find maximum supported bus width. */
1809 ivar->bus_width = mmc_test_bus_width(sc);
1810 /* Get device speeds beyond normal mode. */
1811 card_type = ext_csd[EXT_CSD_CARD_TYPE];
1812 if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) {
1813 setbit(&ivar->timings, bus_timing_hs);
1814 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1815 } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) {
1816 setbit(&ivar->timings, bus_timing_hs);
1817 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1819 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1820 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1821 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1822 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1824 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1825 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1826 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1827 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1829 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 &&
1830 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1831 setbit(&ivar->timings, bus_timing_mmc_hs200);
1832 setbit(&ivar->vccq_120, bus_timing_mmc_hs200);
1834 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 &&
1835 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1836 setbit(&ivar->timings, bus_timing_mmc_hs200);
1837 setbit(&ivar->vccq_180, bus_timing_mmc_hs200);
1839 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1840 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1841 ivar->bus_width == bus_width_8) {
1842 setbit(&ivar->timings, bus_timing_mmc_hs400);
1843 setbit(&ivar->vccq_120, bus_timing_mmc_hs400);
1845 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1846 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1847 ivar->bus_width == bus_width_8) {
1848 setbit(&ivar->timings, bus_timing_mmc_hs400);
1849 setbit(&ivar->vccq_180, bus_timing_mmc_hs400);
1851 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1852 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1853 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1854 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1855 ivar->bus_width == bus_width_8) {
1856 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1857 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es);
1859 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1860 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1861 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1862 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1863 ivar->bus_width == bus_width_8) {
1864 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1865 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es);
1868 * Determine generic switch timeout (provided in
1869 * units of 10 ms), defaulting to 500 ms.
1871 ivar->cmd6_time = 500 * 1000;
1873 ivar->cmd6_time = 10 *
1874 ext_csd[EXT_CSD_GEN_CMD6_TIME];
1875 /* Handle HC erase sector size. */
1876 if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1877 ivar->erase_sector = 1024 *
1878 ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1879 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1880 EXT_CSD_CMD_SET_NORMAL,
1881 EXT_CSD_ERASE_GRP_DEF,
1882 EXT_CSD_ERASE_GRP_DEF_EN,
1883 ivar->cmd6_time, true);
1884 if (err != MMC_ERR_NONE) {
1885 device_printf(sc->dev,
1886 "Error setting erase group %d\n",
1893 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5);
1896 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) {
1897 if ((quirk->mid == MMC_QUIRK_MID_ANY ||
1898 quirk->mid == ivar->cid.mid) &&
1899 (quirk->oid == MMC_QUIRK_OID_ANY ||
1900 quirk->oid == ivar->cid.oid) &&
1901 strncmp(quirk->pnm, ivar->cid.pnm,
1902 sizeof(ivar->cid.pnm)) == 0) {
1903 ivar->quirks = quirk->quirks;
1909 * Some cards that report maximum I/O block sizes greater
1910 * than 512 require the block length to be set to 512, even
1911 * though that is supposed to be the default. Example:
1913 * Transcend 2GB SDSC card, CID:
1914 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1916 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1917 ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1918 mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1920 mmc_format_card_id_string(ivar);
1922 if (bootverbose || mmc_debug)
1923 mmc_log_card(sc->dev, ivar, newcard);
1926 child = device_add_child(sc->dev, NULL, -1);
1927 if (child != NULL) {
1928 device_set_ivars(child, ivar);
1929 sc->child_list = realloc(sc->child_list,
1930 sizeof(device_t) * sc->child_count + 1,
1931 M_DEVBUF, M_WAITOK);
1932 sc->child_list[sc->child_count++] = child;
1934 device_printf(sc->dev, "Error adding child\n");
1938 if (newcard && child == NULL)
1939 free(ivar, M_DEVBUF);
1940 (void)mmc_select_card(sc, 0);
1942 * Not returning here when one MMC device could no be added
1943 * potentially would mean looping forever when that device
1944 * is broken (in which case it also may impact the remainder
1945 * of the bus anyway, though).
1947 if ((newcard && child == NULL) ||
1948 mmcbr_get_mode(sc->dev) == mode_sd)
1954 mmc_update_child_list(struct mmc_softc *sc)
1959 if (sc->child_count == 0) {
1960 free(sc->child_list, M_DEVBUF);
1963 for (i = j = 0; i < sc->child_count; i++) {
1965 child = sc->child_list[j++];
1970 sc->child_list[i] = child;
1972 sc->child_list = realloc(sc->child_list, sizeof(device_t) *
1973 sc->child_count, M_DEVBUF, M_WAITOK);
1977 mmc_rescan_cards(struct mmc_softc *sc)
1979 struct mmc_ivars *ivar;
1982 for (i = j = 0; i < sc->child_count; i++) {
1983 ivar = device_get_ivars(sc->child_list[i]);
1984 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1985 if (bootverbose || mmc_debug)
1986 device_printf(sc->dev,
1987 "Card at relative address %d lost\n",
1989 err = device_delete_child(sc->dev, sc->child_list[i]);
1994 free(ivar, M_DEVBUF);
1998 if (sc->child_count == j)
2000 sc->child_count = j;
2001 mmc_update_child_list(sc);
2003 (void)mmc_select_card(sc, 0);
2007 mmc_delete_cards(struct mmc_softc *sc, bool final)
2009 struct mmc_ivars *ivar;
2013 for (i = j = 0; i < sc->child_count; i++) {
2014 ivar = device_get_ivars(sc->child_list[i]);
2015 if (bootverbose || mmc_debug)
2016 device_printf(sc->dev,
2017 "Card at relative address %d deleted\n",
2019 err = device_delete_child(sc->dev, sc->child_list[i]);
2027 free(ivar, M_DEVBUF);
2029 sc->child_count = j;
2030 mmc_update_child_list(sc);
2035 mmc_go_discovery(struct mmc_softc *sc)
2042 if (mmcbr_get_power_mode(dev) != power_on) {
2044 * First, try SD modes
2046 sc->squelched++; /* Errors are expected, squelch reporting. */
2047 mmcbr_set_mode(dev, mode_sd);
2049 mmcbr_set_bus_mode(dev, pushpull);
2050 if (bootverbose || mmc_debug)
2051 device_printf(sc->dev, "Probing bus\n");
2053 err = mmc_send_if_cond(sc, 1);
2054 if ((bootverbose || mmc_debug) && err == 0)
2055 device_printf(sc->dev,
2056 "SD 2.0 interface conditions: OK\n");
2057 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2058 if (bootverbose || mmc_debug)
2059 device_printf(sc->dev, "SD probe: failed\n");
2063 mmcbr_set_mode(dev, mode_mmc);
2064 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2065 if (bootverbose || mmc_debug)
2066 device_printf(sc->dev,
2067 "MMC probe: failed\n");
2068 ocr = 0; /* Failed both, powerdown. */
2069 } else if (bootverbose || mmc_debug)
2070 device_printf(sc->dev,
2071 "MMC probe: OK (OCR: 0x%08x)\n", ocr);
2072 } else if (bootverbose || mmc_debug)
2073 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
2077 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
2078 if (mmcbr_get_ocr(dev) != 0)
2081 mmcbr_set_bus_mode(dev, opendrain);
2082 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
2083 mmcbr_update_ios(dev);
2084 /* XXX recompute vdd based on new cards? */
2087 * Make sure that we have a mutually agreeable voltage to at least
2088 * one card on the bus.
2090 if (bootverbose || mmc_debug)
2091 device_printf(sc->dev, "Current OCR: 0x%08x\n",
2092 mmcbr_get_ocr(dev));
2093 if (mmcbr_get_ocr(dev) == 0) {
2094 device_printf(sc->dev, "No compatible cards found on bus\n");
2095 (void)mmc_delete_cards(sc, false);
2100 * Reselect the cards after we've idled them above.
2102 if (mmcbr_get_mode(dev) == mode_sd) {
2103 err = mmc_send_if_cond(sc, 1);
2104 mmc_send_app_op_cond(sc,
2105 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
2107 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
2108 mmc_discover_cards(sc);
2109 mmc_rescan_cards(sc);
2111 mmcbr_set_bus_mode(dev, pushpull);
2112 mmcbr_update_ios(dev);
2113 mmc_calculate_clock(sc);
2117 mmc_calculate_clock(struct mmc_softc *sc)
2120 struct mmc_ivars *ivar;
2122 uint32_t dtr, max_dtr;
2124 enum mmc_bus_timing max_timing, timing;
2125 bool changed, hs400;
2128 max_dtr = mmcbr_get_f_max(dev);
2129 max_timing = bus_timing_max;
2132 for (i = 0; i < sc->child_count; i++) {
2133 ivar = device_get_ivars(sc->child_list[i]);
2134 if (isclr(&ivar->timings, max_timing) ||
2135 !mmc_host_timing(dev, max_timing)) {
2136 for (timing = max_timing - 1; timing >=
2137 bus_timing_normal; timing--) {
2138 if (isset(&ivar->timings, timing) &&
2139 mmc_host_timing(dev, timing)) {
2140 max_timing = timing;
2146 dtr = mmc_timing_to_dtr(ivar, max_timing);
2147 if (dtr < max_dtr) {
2152 } while (changed == true);
2154 if (bootverbose || mmc_debug) {
2156 "setting transfer rate to %d.%03dMHz (%s timing)\n",
2157 max_dtr / 1000000, (max_dtr / 1000) % 1000,
2158 mmc_timing_to_string(max_timing));
2162 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin
2163 * with HS200 following the sequence as described in "6.6.2.2 HS200
2164 * timing mode selection" of the eMMC specification v5.1, too, and
2165 * switch to max_timing later. HS400ES requires no tuning and, thus,
2166 * can be switch to directly, but requires the same detour via high
2167 * speed mode as does HS400 (see mmc_switch_to_hs400()).
2169 hs400 = max_timing == bus_timing_mmc_hs400;
2170 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing;
2171 for (i = 0; i < sc->child_count; i++) {
2172 ivar = device_get_ivars(sc->child_list[i]);
2173 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
2177 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
2178 device_printf(dev, "Card at relative address %d "
2179 "failed to select\n", rca);
2183 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */
2184 timing == bus_timing_mmc_hs400es) {
2185 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2186 device_printf(dev, "Failed to set VCCQ for "
2187 "card at relative address %d\n", rca);
2192 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */
2193 /* Set bus width (required for initial tuning). */
2194 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2196 device_printf(dev, "Card at relative address "
2197 "%d failed to set bus width\n", rca);
2200 mmcbr_set_bus_width(dev, ivar->bus_width);
2201 mmcbr_update_ios(dev);
2202 } else if (timing == bus_timing_mmc_hs400es) {
2203 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) !=
2205 device_printf(dev, "Card at relative address "
2206 "%d failed to set %s timing\n", rca,
2207 mmc_timing_to_string(timing));
2213 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) {
2214 device_printf(dev, "Card at relative address %d "
2215 "failed to set %s timing\n", rca,
2216 mmc_timing_to_string(timing));
2220 if (timing == bus_timing_mmc_ddr52) {
2222 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH
2223 * (must be done after switching to EXT_CSD_HS_TIMING).
2225 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2227 device_printf(dev, "Card at relative address "
2228 "%d failed to set bus width\n", rca);
2231 mmcbr_set_bus_width(dev, ivar->bus_width);
2232 mmcbr_update_ios(dev);
2233 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2234 device_printf(dev, "Failed to set VCCQ for "
2235 "card at relative address %d\n", rca);
2241 /* Set clock (must be done before initial tuning). */
2242 mmcbr_set_clock(dev, max_dtr);
2243 mmcbr_update_ios(dev);
2245 if (mmcbr_tune(dev, hs400) != 0) {
2246 device_printf(dev, "Card at relative address %d "
2247 "failed to execute initial tuning\n", rca);
2251 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr,
2252 max_timing) != MMC_ERR_NONE) {
2253 device_printf(dev, "Card at relative address %d "
2254 "failed to set %s timing\n", rca,
2255 mmc_timing_to_string(max_timing));
2260 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
2261 device_printf(dev, "Card at relative address %d "
2262 "failed to set power class\n", rca);
2265 (void)mmc_select_card(sc, 0);
2270 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly
2271 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing
2272 * mode selection" of the eMMC specification v5.1.
2275 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
2276 uint32_t clock, enum mmc_bus_timing max_timing)
2286 * Both clock and timing must be set as appropriate for high speed
2287 * before eventually switching to HS400/HS400ES; mmc_set_timing()
2288 * will issue mmcbr_update_ios().
2290 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2291 err = mmc_set_timing(sc, ivar, bus_timing_hs);
2292 if (err != MMC_ERR_NONE)
2296 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally
2297 * EXT_CSD_BUS_WIDTH_ES for HS400ES).
2299 err = mmc_set_card_bus_width(sc, ivar, max_timing);
2300 if (err != MMC_ERR_NONE)
2302 mmcbr_set_bus_width(dev, ivar->bus_width);
2303 mmcbr_update_ios(dev);
2305 /* Finally, switch to HS400/HS400ES mode. */
2306 err = mmc_set_timing(sc, ivar, max_timing);
2307 if (err != MMC_ERR_NONE)
2309 mmcbr_set_clock(dev, clock);
2310 mmcbr_update_ios(dev);
2311 return (MMC_ERR_NONE);
2315 * Switch from HS400 to HS200 (for re-tuning).
2318 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
2329 * Both clock and timing must initially be set as appropriate for
2330 * DDR52 before eventually switching to HS200; mmc_set_timing()
2331 * will issue mmcbr_update_ios().
2333 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2334 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52);
2335 if (err != MMC_ERR_NONE)
2339 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR
2340 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios.
2342 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs);
2343 if (err != MMC_ERR_NONE)
2345 mmcbr_set_bus_width(dev, ivar->bus_width);
2346 mmcbr_set_timing(sc->dev, bus_timing_hs);
2347 mmcbr_update_ios(dev);
2349 /* Finally, switch to HS200 mode. */
2350 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200);
2351 if (err != MMC_ERR_NONE)
2353 mmcbr_set_clock(dev, clock);
2354 mmcbr_update_ios(dev);
2355 return (MMC_ERR_NONE);
2359 mmc_retune(device_t busdev, device_t dev, bool reset)
2361 struct mmc_softc *sc;
2362 struct mmc_ivars *ivar;
2365 enum mmc_bus_timing timing;
2367 if (device_get_parent(dev) != busdev)
2368 return (MMC_ERR_INVALID);
2370 sc = device_get_softc(busdev);
2371 if (sc->retune_needed != 1 && sc->retune_paused != 0)
2372 return (MMC_ERR_INVALID);
2374 timing = mmcbr_get_timing(busdev);
2375 if (timing == bus_timing_mmc_hs400) {
2377 * Controllers use the data strobe line to latch data from
2378 * the devices in HS400 mode so periodic re-tuning isn't
2379 * expected to be required, i. e. only if a CRC or tuning
2380 * error is signaled to the bridge. In these latter cases
2381 * we are asked to reset the tuning circuit and need to do
2382 * the switch timing dance.
2386 ivar = device_get_ivars(dev);
2387 clock = mmcbr_get_clock(busdev);
2388 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE)
2389 return (MMC_ERR_BADCRC);
2391 err = mmcbr_retune(busdev, reset);
2392 if (err != 0 && timing == bus_timing_mmc_hs400)
2393 return (MMC_ERR_BADCRC);
2398 return (MMC_ERR_FAILED);
2400 return (MMC_ERR_INVALID);
2402 if (timing == bus_timing_mmc_hs400) {
2403 if (mmc_switch_to_hs400(sc, ivar, clock, timing) !=
2405 return (MMC_ERR_BADCRC);
2407 return (MMC_ERR_NONE);
2411 mmc_retune_pause(device_t busdev, device_t dev, bool retune)
2413 struct mmc_softc *sc;
2415 sc = device_get_softc(busdev);
2416 KASSERT(device_get_parent(dev) == busdev,
2417 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2418 device_get_nameunit(busdev)));
2419 KASSERT(sc->owner != NULL,
2420 ("%s: Request from %s without bus being acquired.", __func__,
2421 device_get_nameunit(dev)));
2423 if (retune == true && sc->retune_paused == 0)
2424 sc->retune_needed = 1;
2425 sc->retune_paused++;
2429 mmc_retune_unpause(device_t busdev, device_t dev)
2431 struct mmc_softc *sc;
2433 sc = device_get_softc(busdev);
2434 KASSERT(device_get_parent(dev) == busdev,
2435 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2436 device_get_nameunit(busdev)));
2437 KASSERT(sc->owner != NULL,
2438 ("%s: Request from %s without bus being acquired.", __func__,
2439 device_get_nameunit(dev)));
2440 KASSERT(sc->retune_paused != 0,
2441 ("%s: Re-tune pause count already at 0", __func__));
2443 sc->retune_paused--;
2447 mmc_scan(struct mmc_softc *sc)
2449 device_t dev = sc->dev;
2452 err = mmc_acquire_bus(dev, dev);
2454 device_printf(dev, "Failed to acquire bus for scanning\n");
2457 mmc_go_discovery(sc);
2458 err = mmc_release_bus(dev, dev);
2460 device_printf(dev, "Failed to release bus after scanning\n");
2463 (void)bus_generic_attach(dev);
2467 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
2469 struct mmc_ivars *ivar = device_get_ivars(child);
2474 case MMC_IVAR_SPEC_VERS:
2475 *result = ivar->csd.spec_vers;
2477 case MMC_IVAR_DSR_IMP:
2478 *result = ivar->csd.dsr_imp;
2480 case MMC_IVAR_MEDIA_SIZE:
2481 *result = ivar->sec_count;
2484 *result = ivar->rca;
2486 case MMC_IVAR_SECTOR_SIZE:
2487 *result = MMC_SECTOR_SIZE;
2489 case MMC_IVAR_TRAN_SPEED:
2490 *result = mmcbr_get_clock(bus);
2492 case MMC_IVAR_READ_ONLY:
2493 *result = ivar->read_only;
2495 case MMC_IVAR_HIGH_CAP:
2496 *result = ivar->high_cap;
2498 case MMC_IVAR_CARD_TYPE:
2499 *result = ivar->mode;
2501 case MMC_IVAR_BUS_WIDTH:
2502 *result = ivar->bus_width;
2504 case MMC_IVAR_ERASE_SECTOR:
2505 *result = ivar->erase_sector;
2507 case MMC_IVAR_MAX_DATA:
2508 *result = mmcbr_get_max_data(bus);
2510 case MMC_IVAR_CMD6_TIMEOUT:
2511 *result = ivar->cmd6_time;
2513 case MMC_IVAR_QUIRKS:
2514 *result = ivar->quirks;
2516 case MMC_IVAR_CARD_ID_STRING:
2517 *(char **)result = ivar->card_id_string;
2519 case MMC_IVAR_CARD_SN_STRING:
2520 *(char **)result = ivar->card_sn_string;
2527 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
2531 * None are writable ATM
2537 mmc_delayed_attach(void *xsc)
2539 struct mmc_softc *sc = xsc;
2542 config_intrhook_disestablish(&sc->config_intrhook);
2546 mmc_child_location_str(device_t dev, device_t child, char *buf,
2550 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child));
2554 static device_method_t mmc_methods[] = {
2556 DEVMETHOD(device_probe, mmc_probe),
2557 DEVMETHOD(device_attach, mmc_attach),
2558 DEVMETHOD(device_detach, mmc_detach),
2559 DEVMETHOD(device_suspend, mmc_suspend),
2560 DEVMETHOD(device_resume, mmc_resume),
2563 DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2564 DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2565 DEVMETHOD(bus_child_location_str, mmc_child_location_str),
2567 /* MMC Bus interface */
2568 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause),
2569 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause),
2570 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2571 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2572 DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2577 driver_t mmc_driver = {
2580 sizeof(struct mmc_softc),
2582 devclass_t mmc_devclass;
2584 MODULE_VERSION(mmc, MMC_VERSION);