2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2006 Bernd Walter. All rights reserved.
5 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
6 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Portions of this software may have been developed with reference to
29 * the SD Simplified Specification. The following disclaimer may apply:
31 * The following conditions apply to the release of the simplified
32 * specification ("Simplified Specification") by the SD Card Association and
33 * the SD Group. The Simplified Specification is a subset of the complete SD
34 * Specification which is owned by the SD Card Association and the SD
35 * Group. This Simplified Specification is provided on a non-confidential
36 * basis subject to the disclaimers below. Any implementation of the
37 * Simplified Specification may require a license from the SD Card
38 * Association, SD Group, SD-3C LLC or other third parties.
42 * The information contained in the Simplified Specification is presented only
43 * as a standard specification for SD Cards and SD Host/Ancillary products and
44 * is provided "AS-IS" without any representations or warranties of any
45 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
46 * Card Association for any damages, any infringements of patents or other
47 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
48 * parties, which may result from its use. No license is granted by
49 * implication, estoppel or otherwise under any patent or other rights of the
50 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
51 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
52 * or the SD Card Association to disclose or distribute any technical
53 * information, know-how or other confidential information to any third party.
56 #include <sys/cdefs.h>
57 __FBSDID("$FreeBSD$");
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/kernel.h>
62 #include <sys/malloc.h>
64 #include <sys/module.h>
65 #include <sys/mutex.h>
67 #include <sys/endian.h>
68 #include <sys/sysctl.h>
71 #include <dev/mmc/bridge.h>
72 #include <dev/mmc/mmc_private.h>
73 #include <dev/mmc/mmc_subr.h>
74 #include <dev/mmc/mmcreg.h>
75 #include <dev/mmc/mmcbrvar.h>
76 #include <dev/mmc/mmcvar.h>
79 #include "mmcbus_if.h"
81 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
87 uint32_t raw_cid[4]; /* Raw bits of the CID */
88 uint32_t raw_csd[4]; /* Raw bits of the CSD */
89 uint32_t raw_scr[2]; /* Raw bits of the SCR */
90 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
91 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
93 u_char read_only; /* True when the device is read-only */
94 u_char high_cap; /* High Capacity device (block addressed) */
95 enum mmc_card_mode mode;
96 enum mmc_bus_width bus_width; /* Bus width to use */
97 struct mmc_cid cid; /* cid decoded */
98 struct mmc_csd csd; /* csd decoded */
99 struct mmc_scr scr; /* scr decoded */
100 struct mmc_sd_status sd_status; /* SD_STATUS decoded */
101 uint32_t sec_count; /* Card capacity in 512byte blocks */
102 uint32_t timings; /* Mask of bus timings supported */
103 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
104 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
105 uint32_t tran_speed; /* Max speed in normal mode */
106 uint32_t hs_tran_speed; /* Max speed in high speed mode */
107 uint32_t erase_sector; /* Card native erase sector size */
108 uint32_t cmd6_time; /* Generic switch timeout [us] */
109 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */
110 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
111 char card_sn_string[16];/* Formatted serial # for disk->d_ident */
114 #define CMD_RETRIES 3
116 static const struct mmc_quirk mmc_quirks[] = {
118 * For some SanDisk iNAND devices, the CMD38 argument needs to be
119 * provided in EXT_CSD[113].
121 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 },
122 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 },
123 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 },
124 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 },
125 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 },
128 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to
129 * unrecoverable data corruption.
131 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM },
132 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM },
133 { 0x0, 0x0, NULL, 0x0 }
136 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
139 static int mmc_debug;
140 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
143 /* bus entry points */
144 static int mmc_acquire_bus(device_t busdev, device_t dev);
145 static int mmc_attach(device_t dev);
146 static int mmc_child_location_str(device_t dev, device_t child, char *buf,
148 static int mmc_detach(device_t dev);
149 static int mmc_probe(device_t dev);
150 static int mmc_read_ivar(device_t bus, device_t child, int which,
152 static int mmc_release_bus(device_t busdev, device_t dev);
153 static int mmc_resume(device_t dev);
154 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune);
155 static void mmc_retune_unpause(device_t busdev, device_t dev);
156 static int mmc_suspend(device_t dev);
157 static int mmc_wait_for_request(device_t busdev, device_t dev,
158 struct mmc_request *req);
159 static int mmc_write_ivar(device_t bus, device_t child, int which,
162 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
163 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
164 #define MMC_LOCK_INIT(_sc) \
165 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
167 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
168 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
169 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
171 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
172 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
173 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
174 struct mmc_sd_status *sd_status);
175 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
176 uint32_t *rawsdstatus);
177 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
179 static int mmc_calculate_clock(struct mmc_softc *sc);
180 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid,
182 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid);
183 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd);
184 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd);
185 static void mmc_delayed_attach(void *xsc);
186 static int mmc_delete_cards(struct mmc_softc *sc, bool final);
187 static void mmc_discover_cards(struct mmc_softc *sc);
188 static void mmc_format_card_id_string(struct mmc_ivars *ivar);
189 static void mmc_go_discovery(struct mmc_softc *sc);
190 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
192 static int mmc_highest_voltage(uint32_t ocr);
193 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing);
194 static void mmc_idle_cards(struct mmc_softc *sc);
195 static void mmc_ms_delay(int ms);
196 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
197 static void mmc_power_down(struct mmc_softc *sc);
198 static void mmc_power_up(struct mmc_softc *sc);
199 static void mmc_rescan_cards(struct mmc_softc *sc);
200 static int mmc_retune(device_t busdev, device_t dev, bool reset);
201 static void mmc_scan(struct mmc_softc *sc);
202 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
203 uint8_t value, uint8_t *res);
204 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
205 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
206 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
208 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd);
209 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
210 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
212 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp);
213 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
214 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
215 enum mmc_bus_timing timing);
216 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar);
217 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
218 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
219 enum mmc_bus_timing timing);
220 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
221 enum mmc_bus_timing timing);
222 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
224 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
225 uint32_t max_dtr, enum mmc_bus_timing max_timing);
226 static int mmc_test_bus_width(struct mmc_softc *sc);
227 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
228 enum mmc_bus_timing timing);
229 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
230 static void mmc_update_child_list(struct mmc_softc *sc);
231 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
232 uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
233 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req);
234 static void mmc_wakeup(struct mmc_request *req);
240 DELAY(1000 * ms); /* XXX BAD */
244 mmc_probe(device_t dev)
247 device_set_desc(dev, "MMC/SD bus");
252 mmc_attach(device_t dev)
254 struct mmc_softc *sc;
256 sc = device_get_softc(dev);
260 /* We'll probe and attach our children later, but before / mount */
261 sc->config_intrhook.ich_func = mmc_delayed_attach;
262 sc->config_intrhook.ich_arg = sc;
263 if (config_intrhook_establish(&sc->config_intrhook) != 0)
264 device_printf(dev, "config_intrhook_establish failed\n");
269 mmc_detach(device_t dev)
271 struct mmc_softc *sc = device_get_softc(dev);
274 err = mmc_delete_cards(sc, true);
278 MMC_LOCK_DESTROY(sc);
284 mmc_suspend(device_t dev)
286 struct mmc_softc *sc = device_get_softc(dev);
289 err = bus_generic_suspend(dev);
293 * We power down with the bus acquired here, mainly so that no device
294 * is selected any longer and sc->last_rca gets set to 0. Otherwise,
295 * the deselect as part of the bus acquisition in mmc_scan() may fail
296 * during resume, as the bus isn't powered up again before later in
297 * mmc_go_discovery().
299 err = mmc_acquire_bus(dev, dev);
303 err = mmc_release_bus(dev, dev);
308 mmc_resume(device_t dev)
310 struct mmc_softc *sc = device_get_softc(dev);
313 return (bus_generic_resume(dev));
317 mmc_acquire_bus(device_t busdev, device_t dev)
319 struct mmc_softc *sc;
320 struct mmc_ivars *ivar;
323 enum mmc_bus_timing timing;
325 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
328 sc = device_get_softc(busdev);
331 panic("mmc: host bridge didn't serialize us.");
337 * Keep track of the last rca that we've selected. If
338 * we're asked to do it again, don't. We never
339 * unselect unless the bus code itself wants the mmc
340 * bus, and constantly reselecting causes problems.
342 ivar = device_get_ivars(dev);
344 if (sc->last_rca != rca) {
345 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
346 device_printf(busdev, "Card at relative "
347 "address %d failed to select\n", rca);
351 timing = mmcbr_get_timing(busdev);
353 * For eMMC modes, setting/updating bus width and VCCQ
354 * only really is necessary if there actually is more
355 * than one device on the bus as generally that already
356 * had to be done by mmc_calculate_clock() or one of
357 * its calees. Moreover, setting the bus width anew
358 * can trigger re-tuning (via a CRC error on the next
359 * CMD), even if not switching between devices an the
360 * previously selected one is still tuned. Obviously,
361 * we need to re-tune the host controller if devices
362 * are actually switched, though.
364 if (timing >= bus_timing_mmc_ddr52 &&
365 sc->child_count == 1)
367 /* Prepare bus width for the new card. */
368 if (bootverbose || mmc_debug) {
369 device_printf(busdev,
370 "setting bus width to %d bits %s timing\n",
371 (ivar->bus_width == bus_width_4) ? 4 :
372 (ivar->bus_width == bus_width_8) ? 8 : 1,
373 mmc_timing_to_string(timing));
375 if (mmc_set_card_bus_width(sc, ivar, timing) !=
377 device_printf(busdev, "Card at relative "
378 "address %d failed to set bus width\n",
382 mmcbr_set_bus_width(busdev, ivar->bus_width);
383 mmcbr_update_ios(busdev);
384 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
385 device_printf(busdev, "Failed to set VCCQ "
386 "for card at relative address %d\n", rca);
389 if (timing >= bus_timing_mmc_hs200 &&
390 mmc_retune(busdev, dev, true) != 0) {
391 device_printf(busdev, "Card at relative "
392 "address %d failed to re-tune\n", rca);
398 * If there's a card selected, stand down.
400 if (sc->last_rca != 0) {
401 if (mmc_select_card(sc, 0) != MMC_ERR_NONE)
411 mmc_release_bus(device_t busdev, device_t dev)
413 struct mmc_softc *sc;
416 sc = device_get_softc(busdev);
420 panic("mmc: releasing unowned bus.");
421 if (sc->owner != dev)
422 panic("mmc: you don't own the bus. game over.");
424 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
434 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
437 return (ocr & MMC_OCR_VOLTAGE);
441 mmc_highest_voltage(uint32_t ocr)
445 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
446 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
453 mmc_wakeup(struct mmc_request *req)
455 struct mmc_softc *sc;
457 sc = (struct mmc_softc *)req->done_data;
459 req->flags |= MMC_REQ_DONE;
465 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
468 req->done = mmc_wakeup;
470 if (__predict_false(mmc_debug > 1)) {
471 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
472 req->cmd->opcode, req->cmd->arg, req->cmd->flags);
473 if (req->cmd->data) {
474 printf(" data %d\n", (int)req->cmd->data->len);
478 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
480 while ((req->flags & MMC_REQ_DONE) == 0)
481 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
483 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 &&
484 req->cmd->error != MMC_ERR_NONE)))
485 device_printf(sc->dev, "CMD%d RESULT: %d\n",
486 req->cmd->opcode, req->cmd->error);
491 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req)
493 struct mmc_softc *sc;
494 struct mmc_ivars *ivar;
496 enum mmc_retune_req retune_req;
498 sc = device_get_softc(busdev);
499 KASSERT(sc->owner != NULL,
500 ("%s: Request from %s without bus being acquired.", __func__,
501 device_get_nameunit(dev)));
504 * Unless no device is selected or re-tuning is already ongoing,
505 * execute re-tuning if a) the bridge is requesting to do so and
506 * re-tuning hasn't been otherwise paused, or b) if a child asked
507 * to be re-tuned prior to pausing (see also mmc_retune_pause()).
509 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 &&
510 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none &&
511 sc->retune_paused == 0) || sc->retune_needed == 1))) {
512 if (__predict_false(mmc_debug > 1)) {
513 device_printf(busdev,
514 "Re-tuning with%s circuit reset required\n",
515 retune_req == retune_req_reset ? "" : "out");
517 if (device_get_parent(dev) == busdev)
518 ivar = device_get_ivars(dev);
520 for (i = 0; i < sc->child_count; i++) {
521 ivar = device_get_ivars(sc->child_list[i]);
522 if (ivar->rca == sc->last_rca)
525 if (ivar->rca != sc->last_rca)
528 sc->retune_ongoing = 1;
529 err = mmc_retune(busdev, dev, retune_req == retune_req_reset);
530 sc->retune_ongoing = 0;
533 case MMC_ERR_FAILED: /* Re-tune error but still might work */
535 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */
537 case MMC_ERR_INVALID: /* Driver implementation b0rken */
538 default: /* Unknown error, should not happen */
541 sc->retune_needed = 0;
543 return (mmc_wait_for_req(sc, req));
547 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
548 uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
550 struct mmc_command cmd;
553 memset(&cmd, 0, sizeof(cmd));
558 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
562 if (flags & MMC_RSP_136)
563 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
571 mmc_idle_cards(struct mmc_softc *sc)
574 struct mmc_command cmd;
577 mmcbr_set_chip_select(dev, cs_high);
578 mmcbr_update_ios(dev);
581 memset(&cmd, 0, sizeof(cmd));
582 cmd.opcode = MMC_GO_IDLE_STATE;
584 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
586 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
589 mmcbr_set_chip_select(dev, cs_dontcare);
590 mmcbr_update_ios(dev);
595 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
597 struct mmc_command cmd;
598 int err = MMC_ERR_NONE, i;
600 memset(&cmd, 0, sizeof(cmd));
601 cmd.opcode = ACMD_SD_SEND_OP_COND;
603 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
606 for (i = 0; i < 1000; i++) {
607 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
609 if (err != MMC_ERR_NONE)
611 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
612 (ocr & MMC_OCR_VOLTAGE) == 0)
614 err = MMC_ERR_TIMEOUT;
617 if (rocr && err == MMC_ERR_NONE)
623 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
625 struct mmc_command cmd;
626 int err = MMC_ERR_NONE, i;
628 memset(&cmd, 0, sizeof(cmd));
629 cmd.opcode = MMC_SEND_OP_COND;
631 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
634 for (i = 0; i < 1000; i++) {
635 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
636 if (err != MMC_ERR_NONE)
638 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
639 (ocr & MMC_OCR_VOLTAGE) == 0)
641 err = MMC_ERR_TIMEOUT;
644 if (rocr && err == MMC_ERR_NONE)
650 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
652 struct mmc_command cmd;
655 memset(&cmd, 0, sizeof(cmd));
656 cmd.opcode = SD_SEND_IF_COND;
657 cmd.arg = (vhs << 8) + 0xAA;
658 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
661 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
666 mmc_power_up(struct mmc_softc *sc)
672 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
673 mmcbr_set_bus_mode(dev, opendrain);
674 mmcbr_set_chip_select(dev, cs_dontcare);
675 mmcbr_set_bus_width(dev, bus_width_1);
676 mmcbr_set_power_mode(dev, power_up);
677 mmcbr_set_clock(dev, 0);
678 mmcbr_update_ios(dev);
679 for (vccq = vccq_330; ; vccq--) {
680 mmcbr_set_vccq(dev, vccq);
681 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120)
686 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
687 mmcbr_set_timing(dev, bus_timing_normal);
688 mmcbr_set_power_mode(dev, power_on);
689 mmcbr_update_ios(dev);
694 mmc_power_down(struct mmc_softc *sc)
696 device_t dev = sc->dev;
698 mmcbr_set_bus_mode(dev, opendrain);
699 mmcbr_set_chip_select(dev, cs_dontcare);
700 mmcbr_set_bus_width(dev, bus_width_1);
701 mmcbr_set_power_mode(dev, power_off);
702 mmcbr_set_clock(dev, 0);
703 mmcbr_set_timing(dev, bus_timing_normal);
704 mmcbr_update_ios(dev);
708 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
712 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
714 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
715 flags, NULL, CMD_RETRIES);
721 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
725 struct mmc_command cmd;
726 struct mmc_data data;
728 memset(&cmd, 0, sizeof(cmd));
729 memset(&data, 0, sizeof(data));
732 cmd.opcode = SD_SWITCH_FUNC;
733 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
734 cmd.arg = mode << 31; /* 0 - check, 1 - set */
735 cmd.arg |= 0x00FFFFFF;
736 cmd.arg &= ~(0xF << (grp * 4));
737 cmd.arg |= value << (grp * 4);
742 data.flags = MMC_DATA_READ;
744 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
749 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
750 enum mmc_bus_timing timing)
752 struct mmc_command cmd;
756 if (mmcbr_get_mode(sc->dev) == mode_sd) {
757 memset(&cmd, 0, sizeof(cmd));
758 cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
759 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
760 cmd.arg = SD_CLR_CARD_DETECT;
761 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
765 memset(&cmd, 0, sizeof(cmd));
766 cmd.opcode = ACMD_SET_BUS_WIDTH;
767 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
768 switch (ivar->bus_width) {
770 cmd.arg = SD_BUS_WIDTH_1;
773 cmd.arg = SD_BUS_WIDTH_4;
776 return (MMC_ERR_INVALID);
778 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
781 switch (ivar->bus_width) {
783 if (timing == bus_timing_mmc_hs400 ||
784 timing == bus_timing_mmc_hs400es)
785 return (MMC_ERR_INVALID);
786 value = EXT_CSD_BUS_WIDTH_1;
790 case bus_timing_mmc_ddr52:
791 value = EXT_CSD_BUS_WIDTH_4_DDR;
793 case bus_timing_mmc_hs400:
794 case bus_timing_mmc_hs400es:
795 return (MMC_ERR_INVALID);
797 value = EXT_CSD_BUS_WIDTH_4;
804 case bus_timing_mmc_hs400es:
805 value = EXT_CSD_BUS_WIDTH_ES;
807 case bus_timing_mmc_ddr52:
808 case bus_timing_mmc_hs400:
809 value |= EXT_CSD_BUS_WIDTH_8_DDR;
812 value = EXT_CSD_BUS_WIDTH_8;
817 return (MMC_ERR_INVALID);
819 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
820 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
821 ivar->cmd6_time, true);
827 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar)
830 const uint8_t *ext_csd;
833 enum mmc_bus_timing timing;
834 enum mmc_bus_width bus_width;
837 timing = mmcbr_get_timing(dev);
838 bus_width = ivar->bus_width;
839 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 ||
840 timing == bus_timing_normal || bus_width == bus_width_1)
841 return (MMC_ERR_NONE);
844 ext_csd = ivar->raw_ext_csd;
845 clock = mmcbr_get_clock(dev);
846 switch (1 << mmcbr_get_vdd(dev)) {
847 case MMC_OCR_LOW_VOLTAGE:
848 if (clock <= MMC_TYPE_HS_26_MAX)
849 value = ext_csd[EXT_CSD_PWR_CL_26_195];
850 else if (clock <= MMC_TYPE_HS_52_MAX) {
851 if (timing >= bus_timing_mmc_ddr52 &&
852 bus_width >= bus_width_4)
853 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
855 value = ext_csd[EXT_CSD_PWR_CL_52_195];
856 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
857 value = ext_csd[EXT_CSD_PWR_CL_200_195];
859 case MMC_OCR_270_280:
860 case MMC_OCR_280_290:
861 case MMC_OCR_290_300:
862 case MMC_OCR_300_310:
863 case MMC_OCR_310_320:
864 case MMC_OCR_320_330:
865 case MMC_OCR_330_340:
866 case MMC_OCR_340_350:
867 case MMC_OCR_350_360:
868 if (clock <= MMC_TYPE_HS_26_MAX)
869 value = ext_csd[EXT_CSD_PWR_CL_26_360];
870 else if (clock <= MMC_TYPE_HS_52_MAX) {
871 if (timing == bus_timing_mmc_ddr52 &&
872 bus_width >= bus_width_4)
873 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
875 value = ext_csd[EXT_CSD_PWR_CL_52_360];
876 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
877 if (bus_width == bus_width_8)
878 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
880 value = ext_csd[EXT_CSD_PWR_CL_200_360];
884 device_printf(dev, "No power class support for VDD 0x%x\n",
885 1 << mmcbr_get_vdd(dev));
886 return (MMC_ERR_INVALID);
889 if (bus_width == bus_width_8)
890 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
891 EXT_CSD_POWER_CLASS_8BIT_SHIFT;
893 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
894 EXT_CSD_POWER_CLASS_4BIT_SHIFT;
897 return (MMC_ERR_NONE);
899 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
900 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
904 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
905 enum mmc_bus_timing timing)
907 u_char switch_res[64];
911 if (mmcbr_get_mode(sc->dev) == mode_sd) {
913 case bus_timing_normal:
914 value = SD_SWITCH_NORMAL_MODE;
917 value = SD_SWITCH_HS_MODE;
920 return (MMC_ERR_INVALID);
922 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
924 if (err != MMC_ERR_NONE)
926 if ((switch_res[16] & 0xf) != value)
927 return (MMC_ERR_FAILED);
928 mmcbr_set_timing(sc->dev, timing);
929 mmcbr_update_ios(sc->dev);
932 case bus_timing_normal:
933 value = EXT_CSD_HS_TIMING_BC;
936 case bus_timing_mmc_ddr52:
937 value = EXT_CSD_HS_TIMING_HS;
939 case bus_timing_mmc_hs200:
940 value = EXT_CSD_HS_TIMING_HS200;
942 case bus_timing_mmc_hs400:
943 case bus_timing_mmc_hs400es:
944 value = EXT_CSD_HS_TIMING_HS400;
947 return (MMC_ERR_INVALID);
949 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
950 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
951 ivar->cmd6_time, false);
952 if (err != MMC_ERR_NONE)
954 mmcbr_set_timing(sc->dev, timing);
955 mmcbr_update_ios(sc->dev);
956 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
963 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
964 enum mmc_bus_timing timing)
967 if (isset(&ivar->vccq_120, timing))
968 mmcbr_set_vccq(sc->dev, vccq_120);
969 else if (isset(&ivar->vccq_180, timing))
970 mmcbr_set_vccq(sc->dev, vccq_180);
972 mmcbr_set_vccq(sc->dev, vccq_330);
973 if (mmcbr_switch_vccq(sc->dev) != 0)
974 return (MMC_ERR_INVALID);
976 return (MMC_ERR_NONE);
979 static const uint8_t p8[8] = {
980 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
983 static const uint8_t p8ok[8] = {
984 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
987 static const uint8_t p4[4] = {
988 0x5A, 0x00, 0x00, 0x00
991 static const uint8_t p4ok[4] = {
992 0xA5, 0x00, 0x00, 0x00
996 mmc_test_bus_width(struct mmc_softc *sc)
998 struct mmc_command cmd;
999 struct mmc_data data;
1003 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
1004 mmcbr_set_bus_width(sc->dev, bus_width_8);
1005 mmcbr_update_ios(sc->dev);
1007 sc->squelched++; /* Errors are expected, squelch reporting. */
1008 memset(&cmd, 0, sizeof(cmd));
1009 memset(&data, 0, sizeof(data));
1010 cmd.opcode = MMC_BUSTEST_W;
1012 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1015 data.data = __DECONST(void *, p8);
1017 data.flags = MMC_DATA_WRITE;
1018 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1020 memset(&cmd, 0, sizeof(cmd));
1021 memset(&data, 0, sizeof(data));
1022 cmd.opcode = MMC_BUSTEST_R;
1024 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1029 data.flags = MMC_DATA_READ;
1030 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1033 mmcbr_set_bus_width(sc->dev, bus_width_1);
1034 mmcbr_update_ios(sc->dev);
1036 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
1037 return (bus_width_8);
1040 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
1041 mmcbr_set_bus_width(sc->dev, bus_width_4);
1042 mmcbr_update_ios(sc->dev);
1044 sc->squelched++; /* Errors are expected, squelch reporting. */
1045 memset(&cmd, 0, sizeof(cmd));
1046 memset(&data, 0, sizeof(data));
1047 cmd.opcode = MMC_BUSTEST_W;
1049 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1052 data.data = __DECONST(void *, p4);
1054 data.flags = MMC_DATA_WRITE;
1055 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1057 memset(&cmd, 0, sizeof(cmd));
1058 memset(&data, 0, sizeof(data));
1059 cmd.opcode = MMC_BUSTEST_R;
1061 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1066 data.flags = MMC_DATA_READ;
1067 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1070 mmcbr_set_bus_width(sc->dev, bus_width_1);
1071 mmcbr_update_ios(sc->dev);
1073 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
1074 return (bus_width_4);
1076 return (bus_width_1);
1080 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
1082 const int i = (bit_len / 32) - (start / 32) - 1;
1083 const int shift = start & 31;
1084 uint32_t retval = bits[i] >> shift;
1086 if (size + shift > 32)
1087 retval |= bits[i - 1] << (32 - shift);
1088 return (retval & ((1llu << size) - 1));
1092 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
1096 /* There's no version info, so we take it on faith */
1097 memset(cid, 0, sizeof(*cid));
1098 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1099 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
1100 for (i = 0; i < 5; i++)
1101 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1103 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
1104 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
1105 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
1106 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
1110 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p)
1114 /* There's no version info, so we take it on faith */
1115 memset(cid, 0, sizeof(*cid));
1116 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1117 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
1118 for (i = 0; i < 6; i++)
1119 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1121 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
1122 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
1123 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
1124 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
1126 cid->mdt_year += 2013;
1128 cid->mdt_year += 1997;
1132 mmc_format_card_id_string(struct mmc_ivars *ivar)
1139 * Format a card ID string for use by the mmcsd driver, it's what
1140 * appears between the <> in the following:
1141 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0
1142 * 22.5MHz/4bit/128-block
1144 * Also format just the card serial number, which the mmcsd driver will
1145 * use as the disk->d_ident string.
1147 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1148 * and our max formatted length is currently 55 bytes if every field
1149 * contains the largest value.
1151 * Sometimes the oid is two printable ascii chars; when it's not,
1152 * format it as 0xnnnn instead.
1154 c1 = (ivar->cid.oid >> 8) & 0x0ff;
1155 c2 = ivar->cid.oid & 0x0ff;
1156 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1157 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1159 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1160 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1161 "%08X", ivar->cid.psn);
1162 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1163 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1164 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1165 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1166 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1167 ivar->cid.mid, oidstr);
1170 static const int exp[8] = {
1171 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1174 static const int mant[16] = {
1175 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1178 static const int cur_min[8] = {
1179 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1182 static const int cur_max[8] = {
1183 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1187 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
1193 memset(csd, 0, sizeof(*csd));
1194 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1196 m = mmc_get_bits(raw_csd, 128, 115, 4);
1197 e = mmc_get_bits(raw_csd, 128, 112, 3);
1198 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1199 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1200 m = mmc_get_bits(raw_csd, 128, 99, 4);
1201 e = mmc_get_bits(raw_csd, 128, 96, 3);
1202 csd->tran_speed = exp[e] * 10000 * mant[m];
1203 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1204 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1205 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1206 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1207 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1208 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1209 csd->vdd_r_curr_min =
1210 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1211 csd->vdd_r_curr_max =
1212 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1213 csd->vdd_w_curr_min =
1214 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1215 csd->vdd_w_curr_max =
1216 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1217 m = mmc_get_bits(raw_csd, 128, 62, 12);
1218 e = mmc_get_bits(raw_csd, 128, 47, 3);
1219 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1220 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1221 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1222 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1223 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1224 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1225 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1226 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1227 return (MMC_ERR_NONE);
1228 } else if (v == 1) {
1229 m = mmc_get_bits(raw_csd, 128, 115, 4);
1230 e = mmc_get_bits(raw_csd, 128, 112, 3);
1231 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1232 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1233 m = mmc_get_bits(raw_csd, 128, 99, 4);
1234 e = mmc_get_bits(raw_csd, 128, 96, 3);
1235 csd->tran_speed = exp[e] * 10000 * mant[m];
1236 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1237 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1238 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1239 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1240 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1241 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1242 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1244 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1245 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1246 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1247 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1248 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1249 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1250 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1251 return (MMC_ERR_NONE);
1253 return (MMC_ERR_INVALID);
1257 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
1262 memset(csd, 0, sizeof(*csd));
1263 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1264 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1265 m = mmc_get_bits(raw_csd, 128, 115, 4);
1266 e = mmc_get_bits(raw_csd, 128, 112, 3);
1267 csd->tacc = exp[e] * mant[m] + 9 / 10;
1268 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1269 m = mmc_get_bits(raw_csd, 128, 99, 4);
1270 e = mmc_get_bits(raw_csd, 128, 96, 3);
1271 csd->tran_speed = exp[e] * 10000 * mant[m];
1272 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1273 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1274 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1275 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1276 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1277 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1278 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1279 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1280 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1281 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1282 m = mmc_get_bits(raw_csd, 128, 62, 12);
1283 e = mmc_get_bits(raw_csd, 128, 47, 3);
1284 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1285 csd->erase_blk_en = 0;
1286 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1287 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1288 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1289 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1290 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1291 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1292 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1296 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
1298 unsigned int scr_struct;
1300 memset(scr, 0, sizeof(*scr));
1302 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1303 if (scr_struct != 0) {
1304 printf("Unrecognised SCR structure version %d\n",
1308 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1309 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1313 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1314 struct mmc_sd_status *sd_status)
1317 memset(sd_status, 0, sizeof(*sd_status));
1319 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1320 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1321 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1322 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1323 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1324 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1325 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1326 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1327 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1328 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1332 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
1334 struct mmc_command cmd;
1337 memset(&cmd, 0, sizeof(cmd));
1338 cmd.opcode = MMC_ALL_SEND_CID;
1340 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1342 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1343 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1348 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd)
1350 struct mmc_command cmd;
1353 memset(&cmd, 0, sizeof(cmd));
1354 cmd.opcode = MMC_SEND_CSD;
1355 cmd.arg = rca << 16;
1356 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1358 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1359 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1364 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
1367 struct mmc_command cmd;
1368 struct mmc_data data;
1370 memset(&cmd, 0, sizeof(cmd));
1371 memset(&data, 0, sizeof(data));
1373 memset(rawscr, 0, 8);
1374 cmd.opcode = ACMD_SEND_SCR;
1375 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1381 data.flags = MMC_DATA_READ;
1383 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1384 rawscr[0] = be32toh(rawscr[0]);
1385 rawscr[1] = be32toh(rawscr[1]);
1390 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1392 struct mmc_command cmd;
1393 struct mmc_data data;
1396 memset(&cmd, 0, sizeof(cmd));
1397 memset(&data, 0, sizeof(data));
1399 memset(rawsdstatus, 0, 64);
1400 cmd.opcode = ACMD_SD_STATUS;
1401 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1405 data.data = rawsdstatus;
1407 data.flags = MMC_DATA_READ;
1409 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1410 for (i = 0; i < 16; i++)
1411 rawsdstatus[i] = be32toh(rawsdstatus[i]);
1416 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1418 struct mmc_command cmd;
1421 memset(&cmd, 0, sizeof(cmd));
1422 cmd.opcode = MMC_SET_RELATIVE_ADDR;
1423 cmd.arg = resp << 16;
1424 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1426 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1431 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1433 struct mmc_command cmd;
1436 memset(&cmd, 0, sizeof(cmd));
1437 cmd.opcode = SD_SEND_RELATIVE_ADDR;
1439 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1441 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1442 *resp = cmd.resp[0];
1447 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1449 struct mmc_command cmd;
1452 memset(&cmd, 0, sizeof(cmd));
1453 cmd.opcode = MMC_SET_BLOCKLEN;
1455 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1457 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1462 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1466 case bus_timing_normal:
1467 return (ivar->tran_speed);
1469 return (ivar->hs_tran_speed);
1470 case bus_timing_uhs_sdr12:
1471 return (SD_SDR12_MAX);
1472 case bus_timing_uhs_sdr25:
1473 return (SD_SDR25_MAX);
1474 case bus_timing_uhs_ddr50:
1475 return (SD_DDR50_MAX);
1476 case bus_timing_uhs_sdr50:
1477 return (SD_SDR50_MAX);
1478 case bus_timing_uhs_sdr104:
1479 return (SD_SDR104_MAX);
1480 case bus_timing_mmc_ddr52:
1481 return (MMC_TYPE_DDR52_MAX);
1482 case bus_timing_mmc_hs200:
1483 case bus_timing_mmc_hs400:
1484 case bus_timing_mmc_hs400es:
1485 return (MMC_TYPE_HS200_HS400ES_MAX);
1491 mmc_timing_to_string(enum mmc_bus_timing timing)
1495 case bus_timing_normal:
1496 return ("normal speed");
1498 return ("high speed");
1499 case bus_timing_uhs_sdr12:
1500 case bus_timing_uhs_sdr25:
1501 case bus_timing_uhs_sdr50:
1502 case bus_timing_uhs_sdr104:
1503 return ("single data rate");
1504 case bus_timing_uhs_ddr50:
1505 case bus_timing_mmc_ddr52:
1506 return ("dual data rate");
1507 case bus_timing_mmc_hs200:
1509 case bus_timing_mmc_hs400:
1511 case bus_timing_mmc_hs400es:
1512 return ("HS400 with enhanced strobe");
1518 mmc_host_timing(device_t dev, enum mmc_bus_timing timing)
1522 host_caps = mmcbr_get_caps(dev);
1524 #define HOST_TIMING_CAP(host_caps, cap) ({ \
1526 if (((host_caps) & (cap)) == (cap)) \
1534 case bus_timing_normal:
1537 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED));
1538 case bus_timing_uhs_sdr12:
1539 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12));
1540 case bus_timing_uhs_sdr25:
1541 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25));
1542 case bus_timing_uhs_ddr50:
1543 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50));
1544 case bus_timing_uhs_sdr50:
1545 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50));
1546 case bus_timing_uhs_sdr104:
1547 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104));
1548 case bus_timing_mmc_ddr52:
1549 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52));
1550 case bus_timing_mmc_hs200:
1551 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200));
1552 case bus_timing_mmc_hs400:
1553 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400));
1554 case bus_timing_mmc_hs400es:
1555 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 |
1556 MMC_CAP_MMC_ENH_STROBE));
1559 #undef HOST_TIMING_CAP
1565 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1567 enum mmc_bus_timing timing;
1569 device_printf(dev, "Card at relative address 0x%04x%s:\n",
1570 ivar->rca, newcard ? " added" : "");
1571 device_printf(dev, " card: %s\n", ivar->card_id_string);
1572 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1573 if (isset(&ivar->timings, timing))
1576 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT);
1577 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1578 (ivar->bus_width == bus_width_1 ? 1 :
1579 (ivar->bus_width == bus_width_4 ? 4 : 8)),
1580 mmc_timing_to_dtr(ivar, timing) / 1000000,
1581 mmc_timing_to_string(timing));
1582 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1583 ivar->sec_count, ivar->erase_sector,
1584 ivar->read_only ? ", read-only" : "");
1588 mmc_discover_cards(struct mmc_softc *sc)
1590 u_char switch_res[64];
1591 uint32_t raw_cid[4];
1592 struct mmc_ivars *ivar = NULL;
1593 const struct mmc_quirk *quirk;
1594 const uint8_t *ext_csd;
1596 int err, host_caps, i, newcard;
1597 uint32_t resp, sec_count, status;
1602 host_caps = mmcbr_get_caps(sc->dev);
1603 if (bootverbose || mmc_debug)
1604 device_printf(sc->dev, "Probing cards\n");
1607 sc->squelched++; /* Errors are expected, squelch reporting. */
1608 err = mmc_all_send_cid(sc, raw_cid);
1610 if (err == MMC_ERR_TIMEOUT)
1612 if (err != MMC_ERR_NONE) {
1613 device_printf(sc->dev, "Error reading CID %d\n", err);
1617 for (i = 0; i < sc->child_count; i++) {
1618 ivar = device_get_ivars(sc->child_list[i]);
1619 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1625 if (bootverbose || mmc_debug) {
1626 device_printf(sc->dev,
1627 "%sard detected (CID %08x%08x%08x%08x)\n",
1628 newcard ? "New c" : "C",
1629 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1632 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1634 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1636 if (mmcbr_get_ro(sc->dev))
1637 ivar->read_only = 1;
1638 ivar->bus_width = bus_width_1;
1639 setbit(&ivar->timings, bus_timing_normal);
1640 ivar->mode = mmcbr_get_mode(sc->dev);
1641 if (ivar->mode == mode_sd) {
1642 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1643 err = mmc_send_relative_addr(sc, &resp);
1644 if (err != MMC_ERR_NONE) {
1645 device_printf(sc->dev,
1646 "Error getting RCA %d\n", err);
1649 ivar->rca = resp >> 16;
1651 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1652 if (err != MMC_ERR_NONE) {
1653 device_printf(sc->dev,
1654 "Error getting CSD %d\n", err);
1657 if (bootverbose || mmc_debug)
1658 device_printf(sc->dev,
1659 "%sard detected (CSD %08x%08x%08x%08x)\n",
1660 newcard ? "New c" : "C", ivar->raw_csd[0],
1661 ivar->raw_csd[1], ivar->raw_csd[2],
1663 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1664 if (err != MMC_ERR_NONE) {
1665 device_printf(sc->dev, "Error decoding CSD\n");
1668 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1669 if (ivar->csd.csd_structure > 0)
1671 ivar->tran_speed = ivar->csd.tran_speed;
1672 ivar->erase_sector = ivar->csd.erase_sector *
1673 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1675 err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1677 if (err != MMC_ERR_NONE) {
1678 device_printf(sc->dev,
1679 "Error reading card status %d\n", err);
1682 if ((status & R1_CARD_IS_LOCKED) != 0) {
1683 device_printf(sc->dev,
1684 "Card is password protected, skipping\n");
1688 /* Get card SCR. Card must be selected to fetch it. */
1689 err = mmc_select_card(sc, ivar->rca);
1690 if (err != MMC_ERR_NONE) {
1691 device_printf(sc->dev,
1692 "Error selecting card %d\n", err);
1695 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1696 if (err != MMC_ERR_NONE) {
1697 device_printf(sc->dev,
1698 "Error reading SCR %d\n", err);
1701 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1702 /* Get card switch capabilities (command class 10). */
1703 if ((ivar->scr.sda_vsn >= 1) &&
1704 (ivar->csd.ccc & (1 << 10))) {
1705 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1706 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1708 if (err == MMC_ERR_NONE &&
1709 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1710 setbit(&ivar->timings, bus_timing_hs);
1711 ivar->hs_tran_speed = SD_HS_MAX;
1716 * We deselect then reselect the card here. Some cards
1717 * become unselected and timeout with the above two
1718 * commands, although the state tables / diagrams in the
1719 * standard suggest they go back to the transfer state.
1720 * Other cards don't become deselected, and if we
1721 * attempt to blindly re-select them, we get timeout
1722 * errors from some controllers. So we deselect then
1723 * reselect to handle all situations. The only thing we
1724 * use from the sd_status is the erase sector size, but
1725 * it is still nice to get that right.
1727 (void)mmc_select_card(sc, 0);
1728 (void)mmc_select_card(sc, ivar->rca);
1729 (void)mmc_app_sd_status(sc, ivar->rca,
1730 ivar->raw_sd_status);
1731 mmc_app_decode_sd_status(ivar->raw_sd_status,
1733 if (ivar->sd_status.au_size != 0) {
1734 ivar->erase_sector =
1735 16 << ivar->sd_status.au_size;
1737 /* Find maximum supported bus width. */
1738 if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1739 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1740 ivar->bus_width = bus_width_4;
1745 err = mmc_set_relative_addr(sc, ivar->rca);
1746 if (err != MMC_ERR_NONE) {
1747 device_printf(sc->dev, "Error setting RCA %d\n", err);
1751 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1752 if (err != MMC_ERR_NONE) {
1753 device_printf(sc->dev, "Error getting CSD %d\n", err);
1756 if (bootverbose || mmc_debug)
1757 device_printf(sc->dev,
1758 "%sard detected (CSD %08x%08x%08x%08x)\n",
1759 newcard ? "New c" : "C", ivar->raw_csd[0],
1760 ivar->raw_csd[1], ivar->raw_csd[2],
1763 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1764 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1765 ivar->tran_speed = ivar->csd.tran_speed;
1766 ivar->erase_sector = ivar->csd.erase_sector *
1767 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1769 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1770 if (err != MMC_ERR_NONE) {
1771 device_printf(sc->dev,
1772 "Error reading card status %d\n", err);
1775 if ((status & R1_CARD_IS_LOCKED) != 0) {
1776 device_printf(sc->dev,
1777 "Card is password protected, skipping\n");
1781 err = mmc_select_card(sc, ivar->rca);
1782 if (err != MMC_ERR_NONE) {
1783 device_printf(sc->dev, "Error selecting card %d\n",
1789 /* Only MMC >= 4.x devices support EXT_CSD. */
1790 if (ivar->csd.spec_vers >= 4) {
1791 err = mmc_send_ext_csd(sc->dev, sc->dev,
1793 if (err != MMC_ERR_NONE) {
1794 device_printf(sc->dev,
1795 "Error reading EXT_CSD %d\n", err);
1798 ext_csd = ivar->raw_ext_csd;
1799 rev = ext_csd[EXT_CSD_REV];
1800 /* Handle extended capacity from EXT_CSD */
1801 sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]);
1802 if (sec_count != 0) {
1803 ivar->sec_count = sec_count;
1806 /* Find maximum supported bus width. */
1807 ivar->bus_width = mmc_test_bus_width(sc);
1808 /* Get device speeds beyond normal mode. */
1809 card_type = ext_csd[EXT_CSD_CARD_TYPE];
1810 if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) {
1811 setbit(&ivar->timings, bus_timing_hs);
1812 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1813 } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) {
1814 setbit(&ivar->timings, bus_timing_hs);
1815 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1817 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1818 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1819 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1820 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1822 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1823 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1824 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1825 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1827 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 &&
1828 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1829 setbit(&ivar->timings, bus_timing_mmc_hs200);
1830 setbit(&ivar->vccq_120, bus_timing_mmc_hs200);
1832 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 &&
1833 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1834 setbit(&ivar->timings, bus_timing_mmc_hs200);
1835 setbit(&ivar->vccq_180, bus_timing_mmc_hs200);
1837 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1838 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1839 ivar->bus_width == bus_width_8) {
1840 setbit(&ivar->timings, bus_timing_mmc_hs400);
1841 setbit(&ivar->vccq_120, bus_timing_mmc_hs400);
1843 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1844 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1845 ivar->bus_width == bus_width_8) {
1846 setbit(&ivar->timings, bus_timing_mmc_hs400);
1847 setbit(&ivar->vccq_180, bus_timing_mmc_hs400);
1849 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1850 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1851 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1852 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1853 ivar->bus_width == bus_width_8) {
1854 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1855 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es);
1857 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1858 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1859 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1860 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1861 ivar->bus_width == bus_width_8) {
1862 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1863 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es);
1866 * Determine generic switch timeout (provided in
1867 * units of 10 ms), defaulting to 500 ms.
1869 ivar->cmd6_time = 500 * 1000;
1871 ivar->cmd6_time = 10 *
1872 ext_csd[EXT_CSD_GEN_CMD6_TIME];
1873 /* Handle HC erase sector size. */
1874 if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1875 ivar->erase_sector = 1024 *
1876 ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1877 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1878 EXT_CSD_CMD_SET_NORMAL,
1879 EXT_CSD_ERASE_GRP_DEF,
1880 EXT_CSD_ERASE_GRP_DEF_EN,
1881 ivar->cmd6_time, true);
1882 if (err != MMC_ERR_NONE) {
1883 device_printf(sc->dev,
1884 "Error setting erase group %d\n",
1891 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5);
1894 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) {
1895 if ((quirk->mid == MMC_QUIRK_MID_ANY ||
1896 quirk->mid == ivar->cid.mid) &&
1897 (quirk->oid == MMC_QUIRK_OID_ANY ||
1898 quirk->oid == ivar->cid.oid) &&
1899 strncmp(quirk->pnm, ivar->cid.pnm,
1900 sizeof(ivar->cid.pnm)) == 0) {
1901 ivar->quirks = quirk->quirks;
1907 * Some cards that report maximum I/O block sizes greater
1908 * than 512 require the block length to be set to 512, even
1909 * though that is supposed to be the default. Example:
1911 * Transcend 2GB SDSC card, CID:
1912 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1914 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1915 ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1916 mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1918 mmc_format_card_id_string(ivar);
1920 if (bootverbose || mmc_debug)
1921 mmc_log_card(sc->dev, ivar, newcard);
1924 child = device_add_child(sc->dev, NULL, -1);
1925 if (child != NULL) {
1926 device_set_ivars(child, ivar);
1927 sc->child_list = realloc(sc->child_list,
1928 sizeof(device_t) * sc->child_count + 1,
1929 M_DEVBUF, M_WAITOK);
1930 sc->child_list[sc->child_count++] = child;
1932 device_printf(sc->dev, "Error adding child\n");
1936 if (newcard && child == NULL)
1937 free(ivar, M_DEVBUF);
1938 (void)mmc_select_card(sc, 0);
1940 * Not returning here when one MMC device could no be added
1941 * potentially would mean looping forever when that device
1942 * is broken (in which case it also may impact the remainder
1943 * of the bus anyway, though).
1945 if ((newcard && child == NULL) ||
1946 mmcbr_get_mode(sc->dev) == mode_sd)
1952 mmc_update_child_list(struct mmc_softc *sc)
1957 if (sc->child_count == 0) {
1958 free(sc->child_list, M_DEVBUF);
1961 for (i = j = 0; i < sc->child_count; i++) {
1963 child = sc->child_list[j++];
1968 sc->child_list[i] = child;
1970 sc->child_list = realloc(sc->child_list, sizeof(device_t) *
1971 sc->child_count, M_DEVBUF, M_WAITOK);
1975 mmc_rescan_cards(struct mmc_softc *sc)
1977 struct mmc_ivars *ivar;
1980 for (i = j = 0; i < sc->child_count; i++) {
1981 ivar = device_get_ivars(sc->child_list[i]);
1982 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1983 if (bootverbose || mmc_debug)
1984 device_printf(sc->dev,
1985 "Card at relative address %d lost\n",
1987 err = device_delete_child(sc->dev, sc->child_list[i]);
1992 free(ivar, M_DEVBUF);
1996 if (sc->child_count == j)
1998 sc->child_count = j;
1999 mmc_update_child_list(sc);
2001 (void)mmc_select_card(sc, 0);
2005 mmc_delete_cards(struct mmc_softc *sc, bool final)
2007 struct mmc_ivars *ivar;
2011 for (i = j = 0; i < sc->child_count; i++) {
2012 ivar = device_get_ivars(sc->child_list[i]);
2013 if (bootverbose || mmc_debug)
2014 device_printf(sc->dev,
2015 "Card at relative address %d deleted\n",
2017 err = device_delete_child(sc->dev, sc->child_list[i]);
2025 free(ivar, M_DEVBUF);
2027 sc->child_count = j;
2028 mmc_update_child_list(sc);
2033 mmc_go_discovery(struct mmc_softc *sc)
2040 if (mmcbr_get_power_mode(dev) != power_on) {
2042 * First, try SD modes
2044 sc->squelched++; /* Errors are expected, squelch reporting. */
2045 mmcbr_set_mode(dev, mode_sd);
2047 mmcbr_set_bus_mode(dev, pushpull);
2048 if (bootverbose || mmc_debug)
2049 device_printf(sc->dev, "Probing bus\n");
2051 err = mmc_send_if_cond(sc, 1);
2052 if ((bootverbose || mmc_debug) && err == 0)
2053 device_printf(sc->dev,
2054 "SD 2.0 interface conditions: OK\n");
2055 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2056 if (bootverbose || mmc_debug)
2057 device_printf(sc->dev, "SD probe: failed\n");
2061 mmcbr_set_mode(dev, mode_mmc);
2062 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2063 if (bootverbose || mmc_debug)
2064 device_printf(sc->dev,
2065 "MMC probe: failed\n");
2066 ocr = 0; /* Failed both, powerdown. */
2067 } else if (bootverbose || mmc_debug)
2068 device_printf(sc->dev,
2069 "MMC probe: OK (OCR: 0x%08x)\n", ocr);
2070 } else if (bootverbose || mmc_debug)
2071 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
2075 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
2076 if (mmcbr_get_ocr(dev) != 0)
2079 mmcbr_set_bus_mode(dev, opendrain);
2080 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
2081 mmcbr_update_ios(dev);
2082 /* XXX recompute vdd based on new cards? */
2085 * Make sure that we have a mutually agreeable voltage to at least
2086 * one card on the bus.
2088 if (bootverbose || mmc_debug)
2089 device_printf(sc->dev, "Current OCR: 0x%08x\n",
2090 mmcbr_get_ocr(dev));
2091 if (mmcbr_get_ocr(dev) == 0) {
2092 device_printf(sc->dev, "No compatible cards found on bus\n");
2093 (void)mmc_delete_cards(sc, false);
2098 * Reselect the cards after we've idled them above.
2100 if (mmcbr_get_mode(dev) == mode_sd) {
2101 err = mmc_send_if_cond(sc, 1);
2102 mmc_send_app_op_cond(sc,
2103 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
2105 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
2106 mmc_discover_cards(sc);
2107 mmc_rescan_cards(sc);
2109 mmcbr_set_bus_mode(dev, pushpull);
2110 mmcbr_update_ios(dev);
2111 mmc_calculate_clock(sc);
2115 mmc_calculate_clock(struct mmc_softc *sc)
2118 struct mmc_ivars *ivar;
2120 uint32_t dtr, max_dtr;
2122 enum mmc_bus_timing max_timing, timing;
2123 bool changed, hs400;
2126 max_dtr = mmcbr_get_f_max(dev);
2127 max_timing = bus_timing_max;
2130 for (i = 0; i < sc->child_count; i++) {
2131 ivar = device_get_ivars(sc->child_list[i]);
2132 if (isclr(&ivar->timings, max_timing) ||
2133 !mmc_host_timing(dev, max_timing)) {
2134 for (timing = max_timing - 1; timing >=
2135 bus_timing_normal; timing--) {
2136 if (isset(&ivar->timings, timing) &&
2137 mmc_host_timing(dev, timing)) {
2138 max_timing = timing;
2144 dtr = mmc_timing_to_dtr(ivar, max_timing);
2145 if (dtr < max_dtr) {
2150 } while (changed == true);
2152 if (bootverbose || mmc_debug) {
2154 "setting transfer rate to %d.%03dMHz (%s timing)\n",
2155 max_dtr / 1000000, (max_dtr / 1000) % 1000,
2156 mmc_timing_to_string(max_timing));
2160 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin
2161 * with HS200 following the sequence as described in "6.6.2.2 HS200
2162 * timing mode selection" of the eMMC specification v5.1, too, and
2163 * switch to max_timing later. HS400ES requires no tuning and, thus,
2164 * can be switch to directly, but requires the same detour via high
2165 * speed mode as does HS400 (see mmc_switch_to_hs400()).
2167 hs400 = max_timing == bus_timing_mmc_hs400;
2168 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing;
2169 for (i = 0; i < sc->child_count; i++) {
2170 ivar = device_get_ivars(sc->child_list[i]);
2171 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
2175 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
2176 device_printf(dev, "Card at relative address %d "
2177 "failed to select\n", rca);
2181 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */
2182 timing == bus_timing_mmc_hs400es) {
2183 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2184 device_printf(dev, "Failed to set VCCQ for "
2185 "card at relative address %d\n", rca);
2190 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */
2191 /* Set bus width (required for initial tuning). */
2192 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2194 device_printf(dev, "Card at relative address "
2195 "%d failed to set bus width\n", rca);
2198 mmcbr_set_bus_width(dev, ivar->bus_width);
2199 mmcbr_update_ios(dev);
2200 } else if (timing == bus_timing_mmc_hs400es) {
2201 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) !=
2203 device_printf(dev, "Card at relative address "
2204 "%d failed to set %s timing\n", rca,
2205 mmc_timing_to_string(timing));
2211 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) {
2212 device_printf(dev, "Card at relative address %d "
2213 "failed to set %s timing\n", rca,
2214 mmc_timing_to_string(timing));
2218 if (timing == bus_timing_mmc_ddr52) {
2220 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH
2221 * (must be done after switching to EXT_CSD_HS_TIMING).
2223 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2225 device_printf(dev, "Card at relative address "
2226 "%d failed to set bus width\n", rca);
2229 mmcbr_set_bus_width(dev, ivar->bus_width);
2230 mmcbr_update_ios(dev);
2231 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2232 device_printf(dev, "Failed to set VCCQ for "
2233 "card at relative address %d\n", rca);
2239 /* Set clock (must be done before initial tuning). */
2240 mmcbr_set_clock(dev, max_dtr);
2241 mmcbr_update_ios(dev);
2243 if (mmcbr_tune(dev, hs400) != 0) {
2244 device_printf(dev, "Card at relative address %d "
2245 "failed to execute initial tuning\n", rca);
2249 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr,
2250 max_timing) != MMC_ERR_NONE) {
2251 device_printf(dev, "Card at relative address %d "
2252 "failed to set %s timing\n", rca,
2253 mmc_timing_to_string(max_timing));
2258 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
2259 device_printf(dev, "Card at relative address %d "
2260 "failed to set power class\n", rca);
2263 (void)mmc_select_card(sc, 0);
2268 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly
2269 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing
2270 * mode selection" of the eMMC specification v5.1.
2273 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
2274 uint32_t clock, enum mmc_bus_timing max_timing)
2284 * Both clock and timing must be set as appropriate for high speed
2285 * before eventually switching to HS400/HS400ES; mmc_set_timing()
2286 * will issue mmcbr_update_ios().
2288 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2289 err = mmc_set_timing(sc, ivar, bus_timing_hs);
2290 if (err != MMC_ERR_NONE)
2294 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally
2295 * EXT_CSD_BUS_WIDTH_ES for HS400ES).
2297 err = mmc_set_card_bus_width(sc, ivar, max_timing);
2298 if (err != MMC_ERR_NONE)
2300 mmcbr_set_bus_width(dev, ivar->bus_width);
2301 mmcbr_update_ios(dev);
2303 /* Finally, switch to HS400/HS400ES mode. */
2304 err = mmc_set_timing(sc, ivar, max_timing);
2305 if (err != MMC_ERR_NONE)
2307 mmcbr_set_clock(dev, clock);
2308 mmcbr_update_ios(dev);
2309 return (MMC_ERR_NONE);
2313 * Switch from HS400 to HS200 (for re-tuning).
2316 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
2327 * Both clock and timing must initially be set as appropriate for
2328 * DDR52 before eventually switching to HS200; mmc_set_timing()
2329 * will issue mmcbr_update_ios().
2331 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2332 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52);
2333 if (err != MMC_ERR_NONE)
2337 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR
2338 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios.
2340 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs);
2341 if (err != MMC_ERR_NONE)
2343 mmcbr_set_bus_width(dev, ivar->bus_width);
2344 mmcbr_set_timing(sc->dev, bus_timing_hs);
2345 mmcbr_update_ios(dev);
2347 /* Finally, switch to HS200 mode. */
2348 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200);
2349 if (err != MMC_ERR_NONE)
2351 mmcbr_set_clock(dev, clock);
2352 mmcbr_update_ios(dev);
2353 return (MMC_ERR_NONE);
2357 mmc_retune(device_t busdev, device_t dev, bool reset)
2359 struct mmc_softc *sc;
2360 struct mmc_ivars *ivar;
2363 enum mmc_bus_timing timing;
2365 if (device_get_parent(dev) != busdev)
2366 return (MMC_ERR_INVALID);
2368 sc = device_get_softc(busdev);
2369 if (sc->retune_needed != 1 && sc->retune_paused != 0)
2370 return (MMC_ERR_INVALID);
2372 timing = mmcbr_get_timing(busdev);
2373 if (timing == bus_timing_mmc_hs400) {
2375 * Controllers use the data strobe line to latch data from
2376 * the devices in HS400 mode so periodic re-tuning isn't
2377 * expected to be required, i. e. only if a CRC or tuning
2378 * error is signaled to the bridge. In these latter cases
2379 * we are asked to reset the tuning circuit and need to do
2380 * the switch timing dance.
2384 ivar = device_get_ivars(dev);
2385 clock = mmcbr_get_clock(busdev);
2386 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE)
2387 return (MMC_ERR_BADCRC);
2389 err = mmcbr_retune(busdev, reset);
2390 if (err != 0 && timing == bus_timing_mmc_hs400)
2391 return (MMC_ERR_BADCRC);
2396 return (MMC_ERR_FAILED);
2398 return (MMC_ERR_INVALID);
2400 if (timing == bus_timing_mmc_hs400) {
2401 if (mmc_switch_to_hs400(sc, ivar, clock, timing) !=
2403 return (MMC_ERR_BADCRC);
2405 return (MMC_ERR_NONE);
2409 mmc_retune_pause(device_t busdev, device_t dev, bool retune)
2411 struct mmc_softc *sc;
2413 sc = device_get_softc(busdev);
2414 KASSERT(device_get_parent(dev) == busdev,
2415 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2416 device_get_nameunit(busdev)));
2417 KASSERT(sc->owner != NULL,
2418 ("%s: Request from %s without bus being acquired.", __func__,
2419 device_get_nameunit(dev)));
2421 if (retune == true && sc->retune_paused == 0)
2422 sc->retune_needed = 1;
2423 sc->retune_paused++;
2427 mmc_retune_unpause(device_t busdev, device_t dev)
2429 struct mmc_softc *sc;
2431 sc = device_get_softc(busdev);
2432 KASSERT(device_get_parent(dev) == busdev,
2433 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2434 device_get_nameunit(busdev)));
2435 KASSERT(sc->owner != NULL,
2436 ("%s: Request from %s without bus being acquired.", __func__,
2437 device_get_nameunit(dev)));
2438 KASSERT(sc->retune_paused != 0,
2439 ("%s: Re-tune pause count already at 0", __func__));
2441 sc->retune_paused--;
2445 mmc_scan(struct mmc_softc *sc)
2447 device_t dev = sc->dev;
2450 err = mmc_acquire_bus(dev, dev);
2452 device_printf(dev, "Failed to acquire bus for scanning\n");
2455 mmc_go_discovery(sc);
2456 err = mmc_release_bus(dev, dev);
2458 device_printf(dev, "Failed to release bus after scanning\n");
2461 (void)bus_generic_attach(dev);
2465 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
2467 struct mmc_ivars *ivar = device_get_ivars(child);
2472 case MMC_IVAR_SPEC_VERS:
2473 *result = ivar->csd.spec_vers;
2475 case MMC_IVAR_DSR_IMP:
2476 *result = ivar->csd.dsr_imp;
2478 case MMC_IVAR_MEDIA_SIZE:
2479 *result = ivar->sec_count;
2482 *result = ivar->rca;
2484 case MMC_IVAR_SECTOR_SIZE:
2485 *result = MMC_SECTOR_SIZE;
2487 case MMC_IVAR_TRAN_SPEED:
2488 *result = mmcbr_get_clock(bus);
2490 case MMC_IVAR_READ_ONLY:
2491 *result = ivar->read_only;
2493 case MMC_IVAR_HIGH_CAP:
2494 *result = ivar->high_cap;
2496 case MMC_IVAR_CARD_TYPE:
2497 *result = ivar->mode;
2499 case MMC_IVAR_BUS_WIDTH:
2500 *result = ivar->bus_width;
2502 case MMC_IVAR_ERASE_SECTOR:
2503 *result = ivar->erase_sector;
2505 case MMC_IVAR_MAX_DATA:
2506 *result = mmcbr_get_max_data(bus);
2508 case MMC_IVAR_CMD6_TIMEOUT:
2509 *result = ivar->cmd6_time;
2511 case MMC_IVAR_QUIRKS:
2512 *result = ivar->quirks;
2514 case MMC_IVAR_CARD_ID_STRING:
2515 *(char **)result = ivar->card_id_string;
2517 case MMC_IVAR_CARD_SN_STRING:
2518 *(char **)result = ivar->card_sn_string;
2525 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
2529 * None are writable ATM
2535 mmc_delayed_attach(void *xsc)
2537 struct mmc_softc *sc = xsc;
2540 config_intrhook_disestablish(&sc->config_intrhook);
2544 mmc_child_location_str(device_t dev, device_t child, char *buf,
2548 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child));
2552 static device_method_t mmc_methods[] = {
2554 DEVMETHOD(device_probe, mmc_probe),
2555 DEVMETHOD(device_attach, mmc_attach),
2556 DEVMETHOD(device_detach, mmc_detach),
2557 DEVMETHOD(device_suspend, mmc_suspend),
2558 DEVMETHOD(device_resume, mmc_resume),
2561 DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2562 DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2563 DEVMETHOD(bus_child_location_str, mmc_child_location_str),
2565 /* MMC Bus interface */
2566 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause),
2567 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause),
2568 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2569 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2570 DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2575 driver_t mmc_driver = {
2578 sizeof(struct mmc_softc),
2580 devclass_t mmc_devclass;
2582 MODULE_VERSION(mmc, MMC_VERSION);