2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2006 Bernd Walter. All rights reserved.
5 * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
6 * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Portions of this software may have been developed with reference to
29 * the SD Simplified Specification. The following disclaimer may apply:
31 * The following conditions apply to the release of the simplified
32 * specification ("Simplified Specification") by the SD Card Association and
33 * the SD Group. The Simplified Specification is a subset of the complete SD
34 * Specification which is owned by the SD Card Association and the SD
35 * Group. This Simplified Specification is provided on a non-confidential
36 * basis subject to the disclaimers below. Any implementation of the
37 * Simplified Specification may require a license from the SD Card
38 * Association, SD Group, SD-3C LLC or other third parties.
42 * The information contained in the Simplified Specification is presented only
43 * as a standard specification for SD Cards and SD Host/Ancillary products and
44 * is provided "AS-IS" without any representations or warranties of any
45 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
46 * Card Association for any damages, any infringements of patents or other
47 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
48 * parties, which may result from its use. No license is granted by
49 * implication, estoppel or otherwise under any patent or other rights of the
50 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
51 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
52 * or the SD Card Association to disclose or distribute any technical
53 * information, know-how or other confidential information to any third party.
56 #include <sys/cdefs.h>
57 __FBSDID("$FreeBSD$");
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/kernel.h>
62 #include <sys/malloc.h>
64 #include <sys/module.h>
65 #include <sys/mutex.h>
67 #include <sys/endian.h>
68 #include <sys/sysctl.h>
71 #include <dev/mmc/bridge.h>
72 #include <dev/mmc/mmc_private.h>
73 #include <dev/mmc/mmc_subr.h>
74 #include <dev/mmc/mmcreg.h>
75 #include <dev/mmc/mmcbrvar.h>
76 #include <dev/mmc/mmcvar.h>
79 #include "mmcbus_if.h"
81 CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
87 uint32_t raw_cid[4]; /* Raw bits of the CID */
88 uint32_t raw_csd[4]; /* Raw bits of the CSD */
89 uint32_t raw_scr[2]; /* Raw bits of the SCR */
90 uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
91 uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
93 u_char read_only; /* True when the device is read-only */
94 u_char high_cap; /* High Capacity device (block addressed) */
95 enum mmc_card_mode mode;
96 enum mmc_bus_width bus_width; /* Bus width to use */
97 struct mmc_cid cid; /* cid decoded */
98 struct mmc_csd csd; /* csd decoded */
99 struct mmc_scr scr; /* scr decoded */
100 struct mmc_sd_status sd_status; /* SD_STATUS decoded */
101 uint32_t sec_count; /* Card capacity in 512byte blocks */
102 uint32_t timings; /* Mask of bus timings supported */
103 uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
104 uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
105 uint32_t tran_speed; /* Max speed in normal mode */
106 uint32_t hs_tran_speed; /* Max speed in high speed mode */
107 uint32_t erase_sector; /* Card native erase sector size */
108 uint32_t cmd6_time; /* Generic switch timeout [us] */
109 uint32_t quirks; /* Quirks as per mmc_quirk->quirks */
110 char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
111 char card_sn_string[16];/* Formatted serial # for disk->d_ident */
114 #define CMD_RETRIES 3
116 static const struct mmc_quirk mmc_quirks[] = {
118 * For some SanDisk iNAND devices, the CMD38 argument needs to be
119 * provided in EXT_CSD[113].
121 { 0x2, 0x100, "SEM02G", MMC_QUIRK_INAND_CMD38 },
122 { 0x2, 0x100, "SEM04G", MMC_QUIRK_INAND_CMD38 },
123 { 0x2, 0x100, "SEM08G", MMC_QUIRK_INAND_CMD38 },
124 { 0x2, 0x100, "SEM16G", MMC_QUIRK_INAND_CMD38 },
125 { 0x2, 0x100, "SEM32G", MMC_QUIRK_INAND_CMD38 },
128 * Disable TRIM for Kingston eMMCs where a firmware bug can lead to
129 * unrecoverable data corruption.
131 { 0x70, MMC_QUIRK_OID_ANY, "V10008", MMC_QUIRK_BROKEN_TRIM },
132 { 0x70, MMC_QUIRK_OID_ANY, "V10016", MMC_QUIRK_BROKEN_TRIM },
134 { 0x0, 0x0, NULL, 0x0 }
137 static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD | CTLFLAG_MPSAFE, NULL,
140 static int mmc_debug;
141 SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
144 /* bus entry points */
145 static int mmc_acquire_bus(device_t busdev, device_t dev);
146 static int mmc_attach(device_t dev);
147 static int mmc_child_location_str(device_t dev, device_t child, char *buf,
149 static int mmc_detach(device_t dev);
150 static int mmc_probe(device_t dev);
151 static int mmc_read_ivar(device_t bus, device_t child, int which,
153 static int mmc_release_bus(device_t busdev, device_t dev);
154 static int mmc_resume(device_t dev);
155 static void mmc_retune_pause(device_t busdev, device_t dev, bool retune);
156 static void mmc_retune_unpause(device_t busdev, device_t dev);
157 static int mmc_suspend(device_t dev);
158 static int mmc_wait_for_request(device_t busdev, device_t dev,
159 struct mmc_request *req);
160 static int mmc_write_ivar(device_t bus, device_t child, int which,
163 #define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
164 #define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
165 #define MMC_LOCK_INIT(_sc) \
166 mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
168 #define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
169 #define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
170 #define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
172 static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
173 static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
174 static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
175 struct mmc_sd_status *sd_status);
176 static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
177 uint32_t *rawsdstatus);
178 static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
180 static int mmc_calculate_clock(struct mmc_softc *sc);
181 static void mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid,
183 static void mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid);
184 static void mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd);
185 static int mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd);
186 static void mmc_delayed_attach(void *xsc);
187 static int mmc_delete_cards(struct mmc_softc *sc, bool final);
188 static void mmc_discover_cards(struct mmc_softc *sc);
189 static void mmc_format_card_id_string(struct mmc_ivars *ivar);
190 static void mmc_go_discovery(struct mmc_softc *sc);
191 static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
193 static int mmc_highest_voltage(uint32_t ocr);
194 static bool mmc_host_timing(device_t dev, enum mmc_bus_timing timing);
195 static void mmc_idle_cards(struct mmc_softc *sc);
196 static void mmc_ms_delay(int ms);
197 static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
198 static void mmc_power_down(struct mmc_softc *sc);
199 static void mmc_power_up(struct mmc_softc *sc);
200 static void mmc_rescan_cards(struct mmc_softc *sc);
201 static int mmc_retune(device_t busdev, device_t dev, bool reset);
202 static void mmc_scan(struct mmc_softc *sc);
203 static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
204 uint8_t value, uint8_t *res);
205 static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
206 static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
207 static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
209 static int mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd);
210 static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
211 static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
213 static int mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp);
214 static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
215 static int mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
216 enum mmc_bus_timing timing);
217 static int mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar);
218 static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
219 static int mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
220 enum mmc_bus_timing timing);
221 static int mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
222 enum mmc_bus_timing timing);
223 static int mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
225 static int mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
226 uint32_t max_dtr, enum mmc_bus_timing max_timing);
227 static int mmc_test_bus_width(struct mmc_softc *sc);
228 static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
229 enum mmc_bus_timing timing);
230 static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
231 static void mmc_update_child_list(struct mmc_softc *sc);
232 static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
233 uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
234 static int mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req);
235 static void mmc_wakeup(struct mmc_request *req);
241 DELAY(1000 * ms); /* XXX BAD */
245 mmc_probe(device_t dev)
248 device_set_desc(dev, "MMC/SD bus");
253 mmc_attach(device_t dev)
255 struct mmc_softc *sc;
257 sc = device_get_softc(dev);
261 /* We'll probe and attach our children later, but before / mount */
262 sc->config_intrhook.ich_func = mmc_delayed_attach;
263 sc->config_intrhook.ich_arg = sc;
264 if (config_intrhook_establish(&sc->config_intrhook) != 0)
265 device_printf(dev, "config_intrhook_establish failed\n");
270 mmc_detach(device_t dev)
272 struct mmc_softc *sc = device_get_softc(dev);
275 err = mmc_delete_cards(sc, true);
279 MMC_LOCK_DESTROY(sc);
285 mmc_suspend(device_t dev)
287 struct mmc_softc *sc = device_get_softc(dev);
290 err = bus_generic_suspend(dev);
294 * We power down with the bus acquired here, mainly so that no device
295 * is selected any longer and sc->last_rca gets set to 0. Otherwise,
296 * the deselect as part of the bus acquisition in mmc_scan() may fail
297 * during resume, as the bus isn't powered up again before later in
298 * mmc_go_discovery().
300 err = mmc_acquire_bus(dev, dev);
304 err = mmc_release_bus(dev, dev);
309 mmc_resume(device_t dev)
311 struct mmc_softc *sc = device_get_softc(dev);
314 return (bus_generic_resume(dev));
318 mmc_acquire_bus(device_t busdev, device_t dev)
320 struct mmc_softc *sc;
321 struct mmc_ivars *ivar;
324 enum mmc_bus_timing timing;
326 err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
329 sc = device_get_softc(busdev);
332 panic("mmc: host bridge didn't serialize us.");
338 * Keep track of the last rca that we've selected. If
339 * we're asked to do it again, don't. We never
340 * unselect unless the bus code itself wants the mmc
341 * bus, and constantly reselecting causes problems.
343 ivar = device_get_ivars(dev);
345 if (sc->last_rca != rca) {
346 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
347 device_printf(busdev, "Card at relative "
348 "address %d failed to select\n", rca);
352 timing = mmcbr_get_timing(busdev);
354 * For eMMC modes, setting/updating bus width and VCCQ
355 * only really is necessary if there actually is more
356 * than one device on the bus as generally that already
357 * had to be done by mmc_calculate_clock() or one of
358 * its calees. Moreover, setting the bus width anew
359 * can trigger re-tuning (via a CRC error on the next
360 * CMD), even if not switching between devices an the
361 * previously selected one is still tuned. Obviously,
362 * we need to re-tune the host controller if devices
363 * are actually switched, though.
365 if (timing >= bus_timing_mmc_ddr52 &&
366 sc->child_count == 1)
368 /* Prepare bus width for the new card. */
369 if (bootverbose || mmc_debug) {
370 device_printf(busdev,
371 "setting bus width to %d bits %s timing\n",
372 (ivar->bus_width == bus_width_4) ? 4 :
373 (ivar->bus_width == bus_width_8) ? 8 : 1,
374 mmc_timing_to_string(timing));
376 if (mmc_set_card_bus_width(sc, ivar, timing) !=
378 device_printf(busdev, "Card at relative "
379 "address %d failed to set bus width\n",
383 mmcbr_set_bus_width(busdev, ivar->bus_width);
384 mmcbr_update_ios(busdev);
385 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
386 device_printf(busdev, "Failed to set VCCQ "
387 "for card at relative address %d\n", rca);
390 if (timing >= bus_timing_mmc_hs200 &&
391 mmc_retune(busdev, dev, true) != 0) {
392 device_printf(busdev, "Card at relative "
393 "address %d failed to re-tune\n", rca);
399 * If there's a card selected, stand down.
401 if (sc->last_rca != 0) {
402 if (mmc_select_card(sc, 0) != MMC_ERR_NONE)
412 mmc_release_bus(device_t busdev, device_t dev)
414 struct mmc_softc *sc;
417 sc = device_get_softc(busdev);
421 panic("mmc: releasing unowned bus.");
422 if (sc->owner != dev)
423 panic("mmc: you don't own the bus. game over.");
425 err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
435 mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
438 return (ocr & MMC_OCR_VOLTAGE);
442 mmc_highest_voltage(uint32_t ocr)
446 for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
447 i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
454 mmc_wakeup(struct mmc_request *req)
456 struct mmc_softc *sc;
458 sc = (struct mmc_softc *)req->done_data;
460 req->flags |= MMC_REQ_DONE;
466 mmc_wait_for_req(struct mmc_softc *sc, struct mmc_request *req)
469 req->done = mmc_wakeup;
471 if (__predict_false(mmc_debug > 1)) {
472 device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
473 req->cmd->opcode, req->cmd->arg, req->cmd->flags);
474 if (req->cmd->data) {
475 printf(" data %d\n", (int)req->cmd->data->len);
479 MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
481 while ((req->flags & MMC_REQ_DONE) == 0)
482 msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
484 if (__predict_false(mmc_debug > 2 || (mmc_debug > 0 &&
485 req->cmd->error != MMC_ERR_NONE)))
486 device_printf(sc->dev, "CMD%d RESULT: %d\n",
487 req->cmd->opcode, req->cmd->error);
492 mmc_wait_for_request(device_t busdev, device_t dev, struct mmc_request *req)
494 struct mmc_softc *sc;
495 struct mmc_ivars *ivar;
497 enum mmc_retune_req retune_req;
499 sc = device_get_softc(busdev);
500 KASSERT(sc->owner != NULL,
501 ("%s: Request from %s without bus being acquired.", __func__,
502 device_get_nameunit(dev)));
505 * Unless no device is selected or re-tuning is already ongoing,
506 * execute re-tuning if a) the bridge is requesting to do so and
507 * re-tuning hasn't been otherwise paused, or b) if a child asked
508 * to be re-tuned prior to pausing (see also mmc_retune_pause()).
510 if (__predict_false(sc->last_rca != 0 && sc->retune_ongoing == 0 &&
511 (((retune_req = mmcbr_get_retune_req(busdev)) != retune_req_none &&
512 sc->retune_paused == 0) || sc->retune_needed == 1))) {
513 if (__predict_false(mmc_debug > 1)) {
514 device_printf(busdev,
515 "Re-tuning with%s circuit reset required\n",
516 retune_req == retune_req_reset ? "" : "out");
518 if (device_get_parent(dev) == busdev)
519 ivar = device_get_ivars(dev);
521 for (i = 0; i < sc->child_count; i++) {
522 ivar = device_get_ivars(sc->child_list[i]);
523 if (ivar->rca == sc->last_rca)
526 if (ivar->rca != sc->last_rca)
529 sc->retune_ongoing = 1;
530 err = mmc_retune(busdev, dev, retune_req == retune_req_reset);
531 sc->retune_ongoing = 0;
534 case MMC_ERR_FAILED: /* Re-tune error but still might work */
536 case MMC_ERR_BADCRC: /* Switch failure on HS400 recovery */
538 case MMC_ERR_INVALID: /* Driver implementation b0rken */
539 default: /* Unknown error, should not happen */
542 sc->retune_needed = 0;
544 return (mmc_wait_for_req(sc, req));
548 mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
549 uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
551 struct mmc_command cmd;
554 memset(&cmd, 0, sizeof(cmd));
559 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
563 if (flags & MMC_RSP_136)
564 memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
572 mmc_idle_cards(struct mmc_softc *sc)
575 struct mmc_command cmd;
578 mmcbr_set_chip_select(dev, cs_high);
579 mmcbr_update_ios(dev);
582 memset(&cmd, 0, sizeof(cmd));
583 cmd.opcode = MMC_GO_IDLE_STATE;
585 cmd.flags = MMC_RSP_NONE | MMC_CMD_BC;
587 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
590 mmcbr_set_chip_select(dev, cs_dontcare);
591 mmcbr_update_ios(dev);
596 mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
598 struct mmc_command cmd;
599 int err = MMC_ERR_NONE, i;
601 memset(&cmd, 0, sizeof(cmd));
602 cmd.opcode = ACMD_SD_SEND_OP_COND;
604 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
607 for (i = 0; i < 1000; i++) {
608 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
610 if (err != MMC_ERR_NONE)
612 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
613 (ocr & MMC_OCR_VOLTAGE) == 0)
615 err = MMC_ERR_TIMEOUT;
618 if (rocr && err == MMC_ERR_NONE)
624 mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr, uint32_t *rocr)
626 struct mmc_command cmd;
627 int err = MMC_ERR_NONE, i;
629 memset(&cmd, 0, sizeof(cmd));
630 cmd.opcode = MMC_SEND_OP_COND;
632 cmd.flags = MMC_RSP_R3 | MMC_CMD_BCR;
635 for (i = 0; i < 1000; i++) {
636 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
637 if (err != MMC_ERR_NONE)
639 if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) ||
640 (ocr & MMC_OCR_VOLTAGE) == 0)
642 err = MMC_ERR_TIMEOUT;
645 if (rocr && err == MMC_ERR_NONE)
651 mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
653 struct mmc_command cmd;
656 memset(&cmd, 0, sizeof(cmd));
657 cmd.opcode = SD_SEND_IF_COND;
658 cmd.arg = (vhs << 8) + 0xAA;
659 cmd.flags = MMC_RSP_R7 | MMC_CMD_BCR;
662 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
667 mmc_power_up(struct mmc_softc *sc)
673 mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
674 mmcbr_set_bus_mode(dev, opendrain);
675 mmcbr_set_chip_select(dev, cs_dontcare);
676 mmcbr_set_bus_width(dev, bus_width_1);
677 mmcbr_set_power_mode(dev, power_up);
678 mmcbr_set_clock(dev, 0);
679 mmcbr_update_ios(dev);
680 for (vccq = vccq_330; ; vccq--) {
681 mmcbr_set_vccq(dev, vccq);
682 if (mmcbr_switch_vccq(dev) == 0 || vccq == vccq_120)
687 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
688 mmcbr_set_timing(dev, bus_timing_normal);
689 mmcbr_set_power_mode(dev, power_on);
690 mmcbr_update_ios(dev);
695 mmc_power_down(struct mmc_softc *sc)
697 device_t dev = sc->dev;
699 mmcbr_set_bus_mode(dev, opendrain);
700 mmcbr_set_chip_select(dev, cs_dontcare);
701 mmcbr_set_bus_width(dev, bus_width_1);
702 mmcbr_set_power_mode(dev, power_off);
703 mmcbr_set_clock(dev, 0);
704 mmcbr_set_timing(dev, bus_timing_normal);
705 mmcbr_update_ios(dev);
709 mmc_select_card(struct mmc_softc *sc, uint16_t rca)
713 flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) | MMC_CMD_AC;
715 err = mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
716 flags, NULL, CMD_RETRIES);
722 mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
726 struct mmc_command cmd;
727 struct mmc_data data;
729 memset(&cmd, 0, sizeof(cmd));
730 memset(&data, 0, sizeof(data));
733 cmd.opcode = SD_SWITCH_FUNC;
734 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
735 cmd.arg = mode << 31; /* 0 - check, 1 - set */
736 cmd.arg |= 0x00FFFFFF;
737 cmd.arg &= ~(0xF << (grp * 4));
738 cmd.arg |= value << (grp * 4);
743 data.flags = MMC_DATA_READ;
745 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
750 mmc_set_card_bus_width(struct mmc_softc *sc, struct mmc_ivars *ivar,
751 enum mmc_bus_timing timing)
753 struct mmc_command cmd;
757 if (mmcbr_get_mode(sc->dev) == mode_sd) {
758 memset(&cmd, 0, sizeof(cmd));
759 cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
760 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
761 cmd.arg = SD_CLR_CARD_DETECT;
762 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
766 memset(&cmd, 0, sizeof(cmd));
767 cmd.opcode = ACMD_SET_BUS_WIDTH;
768 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
769 switch (ivar->bus_width) {
771 cmd.arg = SD_BUS_WIDTH_1;
774 cmd.arg = SD_BUS_WIDTH_4;
777 return (MMC_ERR_INVALID);
779 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
782 switch (ivar->bus_width) {
784 if (timing == bus_timing_mmc_hs400 ||
785 timing == bus_timing_mmc_hs400es)
786 return (MMC_ERR_INVALID);
787 value = EXT_CSD_BUS_WIDTH_1;
791 case bus_timing_mmc_ddr52:
792 value = EXT_CSD_BUS_WIDTH_4_DDR;
794 case bus_timing_mmc_hs400:
795 case bus_timing_mmc_hs400es:
796 return (MMC_ERR_INVALID);
798 value = EXT_CSD_BUS_WIDTH_4;
805 case bus_timing_mmc_hs400es:
806 value = EXT_CSD_BUS_WIDTH_ES;
808 case bus_timing_mmc_ddr52:
809 case bus_timing_mmc_hs400:
810 value |= EXT_CSD_BUS_WIDTH_8_DDR;
813 value = EXT_CSD_BUS_WIDTH_8;
818 return (MMC_ERR_INVALID);
820 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
821 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
822 ivar->cmd6_time, true);
828 mmc_set_power_class(struct mmc_softc *sc, struct mmc_ivars *ivar)
831 const uint8_t *ext_csd;
834 enum mmc_bus_timing timing;
835 enum mmc_bus_width bus_width;
838 timing = mmcbr_get_timing(dev);
839 bus_width = ivar->bus_width;
840 if (mmcbr_get_mode(dev) != mode_mmc || ivar->csd.spec_vers < 4 ||
841 timing == bus_timing_normal || bus_width == bus_width_1)
842 return (MMC_ERR_NONE);
845 ext_csd = ivar->raw_ext_csd;
846 clock = mmcbr_get_clock(dev);
847 switch (1 << mmcbr_get_vdd(dev)) {
848 case MMC_OCR_LOW_VOLTAGE:
849 if (clock <= MMC_TYPE_HS_26_MAX)
850 value = ext_csd[EXT_CSD_PWR_CL_26_195];
851 else if (clock <= MMC_TYPE_HS_52_MAX) {
852 if (timing >= bus_timing_mmc_ddr52 &&
853 bus_width >= bus_width_4)
854 value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
856 value = ext_csd[EXT_CSD_PWR_CL_52_195];
857 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
858 value = ext_csd[EXT_CSD_PWR_CL_200_195];
860 case MMC_OCR_270_280:
861 case MMC_OCR_280_290:
862 case MMC_OCR_290_300:
863 case MMC_OCR_300_310:
864 case MMC_OCR_310_320:
865 case MMC_OCR_320_330:
866 case MMC_OCR_330_340:
867 case MMC_OCR_340_350:
868 case MMC_OCR_350_360:
869 if (clock <= MMC_TYPE_HS_26_MAX)
870 value = ext_csd[EXT_CSD_PWR_CL_26_360];
871 else if (clock <= MMC_TYPE_HS_52_MAX) {
872 if (timing == bus_timing_mmc_ddr52 &&
873 bus_width >= bus_width_4)
874 value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
876 value = ext_csd[EXT_CSD_PWR_CL_52_360];
877 } else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
878 if (bus_width == bus_width_8)
879 value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
881 value = ext_csd[EXT_CSD_PWR_CL_200_360];
885 device_printf(dev, "No power class support for VDD 0x%x\n",
886 1 << mmcbr_get_vdd(dev));
887 return (MMC_ERR_INVALID);
890 if (bus_width == bus_width_8)
891 value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
892 EXT_CSD_POWER_CLASS_8BIT_SHIFT;
894 value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
895 EXT_CSD_POWER_CLASS_4BIT_SHIFT;
898 return (MMC_ERR_NONE);
900 return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
901 EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
905 mmc_set_timing(struct mmc_softc *sc, struct mmc_ivars *ivar,
906 enum mmc_bus_timing timing)
908 u_char switch_res[64];
912 if (mmcbr_get_mode(sc->dev) == mode_sd) {
914 case bus_timing_normal:
915 value = SD_SWITCH_NORMAL_MODE;
918 value = SD_SWITCH_HS_MODE;
921 return (MMC_ERR_INVALID);
923 err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
925 if (err != MMC_ERR_NONE)
927 if ((switch_res[16] & 0xf) != value)
928 return (MMC_ERR_FAILED);
929 mmcbr_set_timing(sc->dev, timing);
930 mmcbr_update_ios(sc->dev);
933 case bus_timing_normal:
934 value = EXT_CSD_HS_TIMING_BC;
937 case bus_timing_mmc_ddr52:
938 value = EXT_CSD_HS_TIMING_HS;
940 case bus_timing_mmc_hs200:
941 value = EXT_CSD_HS_TIMING_HS200;
943 case bus_timing_mmc_hs400:
944 case bus_timing_mmc_hs400es:
945 value = EXT_CSD_HS_TIMING_HS400;
948 return (MMC_ERR_INVALID);
950 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
951 EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
952 ivar->cmd6_time, false);
953 if (err != MMC_ERR_NONE)
955 mmcbr_set_timing(sc->dev, timing);
956 mmcbr_update_ios(sc->dev);
957 err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
964 mmc_set_vccq(struct mmc_softc *sc, struct mmc_ivars *ivar,
965 enum mmc_bus_timing timing)
968 if (isset(&ivar->vccq_120, timing))
969 mmcbr_set_vccq(sc->dev, vccq_120);
970 else if (isset(&ivar->vccq_180, timing))
971 mmcbr_set_vccq(sc->dev, vccq_180);
973 mmcbr_set_vccq(sc->dev, vccq_330);
974 if (mmcbr_switch_vccq(sc->dev) != 0)
975 return (MMC_ERR_INVALID);
977 return (MMC_ERR_NONE);
980 static const uint8_t p8[8] = {
981 0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
984 static const uint8_t p8ok[8] = {
985 0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
988 static const uint8_t p4[4] = {
989 0x5A, 0x00, 0x00, 0x00
992 static const uint8_t p4ok[4] = {
993 0xA5, 0x00, 0x00, 0x00
997 mmc_test_bus_width(struct mmc_softc *sc)
999 struct mmc_command cmd;
1000 struct mmc_data data;
1004 if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
1005 mmcbr_set_bus_width(sc->dev, bus_width_8);
1006 mmcbr_update_ios(sc->dev);
1008 sc->squelched++; /* Errors are expected, squelch reporting. */
1009 memset(&cmd, 0, sizeof(cmd));
1010 memset(&data, 0, sizeof(data));
1011 cmd.opcode = MMC_BUSTEST_W;
1013 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1016 data.data = __DECONST(void *, p8);
1018 data.flags = MMC_DATA_WRITE;
1019 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1021 memset(&cmd, 0, sizeof(cmd));
1022 memset(&data, 0, sizeof(data));
1023 cmd.opcode = MMC_BUSTEST_R;
1025 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1030 data.flags = MMC_DATA_READ;
1031 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1034 mmcbr_set_bus_width(sc->dev, bus_width_1);
1035 mmcbr_update_ios(sc->dev);
1037 if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
1038 return (bus_width_8);
1041 if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
1042 mmcbr_set_bus_width(sc->dev, bus_width_4);
1043 mmcbr_update_ios(sc->dev);
1045 sc->squelched++; /* Errors are expected, squelch reporting. */
1046 memset(&cmd, 0, sizeof(cmd));
1047 memset(&data, 0, sizeof(data));
1048 cmd.opcode = MMC_BUSTEST_W;
1050 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1053 data.data = __DECONST(void *, p4);
1055 data.flags = MMC_DATA_WRITE;
1056 mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1058 memset(&cmd, 0, sizeof(cmd));
1059 memset(&data, 0, sizeof(data));
1060 cmd.opcode = MMC_BUSTEST_R;
1062 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1067 data.flags = MMC_DATA_READ;
1068 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
1071 mmcbr_set_bus_width(sc->dev, bus_width_1);
1072 mmcbr_update_ios(sc->dev);
1074 if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
1075 return (bus_width_4);
1077 return (bus_width_1);
1081 mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
1083 const int i = (bit_len / 32) - (start / 32) - 1;
1084 const int shift = start & 31;
1085 uint32_t retval = bits[i] >> shift;
1087 if (size + shift > 32)
1088 retval |= bits[i - 1] << (32 - shift);
1089 return (retval & ((1llu << size) - 1));
1093 mmc_decode_cid_sd(uint32_t *raw_cid, struct mmc_cid *cid)
1097 /* There's no version info, so we take it on faith */
1098 memset(cid, 0, sizeof(*cid));
1099 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1100 cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
1101 for (i = 0; i < 5; i++)
1102 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1104 cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
1105 cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
1106 cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
1107 cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
1111 mmc_decode_cid_mmc(uint32_t *raw_cid, struct mmc_cid *cid, bool is_4_41p)
1115 /* There's no version info, so we take it on faith */
1116 memset(cid, 0, sizeof(*cid));
1117 cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
1118 cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
1119 for (i = 0; i < 6; i++)
1120 cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
1122 cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
1123 cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
1124 cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
1125 cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
1127 cid->mdt_year += 2013;
1129 cid->mdt_year += 1997;
1133 mmc_format_card_id_string(struct mmc_ivars *ivar)
1140 * Format a card ID string for use by the mmcsd driver, it's what
1141 * appears between the <> in the following:
1142 * mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 MFG 08/2008 by 3 TN> at mmc0
1143 * 22.5MHz/4bit/128-block
1145 * Also format just the card serial number, which the mmcsd driver will
1146 * use as the disk->d_ident string.
1148 * The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1149 * and our max formatted length is currently 55 bytes if every field
1150 * contains the largest value.
1152 * Sometimes the oid is two printable ascii chars; when it's not,
1153 * format it as 0xnnnn instead.
1155 c1 = (ivar->cid.oid >> 8) & 0x0ff;
1156 c2 = ivar->cid.oid & 0x0ff;
1157 if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1158 snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1160 snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1161 snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1162 "%08X", ivar->cid.psn);
1163 snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1164 "%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1165 ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1166 ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1167 ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1168 ivar->cid.mid, oidstr);
1171 static const int exp[8] = {
1172 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1175 static const int mant[16] = {
1176 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1179 static const int cur_min[8] = {
1180 500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1183 static const int cur_max[8] = {
1184 1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1188 mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
1194 memset(csd, 0, sizeof(*csd));
1195 csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1197 m = mmc_get_bits(raw_csd, 128, 115, 4);
1198 e = mmc_get_bits(raw_csd, 128, 112, 3);
1199 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1200 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1201 m = mmc_get_bits(raw_csd, 128, 99, 4);
1202 e = mmc_get_bits(raw_csd, 128, 96, 3);
1203 csd->tran_speed = exp[e] * 10000 * mant[m];
1204 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1205 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1206 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1207 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1208 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1209 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1210 csd->vdd_r_curr_min =
1211 cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1212 csd->vdd_r_curr_max =
1213 cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1214 csd->vdd_w_curr_min =
1215 cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1216 csd->vdd_w_curr_max =
1217 cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1218 m = mmc_get_bits(raw_csd, 128, 62, 12);
1219 e = mmc_get_bits(raw_csd, 128, 47, 3);
1220 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1221 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1222 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1223 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1224 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1225 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1226 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1227 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1228 return (MMC_ERR_NONE);
1229 } else if (v == 1) {
1230 m = mmc_get_bits(raw_csd, 128, 115, 4);
1231 e = mmc_get_bits(raw_csd, 128, 112, 3);
1232 csd->tacc = (exp[e] * mant[m] + 9) / 10;
1233 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1234 m = mmc_get_bits(raw_csd, 128, 99, 4);
1235 e = mmc_get_bits(raw_csd, 128, 96, 3);
1236 csd->tran_speed = exp[e] * 10000 * mant[m];
1237 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1238 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1239 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1240 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1241 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1242 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1243 csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1245 csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1246 csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1247 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1248 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1249 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1250 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1251 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1252 return (MMC_ERR_NONE);
1254 return (MMC_ERR_INVALID);
1258 mmc_decode_csd_mmc(uint32_t *raw_csd, struct mmc_csd *csd)
1263 memset(csd, 0, sizeof(*csd));
1264 csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1265 csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1266 m = mmc_get_bits(raw_csd, 128, 115, 4);
1267 e = mmc_get_bits(raw_csd, 128, 112, 3);
1268 csd->tacc = exp[e] * mant[m] + 9 / 10;
1269 csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1270 m = mmc_get_bits(raw_csd, 128, 99, 4);
1271 e = mmc_get_bits(raw_csd, 128, 96, 3);
1272 csd->tran_speed = exp[e] * 10000 * mant[m];
1273 csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1274 csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1275 csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1276 csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1277 csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1278 csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1279 csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1280 csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1281 csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1282 csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1283 m = mmc_get_bits(raw_csd, 128, 62, 12);
1284 e = mmc_get_bits(raw_csd, 128, 47, 3);
1285 csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1286 csd->erase_blk_en = 0;
1287 csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1288 (mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1289 csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1290 csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1291 csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1292 csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1293 csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1297 mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr)
1299 unsigned int scr_struct;
1301 memset(scr, 0, sizeof(*scr));
1303 scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1304 if (scr_struct != 0) {
1305 printf("Unrecognised SCR structure version %d\n",
1309 scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1310 scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1314 mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1315 struct mmc_sd_status *sd_status)
1318 memset(sd_status, 0, sizeof(*sd_status));
1320 sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1321 sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1322 sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1323 sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1324 sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1325 sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1326 sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1327 sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1328 sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1329 sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1333 mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid)
1335 struct mmc_command cmd;
1338 memset(&cmd, 0, sizeof(cmd));
1339 cmd.opcode = MMC_ALL_SEND_CID;
1341 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1343 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1344 memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1349 mmc_send_csd(struct mmc_softc *sc, uint16_t rca, uint32_t *rawcsd)
1351 struct mmc_command cmd;
1354 memset(&cmd, 0, sizeof(cmd));
1355 cmd.opcode = MMC_SEND_CSD;
1356 cmd.arg = rca << 16;
1357 cmd.flags = MMC_RSP_R2 | MMC_CMD_BCR;
1359 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1360 memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1365 mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
1368 struct mmc_command cmd;
1369 struct mmc_data data;
1371 memset(&cmd, 0, sizeof(cmd));
1372 memset(&data, 0, sizeof(data));
1374 memset(rawscr, 0, 8);
1375 cmd.opcode = ACMD_SEND_SCR;
1376 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1382 data.flags = MMC_DATA_READ;
1384 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1385 rawscr[0] = be32toh(rawscr[0]);
1386 rawscr[1] = be32toh(rawscr[1]);
1391 mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
1393 struct mmc_command cmd;
1394 struct mmc_data data;
1397 memset(&cmd, 0, sizeof(cmd));
1398 memset(&data, 0, sizeof(data));
1400 memset(rawsdstatus, 0, 64);
1401 cmd.opcode = ACMD_SD_STATUS;
1402 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
1406 data.data = rawsdstatus;
1408 data.flags = MMC_DATA_READ;
1410 err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1411 for (i = 0; i < 16; i++)
1412 rawsdstatus[i] = be32toh(rawsdstatus[i]);
1417 mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1419 struct mmc_command cmd;
1422 memset(&cmd, 0, sizeof(cmd));
1423 cmd.opcode = MMC_SET_RELATIVE_ADDR;
1424 cmd.arg = resp << 16;
1425 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1427 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1432 mmc_send_relative_addr(struct mmc_softc *sc, uint32_t *resp)
1434 struct mmc_command cmd;
1437 memset(&cmd, 0, sizeof(cmd));
1438 cmd.opcode = SD_SEND_RELATIVE_ADDR;
1440 cmd.flags = MMC_RSP_R6 | MMC_CMD_BCR;
1442 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1443 *resp = cmd.resp[0];
1448 mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1450 struct mmc_command cmd;
1453 memset(&cmd, 0, sizeof(cmd));
1454 cmd.opcode = MMC_SET_BLOCKLEN;
1456 cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
1458 err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1463 mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1467 case bus_timing_normal:
1468 return (ivar->tran_speed);
1470 return (ivar->hs_tran_speed);
1471 case bus_timing_uhs_sdr12:
1472 return (SD_SDR12_MAX);
1473 case bus_timing_uhs_sdr25:
1474 return (SD_SDR25_MAX);
1475 case bus_timing_uhs_ddr50:
1476 return (SD_DDR50_MAX);
1477 case bus_timing_uhs_sdr50:
1478 return (SD_SDR50_MAX);
1479 case bus_timing_uhs_sdr104:
1480 return (SD_SDR104_MAX);
1481 case bus_timing_mmc_ddr52:
1482 return (MMC_TYPE_DDR52_MAX);
1483 case bus_timing_mmc_hs200:
1484 case bus_timing_mmc_hs400:
1485 case bus_timing_mmc_hs400es:
1486 return (MMC_TYPE_HS200_HS400ES_MAX);
1492 mmc_timing_to_string(enum mmc_bus_timing timing)
1496 case bus_timing_normal:
1497 return ("normal speed");
1499 return ("high speed");
1500 case bus_timing_uhs_sdr12:
1501 case bus_timing_uhs_sdr25:
1502 case bus_timing_uhs_sdr50:
1503 case bus_timing_uhs_sdr104:
1504 return ("single data rate");
1505 case bus_timing_uhs_ddr50:
1506 case bus_timing_mmc_ddr52:
1507 return ("dual data rate");
1508 case bus_timing_mmc_hs200:
1510 case bus_timing_mmc_hs400:
1512 case bus_timing_mmc_hs400es:
1513 return ("HS400 with enhanced strobe");
1519 mmc_host_timing(device_t dev, enum mmc_bus_timing timing)
1523 host_caps = mmcbr_get_caps(dev);
1525 #define HOST_TIMING_CAP(host_caps, cap) ({ \
1527 if (((host_caps) & (cap)) == (cap)) \
1535 case bus_timing_normal:
1538 return (HOST_TIMING_CAP(host_caps, MMC_CAP_HSPEED));
1539 case bus_timing_uhs_sdr12:
1540 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR12));
1541 case bus_timing_uhs_sdr25:
1542 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR25));
1543 case bus_timing_uhs_ddr50:
1544 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_DDR50));
1545 case bus_timing_uhs_sdr50:
1546 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR50));
1547 case bus_timing_uhs_sdr104:
1548 return (HOST_TIMING_CAP(host_caps, MMC_CAP_UHS_SDR104));
1549 case bus_timing_mmc_ddr52:
1550 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_DDR52));
1551 case bus_timing_mmc_hs200:
1552 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS200));
1553 case bus_timing_mmc_hs400:
1554 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400));
1555 case bus_timing_mmc_hs400es:
1556 return (HOST_TIMING_CAP(host_caps, MMC_CAP_MMC_HS400 |
1557 MMC_CAP_MMC_ENH_STROBE));
1560 #undef HOST_TIMING_CAP
1566 mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1568 enum mmc_bus_timing timing;
1570 device_printf(dev, "Card at relative address 0x%04x%s:\n",
1571 ivar->rca, newcard ? " added" : "");
1572 device_printf(dev, " card: %s\n", ivar->card_id_string);
1573 for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1574 if (isset(&ivar->timings, timing))
1577 device_printf(dev, " quirks: %b\n", ivar->quirks, MMC_QUIRKS_FMT);
1578 device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1579 (ivar->bus_width == bus_width_1 ? 1 :
1580 (ivar->bus_width == bus_width_4 ? 4 : 8)),
1581 mmc_timing_to_dtr(ivar, timing) / 1000000,
1582 mmc_timing_to_string(timing));
1583 device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1584 ivar->sec_count, ivar->erase_sector,
1585 ivar->read_only ? ", read-only" : "");
1589 mmc_discover_cards(struct mmc_softc *sc)
1591 u_char switch_res[64];
1592 uint32_t raw_cid[4];
1593 struct mmc_ivars *ivar = NULL;
1594 const struct mmc_quirk *quirk;
1595 const uint8_t *ext_csd;
1597 int err, host_caps, i, newcard;
1598 uint32_t resp, sec_count, status;
1603 host_caps = mmcbr_get_caps(sc->dev);
1604 if (bootverbose || mmc_debug)
1605 device_printf(sc->dev, "Probing cards\n");
1608 sc->squelched++; /* Errors are expected, squelch reporting. */
1609 err = mmc_all_send_cid(sc, raw_cid);
1611 if (err == MMC_ERR_TIMEOUT)
1613 if (err != MMC_ERR_NONE) {
1614 device_printf(sc->dev, "Error reading CID %d\n", err);
1618 for (i = 0; i < sc->child_count; i++) {
1619 ivar = device_get_ivars(sc->child_list[i]);
1620 if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1626 if (bootverbose || mmc_debug) {
1627 device_printf(sc->dev,
1628 "%sard detected (CID %08x%08x%08x%08x)\n",
1629 newcard ? "New c" : "C",
1630 raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1633 ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1635 memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1637 if (mmcbr_get_ro(sc->dev))
1638 ivar->read_only = 1;
1639 ivar->bus_width = bus_width_1;
1640 setbit(&ivar->timings, bus_timing_normal);
1641 ivar->mode = mmcbr_get_mode(sc->dev);
1642 if (ivar->mode == mode_sd) {
1643 mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1644 err = mmc_send_relative_addr(sc, &resp);
1645 if (err != MMC_ERR_NONE) {
1646 device_printf(sc->dev,
1647 "Error getting RCA %d\n", err);
1650 ivar->rca = resp >> 16;
1652 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1653 if (err != MMC_ERR_NONE) {
1654 device_printf(sc->dev,
1655 "Error getting CSD %d\n", err);
1658 if (bootverbose || mmc_debug)
1659 device_printf(sc->dev,
1660 "%sard detected (CSD %08x%08x%08x%08x)\n",
1661 newcard ? "New c" : "C", ivar->raw_csd[0],
1662 ivar->raw_csd[1], ivar->raw_csd[2],
1664 err = mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1665 if (err != MMC_ERR_NONE) {
1666 device_printf(sc->dev, "Error decoding CSD\n");
1669 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1670 if (ivar->csd.csd_structure > 0)
1672 ivar->tran_speed = ivar->csd.tran_speed;
1673 ivar->erase_sector = ivar->csd.erase_sector *
1674 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1676 err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1678 if (err != MMC_ERR_NONE) {
1679 device_printf(sc->dev,
1680 "Error reading card status %d\n", err);
1683 if ((status & R1_CARD_IS_LOCKED) != 0) {
1684 device_printf(sc->dev,
1685 "Card is password protected, skipping\n");
1689 /* Get card SCR. Card must be selected to fetch it. */
1690 err = mmc_select_card(sc, ivar->rca);
1691 if (err != MMC_ERR_NONE) {
1692 device_printf(sc->dev,
1693 "Error selecting card %d\n", err);
1696 err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1697 if (err != MMC_ERR_NONE) {
1698 device_printf(sc->dev,
1699 "Error reading SCR %d\n", err);
1702 mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1703 /* Get card switch capabilities (command class 10). */
1704 if ((ivar->scr.sda_vsn >= 1) &&
1705 (ivar->csd.ccc & (1 << 10))) {
1706 err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1707 SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1709 if (err == MMC_ERR_NONE &&
1710 switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1711 setbit(&ivar->timings, bus_timing_hs);
1712 ivar->hs_tran_speed = SD_HS_MAX;
1717 * We deselect then reselect the card here. Some cards
1718 * become unselected and timeout with the above two
1719 * commands, although the state tables / diagrams in the
1720 * standard suggest they go back to the transfer state.
1721 * Other cards don't become deselected, and if we
1722 * attempt to blindly re-select them, we get timeout
1723 * errors from some controllers. So we deselect then
1724 * reselect to handle all situations. The only thing we
1725 * use from the sd_status is the erase sector size, but
1726 * it is still nice to get that right.
1728 (void)mmc_select_card(sc, 0);
1729 (void)mmc_select_card(sc, ivar->rca);
1730 (void)mmc_app_sd_status(sc, ivar->rca,
1731 ivar->raw_sd_status);
1732 mmc_app_decode_sd_status(ivar->raw_sd_status,
1734 if (ivar->sd_status.au_size != 0) {
1735 ivar->erase_sector =
1736 16 << ivar->sd_status.au_size;
1738 /* Find maximum supported bus width. */
1739 if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1740 (ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1741 ivar->bus_width = bus_width_4;
1746 err = mmc_set_relative_addr(sc, ivar->rca);
1747 if (err != MMC_ERR_NONE) {
1748 device_printf(sc->dev, "Error setting RCA %d\n", err);
1752 err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1753 if (err != MMC_ERR_NONE) {
1754 device_printf(sc->dev, "Error getting CSD %d\n", err);
1757 if (bootverbose || mmc_debug)
1758 device_printf(sc->dev,
1759 "%sard detected (CSD %08x%08x%08x%08x)\n",
1760 newcard ? "New c" : "C", ivar->raw_csd[0],
1761 ivar->raw_csd[1], ivar->raw_csd[2],
1764 mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1765 ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1766 ivar->tran_speed = ivar->csd.tran_speed;
1767 ivar->erase_sector = ivar->csd.erase_sector *
1768 ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1770 err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1771 if (err != MMC_ERR_NONE) {
1772 device_printf(sc->dev,
1773 "Error reading card status %d\n", err);
1776 if ((status & R1_CARD_IS_LOCKED) != 0) {
1777 device_printf(sc->dev,
1778 "Card is password protected, skipping\n");
1782 err = mmc_select_card(sc, ivar->rca);
1783 if (err != MMC_ERR_NONE) {
1784 device_printf(sc->dev, "Error selecting card %d\n",
1790 /* Only MMC >= 4.x devices support EXT_CSD. */
1791 if (ivar->csd.spec_vers >= 4) {
1792 err = mmc_send_ext_csd(sc->dev, sc->dev,
1794 if (err != MMC_ERR_NONE) {
1795 device_printf(sc->dev,
1796 "Error reading EXT_CSD %d\n", err);
1799 ext_csd = ivar->raw_ext_csd;
1800 rev = ext_csd[EXT_CSD_REV];
1801 /* Handle extended capacity from EXT_CSD */
1802 sec_count = le32dec(&ext_csd[EXT_CSD_SEC_CNT]);
1803 if (sec_count != 0) {
1804 ivar->sec_count = sec_count;
1807 /* Find maximum supported bus width. */
1808 ivar->bus_width = mmc_test_bus_width(sc);
1809 /* Get device speeds beyond normal mode. */
1810 card_type = ext_csd[EXT_CSD_CARD_TYPE];
1811 if ((card_type & EXT_CSD_CARD_TYPE_HS_52) != 0) {
1812 setbit(&ivar->timings, bus_timing_hs);
1813 ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1814 } else if ((card_type & EXT_CSD_CARD_TYPE_HS_26) != 0) {
1815 setbit(&ivar->timings, bus_timing_hs);
1816 ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1818 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1819 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1820 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1821 setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1823 if ((card_type & EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1824 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1825 setbit(&ivar->timings, bus_timing_mmc_ddr52);
1826 setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1828 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_2V) != 0 &&
1829 (host_caps & MMC_CAP_SIGNALING_120) != 0) {
1830 setbit(&ivar->timings, bus_timing_mmc_hs200);
1831 setbit(&ivar->vccq_120, bus_timing_mmc_hs200);
1833 if ((card_type & EXT_CSD_CARD_TYPE_HS200_1_8V) != 0 &&
1834 (host_caps & MMC_CAP_SIGNALING_180) != 0) {
1835 setbit(&ivar->timings, bus_timing_mmc_hs200);
1836 setbit(&ivar->vccq_180, bus_timing_mmc_hs200);
1838 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1839 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1840 ivar->bus_width == bus_width_8) {
1841 setbit(&ivar->timings, bus_timing_mmc_hs400);
1842 setbit(&ivar->vccq_120, bus_timing_mmc_hs400);
1844 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1845 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1846 ivar->bus_width == bus_width_8) {
1847 setbit(&ivar->timings, bus_timing_mmc_hs400);
1848 setbit(&ivar->vccq_180, bus_timing_mmc_hs400);
1850 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_2V) != 0 &&
1851 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1852 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1853 (host_caps & MMC_CAP_SIGNALING_120) != 0 &&
1854 ivar->bus_width == bus_width_8) {
1855 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1856 setbit(&ivar->vccq_120, bus_timing_mmc_hs400es);
1858 if ((card_type & EXT_CSD_CARD_TYPE_HS400_1_8V) != 0 &&
1859 (ext_csd[EXT_CSD_STROBE_SUPPORT] &
1860 EXT_CSD_STROBE_SUPPORT_EN) != 0 &&
1861 (host_caps & MMC_CAP_SIGNALING_180) != 0 &&
1862 ivar->bus_width == bus_width_8) {
1863 setbit(&ivar->timings, bus_timing_mmc_hs400es);
1864 setbit(&ivar->vccq_180, bus_timing_mmc_hs400es);
1867 * Determine generic switch timeout (provided in
1868 * units of 10 ms), defaulting to 500 ms.
1870 ivar->cmd6_time = 500 * 1000;
1872 ivar->cmd6_time = 10 *
1873 ext_csd[EXT_CSD_GEN_CMD6_TIME];
1874 /* Handle HC erase sector size. */
1875 if (ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1876 ivar->erase_sector = 1024 *
1877 ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1878 err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1879 EXT_CSD_CMD_SET_NORMAL,
1880 EXT_CSD_ERASE_GRP_DEF,
1881 EXT_CSD_ERASE_GRP_DEF_EN,
1882 ivar->cmd6_time, true);
1883 if (err != MMC_ERR_NONE) {
1884 device_printf(sc->dev,
1885 "Error setting erase group %d\n",
1892 mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid, rev >= 5);
1895 for (quirk = &mmc_quirks[0]; quirk->mid != 0x0; quirk++) {
1896 if ((quirk->mid == MMC_QUIRK_MID_ANY ||
1897 quirk->mid == ivar->cid.mid) &&
1898 (quirk->oid == MMC_QUIRK_OID_ANY ||
1899 quirk->oid == ivar->cid.oid) &&
1900 strncmp(quirk->pnm, ivar->cid.pnm,
1901 sizeof(ivar->cid.pnm)) == 0) {
1902 ivar->quirks = quirk->quirks;
1908 * Some cards that report maximum I/O block sizes greater
1909 * than 512 require the block length to be set to 512, even
1910 * though that is supposed to be the default. Example:
1912 * Transcend 2GB SDSC card, CID:
1913 * mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1915 if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE ||
1916 ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1917 mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1919 mmc_format_card_id_string(ivar);
1921 if (bootverbose || mmc_debug)
1922 mmc_log_card(sc->dev, ivar, newcard);
1925 child = device_add_child(sc->dev, NULL, -1);
1926 if (child != NULL) {
1927 device_set_ivars(child, ivar);
1928 sc->child_list = realloc(sc->child_list,
1929 sizeof(device_t) * sc->child_count + 1,
1930 M_DEVBUF, M_WAITOK);
1931 sc->child_list[sc->child_count++] = child;
1933 device_printf(sc->dev, "Error adding child\n");
1937 if (newcard && child == NULL)
1938 free(ivar, M_DEVBUF);
1939 (void)mmc_select_card(sc, 0);
1941 * Not returning here when one MMC device could no be added
1942 * potentially would mean looping forever when that device
1943 * is broken (in which case it also may impact the remainder
1944 * of the bus anyway, though).
1946 if ((newcard && child == NULL) ||
1947 mmcbr_get_mode(sc->dev) == mode_sd)
1953 mmc_update_child_list(struct mmc_softc *sc)
1958 if (sc->child_count == 0) {
1959 free(sc->child_list, M_DEVBUF);
1962 for (i = j = 0; i < sc->child_count; i++) {
1964 child = sc->child_list[j++];
1969 sc->child_list[i] = child;
1971 sc->child_list = realloc(sc->child_list, sizeof(device_t) *
1972 sc->child_count, M_DEVBUF, M_WAITOK);
1976 mmc_rescan_cards(struct mmc_softc *sc)
1978 struct mmc_ivars *ivar;
1981 for (i = j = 0; i < sc->child_count; i++) {
1982 ivar = device_get_ivars(sc->child_list[i]);
1983 if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1984 if (bootverbose || mmc_debug)
1985 device_printf(sc->dev,
1986 "Card at relative address %d lost\n",
1988 err = device_delete_child(sc->dev, sc->child_list[i]);
1993 free(ivar, M_DEVBUF);
1997 if (sc->child_count == j)
1999 sc->child_count = j;
2000 mmc_update_child_list(sc);
2002 (void)mmc_select_card(sc, 0);
2006 mmc_delete_cards(struct mmc_softc *sc, bool final)
2008 struct mmc_ivars *ivar;
2012 for (i = j = 0; i < sc->child_count; i++) {
2013 ivar = device_get_ivars(sc->child_list[i]);
2014 if (bootverbose || mmc_debug)
2015 device_printf(sc->dev,
2016 "Card at relative address %d deleted\n",
2018 err = device_delete_child(sc->dev, sc->child_list[i]);
2026 free(ivar, M_DEVBUF);
2028 sc->child_count = j;
2029 mmc_update_child_list(sc);
2034 mmc_go_discovery(struct mmc_softc *sc)
2041 if (mmcbr_get_power_mode(dev) != power_on) {
2043 * First, try SD modes
2045 sc->squelched++; /* Errors are expected, squelch reporting. */
2046 mmcbr_set_mode(dev, mode_sd);
2048 mmcbr_set_bus_mode(dev, pushpull);
2049 if (bootverbose || mmc_debug)
2050 device_printf(sc->dev, "Probing bus\n");
2052 err = mmc_send_if_cond(sc, 1);
2053 if ((bootverbose || mmc_debug) && err == 0)
2054 device_printf(sc->dev,
2055 "SD 2.0 interface conditions: OK\n");
2056 if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2057 if (bootverbose || mmc_debug)
2058 device_printf(sc->dev, "SD probe: failed\n");
2062 mmcbr_set_mode(dev, mode_mmc);
2063 if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
2064 if (bootverbose || mmc_debug)
2065 device_printf(sc->dev,
2066 "MMC probe: failed\n");
2067 ocr = 0; /* Failed both, powerdown. */
2068 } else if (bootverbose || mmc_debug)
2069 device_printf(sc->dev,
2070 "MMC probe: OK (OCR: 0x%08x)\n", ocr);
2071 } else if (bootverbose || mmc_debug)
2072 device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
2076 mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
2077 if (mmcbr_get_ocr(dev) != 0)
2080 mmcbr_set_bus_mode(dev, opendrain);
2081 mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
2082 mmcbr_update_ios(dev);
2083 /* XXX recompute vdd based on new cards? */
2086 * Make sure that we have a mutually agreeable voltage to at least
2087 * one card on the bus.
2089 if (bootverbose || mmc_debug)
2090 device_printf(sc->dev, "Current OCR: 0x%08x\n",
2091 mmcbr_get_ocr(dev));
2092 if (mmcbr_get_ocr(dev) == 0) {
2093 device_printf(sc->dev, "No compatible cards found on bus\n");
2094 (void)mmc_delete_cards(sc, false);
2099 * Reselect the cards after we've idled them above.
2101 if (mmcbr_get_mode(dev) == mode_sd) {
2102 err = mmc_send_if_cond(sc, 1);
2103 mmc_send_app_op_cond(sc,
2104 (err ? 0 : MMC_OCR_CCS) | mmcbr_get_ocr(dev), NULL);
2106 mmc_send_op_cond(sc, MMC_OCR_CCS | mmcbr_get_ocr(dev), NULL);
2107 mmc_discover_cards(sc);
2108 mmc_rescan_cards(sc);
2110 mmcbr_set_bus_mode(dev, pushpull);
2111 mmcbr_update_ios(dev);
2112 mmc_calculate_clock(sc);
2116 mmc_calculate_clock(struct mmc_softc *sc)
2119 struct mmc_ivars *ivar;
2121 uint32_t dtr, max_dtr;
2123 enum mmc_bus_timing max_timing, timing;
2124 bool changed, hs400;
2127 max_dtr = mmcbr_get_f_max(dev);
2128 max_timing = bus_timing_max;
2131 for (i = 0; i < sc->child_count; i++) {
2132 ivar = device_get_ivars(sc->child_list[i]);
2133 if (isclr(&ivar->timings, max_timing) ||
2134 !mmc_host_timing(dev, max_timing)) {
2135 for (timing = max_timing - 1; timing >=
2136 bus_timing_normal; timing--) {
2137 if (isset(&ivar->timings, timing) &&
2138 mmc_host_timing(dev, timing)) {
2139 max_timing = timing;
2145 dtr = mmc_timing_to_dtr(ivar, max_timing);
2146 if (dtr < max_dtr) {
2151 } while (changed == true);
2153 if (bootverbose || mmc_debug) {
2155 "setting transfer rate to %d.%03dMHz (%s timing)\n",
2156 max_dtr / 1000000, (max_dtr / 1000) % 1000,
2157 mmc_timing_to_string(max_timing));
2161 * HS400 must be tuned in HS200 mode, so in case of HS400 we begin
2162 * with HS200 following the sequence as described in "6.6.2.2 HS200
2163 * timing mode selection" of the eMMC specification v5.1, too, and
2164 * switch to max_timing later. HS400ES requires no tuning and, thus,
2165 * can be switch to directly, but requires the same detour via high
2166 * speed mode as does HS400 (see mmc_switch_to_hs400()).
2168 hs400 = max_timing == bus_timing_mmc_hs400;
2169 timing = hs400 == true ? bus_timing_mmc_hs200 : max_timing;
2170 for (i = 0; i < sc->child_count; i++) {
2171 ivar = device_get_ivars(sc->child_list[i]);
2172 if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
2176 if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
2177 device_printf(dev, "Card at relative address %d "
2178 "failed to select\n", rca);
2182 if (timing == bus_timing_mmc_hs200 || /* includes HS400 */
2183 timing == bus_timing_mmc_hs400es) {
2184 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2185 device_printf(dev, "Failed to set VCCQ for "
2186 "card at relative address %d\n", rca);
2191 if (timing == bus_timing_mmc_hs200) { /* includes HS400 */
2192 /* Set bus width (required for initial tuning). */
2193 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2195 device_printf(dev, "Card at relative address "
2196 "%d failed to set bus width\n", rca);
2199 mmcbr_set_bus_width(dev, ivar->bus_width);
2200 mmcbr_update_ios(dev);
2201 } else if (timing == bus_timing_mmc_hs400es) {
2202 if (mmc_switch_to_hs400(sc, ivar, max_dtr, timing) !=
2204 device_printf(dev, "Card at relative address "
2205 "%d failed to set %s timing\n", rca,
2206 mmc_timing_to_string(timing));
2212 if (mmc_set_timing(sc, ivar, timing) != MMC_ERR_NONE) {
2213 device_printf(dev, "Card at relative address %d "
2214 "failed to set %s timing\n", rca,
2215 mmc_timing_to_string(timing));
2219 if (timing == bus_timing_mmc_ddr52) {
2221 * Set EXT_CSD_BUS_WIDTH_n_DDR in EXT_CSD_BUS_WIDTH
2222 * (must be done after switching to EXT_CSD_HS_TIMING).
2224 if (mmc_set_card_bus_width(sc, ivar, timing) !=
2226 device_printf(dev, "Card at relative address "
2227 "%d failed to set bus width\n", rca);
2230 mmcbr_set_bus_width(dev, ivar->bus_width);
2231 mmcbr_update_ios(dev);
2232 if (mmc_set_vccq(sc, ivar, timing) != MMC_ERR_NONE) {
2233 device_printf(dev, "Failed to set VCCQ for "
2234 "card at relative address %d\n", rca);
2240 /* Set clock (must be done before initial tuning). */
2241 mmcbr_set_clock(dev, max_dtr);
2242 mmcbr_update_ios(dev);
2244 if (mmcbr_tune(dev, hs400) != 0) {
2245 device_printf(dev, "Card at relative address %d "
2246 "failed to execute initial tuning\n", rca);
2250 if (hs400 == true && mmc_switch_to_hs400(sc, ivar, max_dtr,
2251 max_timing) != MMC_ERR_NONE) {
2252 device_printf(dev, "Card at relative address %d "
2253 "failed to set %s timing\n", rca,
2254 mmc_timing_to_string(max_timing));
2259 if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
2260 device_printf(dev, "Card at relative address %d "
2261 "failed to set power class\n", rca);
2264 (void)mmc_select_card(sc, 0);
2269 * Switch from HS200 to HS400 (either initially or for re-tuning) or directly
2270 * to HS400ES. This follows the sequences described in "6.6.2.3 HS400 timing
2271 * mode selection" of the eMMC specification v5.1.
2274 mmc_switch_to_hs400(struct mmc_softc *sc, struct mmc_ivars *ivar,
2275 uint32_t clock, enum mmc_bus_timing max_timing)
2285 * Both clock and timing must be set as appropriate for high speed
2286 * before eventually switching to HS400/HS400ES; mmc_set_timing()
2287 * will issue mmcbr_update_ios().
2289 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2290 err = mmc_set_timing(sc, ivar, bus_timing_hs);
2291 if (err != MMC_ERR_NONE)
2295 * Set EXT_CSD_BUS_WIDTH_8_DDR in EXT_CSD_BUS_WIDTH (and additionally
2296 * EXT_CSD_BUS_WIDTH_ES for HS400ES).
2298 err = mmc_set_card_bus_width(sc, ivar, max_timing);
2299 if (err != MMC_ERR_NONE)
2301 mmcbr_set_bus_width(dev, ivar->bus_width);
2302 mmcbr_update_ios(dev);
2304 /* Finally, switch to HS400/HS400ES mode. */
2305 err = mmc_set_timing(sc, ivar, max_timing);
2306 if (err != MMC_ERR_NONE)
2308 mmcbr_set_clock(dev, clock);
2309 mmcbr_update_ios(dev);
2310 return (MMC_ERR_NONE);
2314 * Switch from HS400 to HS200 (for re-tuning).
2317 mmc_switch_to_hs200(struct mmc_softc *sc, struct mmc_ivars *ivar,
2328 * Both clock and timing must initially be set as appropriate for
2329 * DDR52 before eventually switching to HS200; mmc_set_timing()
2330 * will issue mmcbr_update_ios().
2332 mmcbr_set_clock(dev, ivar->hs_tran_speed);
2333 err = mmc_set_timing(sc, ivar, bus_timing_mmc_ddr52);
2334 if (err != MMC_ERR_NONE)
2338 * Next, switch to high speed. Thus, clear EXT_CSD_BUS_WIDTH_n_DDR
2339 * in EXT_CSD_BUS_WIDTH and update bus width and timing in ios.
2341 err = mmc_set_card_bus_width(sc, ivar, bus_timing_hs);
2342 if (err != MMC_ERR_NONE)
2344 mmcbr_set_bus_width(dev, ivar->bus_width);
2345 mmcbr_set_timing(sc->dev, bus_timing_hs);
2346 mmcbr_update_ios(dev);
2348 /* Finally, switch to HS200 mode. */
2349 err = mmc_set_timing(sc, ivar, bus_timing_mmc_hs200);
2350 if (err != MMC_ERR_NONE)
2352 mmcbr_set_clock(dev, clock);
2353 mmcbr_update_ios(dev);
2354 return (MMC_ERR_NONE);
2358 mmc_retune(device_t busdev, device_t dev, bool reset)
2360 struct mmc_softc *sc;
2361 struct mmc_ivars *ivar;
2364 enum mmc_bus_timing timing;
2366 if (device_get_parent(dev) != busdev)
2367 return (MMC_ERR_INVALID);
2369 sc = device_get_softc(busdev);
2370 if (sc->retune_needed != 1 && sc->retune_paused != 0)
2371 return (MMC_ERR_INVALID);
2373 timing = mmcbr_get_timing(busdev);
2374 if (timing == bus_timing_mmc_hs400) {
2376 * Controllers use the data strobe line to latch data from
2377 * the devices in HS400 mode so periodic re-tuning isn't
2378 * expected to be required, i. e. only if a CRC or tuning
2379 * error is signaled to the bridge. In these latter cases
2380 * we are asked to reset the tuning circuit and need to do
2381 * the switch timing dance.
2385 ivar = device_get_ivars(dev);
2386 clock = mmcbr_get_clock(busdev);
2387 if (mmc_switch_to_hs200(sc, ivar, clock) != MMC_ERR_NONE)
2388 return (MMC_ERR_BADCRC);
2390 err = mmcbr_retune(busdev, reset);
2391 if (err != 0 && timing == bus_timing_mmc_hs400)
2392 return (MMC_ERR_BADCRC);
2397 return (MMC_ERR_FAILED);
2399 return (MMC_ERR_INVALID);
2401 if (timing == bus_timing_mmc_hs400) {
2402 if (mmc_switch_to_hs400(sc, ivar, clock, timing) !=
2404 return (MMC_ERR_BADCRC);
2406 return (MMC_ERR_NONE);
2410 mmc_retune_pause(device_t busdev, device_t dev, bool retune)
2412 struct mmc_softc *sc;
2414 sc = device_get_softc(busdev);
2415 KASSERT(device_get_parent(dev) == busdev,
2416 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2417 device_get_nameunit(busdev)));
2418 KASSERT(sc->owner != NULL,
2419 ("%s: Request from %s without bus being acquired.", __func__,
2420 device_get_nameunit(dev)));
2422 if (retune == true && sc->retune_paused == 0)
2423 sc->retune_needed = 1;
2424 sc->retune_paused++;
2428 mmc_retune_unpause(device_t busdev, device_t dev)
2430 struct mmc_softc *sc;
2432 sc = device_get_softc(busdev);
2433 KASSERT(device_get_parent(dev) == busdev,
2434 ("%s: %s is not a child of %s", __func__, device_get_nameunit(dev),
2435 device_get_nameunit(busdev)));
2436 KASSERT(sc->owner != NULL,
2437 ("%s: Request from %s without bus being acquired.", __func__,
2438 device_get_nameunit(dev)));
2439 KASSERT(sc->retune_paused != 0,
2440 ("%s: Re-tune pause count already at 0", __func__));
2442 sc->retune_paused--;
2446 mmc_scan(struct mmc_softc *sc)
2448 device_t dev = sc->dev;
2451 err = mmc_acquire_bus(dev, dev);
2453 device_printf(dev, "Failed to acquire bus for scanning\n");
2456 mmc_go_discovery(sc);
2457 err = mmc_release_bus(dev, dev);
2459 device_printf(dev, "Failed to release bus after scanning\n");
2462 (void)bus_generic_attach(dev);
2466 mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
2468 struct mmc_ivars *ivar = device_get_ivars(child);
2473 case MMC_IVAR_SPEC_VERS:
2474 *result = ivar->csd.spec_vers;
2476 case MMC_IVAR_DSR_IMP:
2477 *result = ivar->csd.dsr_imp;
2479 case MMC_IVAR_MEDIA_SIZE:
2480 *result = ivar->sec_count;
2483 *result = ivar->rca;
2485 case MMC_IVAR_SECTOR_SIZE:
2486 *result = MMC_SECTOR_SIZE;
2488 case MMC_IVAR_TRAN_SPEED:
2489 *result = mmcbr_get_clock(bus);
2491 case MMC_IVAR_READ_ONLY:
2492 *result = ivar->read_only;
2494 case MMC_IVAR_HIGH_CAP:
2495 *result = ivar->high_cap;
2497 case MMC_IVAR_CARD_TYPE:
2498 *result = ivar->mode;
2500 case MMC_IVAR_BUS_WIDTH:
2501 *result = ivar->bus_width;
2503 case MMC_IVAR_ERASE_SECTOR:
2504 *result = ivar->erase_sector;
2506 case MMC_IVAR_MAX_DATA:
2507 *result = mmcbr_get_max_data(bus);
2509 case MMC_IVAR_CMD6_TIMEOUT:
2510 *result = ivar->cmd6_time;
2512 case MMC_IVAR_QUIRKS:
2513 *result = ivar->quirks;
2515 case MMC_IVAR_CARD_ID_STRING:
2516 *(char **)result = ivar->card_id_string;
2518 case MMC_IVAR_CARD_SN_STRING:
2519 *(char **)result = ivar->card_sn_string;
2526 mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
2530 * None are writable ATM
2536 mmc_delayed_attach(void *xsc)
2538 struct mmc_softc *sc = xsc;
2541 config_intrhook_disestablish(&sc->config_intrhook);
2545 mmc_child_location_str(device_t dev, device_t child, char *buf,
2549 snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child));
2553 static device_method_t mmc_methods[] = {
2555 DEVMETHOD(device_probe, mmc_probe),
2556 DEVMETHOD(device_attach, mmc_attach),
2557 DEVMETHOD(device_detach, mmc_detach),
2558 DEVMETHOD(device_suspend, mmc_suspend),
2559 DEVMETHOD(device_resume, mmc_resume),
2562 DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2563 DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2564 DEVMETHOD(bus_child_location_str, mmc_child_location_str),
2566 /* MMC Bus interface */
2567 DEVMETHOD(mmcbus_retune_pause, mmc_retune_pause),
2568 DEVMETHOD(mmcbus_retune_unpause, mmc_retune_unpause),
2569 DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2570 DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2571 DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2576 driver_t mmc_driver = {
2579 sizeof(struct mmc_softc),
2581 devclass_t mmc_devclass;
2583 MODULE_VERSION(mmc, MMC_VERSION);