2 * Copyright (c) 2009 Yahoo! Inc.
3 * Copyright (c) 2011-2015 LSI Corp.
4 * Copyright (c) 2013-2016 Avago Technologies
5 * Copyright 2000-2020 Broadcom Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD
37 #define MPR_DRIVER_VERSION "23.00.00.00-fbsd"
39 #define MPR_DB_MAX_WAIT 2500
41 #define MPR_REQ_FRAMES 2048
42 #define MPR_PRI_REQ_FRAMES 128
43 #define MPR_EVT_REPLY_FRAMES 32
44 #define MPR_REPLY_FRAMES MPR_REQ_FRAMES
45 #define MPR_CHAIN_FRAMES 16384
46 #define MPR_MAXIO_PAGES (-1)
47 #define MPR_SENSE_LEN SSD_FULL_SIZE
49 #define MPR_MSIX_MAX 96
50 #define MPR_SGE64_SIZE 12
51 #define MPR_SGE32_SIZE 8
52 #define MPR_SGC_SIZE 8
53 #define MPR_DEFAULT_CHAIN_SEG_SIZE 8
54 #define MPR_MAX_CHAIN_ELEMENT_SIZE 16
57 * PCIe NVMe Specific defines
59 //SLM-for now just use the same value as a SAS disk
60 #define NVME_QDEPTH MPR_REQ_FRAMES
61 #define PRP_ENTRY_SIZE 8
62 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */
63 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */
64 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
65 #define HOST_PAGE_SIZE_4K 12
67 #define MPR_FUNCTRACE(sc) \
68 mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
73 #define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
74 #define MPR_ATA_ID_TIMEOUT 5 /* 5 second timeout for SATA ID cmd */
75 #define MPR_MISSING_CHECK_DELAY 10 /* 10 seconds between missing check */
77 #define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810
79 #define MPR_SCSI_RI_INVALID_FRAME (0x00000002)
81 #define DEFAULT_SPINUP_WAIT 3 /* seconds to wait for spinup */
83 #include <sys/endian.h>
86 * host mapping related macro definitions
88 #define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF
89 #define MPR_DPM_BAD_IDX 0xFFFF
90 #define MPR_ENCTABLE_BAD_IDX 0xFF
91 #define MPR_MAX_MISSING_COUNT 0x0F
92 #define MPR_DEV_RESERVED 0x20000000
93 #define MPR_MAP_IN_USE 0x10000000
94 #define MPR_MAP_BAD_ID 0xFFFFFFFF
101 typedef struct _MPI2_CONFIG_PAGE_MAN_11
103 MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */
104 U8 FlashTime; /* 0x04 */
105 U8 NVTime; /* 0x05 */
107 U8 RFIoTimeout; /* 0x08 */
108 U8 EEDPTagMode; /* 0x09 */
109 U8 AWTValue; /* 0x0A */
110 U8 Reserve1; /* 0x0B */
111 U8 MaxCmdFrames; /* 0x0C */
112 U8 Reserve2; /* 0x0D */
113 U16 AddlFlags; /* 0x0E */
114 U32 SysRefClk; /* 0x10 */
115 U64 Reserve3[3]; /* 0x14 */
116 U16 AddlFlags2; /* 0x2C */
117 U8 AddlFlags3; /* 0x2E */
118 U8 Reserve4; /* 0x2F */
119 U64 opDebugEnable; /* 0x30 */
120 U64 PlDebugEnable; /* 0x38 */
121 U64 IrDebugEnable; /* 0x40 */
122 U32 BoardPowerRequirement; /* 0x48 */
123 U8 NVMeAbortTO; /* 0x4C */
124 U8 Reserve5; /* 0x4D */
125 U16 Reserve6; /* 0x4E */
126 U32 Reserve7[3]; /* 0x50 */
127 } MPI2_CONFIG_PAGE_MAN_11,
128 MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_11,
129 Mpi2ManufacturingPage11_t, MPI2_POINTER pMpi2ManufacturingPage11_t;
131 #define MPI2_MAN_PG11_ADDLFLAGS2_CUSTOM_TM_HANDLING_MASK (0x0010)
134 * struct dev_mapping_table - device mapping information
135 * @physical_id: SAS address for drives or WWID for RAID volumes
136 * @device_info: bitfield provides detailed info about the device
137 * @phy_bits: bitfields indicating controller phys
138 * @dpm_entry_num: index of this device in device persistent map table
139 * @dev_handle: device handle for the device pointed by this entry
141 * @missing_count: number of times the device not detected by driver
142 * @hide_flag: Hide this physical disk/not (foreign configuration)
143 * @init_complete: Whether the start of the day checks completed or not
144 * @TLR_bits: Turn TLR support on or off
146 struct dev_mapping_table {
161 * struct enc_mapping_table - mapping information about an enclosure
162 * @enclosure_id: Logical ID of this enclosure
163 * @start_index: index to the entry in dev_mapping_table
164 * @phy_bits: bitfields indicating controller phys
165 * @dpm_entry_num: index of this enclosure in device persistent map table
166 * @enc_handle: device handle for the enclosure pointed by this entry
167 * @num_slots: number of slots in the enclosure
168 * @start_slot: Starting slot id
169 * @missing_count: number of times the device not detected by driver
170 * @removal_flag: used to mark the device for removal
171 * @skip_search: used as a flag to include/exclude enclosure for search
172 * @init_complete: Whether the start of the day checks completed or not
174 struct enc_mapping_table {
189 * struct map_removal_table - entries to be removed from mapping table
190 * @dpm_entry_num: index of this device in device persistent map table
191 * @dev_handle: device handle for the device pointed by this entry
193 struct map_removal_table{
198 typedef struct mpr_fw_diagnostic_buffer {
200 uint8_t extended_type;
202 uint8_t force_release;
203 uint32_t product_specific[23];
207 uint8_t owned_by_firmware;
209 } mpr_fw_diagnostic_buffer_t;
215 struct mprsas_target;
216 struct mpr_column_map;
218 MALLOC_DECLARE(M_MPR);
220 typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
221 MPI2_EVENT_NOTIFICATION_REPLY *reply);
222 typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
225 TAILQ_ENTRY(mpr_chain) chain_link;
227 uint64_t chain_busaddr;
230 struct mpr_prp_page {
231 TAILQ_ENTRY(mpr_prp_page) prp_page_link;
233 uint64_t prp_page_busaddr;
237 * This needs to be at least 2 to support SMP passthrough.
239 #define MPR_IOVEC_COUNT 2
242 TAILQ_ENTRY(mpr_command) cm_link;
243 TAILQ_ENTRY(mpr_command) cm_recovery;
244 struct mpr_softc *cm_sc;
250 struct iovec cm_iovec[MPR_IOVEC_COUNT];
256 uint32_t cm_reply_data;
257 mpr_command_callback_t *cm_complete;
258 void *cm_complete_data;
259 struct mprsas_target *cm_targ;
260 MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
263 #define MPR_CM_FLAGS_POLLED (1 << 0)
264 #define MPR_CM_FLAGS_COMPLETE (1 << 1)
265 #define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2)
266 #define MPR_CM_FLAGS_DATAOUT (1 << 3)
267 #define MPR_CM_FLAGS_DATAIN (1 << 4)
268 #define MPR_CM_FLAGS_WAKEUP (1 << 5)
269 #define MPR_CM_FLAGS_USE_UIO (1 << 6)
270 #define MPR_CM_FLAGS_SMP_PASS (1 << 7)
271 #define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8)
272 #define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED
273 #define MPR_CM_FLAGS_USE_CCB (1 << 9)
274 #define MPR_CM_FLAGS_SATA_ID_TIMEOUT (1 << 10)
276 #define MPR_CM_STATE_FREE 0
277 #define MPR_CM_STATE_BUSY 1
278 #define MPR_CM_STATE_TIMEDOUT 2
279 #define MPR_CM_STATE_INQUEUE 3
280 bus_dmamap_t cm_dmamap;
281 struct scsi_sense_data *cm_sense;
282 uint64_t *nvme_error_response;
283 TAILQ_HEAD(, mpr_chain) cm_chain_list;
284 TAILQ_HEAD(, mpr_prp_page) cm_prp_page_list;
285 uint32_t cm_req_busaddr;
286 bus_addr_t cm_sense_busaddr;
287 struct callout cm_callout;
288 mpr_command_callback_t *cm_timeout_handler;
291 struct mpr_column_map {
293 uint8_t phys_disk_num;
296 struct mpr_event_handle {
297 TAILQ_ENTRY(mpr_event_handle) eh_list;
298 mpr_evt_callback_t *callback;
303 struct mpr_busdma_context {
308 struct mpr_softc *softc;
309 bus_dmamap_t buffer_dmamap;
310 bus_dma_tag_t buffer_dmat;
314 struct mpr_softc *sc;
316 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
319 ck_ring_buffer_t *ringmem;
320 ck_ring_buffer_t *chainmem;
322 ck_ring_t chain_ring;
324 bus_dma_tag_t buffer_dmat;
325 int io_cmds_highwater;
326 int chain_free_lowwater;
327 int chain_alloc_fail;
328 struct resource *irq;
335 struct cdev *mpr_cdev;
337 #define MPR_FLAGS_INTX (1 << 0)
338 #define MPR_FLAGS_MSI (1 << 1)
339 #define MPR_FLAGS_BUSY (1 << 2)
340 #define MPR_FLAGS_SHUTDOWN (1 << 3)
341 #define MPR_FLAGS_DIAGRESET (1 << 4)
342 #define MPR_FLAGS_ATTACH_DONE (1 << 5)
343 #define MPR_FLAGS_GEN35_IOC (1 << 6)
344 #define MPR_FLAGS_REALLOCATED (1 << 7)
345 #define MPR_FLAGS_SEA_IOC (1 << 8)
350 u_int atomic_desc_capable;
353 int io_cmds_highwater;
358 int chain_free_lowwater;
359 uint32_t chain_frame_size;
362 int prp_pages_free_lowwater;
364 int spinup_wait_time;
366 uint64_t chain_alloc_fail;
367 uint64_t prp_page_alloc_fail;
368 struct sysctl_ctx_list sysctl_ctx;
369 struct sysctl_oid *sysctl_tree;
371 struct mpr_command *commands;
372 struct mpr_chain *chains;
373 struct mpr_prp_page *prps;
374 struct callout periodic;
375 struct callout device_check_callout;
376 struct mpr_queue *queues;
378 struct mprsas_softc *sassc;
379 TAILQ_HEAD(, mpr_command) req_list;
380 TAILQ_HEAD(, mpr_command) high_priority_req_list;
381 TAILQ_HEAD(, mpr_chain) chain_list;
382 TAILQ_HEAD(, mpr_prp_page) prp_page_list;
383 TAILQ_HEAD(, mpr_command) tm_list;
387 struct resource *mpr_regs_resource;
388 bus_space_handle_t mpr_bhandle;
389 bus_space_tag_t mpr_btag;
392 bus_dma_tag_t mpr_parent_dmat;
393 bus_dma_tag_t buffer_dmat;
395 MPI2_IOC_FACTS_REPLY *facts;
400 int fqdepth; /* Free queue */
401 int pqdepth; /* Post queue */
403 uint8_t event_mask[16];
404 TAILQ_HEAD(, mpr_event_handle) event_list;
405 struct mpr_event_handle *mpr_log_eh;
408 struct intr_config_hook mpr_ich;
411 bus_addr_t req_busaddr;
412 bus_dma_tag_t req_dmat;
413 bus_dmamap_t req_map;
415 uint8_t *reply_frames;
416 bus_addr_t reply_busaddr;
417 bus_dma_tag_t reply_dmat;
418 bus_dmamap_t reply_map;
420 struct scsi_sense_data *sense_frames;
421 bus_addr_t sense_busaddr;
422 bus_dma_tag_t sense_dmat;
423 bus_dmamap_t sense_map;
425 uint8_t *chain_frames;
426 bus_dma_tag_t chain_dmat;
427 bus_dmamap_t chain_map;
430 bus_addr_t prp_page_busaddr;
431 bus_dma_tag_t prp_page_dmat;
432 bus_dmamap_t prp_page_map;
434 MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
435 bus_addr_t post_busaddr;
436 uint32_t *free_queue;
437 bus_addr_t free_busaddr;
438 bus_dma_tag_t queues_dmat;
439 bus_dmamap_t queues_map;
441 uint8_t *fw_diag_buffer;
442 bus_addr_t fw_diag_busaddr;
443 bus_dma_tag_t fw_diag_dmat;
444 bus_dmamap_t fw_diag_map;
448 /* static config pages */
449 Mpi2IOCPage8_t ioc_pg8;
450 Mpi2IOUnitPage8_t iounit_pg8;
452 /* host mapping support */
453 struct dev_mapping_table *mapping_table;
454 struct enc_mapping_table *enclosure_table;
455 struct map_removal_table *removal_table;
456 uint8_t *dpm_entry_used;
457 uint8_t *dpm_flush_entry;
458 Mpi2DriverMappingPage0_t *dpm_pg0;
459 uint16_t max_devices;
460 uint16_t max_enclosures;
461 uint16_t max_expanders;
463 uint8_t num_enc_table_entries;
464 uint8_t num_rsvd_entries;
465 uint16_t max_dpm_entries;
466 uint8_t is_dpm_enable;
467 uint8_t track_mapping_events;
468 uint32_t pending_map_events;
470 /* FW diag Buffer List */
471 mpr_fw_diagnostic_buffer_t
472 fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
474 /* Event Recording IOCTL support */
475 uint32_t events_to_record[4];
476 mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE];
478 uint32_t event_number;
480 /* EEDP and TLR support */
481 uint8_t eedp_enabled;
484 /* Shutdown Event Handler */
485 eventhandler_tag shutdown_eh;
487 /* To track topo events during reset */
488 #define MPR_DIAG_RESET_TIMEOUT 300000
489 uint8_t wait_for_port_enable;
490 uint8_t port_enable_complete;
491 uint8_t msleep_fake_chan;
493 /* StartStopUnit command handling at shutdown */
494 uint32_t SSU_refcount;
497 /* Configuration tunables */
502 u_int max_prireqframes;
503 u_int max_replyframes;
505 char exclude_ids[80];
507 struct timeval lastfail;
508 uint8_t custom_nvme_tm_handling;
509 uint8_t nvme_abort_timeout;
512 struct mpr_config_params {
513 MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
515 u_int page_address; /* Attributes, not a phys address */
520 void (*callback)(struct mpr_softc *, struct mpr_config_params *);
524 struct scsi_read_capacity_eedp
531 static __inline uint32_t
532 mpr_regread(struct mpr_softc *sc, uint32_t offset)
534 uint32_t ret_val, i = 0;
537 bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset);
538 } while((sc->mpr_flags & MPR_FLAGS_SEA_IOC) &&
539 (ret_val == 0) && (++i < 3));
545 mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
547 bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
550 /* free_queue must have Little Endian address
551 * TODO- cm_reply_data is unwanted. We can remove it.
554 mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
556 if (++sc->replyfreeindex >= sc->fqdepth)
557 sc->replyfreeindex = 0;
558 sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
559 mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
562 static __inline struct mpr_chain *
563 mpr_alloc_chain(struct mpr_softc *sc)
565 struct mpr_chain *chain;
567 if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
568 TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
570 if (sc->chain_free < sc->chain_free_lowwater)
571 sc->chain_free_lowwater = sc->chain_free;
573 sc->chain_alloc_fail++;
578 mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
581 bzero(chain->chain, 128);
584 TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
587 static __inline struct mpr_prp_page *
588 mpr_alloc_prp_page(struct mpr_softc *sc)
590 struct mpr_prp_page *prp_page;
592 if ((prp_page = TAILQ_FIRST(&sc->prp_page_list)) != NULL) {
593 TAILQ_REMOVE(&sc->prp_page_list, prp_page, prp_page_link);
594 sc->prp_pages_free--;
595 if (sc->prp_pages_free < sc->prp_pages_free_lowwater)
596 sc->prp_pages_free_lowwater = sc->prp_pages_free;
598 sc->prp_page_alloc_fail++;
603 mpr_free_prp_page(struct mpr_softc *sc, struct mpr_prp_page *prp_page)
605 sc->prp_pages_free++;
606 TAILQ_INSERT_TAIL(&sc->prp_page_list, prp_page, prp_page_link);
610 mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
612 struct mpr_chain *chain, *chain_temp;
613 struct mpr_prp_page *prp_page, *prp_page_temp;
615 KASSERT(cm->cm_state == MPR_CM_STATE_BUSY, ("state not busy\n"));
617 if (cm->cm_reply != NULL)
618 mpr_free_reply(sc, cm->cm_reply_data);
621 cm->cm_complete = NULL;
622 cm->cm_complete_data = NULL;
627 cm->cm_state = MPR_CM_STATE_FREE;
634 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
635 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
636 mpr_free_chain(sc, chain);
638 TAILQ_FOREACH_SAFE(prp_page, &cm->cm_prp_page_list, prp_page_link,
640 TAILQ_REMOVE(&cm->cm_prp_page_list, prp_page, prp_page_link);
641 mpr_free_prp_page(sc, prp_page);
643 TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
646 static __inline struct mpr_command *
647 mpr_alloc_command(struct mpr_softc *sc)
649 struct mpr_command *cm;
651 cm = TAILQ_FIRST(&sc->req_list);
655 KASSERT(cm->cm_state == MPR_CM_STATE_FREE,
656 ("mpr: Allocating busy command\n"));
658 TAILQ_REMOVE(&sc->req_list, cm, cm_link);
659 cm->cm_state = MPR_CM_STATE_BUSY;
660 cm->cm_timeout_handler = NULL;
665 mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
667 struct mpr_chain *chain, *chain_temp;
669 KASSERT(cm->cm_state == MPR_CM_STATE_BUSY, ("state not busy\n"));
671 if (cm->cm_reply != NULL)
672 mpr_free_reply(sc, cm->cm_reply_data);
675 cm->cm_complete = NULL;
676 cm->cm_complete_data = NULL;
680 cm->cm_state = MPR_CM_STATE_FREE;
681 TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
682 TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
683 mpr_free_chain(sc, chain);
685 TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
688 static __inline struct mpr_command *
689 mpr_alloc_high_priority_command(struct mpr_softc *sc)
691 struct mpr_command *cm;
693 cm = TAILQ_FIRST(&sc->high_priority_req_list);
697 KASSERT(cm->cm_state == MPR_CM_STATE_FREE,
698 ("mpr: Allocating busy command\n"));
700 TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
701 cm->cm_state = MPR_CM_STATE_BUSY;
702 cm->cm_timeout_handler = NULL;
703 cm->cm_desc.HighPriority.RequestFlags =
704 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
709 mpr_lock(struct mpr_softc *sc)
711 mtx_lock(&sc->mpr_mtx);
715 mpr_unlock(struct mpr_softc *sc)
717 mtx_unlock(&sc->mpr_mtx);
720 #define MPR_INFO (1 << 0) /* Basic info */
721 #define MPR_FAULT (1 << 1) /* Hardware faults */
722 #define MPR_EVENT (1 << 2) /* Event data from the controller */
723 #define MPR_LOG (1 << 3) /* Log data from the controller */
724 #define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */
725 #define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */
726 #define MPR_INIT (1 << 6) /* Things related to system init */
727 #define MPR_XINFO (1 << 7) /* More detailed/noisy info */
728 #define MPR_USER (1 << 8) /* Trace user-generated commands */
729 #define MPR_MAPPING (1 << 9) /* Trace device mappings */
730 #define MPR_TRACE (1 << 10) /* Function-by-function trace */
732 #define MPR_SSU_DISABLE_SSD_DISABLE_HDD 0
733 #define MPR_SSU_ENABLE_SSD_DISABLE_HDD 1
734 #define MPR_SSU_DISABLE_SSD_ENABLE_HDD 2
735 #define MPR_SSU_ENABLE_SSD_ENABLE_HDD 3
737 #define mpr_printf(sc, args...) \
738 device_printf((sc)->mpr_dev, ##args)
740 #define mpr_print_field(sc, msg, args...) \
741 printf("\t" msg, ##args)
743 #define mpr_vprintf(sc, args...) \
746 mpr_printf(sc, ##args); \
749 #define mpr_dprint(sc, level, msg, args...) \
751 if ((sc)->mpr_debug & (level)) \
752 device_printf((sc)->mpr_dev, msg, ##args); \
755 #define MPR_PRINTFIELD_START(sc, tag...) \
756 mpr_printf((sc), ##tag); \
757 mpr_print_field((sc), ":\n")
758 #define MPR_PRINTFIELD_END(sc, tag) \
759 mpr_printf((sc), tag "\n")
760 #define MPR_PRINTFIELD(sc, facts, attr, fmt) \
761 mpr_print_field((sc), #attr ": " #fmt "\n", (facts)->attr)
764 mpr_from_u64(uint64_t data, U64 *mpr)
766 (mpr)->High = htole32((uint32_t)((data) >> 32));
767 (mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
770 static __inline uint64_t
771 mpr_to_u64(U64 *data)
773 return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
777 mpr_mask_intr(struct mpr_softc *sc)
781 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
782 mask |= MPI2_HIM_REPLY_INT_MASK;
783 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
787 mpr_unmask_intr(struct mpr_softc *sc)
791 mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
792 mask &= ~MPI2_HIM_REPLY_INT_MASK;
793 mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
796 int mpr_pci_setup_interrupts(struct mpr_softc *sc);
797 void mpr_pci_free_interrupts(struct mpr_softc *sc);
798 int mpr_pci_restore(struct mpr_softc *sc);
800 void mpr_get_tunables(struct mpr_softc *sc);
801 int mpr_attach(struct mpr_softc *sc);
802 int mpr_free(struct mpr_softc *sc);
803 void mpr_intr(void *);
804 void mpr_intr_msi(void *);
805 void mpr_intr_locked(void *);
806 int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
807 void *, struct mpr_event_handle **);
808 int mpr_restart(struct mpr_softc *);
809 int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *, uint8_t *);
810 int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
811 void mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm,
812 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, void *data,
813 uint32_t data_in_sz, uint32_t data_out_sz);
814 int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
815 int mpr_push_ieee_sge(struct mpr_command *, void *, int);
816 int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
817 int mpr_attach_sas(struct mpr_softc *sc);
818 int mpr_detach_sas(struct mpr_softc *sc);
819 int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
820 int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
821 void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
822 void mpr_memaddr_wait_cb(void *, bus_dma_segment_t *, int , int );
823 void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
824 int mpr_attach_user(struct mpr_softc *);
825 void mpr_detach_user(struct mpr_softc *);
826 void mprsas_record_event(struct mpr_softc *sc,
827 MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
829 int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
830 int mpr_wait_command(struct mpr_softc *sc, struct mpr_command **cm, int timeout,
832 int mpr_request_polled(struct mpr_softc *sc, struct mpr_command **cm);
834 int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
835 *mpi_reply, Mpi2BiosPage3_t *config_page);
836 int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
837 *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
838 int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
840 int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
841 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
842 int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
843 Mpi2SasDevicePage0_t *, u32 , u16 );
844 int mpr_config_get_pcie_device_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
845 *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, u32 form, u16 handle);
846 int mpr_config_get_pcie_device_pg2(struct mpr_softc *sc, Mpi2ConfigReply_t
847 *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, u32 form, u16 handle);
848 int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
849 Mpi2DriverMappingPage0_t *, u16 );
850 int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
851 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
853 int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
855 int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
856 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
858 int mpr_config_get_man_pg11(struct mpr_softc *sc, Mpi2ConfigReply_t *mpi_reply,
859 Mpi2ManufacturingPage11_t *config_page);
860 void mprsas_ir_shutdown(struct mpr_softc *sc, int howto);
862 int mpr_reinit(struct mpr_softc *sc);
863 void mprsas_handle_reinit(struct mpr_softc *sc);
865 void mpr_base_static_config_pages(struct mpr_softc *sc);
867 int mpr_mapping_initialize(struct mpr_softc *);
868 void mpr_mapping_topology_change_event(struct mpr_softc *,
869 Mpi2EventDataSasTopologyChangeList_t *);
870 void mpr_mapping_pcie_topology_change_event(struct mpr_softc *sc,
871 Mpi26EventDataPCIeTopologyChangeList_t *event_data);
872 void mpr_mapping_free_memory(struct mpr_softc *sc);
873 int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
874 Mpi2DriverMappingPage0_t *, u16 );
875 void mpr_mapping_exit(struct mpr_softc *);
876 void mpr_mapping_check_devices(void *);
877 int mpr_mapping_allocate_memory(struct mpr_softc *sc);
878 unsigned int mpr_mapping_get_tid(struct mpr_softc *, uint64_t , u16);
879 unsigned int mpr_mapping_get_tid_from_handle(struct mpr_softc *sc,
881 unsigned int mpr_mapping_get_raid_tid(struct mpr_softc *sc, u64 wwid,
883 unsigned int mpr_mapping_get_raid_tid_from_handle(struct mpr_softc *sc,
885 void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
886 Mpi2EventDataSasEnclDevStatusChange_t *event_data);
887 void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
888 Mpi2EventDataIrConfigChangeList_t *event_data);
890 void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
891 MPI2_EVENT_NOTIFICATION_REPLY *event);
892 void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
893 void mprsas_prepare_volume_remove(struct mprsas_softc *sassc, uint16_t handle);
894 int mprsas_startup(struct mpr_softc *sc);
895 struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *, int,
897 void mprsas_realloc_targets(struct mpr_softc *sc, int maxtargets);
898 struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
899 void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
900 void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
901 int mprsas_send_reset(struct mpr_softc *sc, struct mpr_command *tm,
904 SYSCTL_DECL(_hw_mpr);
906 /* Compatibility shims for different OS versions */
907 #if __FreeBSD_version >= 800001
908 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
909 kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
910 #define mpr_kproc_exit(arg) kproc_exit(arg)
912 #define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
913 kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
914 #define mpr_kproc_exit(arg) kthread_exit(arg)
917 #if defined(CAM_PRIORITY_XPT)
918 #define MPR_PRIORITY_XPT CAM_PRIORITY_XPT
920 #define MPR_PRIORITY_XPT 5
923 #if __FreeBSD_version < 800107
924 // Prior to FreeBSD-8.0 scp3_flags was not defined.
925 #define spc3_flags reserved
927 #define SPC3_SID_PROTECT 0x01
928 #define SPC3_SID_3PC 0x08
929 #define SPC3_SID_TPGS_MASK 0x30
930 #define SPC3_SID_TPGS_IMPLICIT 0x10
931 #define SPC3_SID_TPGS_EXPLICIT 0x20
932 #define SPC3_SID_ACC 0x40
933 #define SPC3_SID_SCCS 0x80
935 #define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
938 /* Definitions for SCSI unmap translation to NVMe DSM command */
940 /* UNMAP block descriptor structure */
941 struct unmap_blk_desc {
947 /* UNMAP command's data */
948 struct unmap_parm_list {
949 uint16_t unmap_data_len;
950 uint16_t unmap_blk_desc_data_len;
952 struct unmap_blk_desc desc[0];
955 /* SCSI ADDITIONAL SENSE Codes */
956 #define FIXED_SENSE_DATA 0x70
957 #define SCSI_ASC_NO_SENSE 0x00
958 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
959 #define SCSI_ASC_LUN_NOT_READY 0x04
960 #define SCSI_ASC_WARNING 0x0B
961 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
962 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
963 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
964 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
965 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
966 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
967 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
968 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
969 #define SCSI_ASC_INVALID_CDB 0x24
970 #define SCSI_ASC_INVALID_LUN 0x25
971 #define SCSI_ASC_INVALID_PARAMETER 0x26
972 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
973 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
975 /* SCSI ADDITIONAL SENSE Code Qualifiers */
976 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
977 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
978 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
979 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
980 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
981 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
982 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
983 #define SCSI_ASCQ_INVALID_LUN_ID 0x09