2 * Copyright (c) 2009 Yahoo! Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 /* Communications core for LSI MPT2 */
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/selinfo.h>
38 #include <sys/mutex.h>
39 #include <sys/module.h>
43 #include <sys/malloc.h>
45 #include <sys/sysctl.h>
47 #include <machine/bus.h>
48 #include <machine/resource.h>
51 #include <cam/scsi/scsi_all.h>
53 #include <dev/mps/mpi/mpi2_type.h>
54 #include <dev/mps/mpi/mpi2.h>
55 #include <dev/mps/mpi/mpi2_ioc.h>
56 #include <dev/mps/mpi/mpi2_cnfg.h>
57 #include <dev/mps/mpsvar.h>
58 #include <dev/mps/mps_table.h>
60 static void mps_startup(void *arg);
61 static void mps_startup_complete(struct mps_softc *sc, struct mps_command *cm);
62 static int mps_send_iocinit(struct mps_softc *sc);
63 static int mps_attach_log(struct mps_softc *sc);
64 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data, MPI2_EVENT_NOTIFICATION_REPLY *reply);
65 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
66 static void mps_periodic(void *);
68 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters");
70 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
73 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
74 * any state and back to its initialization state machine.
76 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
79 mps_hard_reset(struct mps_softc *sc)
82 int i, error, tries = 0;
84 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
86 /* Clear any pending interrupts */
87 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
89 /* Push the magic sequence */
91 while (tries++ < 20) {
92 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
93 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
98 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
99 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
107 /* Send the actual reset. XXX need to refresh the reg? */
108 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
109 reg | MPI2_DIAG_RESET_ADAPTER);
111 /* Wait up to 300 seconds in 50ms intervals */
113 for (i = 0; i < 60000; i++) {
115 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
116 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
124 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
130 mps_soft_reset(struct mps_softc *sc)
133 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
135 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
136 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
137 MPI2_DOORBELL_FUNCTION_SHIFT);
144 mps_transition_ready(struct mps_softc *sc)
147 int error, tries = 0;
149 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
152 while (tries++ < 5) {
153 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
154 mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg);
157 * Ensure the IOC is ready to talk. If it's not, try
160 if (reg & MPI2_DOORBELL_USED) {
166 /* Is the adapter owned by another peer? */
167 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
168 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
169 device_printf(sc->mps_dev, "IOC is under the control "
170 "of another peer host, aborting initialization.\n");
174 state = reg & MPI2_IOC_STATE_MASK;
175 if (state == MPI2_IOC_STATE_READY) {
179 } else if (state == MPI2_IOC_STATE_FAULT) {
180 mps_dprint(sc, MPS_INFO, "IOC in fault state 0x%x\n",
181 state & MPI2_DOORBELL_FAULT_CODE_MASK);
183 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
184 /* Need to take ownership */
186 } else if (state == MPI2_IOC_STATE_RESET) {
187 /* Wait a bit, IOC might be in transition */
188 mps_dprint(sc, MPS_FAULT,
189 "IOC in unexpected reset state\n");
191 mps_dprint(sc, MPS_FAULT,
192 "IOC in unknown state 0x%x\n", state);
197 /* Wait 50ms for things to settle down. */
202 device_printf(sc->mps_dev, "Cannot transition IOC to ready\n");
208 mps_transition_operational(struct mps_softc *sc)
213 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
216 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
217 mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg);
219 state = reg & MPI2_IOC_STATE_MASK;
220 if (state != MPI2_IOC_STATE_READY) {
221 if ((error = mps_transition_ready(sc)) != 0)
225 error = mps_send_iocinit(sc);
229 /* Wait for the chip to ACK a word that we've put into its FIFO */
231 mps_wait_db_ack(struct mps_softc *sc)
235 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
236 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
237 MPI2_HIS_SYS2IOC_DB_STATUS) == 0)
244 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
246 mps_wait_db_int(struct mps_softc *sc)
250 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
251 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
252 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
259 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
261 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
262 int req_sz, int reply_sz, int timeout)
266 int i, count, ioc_sz, residual;
269 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
272 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
276 * Announce that a message is coming through the doorbell. Messages
277 * are pushed at 32bit words, so round up if needed.
279 count = (req_sz + 3) / 4;
280 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
281 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
282 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
285 if (mps_wait_db_int(sc) ||
286 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
287 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
290 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
291 if (mps_wait_db_ack(sc) != 0) {
292 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
297 /* Clock out the message data synchronously in 32-bit dwords*/
298 data32 = (uint32_t *)req;
299 for (i = 0; i < count; i++) {
300 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, data32[i]);
301 if (mps_wait_db_ack(sc) != 0) {
302 mps_dprint(sc, MPS_FAULT,
303 "Timeout while writing doorbell\n");
309 /* Clock in the reply in 16-bit words. The total length of the
310 * message is always in the 4th byte, so clock out the first 2 words
311 * manually, then loop the rest.
313 data16 = (uint16_t *)reply;
314 if (mps_wait_db_int(sc) != 0) {
315 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
319 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
320 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
321 if (mps_wait_db_int(sc) != 0) {
322 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
326 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
327 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
329 /* Number of 32bit words in the message */
330 ioc_sz = reply->MsgLength;
333 * Figure out how many 16bit words to clock in without overrunning.
334 * The precision loss with dividing reply_sz can safely be
335 * ignored because the messages can only be multiples of 32bits.
338 count = MIN((reply_sz / 4), ioc_sz) * 2;
339 if (count < ioc_sz * 2) {
340 residual = ioc_sz * 2 - count;
341 mps_dprint(sc, MPS_FAULT, "Driver error, throwing away %d "
342 "residual message words\n", residual);
345 for (i = 2; i < count; i++) {
346 if (mps_wait_db_int(sc) != 0) {
347 mps_dprint(sc, MPS_FAULT,
348 "Timeout reading doorbell %d\n", i);
351 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
352 MPI2_DOORBELL_DATA_MASK;
353 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
357 * Pull out residual words that won't fit into the provided buffer.
358 * This keeps the chip from hanging due to a driver programming
362 if (mps_wait_db_int(sc) != 0) {
363 mps_dprint(sc, MPS_FAULT,
364 "Timeout reading doorbell\n");
367 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
368 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
372 if (mps_wait_db_int(sc) != 0) {
373 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
376 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
377 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
378 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
384 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
387 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
389 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
390 cm->cm_desc.Words.Low);
391 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
392 cm->cm_desc.Words.High);
396 mps_request_polled(struct mps_softc *sc, struct mps_command *cm)
398 int error, timeout = 0;
402 cm->cm_flags |= MPS_CM_FLAGS_POLLED;
403 cm->cm_complete = NULL;
404 mps_map_command(sc, cm);
406 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
409 if (timeout++ > 1000) {
410 mps_dprint(sc, MPS_FAULT, "polling failed\n");
420 * Just the FACTS, ma'am.
423 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
425 MPI2_DEFAULT_REPLY *reply;
426 MPI2_IOC_FACTS_REQUEST request;
427 int error, req_sz, reply_sz;
429 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
431 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
432 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
433 reply = (MPI2_DEFAULT_REPLY *)facts;
435 bzero(&request, req_sz);
436 request.Function = MPI2_FUNCTION_IOC_FACTS;
437 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
443 mps_get_portfacts(struct mps_softc *sc, MPI2_PORT_FACTS_REPLY *facts, int port)
445 MPI2_PORT_FACTS_REQUEST *request;
446 MPI2_PORT_FACTS_REPLY *reply;
447 struct mps_command *cm;
450 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
452 if ((cm = mps_alloc_command(sc)) == NULL)
454 request = (MPI2_PORT_FACTS_REQUEST *)cm->cm_req;
455 request->Function = MPI2_FUNCTION_PORT_FACTS;
456 request->PortNumber = port;
457 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
459 error = mps_request_polled(sc, cm);
460 reply = (MPI2_PORT_FACTS_REPLY *)cm->cm_reply;
461 if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
463 bcopy(reply, facts, sizeof(MPI2_PORT_FACTS_REPLY));
464 mps_free_command(sc, cm);
470 mps_send_iocinit(struct mps_softc *sc)
472 MPI2_IOC_INIT_REQUEST init;
473 MPI2_DEFAULT_REPLY reply;
474 int req_sz, reply_sz, error;
476 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
478 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
479 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
480 bzero(&init, req_sz);
481 bzero(&reply, reply_sz);
484 * Fill in the init block. Note that most addresses are
485 * deliberately in the lower 32bits of memory. This is a micro-
486 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
488 init.Function = MPI2_FUNCTION_IOC_INIT;
489 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
490 init.MsgVersion = MPI2_VERSION;
491 init.HeaderVersion = MPI2_HEADER_VERSION;
492 init.SystemRequestFrameSize = sc->facts->IOCRequestFrameSize;
493 init.ReplyDescriptorPostQueueDepth = sc->pqdepth;
494 init.ReplyFreeQueueDepth = sc->fqdepth;
495 init.SenseBufferAddressHigh = 0;
496 init.SystemReplyAddressHigh = 0;
497 init.SystemRequestFrameBaseAddress.High = 0;
498 init.SystemRequestFrameBaseAddress.Low = (uint32_t)sc->req_busaddr;
499 init.ReplyDescriptorPostQueueAddress.High = 0;
500 init.ReplyDescriptorPostQueueAddress.Low = (uint32_t)sc->post_busaddr;
501 init.ReplyFreeQueueAddress.High = 0;
502 init.ReplyFreeQueueAddress.Low = (uint32_t)sc->free_busaddr;
503 init.TimeStamp.High = 0;
504 init.TimeStamp.Low = (uint32_t)time_uptime;
506 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
507 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
510 mps_dprint(sc, MPS_INFO, "IOCInit status= 0x%x\n", reply.IOCStatus);
515 mps_send_portenable(struct mps_softc *sc)
517 MPI2_PORT_ENABLE_REQUEST *request;
518 struct mps_command *cm;
520 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
522 if ((cm = mps_alloc_command(sc)) == NULL)
524 request = (MPI2_PORT_ENABLE_REQUEST *)cm->cm_req;
525 request->Function = MPI2_FUNCTION_PORT_ENABLE;
526 request->MsgFlags = 0;
528 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
529 cm->cm_complete = mps_startup_complete;
531 mps_enqueue_request(sc, cm);
536 mps_send_mur(struct mps_softc *sc)
544 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
549 *addr = segs[0].ds_addr;
553 mps_alloc_queues(struct mps_softc *sc)
555 bus_addr_t queues_busaddr;
557 int qsize, fqsize, pqsize;
560 * The reply free queue contains 4 byte entries in multiples of 16 and
561 * aligned on a 16 byte boundary. There must always be an unused entry.
562 * This queue supplies fresh reply frames for the firmware to use.
564 * The reply descriptor post queue contains 8 byte entries in
565 * multiples of 16 and aligned on a 16 byte boundary. This queue
566 * contains filled-in reply frames sent from the firmware to the host.
568 * These two queues are allocated together for simplicity.
570 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
571 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
572 fqsize= sc->fqdepth * 4;
573 pqsize = sc->pqdepth * 8;
574 qsize = fqsize + pqsize;
576 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
577 16, 0, /* algnmnt, boundary */
578 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
579 BUS_SPACE_MAXADDR, /* highaddr */
580 NULL, NULL, /* filter, filterarg */
583 qsize, /* maxsegsize */
585 NULL, NULL, /* lockfunc, lockarg */
587 device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n");
590 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
592 device_printf(sc->mps_dev, "Cannot allocate queues memory\n");
595 bzero(queues, qsize);
596 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
597 mps_memaddr_cb, &queues_busaddr, 0);
599 sc->free_queue = (uint32_t *)queues;
600 sc->free_busaddr = queues_busaddr;
601 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
602 sc->post_busaddr = queues_busaddr + fqsize;
608 mps_alloc_replies(struct mps_softc *sc)
612 rsize = sc->facts->ReplyFrameSize * sc->num_replies * 4;
613 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
614 4, 0, /* algnmnt, boundary */
615 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
616 BUS_SPACE_MAXADDR, /* highaddr */
617 NULL, NULL, /* filter, filterarg */
620 rsize, /* maxsegsize */
622 NULL, NULL, /* lockfunc, lockarg */
624 device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n");
627 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
628 BUS_DMA_NOWAIT, &sc->reply_map)) {
629 device_printf(sc->mps_dev, "Cannot allocate replies memory\n");
632 bzero(sc->reply_frames, rsize);
633 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
634 mps_memaddr_cb, &sc->reply_busaddr, 0);
640 mps_alloc_requests(struct mps_softc *sc)
642 struct mps_command *cm;
643 struct mps_chain *chain;
646 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
647 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
648 16, 0, /* algnmnt, boundary */
649 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
650 BUS_SPACE_MAXADDR, /* highaddr */
651 NULL, NULL, /* filter, filterarg */
654 rsize, /* maxsegsize */
656 NULL, NULL, /* lockfunc, lockarg */
658 device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n");
661 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
662 BUS_DMA_NOWAIT, &sc->req_map)) {
663 device_printf(sc->mps_dev, "Cannot allocate request memory\n");
666 bzero(sc->req_frames, rsize);
667 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
668 mps_memaddr_cb, &sc->req_busaddr, 0);
670 rsize = sc->facts->IOCRequestFrameSize * MPS_CHAIN_FRAMES * 4;
671 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
672 16, 0, /* algnmnt, boundary */
673 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
674 BUS_SPACE_MAXADDR, /* highaddr */
675 NULL, NULL, /* filter, filterarg */
678 rsize, /* maxsegsize */
680 NULL, NULL, /* lockfunc, lockarg */
682 device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n");
685 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
686 BUS_DMA_NOWAIT, &sc->chain_map)) {
687 device_printf(sc->mps_dev, "Cannot allocate chain memory\n");
690 bzero(sc->chain_frames, rsize);
691 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
692 mps_memaddr_cb, &sc->chain_busaddr, 0);
694 rsize = MPS_SENSE_LEN * sc->num_reqs;
695 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
696 1, 0, /* algnmnt, boundary */
697 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
698 BUS_SPACE_MAXADDR, /* highaddr */
699 NULL, NULL, /* filter, filterarg */
702 rsize, /* maxsegsize */
704 NULL, NULL, /* lockfunc, lockarg */
706 device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n");
709 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
710 BUS_DMA_NOWAIT, &sc->sense_map)) {
711 device_printf(sc->mps_dev, "Cannot allocate sense memory\n");
714 bzero(sc->sense_frames, rsize);
715 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
716 mps_memaddr_cb, &sc->sense_busaddr, 0);
718 sc->chains = malloc(sizeof(struct mps_chain) * MPS_CHAIN_FRAMES,
719 M_MPT2, M_WAITOK | M_ZERO);
720 for (i = 0; i < MPS_CHAIN_FRAMES; i++) {
721 chain = &sc->chains[i];
722 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
723 i * sc->facts->IOCRequestFrameSize * 4);
724 chain->chain_busaddr = sc->chain_busaddr +
725 i * sc->facts->IOCRequestFrameSize * 4;
726 mps_free_chain(sc, chain);
729 /* XXX Need to pick a more precise value */
730 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
731 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
732 1, 0, /* algnmnt, boundary */
733 BUS_SPACE_MAXADDR, /* lowaddr */
734 BUS_SPACE_MAXADDR, /* highaddr */
735 NULL, NULL, /* filter, filterarg */
736 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
737 nsegs, /* nsegments */
738 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
739 BUS_DMA_ALLOCNOW, /* flags */
740 busdma_lock_mutex, /* lockfunc */
741 &sc->mps_mtx, /* lockarg */
743 device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n");
748 * SMID 0 cannot be used as a free command per the firmware spec.
749 * Just drop that command instead of risking accounting bugs.
751 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
752 M_MPT2, M_WAITOK | M_ZERO);
753 for (i = 1; i < sc->num_reqs; i++) {
754 cm = &sc->commands[i];
755 cm->cm_req = sc->req_frames +
756 i * sc->facts->IOCRequestFrameSize * 4;
757 cm->cm_req_busaddr = sc->req_busaddr +
758 i * sc->facts->IOCRequestFrameSize * 4;
759 cm->cm_sense = &sc->sense_frames[i];
760 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
761 cm->cm_desc.Default.SMID = i;
763 TAILQ_INIT(&cm->cm_chain_list);
764 callout_init(&cm->cm_callout, 1 /*MPSAFE*/);
766 /* XXX Is a failure here a critical problem? */
767 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
768 mps_free_command(sc, cm);
779 mps_init_queues(struct mps_softc *sc)
783 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
785 if (sc->num_replies >= sc->fqdepth)
788 for (i = 0; i < sc->num_replies; i++)
789 sc->free_queue[i] = sc->reply_busaddr + i * sc->facts->ReplyFrameSize * 4;
790 sc->replyfreeindex = sc->num_replies;
796 mps_attach(struct mps_softc *sc)
799 char tmpstr[80], tmpstr2[80];
802 * Grab any tunable-set debug level so that tracing works as early
805 snprintf(tmpstr, sizeof(tmpstr), "hw.mps.%d.debug_level",
806 device_get_unit(sc->mps_dev));
807 TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug);
808 snprintf(tmpstr, sizeof(tmpstr), "hw.mps.%d.allow_multiple_tm_cmds",
809 device_get_unit(sc->mps_dev));
810 TUNABLE_INT_FETCH(tmpstr, &sc->allow_multiple_tm_cmds);
812 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
814 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
815 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
816 TAILQ_INIT(&sc->event_list);
819 * Setup the sysctl variable so the user can change the debug level
822 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
823 device_get_unit(sc->mps_dev));
824 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
826 sysctl_ctx_init(&sc->sysctl_ctx);
827 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
828 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2, CTLFLAG_RD,
830 if (sc->sysctl_tree == NULL)
833 SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
834 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0,
837 SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
838 OID_AUTO, "allow_multiple_tm_cmds", CTLFLAG_RW,
839 &sc->allow_multiple_tm_cmds, 0,
840 "allow multiple simultaneous task management cmds");
842 if ((error = mps_transition_ready(sc)) != 0)
845 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
847 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0)
850 mps_print_iocfacts(sc, sc->facts);
852 mps_printf(sc, "Firmware: %02d.%02d.%02d.%02d\n",
853 sc->facts->FWVersion.Struct.Major,
854 sc->facts->FWVersion.Struct.Minor,
855 sc->facts->FWVersion.Struct.Unit,
856 sc->facts->FWVersion.Struct.Dev);
857 mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
858 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
859 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
860 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
863 * If the chip doesn't support event replay then a hard reset will be
864 * required to trigger a full discovery. Do the reset here then
865 * retransition to Ready. A hard reset might have already been done,
866 * but it doesn't hurt to do it again.
868 if ((sc->facts->IOCCapabilities &
869 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
871 if ((error = mps_transition_ready(sc)) != 0)
876 * Size the queues. Since the reply queues always need one free entry,
877 * we'll just deduct one reply message here.
879 sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit);
880 sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES,
881 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
882 TAILQ_INIT(&sc->req_list);
883 TAILQ_INIT(&sc->chain_list);
884 TAILQ_INIT(&sc->tm_list);
886 if (((error = mps_alloc_queues(sc)) != 0) ||
887 ((error = mps_alloc_replies(sc)) != 0) ||
888 ((error = mps_alloc_requests(sc)) != 0)) {
893 if (((error = mps_init_queues(sc)) != 0) ||
894 ((error = mps_transition_operational(sc)) != 0)) {
900 * Finish the queue initialization.
901 * These are set here instead of in mps_init_queues() because the
902 * IOC resets these values during the state transition in
903 * mps_transition_operational(). The free index is set to 1
904 * because the corresponding index in the IOC is set to 0, and the
905 * IOC treats the queues as full if both are set to the same value.
906 * Hence the reason that the queue can't hold all of the possible
909 sc->replypostindex = 0;
910 sc->replycurindex = 0;
911 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
912 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
914 sc->pfacts = malloc(sizeof(MPI2_PORT_FACTS_REPLY) *
915 sc->facts->NumberOfPorts, M_MPT2, M_ZERO|M_WAITOK);
916 for (i = 0; i < sc->facts->NumberOfPorts; i++) {
917 if ((error = mps_get_portfacts(sc, &sc->pfacts[i], i)) != 0) {
921 mps_print_portfacts(sc, &sc->pfacts[i]);
924 /* Attach the subsystems so they can prepare their event masks. */
925 /* XXX Should be dynamic so that IM/IR and user modules can attach */
926 if (((error = mps_attach_log(sc)) != 0) ||
927 ((error = mps_attach_sas(sc)) != 0) ||
928 ((error = mps_attach_user(sc)) != 0)) {
929 mps_printf(sc, "%s failed to attach all subsystems: error %d\n",
935 if ((error = mps_pci_setup_interrupts(sc)) != 0) {
940 /* Start the periodic watchdog check on the IOC Doorbell */
944 * The portenable will kick off discovery events that will drive the
945 * rest of the initialization process. The CAM/SAS module will
946 * hold up the boot sequence until discovery is complete.
948 sc->mps_ich.ich_func = mps_startup;
949 sc->mps_ich.ich_arg = sc;
950 if (config_intrhook_establish(&sc->mps_ich) != 0) {
951 mps_dprint(sc, MPS_FAULT, "Cannot establish MPS config hook\n");
959 mps_startup(void *arg)
961 struct mps_softc *sc;
963 sc = (struct mps_softc *)arg;
967 mps_send_portenable(sc);
971 /* Periodic watchdog. Is called with the driver lock already held. */
973 mps_periodic(void *arg)
975 struct mps_softc *sc;
978 sc = (struct mps_softc *)arg;
979 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
982 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
983 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
984 device_printf(sc->mps_dev, "IOC Fault 0x%08x, Resetting\n", db);
985 /* XXX Need to broaden this to re-initialize the chip */
987 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
988 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
989 device_printf(sc->mps_dev, "Second IOC Fault 0x%08x, "
995 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc);
999 mps_startup_complete(struct mps_softc *sc, struct mps_command *cm)
1001 MPI2_PORT_ENABLE_REPLY *reply;
1003 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1005 reply = (MPI2_PORT_ENABLE_REPLY *)cm->cm_reply;
1006 if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1007 mps_dprint(sc, MPS_FAULT, "Portenable failed\n");
1009 mps_free_command(sc, cm);
1010 config_intrhook_disestablish(&sc->mps_ich);
1015 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
1016 MPI2_EVENT_NOTIFICATION_REPLY *event)
1018 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1020 mps_print_event(sc, event);
1022 switch (event->Event) {
1023 case MPI2_EVENT_LOG_DATA:
1024 device_printf(sc->mps_dev, "MPI2_EVENT_LOG_DATA:\n");
1025 hexdump(event->EventData, event->EventDataLength, NULL, 0);
1027 case MPI2_EVENT_LOG_ENTRY_ADDED:
1028 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1029 mps_dprint(sc, MPS_INFO, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1030 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1031 entry->LogSequence);
1040 mps_attach_log(struct mps_softc *sc)
1045 setbit(events, MPI2_EVENT_LOG_DATA);
1046 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1048 mps_register_events(sc, events, mps_log_evt_handler, NULL,
1055 mps_detach_log(struct mps_softc *sc)
1058 if (sc->mps_log_eh != NULL)
1059 mps_deregister_events(sc, sc->mps_log_eh);
1064 * Free all of the driver resources and detach submodules. Should be called
1065 * without the lock held.
1068 mps_free(struct mps_softc *sc)
1070 struct mps_command *cm;
1073 /* Turn off the watchdog */
1075 sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
1077 /* Lock must not be held for this */
1078 callout_drain(&sc->periodic);
1080 if (((error = mps_detach_log(sc)) != 0) ||
1081 ((error = mps_detach_sas(sc)) != 0))
1084 /* Put the IOC back in the READY state. */
1086 if ((error = mps_send_mur(sc)) != 0) {
1092 if (sc->facts != NULL)
1093 free(sc->facts, M_MPT2);
1095 if (sc->pfacts != NULL)
1096 free(sc->pfacts, M_MPT2);
1098 if (sc->post_busaddr != 0)
1099 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
1100 if (sc->post_queue != NULL)
1101 bus_dmamem_free(sc->queues_dmat, sc->post_queue,
1103 if (sc->queues_dmat != NULL)
1104 bus_dma_tag_destroy(sc->queues_dmat);
1106 if (sc->chain_busaddr != 0)
1107 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
1108 if (sc->chain_frames != NULL)
1109 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,sc->chain_map);
1110 if (sc->chain_dmat != NULL)
1111 bus_dma_tag_destroy(sc->chain_dmat);
1113 if (sc->sense_busaddr != 0)
1114 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
1115 if (sc->sense_frames != NULL)
1116 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,sc->sense_map);
1117 if (sc->sense_dmat != NULL)
1118 bus_dma_tag_destroy(sc->sense_dmat);
1120 if (sc->reply_busaddr != 0)
1121 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
1122 if (sc->reply_frames != NULL)
1123 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,sc->reply_map);
1124 if (sc->reply_dmat != NULL)
1125 bus_dma_tag_destroy(sc->reply_dmat);
1127 if (sc->req_busaddr != 0)
1128 bus_dmamap_unload(sc->req_dmat, sc->req_map);
1129 if (sc->req_frames != NULL)
1130 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
1131 if (sc->req_dmat != NULL)
1132 bus_dma_tag_destroy(sc->req_dmat);
1134 if (sc->chains != NULL)
1135 free(sc->chains, M_MPT2);
1136 if (sc->commands != NULL) {
1137 for (i = 1; i < sc->num_reqs; i++) {
1138 cm = &sc->commands[i];
1139 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
1141 free(sc->commands, M_MPT2);
1143 if (sc->buffer_dmat != NULL)
1144 bus_dma_tag_destroy(sc->buffer_dmat);
1146 if (sc->sysctl_tree != NULL)
1147 sysctl_ctx_free(&sc->sysctl_ctx);
1149 mtx_destroy(&sc->mps_mtx);
1155 mps_intr(void *data)
1157 struct mps_softc *sc;
1160 sc = (struct mps_softc *)data;
1161 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1164 * Check interrupt status register to flush the bus. This is
1165 * needed for both INTx interrupts and driver-driven polling
1167 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1168 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1172 mps_intr_locked(data);
1178 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1179 * chip. Hopefully this theory is correct.
1182 mps_intr_msi(void *data)
1184 struct mps_softc *sc;
1186 sc = (struct mps_softc *)data;
1188 mps_intr_locked(data);
1194 * The locking is overly broad and simplistic, but easy to deal with for now.
1197 mps_intr_locked(void *data)
1199 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1200 struct mps_softc *sc;
1201 struct mps_command *cm = NULL;
1205 sc = (struct mps_softc *)data;
1207 pq = sc->replypostindex;
1211 desc = &sc->post_queue[pq];
1212 flags = desc->Default.ReplyFlags &
1213 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1214 if (flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1218 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1219 cm = &sc->commands[desc->SCSIIOSuccess.SMID];
1220 cm->cm_reply = NULL;
1222 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1227 reply = sc->reply_frames +
1228 sc->replycurindex * sc->facts->ReplyFrameSize * 4;
1229 baddr = desc->AddressReply.ReplyFrameAddress;
1230 if (desc->AddressReply.SMID == 0) {
1231 mps_dispatch_event(sc, baddr,
1232 (MPI2_EVENT_NOTIFICATION_REPLY *) reply);
1234 cm = &sc->commands[desc->AddressReply.SMID];
1235 cm->cm_reply = reply;
1237 desc->AddressReply.ReplyFrameAddress;
1239 if (++sc->replycurindex >= sc->fqdepth)
1240 sc->replycurindex = 0;
1243 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1244 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1245 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1248 device_printf(sc->mps_dev, "Unhandled reply 0x%x\n",
1249 desc->Default.ReplyFlags);
1255 if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
1256 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
1258 if (cm->cm_complete != NULL)
1259 cm->cm_complete(sc, cm);
1261 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP)
1265 desc->Words.Low = 0xffffffff;
1266 desc->Words.High = 0xffffffff;
1267 if (++pq >= sc->pqdepth)
1271 if (pq != sc->replypostindex) {
1272 mps_dprint(sc, MPS_INFO, "writing postindex %d\n", pq);
1273 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, pq);
1274 sc->replypostindex = pq;
1281 mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
1282 MPI2_EVENT_NOTIFICATION_REPLY *reply)
1284 struct mps_event_handle *eh;
1285 int event, handled = 0;;
1287 event = reply->Event;
1288 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1289 if (isset(eh->mask, event)) {
1290 eh->callback(sc, data, reply);
1296 device_printf(sc->mps_dev, "Unhandled event 0x%x\n", event);
1300 * For both register_events and update_events, the caller supplies a bitmap
1301 * of events that it _wants_. These functions then turn that into a bitmask
1302 * suitable for the controller.
1305 mps_register_events(struct mps_softc *sc, uint8_t *mask,
1306 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
1308 struct mps_event_handle *eh;
1311 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
1314 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
1316 error = mps_update_events(sc, eh, mask);
1323 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
1326 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
1327 MPI2_EVENT_NOTIFICATION_REPLY *reply;
1328 struct mps_command *cm;
1329 struct mps_event_handle *eh;
1332 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1334 if ((mask != NULL) && (handle != NULL))
1335 bcopy(mask, &handle->mask[0], 16);
1336 memset(sc->event_mask, 0xff, 16);
1338 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1339 for (i = 0; i < 16; i++)
1340 sc->event_mask[i] &= ~eh->mask[i];
1343 if ((cm = mps_alloc_command(sc)) == NULL)
1345 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
1346 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
1347 evtreq->MsgFlags = 0;
1348 evtreq->SASBroadcastPrimitiveMasks = 0;
1349 #ifdef MPS_DEBUG_ALL_EVENTS
1351 u_char fullmask[16];
1352 memset(fullmask, 0x00, 16);
1353 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
1356 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
1358 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1361 error = mps_request_polled(sc, cm);
1362 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
1363 if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1365 mps_print_event(sc, reply);
1367 mps_free_command(sc, cm);
1372 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
1375 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
1376 free(handle, M_MPT2);
1377 return (mps_update_events(sc, NULL, NULL));
1381 * Add a chain element as the next SGE for the specified command.
1382 * Reset cm_sge and cm_sgesize to indicate all the available space.
1385 mps_add_chain(struct mps_command *cm)
1387 MPI2_SGE_CHAIN32 *sgc;
1388 struct mps_chain *chain;
1391 if (cm->cm_sglsize < MPS_SGC_SIZE)
1392 panic("MPS: Need SGE Error Code\n");
1394 chain = mps_alloc_chain(cm->cm_sc);
1398 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
1401 * Note: a double-linked list is used to make it easier to
1402 * walk for debugging.
1404 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
1406 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain;
1407 sgc->Length = space;
1408 sgc->NextChainOffset = 0;
1409 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT;
1410 sgc->Address = chain->chain_busaddr;
1412 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
1413 cm->cm_sglsize = space;
1418 * Add one scatter-gather element (chain, simple, transaction context)
1419 * to the scatter-gather list for a command. Maintain cm_sglsize and
1420 * cm_sge as the remaining size and pointer to the next SGE to fill
1424 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
1426 MPI2_SGE_TRANSACTION_UNION *tc = sgep;
1427 MPI2_SGE_SIMPLE64 *sge = sgep;
1430 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
1434 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
1435 if (len != tc->DetailsLength + 4)
1436 panic("TC %p length %u or %zu?", tc,
1437 tc->DetailsLength + 4, len);
1440 case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
1441 /* Driver only uses 32-bit chain elements */
1442 if (len != MPS_SGC_SIZE)
1443 panic("CHAIN %p length %u or %zu?", sgep,
1446 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
1447 /* Driver only uses 64-bit SGE simple elements */
1449 if (len != MPS_SGE64_SIZE)
1450 panic("SGE simple %p length %u or %zu?", sge,
1451 MPS_SGE64_SIZE, len);
1452 if (((sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT) &
1453 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
1454 panic("SGE simple %p flags %02x not marked 64-bit?",
1455 sge, sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT);
1459 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
1464 * case 1: 1 more segment, enough room for it
1465 * case 2: 2 more segments, enough room for both
1466 * case 3: >=2 more segments, only enough room for 1 and a chain
1467 * case 4: >=1 more segment, enough room for only a chain
1468 * case 5: >=1 more segment, no room for anything (error)
1472 * There should be room for at least a chain element, or this
1473 * code is buggy. Case (5).
1475 if (cm->cm_sglsize < MPS_SGC_SIZE)
1476 panic("MPS: Need SGE Error Code\n");
1478 if (segsleft >= 2 &&
1479 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
1481 * There are 2 or more segments left to add, and only
1482 * enough room for 1 and a chain. Case (3).
1484 * Mark as last element in this chain if necessary.
1486 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
1488 (MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
1492 * Add the item then a chain. Do the chain now,
1493 * rather than on the next iteration, to simplify
1494 * understanding the code.
1496 cm->cm_sglsize -= len;
1497 bcopy(sgep, cm->cm_sge, len);
1498 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
1499 return (mps_add_chain(cm));
1502 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
1504 * 1 or more segment, enough room for only a chain.
1505 * Hope the previous element wasn't a Simple entry
1506 * that needed to be marked with
1507 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4).
1509 if ((error = mps_add_chain(cm)) != 0)
1514 /* Case 1: 1 more segment, enough room for it. */
1515 if (segsleft == 1 && cm->cm_sglsize < len)
1516 panic("1 seg left and no room? %u versus %zu",
1517 cm->cm_sglsize, len);
1519 /* Case 2: 2 more segments, enough room for both */
1520 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
1521 panic("2 segs left and no room? %u versus %zu",
1522 cm->cm_sglsize, len);
1525 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
1527 * Last element of the last segment of the entire
1530 sge->FlagsLength |= ((MPI2_SGE_FLAGS_LAST_ELEMENT |
1531 MPI2_SGE_FLAGS_END_OF_BUFFER |
1532 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT);
1535 cm->cm_sglsize -= len;
1536 bcopy(sgep, cm->cm_sge, len);
1537 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
1542 * Add one dma segment to the scatter-gather list for a command.
1545 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
1548 MPI2_SGE_SIMPLE64 sge;
1551 * This driver always uses 64-bit address elements for
1554 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT | MPI2_SGE_FLAGS_ADDRESS_SIZE;
1555 sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT);
1556 mps_from_u64(pa, &sge.Address);
1558 return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
1562 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1564 struct mps_softc *sc;
1565 struct mps_command *cm;
1566 u_int i, dir, sflags;
1568 cm = (struct mps_command *)arg;
1572 * Set up DMA direction flags. Note no support for
1573 * bi-directional transactions.
1576 if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
1577 sflags |= MPI2_SGE_FLAGS_DIRECTION;
1578 dir = BUS_DMASYNC_PREWRITE;
1580 dir = BUS_DMASYNC_PREREAD;
1582 for (i = 0; i < nsegs; i++) {
1583 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
1586 /* Resource shortage, roll back! */
1587 mps_printf(sc, "out of chain frames\n");
1592 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
1593 mps_enqueue_request(sc, cm);
1599 * Note that the only error path here is from bus_dmamap_load(), which can
1600 * return EINPROGRESS if it is waiting for resources.
1603 mps_map_command(struct mps_softc *sc, struct mps_command *cm)
1605 MPI2_SGE_SIMPLE32 *sge;
1608 if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
1609 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
1610 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
1612 /* Add a zero-length element as needed */
1613 if (cm->cm_sge != NULL) {
1614 sge = (MPI2_SGE_SIMPLE32 *)cm->cm_sge;
1615 sge->FlagsLength = (MPI2_SGE_FLAGS_LAST_ELEMENT |
1616 MPI2_SGE_FLAGS_END_OF_BUFFER |
1617 MPI2_SGE_FLAGS_END_OF_LIST |
1618 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1619 MPI2_SGE_FLAGS_SHIFT;
1622 mps_enqueue_request(sc, cm);
1629 * The MPT driver had a verbose interface for config pages. In this driver,
1630 * reduce it to much simplier terms, similar to the Linux driver.
1633 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
1635 MPI2_CONFIG_REQUEST *req;
1636 struct mps_command *cm;
1639 if (sc->mps_flags & MPS_FLAGS_BUSY) {
1643 cm = mps_alloc_command(sc);
1648 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
1649 req->Function = MPI2_FUNCTION_CONFIG;
1650 req->Action = params->action;
1652 req->ChainOffset = 0;
1653 req->PageAddress = params->page_address;
1654 if (params->hdr.Ext.ExtPageType != 0) {
1655 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
1657 hdr = ¶ms->hdr.Ext;
1658 req->ExtPageType = hdr->ExtPageType;
1659 req->ExtPageLength = hdr->ExtPageLength;
1660 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
1661 req->Header.PageLength = 0; /* Must be set to zero */
1662 req->Header.PageNumber = hdr->PageNumber;
1663 req->Header.PageVersion = hdr->PageVersion;
1665 MPI2_CONFIG_PAGE_HEADER *hdr;
1667 hdr = ¶ms->hdr.Struct;
1668 req->Header.PageType = hdr->PageType;
1669 req->Header.PageNumber = hdr->PageNumber;
1670 req->Header.PageLength = hdr->PageLength;
1671 req->Header.PageVersion = hdr->PageVersion;
1674 cm->cm_data = params->buffer;
1675 cm->cm_length = params->length;
1676 cm->cm_sge = &req->PageBufferSGE;
1677 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
1678 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
1679 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1681 cm->cm_complete_data = params;
1682 if (params->callback != NULL) {
1683 cm->cm_complete = mps_config_complete;
1684 return (mps_map_command(sc, cm));
1686 cm->cm_complete = NULL;
1687 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP;
1688 if ((error = mps_map_command(sc, cm)) != 0)
1690 msleep(cm, &sc->mps_mtx, 0, "mpswait", 0);
1691 mps_config_complete(sc, cm);
1698 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
1704 mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
1706 MPI2_CONFIG_REPLY *reply;
1707 struct mps_config_params *params;
1709 params = cm->cm_complete_data;
1711 if (cm->cm_data != NULL) {
1712 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
1713 BUS_DMASYNC_POSTREAD);
1714 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
1717 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
1718 params->status = reply->IOCStatus;
1719 if (params->hdr.Ext.ExtPageType != 0) {
1720 params->hdr.Ext.ExtPageType = reply->ExtPageType;
1721 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
1723 params->hdr.Struct.PageType = reply->Header.PageType;
1724 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
1725 params->hdr.Struct.PageLength = reply->Header.PageLength;
1726 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
1729 mps_free_command(sc, cm);
1730 if (params->callback != NULL)
1731 params->callback(sc, params);