2 * Copyright (c) 2009 Yahoo! Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Copyright (c) 2011 LSI Corp.
29 * All rights reserved.
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
34 * 1. Redistributions of source code must retain the above copyright
35 * notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 * notice, this list of conditions and the following disclaimer in the
38 * documentation and/or other materials provided with the distribution.
40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
52 * LSI MPT-Fusion Host Adapter FreeBSD
57 #include <sys/cdefs.h>
58 __FBSDID("$FreeBSD$");
60 /* Communications core for LSI MPT2 */
62 /* TODO Move headers to mpsvar */
63 #include <sys/types.h>
64 #include <sys/param.h>
65 #include <sys/systm.h>
66 #include <sys/kernel.h>
67 #include <sys/selinfo.h>
69 #include <sys/mutex.h>
70 #include <sys/module.h>
74 #include <sys/malloc.h>
76 #include <sys/sysctl.h>
77 #include <sys/queue.h>
78 #include <sys/kthread.h>
79 #include <sys/endian.h>
80 #include <sys/eventhandler.h>
82 #include <machine/bus.h>
83 #include <machine/resource.h>
86 #include <dev/pci/pcivar.h>
88 #include <cam/scsi/scsi_all.h>
90 #include <dev/mps/mpi/mpi2_type.h>
91 #include <dev/mps/mpi/mpi2.h>
92 #include <dev/mps/mpi/mpi2_ioc.h>
93 #include <dev/mps/mpi/mpi2_sas.h>
94 #include <dev/mps/mpi/mpi2_cnfg.h>
95 #include <dev/mps/mpi/mpi2_init.h>
96 #include <dev/mps/mpi/mpi2_tool.h>
97 #include <dev/mps/mps_ioctl.h>
98 #include <dev/mps/mpsvar.h>
99 #include <dev/mps/mps_table.h>
101 static int mps_diag_reset(struct mps_softc *sc);
102 static int mps_init_queues(struct mps_softc *sc);
103 static int mps_message_unit_reset(struct mps_softc *sc);
104 static int mps_transition_operational(struct mps_softc *sc);
105 static void mps_startup(void *arg);
106 static int mps_send_iocinit(struct mps_softc *sc);
107 static int mps_attach_log(struct mps_softc *sc);
108 static __inline void mps_complete_command(struct mps_command *cm);
109 static void mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
110 MPI2_EVENT_NOTIFICATION_REPLY *reply);
111 static void mps_config_complete(struct mps_softc *sc, struct mps_command *cm);
112 static void mps_periodic(void *);
113 static int mps_reregister_events(struct mps_softc *sc);
114 static void mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm);
116 SYSCTL_NODE(_hw, OID_AUTO, mps, CTLFLAG_RD, 0, "MPS Driver Parameters");
118 MALLOC_DEFINE(M_MPT2, "mps", "mpt2 driver memory");
121 * Do a "Diagnostic Reset" aka a hard reset. This should get the chip out of
122 * any state and back to its initialization state machine.
124 static char mpt2_reset_magic[] = { 0x00, 0x0f, 0x04, 0x0b, 0x02, 0x07, 0x0d };
127 mps_diag_reset(struct mps_softc *sc)
130 int i, error, tries = 0;
132 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
134 /* Clear any pending interrupts */
135 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
137 /* Push the magic sequence */
139 while (tries++ < 20) {
140 for (i = 0; i < sizeof(mpt2_reset_magic); i++)
141 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET,
142 mpt2_reset_magic[i]);
146 reg = mps_regread(sc, MPI2_HOST_DIAGNOSTIC_OFFSET);
147 if (reg & MPI2_DIAG_DIAG_WRITE_ENABLE) {
155 /* Send the actual reset. XXX need to refresh the reg? */
156 mps_regwrite(sc, MPI2_HOST_DIAGNOSTIC_OFFSET,
157 reg | MPI2_DIAG_RESET_ADAPTER);
159 /* Wait up to 300 seconds in 50ms intervals */
161 for (i = 0; i < 60000; i++) {
163 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
164 if ((reg & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_RESET) {
172 mps_regwrite(sc, MPI2_WRITE_SEQUENCE_OFFSET, 0x0);
178 mps_message_unit_reset(struct mps_softc *sc)
181 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
183 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
184 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET <<
185 MPI2_DOORBELL_FUNCTION_SHIFT);
192 mps_transition_ready(struct mps_softc *sc)
195 int error, tries = 0;
197 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
200 while (tries++ < 5) {
201 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
202 mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg);
205 * Ensure the IOC is ready to talk. If it's not, try
208 if (reg & MPI2_DOORBELL_USED) {
214 /* Is the adapter owned by another peer? */
215 if ((reg & MPI2_DOORBELL_WHO_INIT_MASK) ==
216 (MPI2_WHOINIT_PCI_PEER << MPI2_DOORBELL_WHO_INIT_SHIFT)) {
217 device_printf(sc->mps_dev, "IOC is under the control "
218 "of another peer host, aborting initialization.\n");
222 state = reg & MPI2_IOC_STATE_MASK;
223 if (state == MPI2_IOC_STATE_READY) {
227 } else if (state == MPI2_IOC_STATE_FAULT) {
228 mps_dprint(sc, MPS_INFO, "IOC in fault state 0x%x\n",
229 state & MPI2_DOORBELL_FAULT_CODE_MASK);
231 } else if (state == MPI2_IOC_STATE_OPERATIONAL) {
232 /* Need to take ownership */
233 mps_message_unit_reset(sc);
234 } else if (state == MPI2_IOC_STATE_RESET) {
235 /* Wait a bit, IOC might be in transition */
236 mps_dprint(sc, MPS_FAULT,
237 "IOC in unexpected reset state\n");
239 mps_dprint(sc, MPS_FAULT,
240 "IOC in unknown state 0x%x\n", state);
245 /* Wait 50ms for things to settle down. */
250 device_printf(sc->mps_dev, "Cannot transition IOC to ready\n");
256 mps_transition_operational(struct mps_softc *sc)
261 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
264 reg = mps_regread(sc, MPI2_DOORBELL_OFFSET);
265 mps_dprint(sc, MPS_INFO, "Doorbell= 0x%x\n", reg);
267 state = reg & MPI2_IOC_STATE_MASK;
268 if (state != MPI2_IOC_STATE_READY) {
269 if ((error = mps_transition_ready(sc)) != 0) {
270 mps_dprint(sc, MPS_FAULT,
271 "%s failed to transition ready\n", __func__);
276 error = mps_send_iocinit(sc);
281 * XXX Some of this should probably move to mps.c
283 * The terms diag reset and hard reset are used interchangeably in the MPI
284 * docs to mean resetting the controller chip. In this code diag reset
285 * cleans everything up, and the hard reset function just sends the reset
286 * sequence to the chip. This should probably be refactored so that every
287 * subsystem gets a reset notification of some sort, and can clean up
291 mps_reinit(struct mps_softc *sc)
296 mps_printf(sc, "%s sc %p\n", __func__, sc);
298 mtx_assert(&sc->mps_mtx, MA_OWNED);
300 if (sc->mps_flags & MPS_FLAGS_DIAGRESET) {
301 mps_printf(sc, "%s reset already in progress\n", __func__);
305 /* make sure the completion callbacks can recognize they're getting
306 * a NULL cm_reply due to a reset.
308 sc->mps_flags |= MPS_FLAGS_DIAGRESET;
310 mps_printf(sc, "%s mask interrupts\n", __func__);
313 error = mps_diag_reset(sc);
315 panic("%s hard reset failed with error %d\n",
319 /* Restore the PCI state, including the MSI-X registers */
322 /* Give the I/O subsystem special priority to get itself prepared */
323 mpssas_handle_reinit(sc);
325 /* reinitialize queues after the reset */
326 bzero(sc->free_queue, sc->fqdepth * 4);
329 /* get the chip out of the reset state */
330 error = mps_transition_operational(sc);
332 panic("%s transition operational failed with error %d\n",
335 /* Reinitialize the reply queue. This is delicate because this
336 * function is typically invoked by task mgmt completion callbacks,
337 * which are called by the interrupt thread. We need to make sure
338 * the interrupt handler loop will exit when we return to it, and
339 * that it will recognize the indexes we've changed.
341 sc->replypostindex = 0;
342 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
343 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex);
345 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
346 mps_printf(sc, "%s doorbell 0x%08x\n", __func__, db);
348 mps_printf(sc, "%s unmask interrupts post %u free %u\n", __func__,
349 sc->replypostindex, sc->replyfreeindex);
353 mps_printf(sc, "%s restarting post %u free %u\n", __func__,
354 sc->replypostindex, sc->replyfreeindex);
356 /* restart will reload the event masks clobbered by the reset, and
357 * then enable the port.
359 mps_reregister_events(sc);
361 /* the end of discovery will release the simq, so we're done. */
362 mps_printf(sc, "%s finished sc %p post %u free %u\n",
364 sc->replypostindex, sc->replyfreeindex);
366 sc->mps_flags &= ~MPS_FLAGS_DIAGRESET;
371 /* Wait for the chip to ACK a word that we've put into its FIFO */
373 mps_wait_db_ack(struct mps_softc *sc)
377 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
378 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
379 MPI2_HIS_SYS2IOC_DB_STATUS) == 0)
386 /* Wait for the chip to signal that the next word in its FIFO can be fetched */
388 mps_wait_db_int(struct mps_softc *sc)
392 for (retry = 0; retry < MPS_DB_MAX_WAIT; retry++) {
393 if ((mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET) &
394 MPI2_HIS_IOC2SYS_DB_STATUS) != 0)
401 /* Step through the synchronous command state machine, i.e. "Doorbell mode" */
403 mps_request_sync(struct mps_softc *sc, void *req, MPI2_DEFAULT_REPLY *reply,
404 int req_sz, int reply_sz, int timeout)
408 int i, count, ioc_sz, residual;
411 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
414 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
418 * Announce that a message is coming through the doorbell. Messages
419 * are pushed at 32bit words, so round up if needed.
421 count = (req_sz + 3) / 4;
422 mps_regwrite(sc, MPI2_DOORBELL_OFFSET,
423 (MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) |
424 (count << MPI2_DOORBELL_ADD_DWORDS_SHIFT));
427 if (mps_wait_db_int(sc) ||
428 (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED) == 0) {
429 mps_dprint(sc, MPS_FAULT, "Doorbell failed to activate\n");
432 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
433 if (mps_wait_db_ack(sc) != 0) {
434 mps_dprint(sc, MPS_FAULT, "Doorbell handshake failed\n");
439 /* Clock out the message data synchronously in 32-bit dwords*/
440 data32 = (uint32_t *)req;
441 for (i = 0; i < count; i++) {
442 mps_regwrite(sc, MPI2_DOORBELL_OFFSET, data32[i]);
443 if (mps_wait_db_ack(sc) != 0) {
444 mps_dprint(sc, MPS_FAULT,
445 "Timeout while writing doorbell\n");
451 /* Clock in the reply in 16-bit words. The total length of the
452 * message is always in the 4th byte, so clock out the first 2 words
453 * manually, then loop the rest.
455 data16 = (uint16_t *)reply;
456 if (mps_wait_db_int(sc) != 0) {
457 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 0\n");
461 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
462 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
463 if (mps_wait_db_int(sc) != 0) {
464 mps_dprint(sc, MPS_FAULT, "Timeout reading doorbell 1\n");
468 mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_DATA_MASK;
469 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
471 /* Number of 32bit words in the message */
472 ioc_sz = reply->MsgLength;
475 * Figure out how many 16bit words to clock in without overrunning.
476 * The precision loss with dividing reply_sz can safely be
477 * ignored because the messages can only be multiples of 32bits.
480 count = MIN((reply_sz / 4), ioc_sz) * 2;
481 if (count < ioc_sz * 2) {
482 residual = ioc_sz * 2 - count;
483 mps_dprint(sc, MPS_FAULT, "Driver error, throwing away %d "
484 "residual message words\n", residual);
487 for (i = 2; i < count; i++) {
488 if (mps_wait_db_int(sc) != 0) {
489 mps_dprint(sc, MPS_FAULT,
490 "Timeout reading doorbell %d\n", i);
493 data16[i] = mps_regread(sc, MPI2_DOORBELL_OFFSET) &
494 MPI2_DOORBELL_DATA_MASK;
495 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
499 * Pull out residual words that won't fit into the provided buffer.
500 * This keeps the chip from hanging due to a driver programming
504 if (mps_wait_db_int(sc) != 0) {
505 mps_dprint(sc, MPS_FAULT,
506 "Timeout reading doorbell\n");
509 (void)mps_regread(sc, MPI2_DOORBELL_OFFSET);
510 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
514 if (mps_wait_db_int(sc) != 0) {
515 mps_dprint(sc, MPS_FAULT, "Timeout waiting to exit doorbell\n");
518 if (mps_regread(sc, MPI2_DOORBELL_OFFSET) & MPI2_DOORBELL_USED)
519 mps_dprint(sc, MPS_FAULT, "Warning, doorbell still active\n");
520 mps_regwrite(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET, 0x0);
526 mps_enqueue_request(struct mps_softc *sc, struct mps_command *cm)
529 mps_dprint(sc, MPS_TRACE, "%s SMID %u cm %p ccb %p\n", __func__,
530 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
532 if (sc->mps_flags & MPS_FLAGS_ATTACH_DONE && !(sc->mps_flags & MPS_FLAGS_SHUTDOWN))
533 mtx_assert(&sc->mps_mtx, MA_OWNED);
535 if (++sc->io_cmds_active > sc->io_cmds_highwater)
536 sc->io_cmds_highwater++;
538 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET,
539 cm->cm_desc.Words.Low);
540 mps_regwrite(sc, MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET,
541 cm->cm_desc.Words.High);
545 * Just the FACTS, ma'am.
548 mps_get_iocfacts(struct mps_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
550 MPI2_DEFAULT_REPLY *reply;
551 MPI2_IOC_FACTS_REQUEST request;
552 int error, req_sz, reply_sz;
554 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
556 req_sz = sizeof(MPI2_IOC_FACTS_REQUEST);
557 reply_sz = sizeof(MPI2_IOC_FACTS_REPLY);
558 reply = (MPI2_DEFAULT_REPLY *)facts;
560 bzero(&request, req_sz);
561 request.Function = MPI2_FUNCTION_IOC_FACTS;
562 error = mps_request_sync(sc, &request, reply, req_sz, reply_sz, 5);
568 mps_get_portfacts(struct mps_softc *sc, MPI2_PORT_FACTS_REPLY *facts, int port)
570 MPI2_PORT_FACTS_REQUEST *request;
571 MPI2_PORT_FACTS_REPLY *reply;
572 struct mps_command *cm;
575 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
577 if ((cm = mps_alloc_command(sc)) == NULL)
579 request = (MPI2_PORT_FACTS_REQUEST *)cm->cm_req;
580 request->Function = MPI2_FUNCTION_PORT_FACTS;
581 request->PortNumber = port;
582 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
584 error = mps_request_polled(sc, cm);
585 reply = (MPI2_PORT_FACTS_REPLY *)cm->cm_reply;
587 mps_printf(sc, "%s NULL reply\n", __func__);
590 if ((reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS) {
592 "%s error %d iocstatus 0x%x iocloginfo 0x%x type 0x%x\n",
593 __func__, error, reply->IOCStatus, reply->IOCLogInfo,
597 bcopy(reply, facts, sizeof(MPI2_PORT_FACTS_REPLY));
599 mps_free_command(sc, cm);
605 mps_send_iocinit(struct mps_softc *sc)
607 MPI2_IOC_INIT_REQUEST init;
608 MPI2_DEFAULT_REPLY reply;
609 int req_sz, reply_sz, error;
611 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
613 req_sz = sizeof(MPI2_IOC_INIT_REQUEST);
614 reply_sz = sizeof(MPI2_IOC_INIT_REPLY);
615 bzero(&init, req_sz);
616 bzero(&reply, reply_sz);
619 * Fill in the init block. Note that most addresses are
620 * deliberately in the lower 32bits of memory. This is a micro-
621 * optimzation for PCI/PCIX, though it's not clear if it helps PCIe.
623 init.Function = MPI2_FUNCTION_IOC_INIT;
624 init.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
625 init.MsgVersion = MPI2_VERSION;
626 init.HeaderVersion = MPI2_HEADER_VERSION;
627 init.SystemRequestFrameSize = sc->facts->IOCRequestFrameSize;
628 init.ReplyDescriptorPostQueueDepth = sc->pqdepth;
629 init.ReplyFreeQueueDepth = sc->fqdepth;
630 init.SenseBufferAddressHigh = 0;
631 init.SystemReplyAddressHigh = 0;
632 init.SystemRequestFrameBaseAddress.High = 0;
633 init.SystemRequestFrameBaseAddress.Low = (uint32_t)sc->req_busaddr;
634 init.ReplyDescriptorPostQueueAddress.High = 0;
635 init.ReplyDescriptorPostQueueAddress.Low = (uint32_t)sc->post_busaddr;
636 init.ReplyFreeQueueAddress.High = 0;
637 init.ReplyFreeQueueAddress.Low = (uint32_t)sc->free_busaddr;
638 init.TimeStamp.High = 0;
639 init.TimeStamp.Low = (uint32_t)time_uptime;
641 error = mps_request_sync(sc, &init, &reply, req_sz, reply_sz, 5);
642 if ((reply.IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
645 mps_dprint(sc, MPS_INFO, "IOCInit status= 0x%x\n", reply.IOCStatus);
650 mps_memaddr_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
655 *addr = segs[0].ds_addr;
659 mps_alloc_queues(struct mps_softc *sc)
661 bus_addr_t queues_busaddr;
663 int qsize, fqsize, pqsize;
666 * The reply free queue contains 4 byte entries in multiples of 16 and
667 * aligned on a 16 byte boundary. There must always be an unused entry.
668 * This queue supplies fresh reply frames for the firmware to use.
670 * The reply descriptor post queue contains 8 byte entries in
671 * multiples of 16 and aligned on a 16 byte boundary. This queue
672 * contains filled-in reply frames sent from the firmware to the host.
674 * These two queues are allocated together for simplicity.
676 sc->fqdepth = roundup2((sc->num_replies + 1), 16);
677 sc->pqdepth = roundup2((sc->num_replies + 1), 16);
678 fqsize= sc->fqdepth * 4;
679 pqsize = sc->pqdepth * 8;
680 qsize = fqsize + pqsize;
682 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
683 16, 0, /* algnmnt, boundary */
684 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
685 BUS_SPACE_MAXADDR, /* highaddr */
686 NULL, NULL, /* filter, filterarg */
689 qsize, /* maxsegsize */
691 NULL, NULL, /* lockfunc, lockarg */
693 device_printf(sc->mps_dev, "Cannot allocate queues DMA tag\n");
696 if (bus_dmamem_alloc(sc->queues_dmat, (void **)&queues, BUS_DMA_NOWAIT,
698 device_printf(sc->mps_dev, "Cannot allocate queues memory\n");
701 bzero(queues, qsize);
702 bus_dmamap_load(sc->queues_dmat, sc->queues_map, queues, qsize,
703 mps_memaddr_cb, &queues_busaddr, 0);
705 sc->free_queue = (uint32_t *)queues;
706 sc->free_busaddr = queues_busaddr;
707 sc->post_queue = (MPI2_REPLY_DESCRIPTORS_UNION *)(queues + fqsize);
708 sc->post_busaddr = queues_busaddr + fqsize;
714 mps_alloc_replies(struct mps_softc *sc)
716 int rsize, num_replies;
719 * sc->num_replies should be one less than sc->fqdepth. We need to
720 * allocate space for sc->fqdepth replies, but only sc->num_replies
721 * replies can be used at once.
723 num_replies = max(sc->fqdepth, sc->num_replies);
725 rsize = sc->facts->ReplyFrameSize * num_replies * 4;
726 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
727 4, 0, /* algnmnt, boundary */
728 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
729 BUS_SPACE_MAXADDR, /* highaddr */
730 NULL, NULL, /* filter, filterarg */
733 rsize, /* maxsegsize */
735 NULL, NULL, /* lockfunc, lockarg */
737 device_printf(sc->mps_dev, "Cannot allocate replies DMA tag\n");
740 if (bus_dmamem_alloc(sc->reply_dmat, (void **)&sc->reply_frames,
741 BUS_DMA_NOWAIT, &sc->reply_map)) {
742 device_printf(sc->mps_dev, "Cannot allocate replies memory\n");
745 bzero(sc->reply_frames, rsize);
746 bus_dmamap_load(sc->reply_dmat, sc->reply_map, sc->reply_frames, rsize,
747 mps_memaddr_cb, &sc->reply_busaddr, 0);
753 mps_alloc_requests(struct mps_softc *sc)
755 struct mps_command *cm;
756 struct mps_chain *chain;
759 rsize = sc->facts->IOCRequestFrameSize * sc->num_reqs * 4;
760 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
761 16, 0, /* algnmnt, boundary */
762 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
763 BUS_SPACE_MAXADDR, /* highaddr */
764 NULL, NULL, /* filter, filterarg */
767 rsize, /* maxsegsize */
769 NULL, NULL, /* lockfunc, lockarg */
771 device_printf(sc->mps_dev, "Cannot allocate request DMA tag\n");
774 if (bus_dmamem_alloc(sc->req_dmat, (void **)&sc->req_frames,
775 BUS_DMA_NOWAIT, &sc->req_map)) {
776 device_printf(sc->mps_dev, "Cannot allocate request memory\n");
779 bzero(sc->req_frames, rsize);
780 bus_dmamap_load(sc->req_dmat, sc->req_map, sc->req_frames, rsize,
781 mps_memaddr_cb, &sc->req_busaddr, 0);
783 rsize = sc->facts->IOCRequestFrameSize * sc->max_chains * 4;
784 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
785 16, 0, /* algnmnt, boundary */
786 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
787 BUS_SPACE_MAXADDR, /* highaddr */
788 NULL, NULL, /* filter, filterarg */
791 rsize, /* maxsegsize */
793 NULL, NULL, /* lockfunc, lockarg */
795 device_printf(sc->mps_dev, "Cannot allocate chain DMA tag\n");
798 if (bus_dmamem_alloc(sc->chain_dmat, (void **)&sc->chain_frames,
799 BUS_DMA_NOWAIT, &sc->chain_map)) {
800 device_printf(sc->mps_dev, "Cannot allocate chain memory\n");
803 bzero(sc->chain_frames, rsize);
804 bus_dmamap_load(sc->chain_dmat, sc->chain_map, sc->chain_frames, rsize,
805 mps_memaddr_cb, &sc->chain_busaddr, 0);
807 rsize = MPS_SENSE_LEN * sc->num_reqs;
808 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
809 1, 0, /* algnmnt, boundary */
810 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
811 BUS_SPACE_MAXADDR, /* highaddr */
812 NULL, NULL, /* filter, filterarg */
815 rsize, /* maxsegsize */
817 NULL, NULL, /* lockfunc, lockarg */
819 device_printf(sc->mps_dev, "Cannot allocate sense DMA tag\n");
822 if (bus_dmamem_alloc(sc->sense_dmat, (void **)&sc->sense_frames,
823 BUS_DMA_NOWAIT, &sc->sense_map)) {
824 device_printf(sc->mps_dev, "Cannot allocate sense memory\n");
827 bzero(sc->sense_frames, rsize);
828 bus_dmamap_load(sc->sense_dmat, sc->sense_map, sc->sense_frames, rsize,
829 mps_memaddr_cb, &sc->sense_busaddr, 0);
831 sc->chains = malloc(sizeof(struct mps_chain) * sc->max_chains, M_MPT2,
833 for (i = 0; i < sc->max_chains; i++) {
834 chain = &sc->chains[i];
835 chain->chain = (MPI2_SGE_IO_UNION *)(sc->chain_frames +
836 i * sc->facts->IOCRequestFrameSize * 4);
837 chain->chain_busaddr = sc->chain_busaddr +
838 i * sc->facts->IOCRequestFrameSize * 4;
839 mps_free_chain(sc, chain);
840 sc->chain_free_lowwater++;
843 /* XXX Need to pick a more precise value */
844 nsegs = (MAXPHYS / PAGE_SIZE) + 1;
845 if (bus_dma_tag_create( sc->mps_parent_dmat, /* parent */
846 1, 0, /* algnmnt, boundary */
847 BUS_SPACE_MAXADDR, /* lowaddr */
848 BUS_SPACE_MAXADDR, /* highaddr */
849 NULL, NULL, /* filter, filterarg */
850 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
851 nsegs, /* nsegments */
852 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
853 BUS_DMA_ALLOCNOW, /* flags */
854 busdma_lock_mutex, /* lockfunc */
855 &sc->mps_mtx, /* lockarg */
857 device_printf(sc->mps_dev, "Cannot allocate buffer DMA tag\n");
862 * SMID 0 cannot be used as a free command per the firmware spec.
863 * Just drop that command instead of risking accounting bugs.
865 sc->commands = malloc(sizeof(struct mps_command) * sc->num_reqs,
866 M_MPT2, M_WAITOK | M_ZERO);
867 for (i = 1; i < sc->num_reqs; i++) {
868 cm = &sc->commands[i];
869 cm->cm_req = sc->req_frames +
870 i * sc->facts->IOCRequestFrameSize * 4;
871 cm->cm_req_busaddr = sc->req_busaddr +
872 i * sc->facts->IOCRequestFrameSize * 4;
873 cm->cm_sense = &sc->sense_frames[i];
874 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPS_SENSE_LEN;
875 cm->cm_desc.Default.SMID = i;
877 TAILQ_INIT(&cm->cm_chain_list);
878 callout_init_mtx(&cm->cm_callout, &sc->mps_mtx, 0);
880 /* XXX Is a failure here a critical problem? */
881 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap) == 0)
882 if (i <= sc->facts->HighPriorityCredit)
883 mps_free_high_priority_command(sc, cm);
885 mps_free_command(sc, cm);
887 panic("failed to allocate command %d\n", i);
897 mps_init_queues(struct mps_softc *sc)
901 memset((uint8_t *)sc->post_queue, 0xff, sc->pqdepth * 8);
904 * According to the spec, we need to use one less reply than we
905 * have space for on the queue. So sc->num_replies (the number we
906 * use) should be less than sc->fqdepth (allocated size).
908 if (sc->num_replies >= sc->fqdepth)
912 * Initialize all of the free queue entries.
914 for (i = 0; i < sc->fqdepth; i++)
915 sc->free_queue[i] = sc->reply_busaddr + (i * sc->facts->ReplyFrameSize * 4);
916 sc->replyfreeindex = sc->num_replies;
921 /* Get the driver parameter tunables. Lowest priority are the driver defaults.
922 * Next are the global settings, if they exist. Highest are the per-unit
923 * settings, if they exist.
926 mps_get_tunables(struct mps_softc *sc)
930 /* XXX default to some debugging for now */
931 sc->mps_debug = MPS_FAULT;
932 sc->disable_msix = 0;
934 sc->max_chains = MPS_CHAIN_FRAMES;
937 * Grab the global variables.
939 TUNABLE_INT_FETCH("hw.mps.debug_level", &sc->mps_debug);
940 TUNABLE_INT_FETCH("hw.mps.disable_msix", &sc->disable_msix);
941 TUNABLE_INT_FETCH("hw.mps.disable_msi", &sc->disable_msi);
942 TUNABLE_INT_FETCH("hw.mps.max_chains", &sc->max_chains);
944 /* Grab the unit-instance variables */
945 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.debug_level",
946 device_get_unit(sc->mps_dev));
947 TUNABLE_INT_FETCH(tmpstr, &sc->mps_debug);
949 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msix",
950 device_get_unit(sc->mps_dev));
951 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msix);
953 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.disable_msi",
954 device_get_unit(sc->mps_dev));
955 TUNABLE_INT_FETCH(tmpstr, &sc->disable_msi);
957 snprintf(tmpstr, sizeof(tmpstr), "dev.mps.%d.max_chains",
958 device_get_unit(sc->mps_dev));
959 TUNABLE_INT_FETCH(tmpstr, &sc->max_chains);
963 mps_setup_sysctl(struct mps_softc *sc)
965 struct sysctl_ctx_list *sysctl_ctx = NULL;
966 struct sysctl_oid *sysctl_tree = NULL;
967 char tmpstr[80], tmpstr2[80];
970 * Setup the sysctl variable so the user can change the debug level
973 snprintf(tmpstr, sizeof(tmpstr), "MPS controller %d",
974 device_get_unit(sc->mps_dev));
975 snprintf(tmpstr2, sizeof(tmpstr2), "%d", device_get_unit(sc->mps_dev));
977 sysctl_ctx = device_get_sysctl_ctx(sc->mps_dev);
978 if (sysctl_ctx != NULL)
979 sysctl_tree = device_get_sysctl_tree(sc->mps_dev);
981 if (sysctl_tree == NULL) {
982 sysctl_ctx_init(&sc->sysctl_ctx);
983 sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
984 SYSCTL_STATIC_CHILDREN(_hw_mps), OID_AUTO, tmpstr2,
985 CTLFLAG_RD, 0, tmpstr);
986 if (sc->sysctl_tree == NULL)
988 sysctl_ctx = &sc->sysctl_ctx;
989 sysctl_tree = sc->sysctl_tree;
992 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
993 OID_AUTO, "debug_level", CTLFLAG_RW, &sc->mps_debug, 0,
996 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
997 OID_AUTO, "disable_msix", CTLFLAG_RD, &sc->disable_msix, 0,
998 "Disable the use of MSI-X interrupts");
1000 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1001 OID_AUTO, "disable_msi", CTLFLAG_RD, &sc->disable_msi, 0,
1002 "Disable the use of MSI interrupts");
1004 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1005 OID_AUTO, "firmware_version", CTLFLAG_RW, &sc->fw_version,
1006 strlen(sc->fw_version), "firmware version");
1008 SYSCTL_ADD_STRING(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1009 OID_AUTO, "driver_version", CTLFLAG_RW, MPS_DRIVER_VERSION,
1010 strlen(MPS_DRIVER_VERSION), "driver version");
1012 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1013 OID_AUTO, "io_cmds_active", CTLFLAG_RD,
1014 &sc->io_cmds_active, 0, "number of currently active commands");
1016 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1017 OID_AUTO, "io_cmds_highwater", CTLFLAG_RD,
1018 &sc->io_cmds_highwater, 0, "maximum active commands seen");
1020 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1021 OID_AUTO, "chain_free", CTLFLAG_RD,
1022 &sc->chain_free, 0, "number of free chain elements");
1024 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1025 OID_AUTO, "chain_free_lowwater", CTLFLAG_RD,
1026 &sc->chain_free_lowwater, 0,"lowest number of free chain elements");
1028 SYSCTL_ADD_INT(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1029 OID_AUTO, "max_chains", CTLFLAG_RD,
1030 &sc->max_chains, 0,"maximum chain frames that will be allocated");
1032 #if __FreeBSD_version >= 900030
1033 SYSCTL_ADD_UQUAD(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree),
1034 OID_AUTO, "chain_alloc_fail", CTLFLAG_RD,
1035 &sc->chain_alloc_fail, "chain allocation failures");
1036 #endif //FreeBSD_version >= 900030
1040 mps_attach(struct mps_softc *sc)
1044 mps_get_tunables(sc);
1046 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1048 mtx_init(&sc->mps_mtx, "MPT2SAS lock", NULL, MTX_DEF);
1049 callout_init_mtx(&sc->periodic, &sc->mps_mtx, 0);
1050 TAILQ_INIT(&sc->event_list);
1052 if ((error = mps_transition_ready(sc)) != 0) {
1053 mps_printf(sc, "%s failed to transition ready\n", __func__);
1057 sc->facts = malloc(sizeof(MPI2_IOC_FACTS_REPLY), M_MPT2,
1059 if ((error = mps_get_iocfacts(sc, sc->facts)) != 0)
1062 mps_print_iocfacts(sc, sc->facts);
1064 snprintf(sc->fw_version, sizeof(sc->fw_version),
1065 "%02d.%02d.%02d.%02d",
1066 sc->facts->FWVersion.Struct.Major,
1067 sc->facts->FWVersion.Struct.Minor,
1068 sc->facts->FWVersion.Struct.Unit,
1069 sc->facts->FWVersion.Struct.Dev);
1071 mps_printf(sc, "Firmware: %s, Driver: %s\n", sc->fw_version,
1072 MPS_DRIVER_VERSION);
1073 mps_printf(sc, "IOCCapabilities: %b\n", sc->facts->IOCCapabilities,
1074 "\20" "\3ScsiTaskFull" "\4DiagTrace" "\5SnapBuf" "\6ExtBuf"
1075 "\7EEDP" "\10BiDirTarg" "\11Multicast" "\14TransRetry" "\15IR"
1076 "\16EventReplay" "\17RaidAccel" "\20MSIXIndex" "\21HostDisc");
1079 * If the chip doesn't support event replay then a hard reset will be
1080 * required to trigger a full discovery. Do the reset here then
1081 * retransition to Ready. A hard reset might have already been done,
1082 * but it doesn't hurt to do it again.
1084 if ((sc->facts->IOCCapabilities &
1085 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY) == 0) {
1087 if ((error = mps_transition_ready(sc)) != 0)
1092 * Set flag if IR Firmware is loaded.
1094 if (sc->facts->IOCCapabilities &
1095 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)
1096 sc->ir_firmware = 1;
1099 * Check if controller supports FW diag buffers and set flag to enable
1102 if (sc->facts->IOCCapabilities &
1103 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER)
1104 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_TRACE].enabled =
1106 if (sc->facts->IOCCapabilities &
1107 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER)
1108 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_SNAPSHOT].enabled =
1110 if (sc->facts->IOCCapabilities &
1111 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER)
1112 sc->fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_EXTENDED].enabled =
1116 * Set flag if EEDP is supported and if TLR is supported.
1118 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP)
1119 sc->eedp_enabled = TRUE;
1120 if (sc->facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR)
1121 sc->control_TLR = TRUE;
1124 * Size the queues. Since the reply queues always need one free entry,
1125 * we'll just deduct one reply message here.
1127 sc->num_reqs = MIN(MPS_REQ_FRAMES, sc->facts->RequestCredit);
1128 sc->num_replies = MIN(MPS_REPLY_FRAMES + MPS_EVT_REPLY_FRAMES,
1129 sc->facts->MaxReplyDescriptorPostQueueDepth) - 1;
1130 TAILQ_INIT(&sc->req_list);
1131 TAILQ_INIT(&sc->high_priority_req_list);
1132 TAILQ_INIT(&sc->chain_list);
1133 TAILQ_INIT(&sc->tm_list);
1135 if (((error = mps_alloc_queues(sc)) != 0) ||
1136 ((error = mps_alloc_replies(sc)) != 0) ||
1137 ((error = mps_alloc_requests(sc)) != 0)) {
1138 mps_printf(sc, "%s failed to alloc\n", __func__);
1143 if (((error = mps_init_queues(sc)) != 0) ||
1144 ((error = mps_transition_operational(sc)) != 0)) {
1145 mps_printf(sc, "%s failed to transition operational\n", __func__);
1151 * Finish the queue initialization.
1152 * These are set here instead of in mps_init_queues() because the
1153 * IOC resets these values during the state transition in
1154 * mps_transition_operational(). The free index is set to 1
1155 * because the corresponding index in the IOC is set to 0, and the
1156 * IOC treats the queues as full if both are set to the same value.
1157 * Hence the reason that the queue can't hold all of the possible
1160 sc->replypostindex = 0;
1161 mps_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
1162 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, 0);
1164 sc->pfacts = malloc(sizeof(MPI2_PORT_FACTS_REPLY) *
1165 sc->facts->NumberOfPorts, M_MPT2, M_ZERO|M_WAITOK);
1166 for (i = 0; i < sc->facts->NumberOfPorts; i++) {
1167 if ((error = mps_get_portfacts(sc, &sc->pfacts[i], i)) != 0) {
1168 mps_printf(sc, "%s failed to get portfacts for port %d\n",
1173 mps_print_portfacts(sc, &sc->pfacts[i]);
1176 /* Attach the subsystems so they can prepare their event masks. */
1177 /* XXX Should be dynamic so that IM/IR and user modules can attach */
1178 if (((error = mps_attach_log(sc)) != 0) ||
1179 ((error = mps_attach_sas(sc)) != 0) ||
1180 ((error = mps_attach_user(sc)) != 0)) {
1181 mps_printf(sc, "%s failed to attach all subsystems: error %d\n",
1187 if ((error = mps_pci_setup_interrupts(sc)) != 0) {
1188 mps_printf(sc, "%s failed to setup interrupts\n", __func__);
1194 * The static page function currently read is ioc page8. Others can be
1197 mps_base_static_config_pages(sc);
1199 /* Start the periodic watchdog check on the IOC Doorbell */
1203 * The portenable will kick off discovery events that will drive the
1204 * rest of the initialization process. The CAM/SAS module will
1205 * hold up the boot sequence until discovery is complete.
1207 sc->mps_ich.ich_func = mps_startup;
1208 sc->mps_ich.ich_arg = sc;
1209 if (config_intrhook_establish(&sc->mps_ich) != 0) {
1210 mps_dprint(sc, MPS_FAULT, "Cannot establish MPS config hook\n");
1215 * Allow IR to shutdown gracefully when shutdown occurs.
1217 sc->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final,
1218 mpssas_ir_shutdown, sc, SHUTDOWN_PRI_DEFAULT);
1220 if (sc->shutdown_eh == NULL)
1221 mps_dprint(sc, MPS_FAULT, "shutdown event registration "
1224 mps_setup_sysctl(sc);
1226 sc->mps_flags |= MPS_FLAGS_ATTACH_DONE;
1231 /* Run through any late-start handlers. */
1233 mps_startup(void *arg)
1235 struct mps_softc *sc;
1237 sc = (struct mps_softc *)arg;
1240 mps_unmask_intr(sc);
1241 /* initialize device mapping tables */
1242 mps_mapping_initialize(sc);
1247 /* Periodic watchdog. Is called with the driver lock already held. */
1249 mps_periodic(void *arg)
1251 struct mps_softc *sc;
1254 sc = (struct mps_softc *)arg;
1255 if (sc->mps_flags & MPS_FLAGS_SHUTDOWN)
1258 db = mps_regread(sc, MPI2_DOORBELL_OFFSET);
1259 if ((db & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
1260 device_printf(sc->mps_dev, "IOC Fault 0x%08x, Resetting\n", db);
1265 callout_reset(&sc->periodic, MPS_PERIODIC_DELAY * hz, mps_periodic, sc);
1269 mps_log_evt_handler(struct mps_softc *sc, uintptr_t data,
1270 MPI2_EVENT_NOTIFICATION_REPLY *event)
1272 MPI2_EVENT_DATA_LOG_ENTRY_ADDED *entry;
1274 mps_print_event(sc, event);
1276 switch (event->Event) {
1277 case MPI2_EVENT_LOG_DATA:
1278 device_printf(sc->mps_dev, "MPI2_EVENT_LOG_DATA:\n");
1279 hexdump(event->EventData, event->EventDataLength, NULL, 0);
1281 case MPI2_EVENT_LOG_ENTRY_ADDED:
1282 entry = (MPI2_EVENT_DATA_LOG_ENTRY_ADDED *)event->EventData;
1283 mps_dprint(sc, MPS_INFO, "MPI2_EVENT_LOG_ENTRY_ADDED event "
1284 "0x%x Sequence %d:\n", entry->LogEntryQualifier,
1285 entry->LogSequence);
1294 mps_attach_log(struct mps_softc *sc)
1299 setbit(events, MPI2_EVENT_LOG_DATA);
1300 setbit(events, MPI2_EVENT_LOG_ENTRY_ADDED);
1302 mps_register_events(sc, events, mps_log_evt_handler, NULL,
1309 mps_detach_log(struct mps_softc *sc)
1312 if (sc->mps_log_eh != NULL)
1313 mps_deregister_events(sc, sc->mps_log_eh);
1318 * Free all of the driver resources and detach submodules. Should be called
1319 * without the lock held.
1322 mps_free(struct mps_softc *sc)
1324 struct mps_command *cm;
1327 /* Turn off the watchdog */
1329 sc->mps_flags |= MPS_FLAGS_SHUTDOWN;
1331 /* Lock must not be held for this */
1332 callout_drain(&sc->periodic);
1334 if (((error = mps_detach_log(sc)) != 0) ||
1335 ((error = mps_detach_sas(sc)) != 0))
1338 mps_detach_user(sc);
1340 /* Put the IOC back in the READY state. */
1342 if ((error = mps_transition_ready(sc)) != 0) {
1348 if (sc->facts != NULL)
1349 free(sc->facts, M_MPT2);
1351 if (sc->pfacts != NULL)
1352 free(sc->pfacts, M_MPT2);
1354 if (sc->post_busaddr != 0)
1355 bus_dmamap_unload(sc->queues_dmat, sc->queues_map);
1356 if (sc->post_queue != NULL)
1357 bus_dmamem_free(sc->queues_dmat, sc->post_queue,
1359 if (sc->queues_dmat != NULL)
1360 bus_dma_tag_destroy(sc->queues_dmat);
1362 if (sc->chain_busaddr != 0)
1363 bus_dmamap_unload(sc->chain_dmat, sc->chain_map);
1364 if (sc->chain_frames != NULL)
1365 bus_dmamem_free(sc->chain_dmat, sc->chain_frames,sc->chain_map);
1366 if (sc->chain_dmat != NULL)
1367 bus_dma_tag_destroy(sc->chain_dmat);
1369 if (sc->sense_busaddr != 0)
1370 bus_dmamap_unload(sc->sense_dmat, sc->sense_map);
1371 if (sc->sense_frames != NULL)
1372 bus_dmamem_free(sc->sense_dmat, sc->sense_frames,sc->sense_map);
1373 if (sc->sense_dmat != NULL)
1374 bus_dma_tag_destroy(sc->sense_dmat);
1376 if (sc->reply_busaddr != 0)
1377 bus_dmamap_unload(sc->reply_dmat, sc->reply_map);
1378 if (sc->reply_frames != NULL)
1379 bus_dmamem_free(sc->reply_dmat, sc->reply_frames,sc->reply_map);
1380 if (sc->reply_dmat != NULL)
1381 bus_dma_tag_destroy(sc->reply_dmat);
1383 if (sc->req_busaddr != 0)
1384 bus_dmamap_unload(sc->req_dmat, sc->req_map);
1385 if (sc->req_frames != NULL)
1386 bus_dmamem_free(sc->req_dmat, sc->req_frames, sc->req_map);
1387 if (sc->req_dmat != NULL)
1388 bus_dma_tag_destroy(sc->req_dmat);
1390 if (sc->chains != NULL)
1391 free(sc->chains, M_MPT2);
1392 if (sc->commands != NULL) {
1393 for (i = 1; i < sc->num_reqs; i++) {
1394 cm = &sc->commands[i];
1395 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
1397 free(sc->commands, M_MPT2);
1399 if (sc->buffer_dmat != NULL)
1400 bus_dma_tag_destroy(sc->buffer_dmat);
1402 if (sc->sysctl_tree != NULL)
1403 sysctl_ctx_free(&sc->sysctl_ctx);
1405 mps_mapping_free_memory(sc);
1407 /* Deregister the shutdown function */
1408 if (sc->shutdown_eh != NULL)
1409 EVENTHANDLER_DEREGISTER(shutdown_final, sc->shutdown_eh);
1411 mtx_destroy(&sc->mps_mtx);
1416 static __inline void
1417 mps_complete_command(struct mps_command *cm)
1419 if (cm->cm_flags & MPS_CM_FLAGS_POLLED)
1420 cm->cm_flags |= MPS_CM_FLAGS_COMPLETE;
1422 if (cm->cm_complete != NULL) {
1423 mps_dprint(cm->cm_sc, MPS_TRACE,
1424 "%s cm %p calling cm_complete %p data %p reply %p\n",
1425 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1427 cm->cm_complete(cm->cm_sc, cm);
1430 if (cm->cm_flags & MPS_CM_FLAGS_WAKEUP) {
1431 mps_dprint(cm->cm_sc, MPS_TRACE, "%s: waking up %p\n",
1436 if (cm->cm_sc->io_cmds_active != 0) {
1437 cm->cm_sc->io_cmds_active--;
1439 mps_dprint(cm->cm_sc, MPS_INFO, "Warning: io_cmds_active is "
1440 "out of sync - resynching to 0\n");
1445 mps_intr(void *data)
1447 struct mps_softc *sc;
1450 sc = (struct mps_softc *)data;
1451 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1454 * Check interrupt status register to flush the bus. This is
1455 * needed for both INTx interrupts and driver-driven polling
1457 status = mps_regread(sc, MPI2_HOST_INTERRUPT_STATUS_OFFSET);
1458 if ((status & MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT) == 0)
1462 mps_intr_locked(data);
1468 * In theory, MSI/MSIX interrupts shouldn't need to read any registers on the
1469 * chip. Hopefully this theory is correct.
1472 mps_intr_msi(void *data)
1474 struct mps_softc *sc;
1476 sc = (struct mps_softc *)data;
1477 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1479 mps_intr_locked(data);
1485 * The locking is overly broad and simplistic, but easy to deal with for now.
1488 mps_intr_locked(void *data)
1490 MPI2_REPLY_DESCRIPTORS_UNION *desc;
1491 struct mps_softc *sc;
1492 struct mps_command *cm = NULL;
1495 MPI2_DIAG_RELEASE_REPLY *rel_rep;
1496 mps_fw_diagnostic_buffer_t *pBuffer;
1498 sc = (struct mps_softc *)data;
1500 pq = sc->replypostindex;
1501 mps_dprint(sc, MPS_TRACE,
1502 "%s sc %p starting with replypostindex %u\n",
1503 __func__, sc, sc->replypostindex);
1507 desc = &sc->post_queue[sc->replypostindex];
1508 flags = desc->Default.ReplyFlags &
1509 MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
1510 if ((flags == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
1511 || (desc->Words.High == 0xffffffff))
1514 /* increment the replypostindex now, so that event handlers
1515 * and cm completion handlers which decide to do a diag
1516 * reset can zero it without it getting incremented again
1517 * afterwards, and we break out of this loop on the next
1518 * iteration since the reply post queue has been cleared to
1519 * 0xFF and all descriptors look unused (which they are).
1521 if (++sc->replypostindex >= sc->pqdepth)
1522 sc->replypostindex = 0;
1525 case MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS:
1526 cm = &sc->commands[desc->SCSIIOSuccess.SMID];
1527 cm->cm_reply = NULL;
1529 case MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY:
1535 * Re-compose the reply address from the address
1536 * sent back from the chip. The ReplyFrameAddress
1537 * is the lower 32 bits of the physical address of
1538 * particular reply frame. Convert that address to
1539 * host format, and then use that to provide the
1540 * offset against the virtual address base
1541 * (sc->reply_frames).
1543 baddr = le32toh(desc->AddressReply.ReplyFrameAddress);
1544 reply = sc->reply_frames +
1545 (baddr - ((uint32_t)sc->reply_busaddr));
1547 * Make sure the reply we got back is in a valid
1548 * range. If not, go ahead and panic here, since
1549 * we'll probably panic as soon as we deference the
1550 * reply pointer anyway.
1552 if ((reply < sc->reply_frames)
1553 || (reply > (sc->reply_frames +
1554 (sc->fqdepth * sc->facts->ReplyFrameSize * 4)))) {
1555 printf("%s: WARNING: reply %p out of range!\n",
1557 printf("%s: reply_frames %p, fqdepth %d, "
1558 "frame size %d\n", __func__,
1559 sc->reply_frames, sc->fqdepth,
1560 sc->facts->ReplyFrameSize * 4);
1561 printf("%s: baddr %#x,\n", __func__, baddr);
1562 panic("Reply address out of range");
1564 if (desc->AddressReply.SMID == 0) {
1565 if (((MPI2_DEFAULT_REPLY *)reply)->Function ==
1566 MPI2_FUNCTION_DIAG_BUFFER_POST) {
1568 * If SMID is 0 for Diag Buffer Post,
1569 * this implies that the reply is due to
1570 * a release function with a status that
1571 * the buffer has been released. Set
1572 * the buffer flags accordingly.
1575 (MPI2_DIAG_RELEASE_REPLY *)reply;
1576 if (rel_rep->IOCStatus ==
1577 MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED)
1580 &sc->fw_diag_buffer_list[
1581 rel_rep->BufferType];
1582 pBuffer->valid_data = TRUE;
1583 pBuffer->owned_by_firmware =
1585 pBuffer->immediate = FALSE;
1588 mps_dispatch_event(sc, baddr,
1589 (MPI2_EVENT_NOTIFICATION_REPLY *)
1592 cm = &sc->commands[desc->AddressReply.SMID];
1593 cm->cm_reply = reply;
1595 desc->AddressReply.ReplyFrameAddress;
1599 case MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS:
1600 case MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER:
1601 case MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS:
1604 device_printf(sc->mps_dev, "Unhandled reply 0x%x\n",
1605 desc->Default.ReplyFlags);
1611 mps_complete_command(cm);
1613 desc->Words.Low = 0xffffffff;
1614 desc->Words.High = 0xffffffff;
1617 if (pq != sc->replypostindex) {
1618 mps_dprint(sc, MPS_TRACE,
1619 "%s sc %p writing postindex %d\n",
1620 __func__, sc, sc->replypostindex);
1621 mps_regwrite(sc, MPI2_REPLY_POST_HOST_INDEX_OFFSET, sc->replypostindex);
1628 mps_dispatch_event(struct mps_softc *sc, uintptr_t data,
1629 MPI2_EVENT_NOTIFICATION_REPLY *reply)
1631 struct mps_event_handle *eh;
1632 int event, handled = 0;
1634 event = reply->Event;
1635 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1636 if (isset(eh->mask, event)) {
1637 eh->callback(sc, data, reply);
1643 device_printf(sc->mps_dev, "Unhandled event 0x%x\n", event);
1646 * This is the only place that the event/reply should be freed.
1647 * Anything wanting to hold onto the event data should have
1648 * already copied it into their own storage.
1650 mps_free_reply(sc, data);
1654 mps_reregister_events_complete(struct mps_softc *sc, struct mps_command *cm)
1656 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1660 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
1662 mps_free_command(sc, cm);
1664 /* next, send a port enable */
1669 * For both register_events and update_events, the caller supplies a bitmap
1670 * of events that it _wants_. These functions then turn that into a bitmask
1671 * suitable for the controller.
1674 mps_register_events(struct mps_softc *sc, uint8_t *mask,
1675 mps_evt_callback_t *cb, void *data, struct mps_event_handle **handle)
1677 struct mps_event_handle *eh;
1680 eh = malloc(sizeof(struct mps_event_handle), M_MPT2, M_WAITOK|M_ZERO);
1683 TAILQ_INSERT_TAIL(&sc->event_list, eh, eh_list);
1685 error = mps_update_events(sc, eh, mask);
1692 mps_update_events(struct mps_softc *sc, struct mps_event_handle *handle,
1695 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
1696 MPI2_EVENT_NOTIFICATION_REPLY *reply;
1697 struct mps_command *cm;
1698 struct mps_event_handle *eh;
1701 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1703 if ((mask != NULL) && (handle != NULL))
1704 bcopy(mask, &handle->mask[0], 16);
1705 memset(sc->event_mask, 0xff, 16);
1707 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1708 for (i = 0; i < 16; i++)
1709 sc->event_mask[i] &= ~eh->mask[i];
1712 if ((cm = mps_alloc_command(sc)) == NULL)
1714 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
1715 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
1716 evtreq->MsgFlags = 0;
1717 evtreq->SASBroadcastPrimitiveMasks = 0;
1718 #ifdef MPS_DEBUG_ALL_EVENTS
1720 u_char fullmask[16];
1721 memset(fullmask, 0x00, 16);
1722 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
1725 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
1727 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1730 error = mps_request_polled(sc, cm);
1731 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
1732 if ((reply == NULL) ||
1733 (reply->IOCStatus & MPI2_IOCSTATUS_MASK) != MPI2_IOCSTATUS_SUCCESS)
1735 mps_print_event(sc, reply);
1736 mps_dprint(sc, MPS_TRACE, "%s finished error %d\n", __func__, error);
1738 mps_free_command(sc, cm);
1743 mps_reregister_events(struct mps_softc *sc)
1745 MPI2_EVENT_NOTIFICATION_REQUEST *evtreq;
1746 struct mps_command *cm;
1747 struct mps_event_handle *eh;
1750 mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
1752 /* first, reregister events */
1754 memset(sc->event_mask, 0xff, 16);
1756 TAILQ_FOREACH(eh, &sc->event_list, eh_list) {
1757 for (i = 0; i < 16; i++)
1758 sc->event_mask[i] &= ~eh->mask[i];
1761 if ((cm = mps_alloc_command(sc)) == NULL)
1763 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
1764 evtreq->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
1765 evtreq->MsgFlags = 0;
1766 evtreq->SASBroadcastPrimitiveMasks = 0;
1767 #ifdef MPS_DEBUG_ALL_EVENTS
1769 u_char fullmask[16];
1770 memset(fullmask, 0x00, 16);
1771 bcopy(fullmask, (uint8_t *)&evtreq->EventMasks, 16);
1774 bcopy(sc->event_mask, (uint8_t *)&evtreq->EventMasks, 16);
1776 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1778 cm->cm_complete = mps_reregister_events_complete;
1780 error = mps_map_command(sc, cm);
1782 mps_dprint(sc, MPS_TRACE, "%s finished with error %d\n", __func__, error);
1787 mps_deregister_events(struct mps_softc *sc, struct mps_event_handle *handle)
1790 TAILQ_REMOVE(&sc->event_list, handle, eh_list);
1791 free(handle, M_MPT2);
1792 return (mps_update_events(sc, NULL, NULL));
1796 * Add a chain element as the next SGE for the specified command.
1797 * Reset cm_sge and cm_sgesize to indicate all the available space.
1800 mps_add_chain(struct mps_command *cm)
1802 MPI2_SGE_CHAIN32 *sgc;
1803 struct mps_chain *chain;
1806 if (cm->cm_sglsize < MPS_SGC_SIZE)
1807 panic("MPS: Need SGE Error Code\n");
1809 chain = mps_alloc_chain(cm->cm_sc);
1813 space = (int)cm->cm_sc->facts->IOCRequestFrameSize * 4;
1816 * Note: a double-linked list is used to make it easier to
1817 * walk for debugging.
1819 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
1821 sgc = (MPI2_SGE_CHAIN32 *)&cm->cm_sge->MpiChain;
1822 sgc->Length = space;
1823 sgc->NextChainOffset = 0;
1824 sgc->Flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT;
1825 sgc->Address = chain->chain_busaddr;
1827 cm->cm_sge = (MPI2_SGE_IO_UNION *)&chain->chain->MpiSimple;
1828 cm->cm_sglsize = space;
1833 * Add one scatter-gather element (chain, simple, transaction context)
1834 * to the scatter-gather list for a command. Maintain cm_sglsize and
1835 * cm_sge as the remaining size and pointer to the next SGE to fill
1839 mps_push_sge(struct mps_command *cm, void *sgep, size_t len, int segsleft)
1841 MPI2_SGE_TRANSACTION_UNION *tc = sgep;
1842 MPI2_SGE_SIMPLE64 *sge = sgep;
1844 uint32_t saved_buf_len, saved_address_low, saved_address_high;
1846 type = (tc->Flags & MPI2_SGE_FLAGS_ELEMENT_MASK);
1850 case MPI2_SGE_FLAGS_TRANSACTION_ELEMENT: {
1851 if (len != tc->DetailsLength + 4)
1852 panic("TC %p length %u or %zu?", tc,
1853 tc->DetailsLength + 4, len);
1856 case MPI2_SGE_FLAGS_CHAIN_ELEMENT:
1857 /* Driver only uses 32-bit chain elements */
1858 if (len != MPS_SGC_SIZE)
1859 panic("CHAIN %p length %u or %zu?", sgep,
1862 case MPI2_SGE_FLAGS_SIMPLE_ELEMENT:
1863 /* Driver only uses 64-bit SGE simple elements */
1865 if (len != MPS_SGE64_SIZE)
1866 panic("SGE simple %p length %u or %zu?", sge,
1867 MPS_SGE64_SIZE, len);
1868 if (((sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT) &
1869 MPI2_SGE_FLAGS_ADDRESS_SIZE) == 0)
1870 panic("SGE simple %p flags %02x not marked 64-bit?",
1871 sge, sge->FlagsLength >> MPI2_SGE_FLAGS_SHIFT);
1875 panic("Unexpected SGE %p, flags %02x", tc, tc->Flags);
1880 * case 1: 1 more segment, enough room for it
1881 * case 2: 2 more segments, enough room for both
1882 * case 3: >=2 more segments, only enough room for 1 and a chain
1883 * case 4: >=1 more segment, enough room for only a chain
1884 * case 5: >=1 more segment, no room for anything (error)
1888 * There should be room for at least a chain element, or this
1889 * code is buggy. Case (5).
1891 if (cm->cm_sglsize < MPS_SGC_SIZE)
1892 panic("MPS: Need SGE Error Code\n");
1894 if (segsleft >= 2 &&
1895 cm->cm_sglsize < len + MPS_SGC_SIZE + MPS_SGE64_SIZE) {
1897 * There are 2 or more segments left to add, and only
1898 * enough room for 1 and a chain. Case (3).
1900 * Mark as last element in this chain if necessary.
1902 if (type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
1904 (MPI2_SGE_FLAGS_LAST_ELEMENT << MPI2_SGE_FLAGS_SHIFT);
1908 * Add the item then a chain. Do the chain now,
1909 * rather than on the next iteration, to simplify
1910 * understanding the code.
1912 cm->cm_sglsize -= len;
1913 bcopy(sgep, cm->cm_sge, len);
1914 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
1915 return (mps_add_chain(cm));
1918 if (segsleft >= 1 && cm->cm_sglsize < len + MPS_SGC_SIZE) {
1920 * 1 or more segment, enough room for only a chain.
1921 * Hope the previous element wasn't a Simple entry
1922 * that needed to be marked with
1923 * MPI2_SGE_FLAGS_LAST_ELEMENT. Case (4).
1925 if ((error = mps_add_chain(cm)) != 0)
1930 /* Case 1: 1 more segment, enough room for it. */
1931 if (segsleft == 1 && cm->cm_sglsize < len)
1932 panic("1 seg left and no room? %u versus %zu",
1933 cm->cm_sglsize, len);
1935 /* Case 2: 2 more segments, enough room for both */
1936 if (segsleft == 2 && cm->cm_sglsize < len + MPS_SGE64_SIZE)
1937 panic("2 segs left and no room? %u versus %zu",
1938 cm->cm_sglsize, len);
1941 if (segsleft == 1 && type == MPI2_SGE_FLAGS_SIMPLE_ELEMENT) {
1943 * If this is a bi-directional request, need to account for that
1944 * here. Save the pre-filled sge values. These will be used
1945 * either for the 2nd SGL or for a single direction SGL. If
1946 * cm_out_len is non-zero, this is a bi-directional request, so
1947 * fill in the OUT SGL first, then the IN SGL, otherwise just
1948 * fill in the IN SGL. Note that at this time, when filling in
1949 * 2 SGL's for a bi-directional request, they both use the same
1950 * DMA buffer (same cm command).
1952 saved_buf_len = sge->FlagsLength & 0x00FFFFFF;
1953 saved_address_low = sge->Address.Low;
1954 saved_address_high = sge->Address.High;
1955 if (cm->cm_out_len) {
1956 sge->FlagsLength = cm->cm_out_len |
1957 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1958 MPI2_SGE_FLAGS_END_OF_BUFFER |
1959 MPI2_SGE_FLAGS_HOST_TO_IOC |
1960 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
1961 MPI2_SGE_FLAGS_SHIFT);
1962 cm->cm_sglsize -= len;
1963 bcopy(sgep, cm->cm_sge, len);
1964 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge
1967 sge->FlagsLength = saved_buf_len |
1968 ((uint32_t)(MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1969 MPI2_SGE_FLAGS_END_OF_BUFFER |
1970 MPI2_SGE_FLAGS_LAST_ELEMENT |
1971 MPI2_SGE_FLAGS_END_OF_LIST |
1972 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
1973 MPI2_SGE_FLAGS_SHIFT);
1974 if (cm->cm_flags & MPS_CM_FLAGS_DATAIN) {
1976 ((uint32_t)(MPI2_SGE_FLAGS_IOC_TO_HOST) <<
1977 MPI2_SGE_FLAGS_SHIFT);
1980 ((uint32_t)(MPI2_SGE_FLAGS_HOST_TO_IOC) <<
1981 MPI2_SGE_FLAGS_SHIFT);
1983 sge->Address.Low = saved_address_low;
1984 sge->Address.High = saved_address_high;
1987 cm->cm_sglsize -= len;
1988 bcopy(sgep, cm->cm_sge, len);
1989 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
1994 * Add one dma segment to the scatter-gather list for a command.
1997 mps_add_dmaseg(struct mps_command *cm, vm_paddr_t pa, size_t len, u_int flags,
2000 MPI2_SGE_SIMPLE64 sge;
2003 * This driver always uses 64-bit address elements for simplicity.
2005 flags |= MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
2006 MPI2_SGE_FLAGS_64_BIT_ADDRESSING;
2007 sge.FlagsLength = len | (flags << MPI2_SGE_FLAGS_SHIFT);
2008 mps_from_u64(pa, &sge.Address);
2010 return (mps_push_sge(cm, &sge, sizeof sge, segsleft));
2014 mps_data_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
2016 struct mps_softc *sc;
2017 struct mps_command *cm;
2018 u_int i, dir, sflags;
2020 cm = (struct mps_command *)arg;
2024 * In this case, just print out a warning and let the chip tell the
2025 * user they did the wrong thing.
2027 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
2028 mps_printf(sc, "%s: warning: busdma returned %d segments, "
2029 "more than the %d allowed\n", __func__, nsegs,
2034 * Set up DMA direction flags. Bi-directional requests are also handled
2035 * here. In that case, both direction flags will be set.
2038 if (cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) {
2040 * We have to add a special case for SMP passthrough, there
2041 * is no easy way to generically handle it. The first
2042 * S/G element is used for the command (therefore the
2043 * direction bit needs to be set). The second one is used
2044 * for the reply. We'll leave it to the caller to make
2045 * sure we only have two buffers.
2048 * Even though the busdma man page says it doesn't make
2049 * sense to have both direction flags, it does in this case.
2050 * We have one s/g element being accessed in each direction.
2052 dir = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD;
2055 * Set the direction flag on the first buffer in the SMP
2056 * passthrough request. We'll clear it for the second one.
2058 sflags |= MPI2_SGE_FLAGS_DIRECTION |
2059 MPI2_SGE_FLAGS_END_OF_BUFFER;
2060 } else if (cm->cm_flags & MPS_CM_FLAGS_DATAOUT) {
2061 sflags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
2062 dir = BUS_DMASYNC_PREWRITE;
2064 dir = BUS_DMASYNC_PREREAD;
2066 for (i = 0; i < nsegs; i++) {
2067 if ((cm->cm_flags & MPS_CM_FLAGS_SMP_PASS) && (i != 0)) {
2068 sflags &= ~MPI2_SGE_FLAGS_DIRECTION;
2070 error = mps_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
2073 /* Resource shortage, roll back! */
2074 mps_dprint(sc, MPS_INFO, "out of chain frames\n");
2075 cm->cm_flags |= MPS_CM_FLAGS_CHAIN_FAILED;
2076 mps_complete_command(cm);
2081 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
2082 mps_enqueue_request(sc, cm);
2088 mps_data_cb2(void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize,
2091 mps_data_cb(arg, segs, nsegs, error);
2095 * This is the routine to enqueue commands ansynchronously.
2096 * Note that the only error path here is from bus_dmamap_load(), which can
2097 * return EINPROGRESS if it is waiting for resources. Other than this, it's
2098 * assumed that if you have a command in-hand, then you have enough credits
2102 mps_map_command(struct mps_softc *sc, struct mps_command *cm)
2104 MPI2_SGE_SIMPLE32 *sge;
2107 if (cm->cm_flags & MPS_CM_FLAGS_USE_UIO) {
2108 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
2109 &cm->cm_uio, mps_data_cb2, cm, 0);
2110 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
2111 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
2112 cm->cm_data, cm->cm_length, mps_data_cb, cm, 0);
2114 /* Add a zero-length element as needed */
2115 if (cm->cm_sge != NULL) {
2116 sge = (MPI2_SGE_SIMPLE32 *)cm->cm_sge;
2117 sge->FlagsLength = (MPI2_SGE_FLAGS_LAST_ELEMENT |
2118 MPI2_SGE_FLAGS_END_OF_BUFFER |
2119 MPI2_SGE_FLAGS_END_OF_LIST |
2120 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
2121 MPI2_SGE_FLAGS_SHIFT;
2124 mps_enqueue_request(sc, cm);
2131 * This is the routine to enqueue commands synchronously. An error of
2132 * EINPROGRESS from mps_map_command() is ignored since the command will
2133 * be executed and enqueued automatically. Other errors come from msleep().
2136 mps_wait_command(struct mps_softc *sc, struct mps_command *cm, int timeout)
2140 mtx_assert(&sc->mps_mtx, MA_OWNED);
2142 cm->cm_complete = NULL;
2143 cm->cm_flags |= MPS_CM_FLAGS_WAKEUP;
2144 error = mps_map_command(sc, cm);
2145 if ((error != 0) && (error != EINPROGRESS))
2147 error = msleep(cm, &sc->mps_mtx, 0, "mpswait", timeout*hz);
2148 if (error == EWOULDBLOCK)
2154 * This is the routine to enqueue a command synchonously and poll for
2155 * completion. Its use should be rare.
2158 mps_request_polled(struct mps_softc *sc, struct mps_command *cm)
2160 int error, timeout = 0;
2164 cm->cm_flags |= MPS_CM_FLAGS_POLLED;
2165 cm->cm_complete = NULL;
2166 mps_map_command(sc, cm);
2168 while ((cm->cm_flags & MPS_CM_FLAGS_COMPLETE) == 0) {
2169 mps_intr_locked(sc);
2171 if (timeout++ > 1000) {
2172 mps_dprint(sc, MPS_FAULT, "polling failed\n");
2182 * The MPT driver had a verbose interface for config pages. In this driver,
2183 * reduce it to much simplier terms, similar to the Linux driver.
2186 mps_read_config_page(struct mps_softc *sc, struct mps_config_params *params)
2188 MPI2_CONFIG_REQUEST *req;
2189 struct mps_command *cm;
2192 if (sc->mps_flags & MPS_FLAGS_BUSY) {
2196 cm = mps_alloc_command(sc);
2201 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
2202 req->Function = MPI2_FUNCTION_CONFIG;
2203 req->Action = params->action;
2205 req->ChainOffset = 0;
2206 req->PageAddress = params->page_address;
2207 if (params->hdr.Ext.ExtPageType != 0) {
2208 MPI2_CONFIG_EXTENDED_PAGE_HEADER *hdr;
2210 hdr = ¶ms->hdr.Ext;
2211 req->ExtPageType = hdr->ExtPageType;
2212 req->ExtPageLength = hdr->ExtPageLength;
2213 req->Header.PageType = MPI2_CONFIG_PAGETYPE_EXTENDED;
2214 req->Header.PageLength = 0; /* Must be set to zero */
2215 req->Header.PageNumber = hdr->PageNumber;
2216 req->Header.PageVersion = hdr->PageVersion;
2218 MPI2_CONFIG_PAGE_HEADER *hdr;
2220 hdr = ¶ms->hdr.Struct;
2221 req->Header.PageType = hdr->PageType;
2222 req->Header.PageNumber = hdr->PageNumber;
2223 req->Header.PageLength = hdr->PageLength;
2224 req->Header.PageVersion = hdr->PageVersion;
2227 cm->cm_data = params->buffer;
2228 cm->cm_length = params->length;
2229 cm->cm_sge = &req->PageBufferSGE;
2230 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
2231 cm->cm_flags = MPS_CM_FLAGS_SGE_SIMPLE | MPS_CM_FLAGS_DATAIN;
2232 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2234 cm->cm_complete_data = params;
2235 if (params->callback != NULL) {
2236 cm->cm_complete = mps_config_complete;
2237 return (mps_map_command(sc, cm));
2239 error = mps_wait_command(sc, cm, 0);
2241 mps_dprint(sc, MPS_FAULT,
2242 "Error %d reading config page\n", error);
2243 mps_free_command(sc, cm);
2246 mps_config_complete(sc, cm);
2253 mps_write_config_page(struct mps_softc *sc, struct mps_config_params *params)
2259 mps_config_complete(struct mps_softc *sc, struct mps_command *cm)
2261 MPI2_CONFIG_REPLY *reply;
2262 struct mps_config_params *params;
2264 params = cm->cm_complete_data;
2266 if (cm->cm_data != NULL) {
2267 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
2268 BUS_DMASYNC_POSTREAD);
2269 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
2273 * XXX KDM need to do more error recovery? This results in the
2274 * device in question not getting probed.
2276 if ((cm->cm_flags & MPS_CM_FLAGS_ERROR_MASK) != 0) {
2277 params->status = MPI2_IOCSTATUS_BUSY;
2281 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
2282 if (reply == NULL) {
2283 params->status = MPI2_IOCSTATUS_BUSY;
2286 params->status = reply->IOCStatus;
2287 if (params->hdr.Ext.ExtPageType != 0) {
2288 params->hdr.Ext.ExtPageType = reply->ExtPageType;
2289 params->hdr.Ext.ExtPageLength = reply->ExtPageLength;
2291 params->hdr.Struct.PageType = reply->Header.PageType;
2292 params->hdr.Struct.PageNumber = reply->Header.PageNumber;
2293 params->hdr.Struct.PageLength = reply->Header.PageLength;
2294 params->hdr.Struct.PageVersion = reply->Header.PageVersion;
2298 mps_free_command(sc, cm);
2299 if (params->callback != NULL)
2300 params->callback(sc, params);