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35 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
36 * Creation Date: August 11, 2000
38 * mpi_ioc.h Version: 01.05.16
43 * Date Version Description
44 * -------- -------- ------------------------------------------------------
45 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
46 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
47 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
48 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
49 * Added _MSG_EVENT_ACK_REPLY structure.
50 * Added _MSG_FW_DOWNLOAD_REPLY structure.
51 * Added _MSG_TOOLBOX_REPLY structure.
52 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
53 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
54 * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
55 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
56 * _MSG_EVENT_ACK_REPLY structure to match specification.
57 * 11-02-00 01.01.01 Original release for post 1.0 work.
58 * Added a value for Manufacturer to WhoInit.
59 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
60 * removed toolbox message.
61 * 01-09-01 01.01.03 Added event enabled and disabled defines.
62 * Added structures for FwHeader and DataHeader.
63 * Added ImageType to FwUpload reply.
64 * 02-20-01 01.01.04 Started using MPI_POINTER.
65 * 02-27-01 01.01.05 Added event for RAID status change and its event data.
66 * Added IocNumber field to MSG_IOC_FACTS_REPLY.
67 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
68 * Added structure offset comments.
69 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
70 * 08-08-01 01.02.01 Original release for v1.2 work.
71 * New format for FWVersion and ProductId in
72 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
73 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
74 * related structure and defines.
75 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
76 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
77 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
78 * IOCExceptions and changed DataImageSize to reserved.
79 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
80 * MPI_FW_UPLOAD_ITYPE_NVDATA.
81 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
82 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
83 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
84 * 05-31-02 01.02.06 Added define for
85 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
86 * Added AliasIndex to EVENT_DATA_LOGOUT structure.
87 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
88 * 06-26-03 01.02.08 Added new values to the product family defines.
89 * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
90 * added related defines.
91 * 05-11-04 01.03.01 Original release for MPI v1.3.
92 * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
93 * Added three new fields to MSG_IOC_FACTS_REPLY.
94 * Defined four new bits for the IOCCapabilities field of
96 * Added two new PortTypes for the PortFacts reply.
97 * Added six new events along with their EventData
99 * Added a new MsgFlag to the FwDownload request to
100 * indicate last segment.
101 * Defined a new image type of boot loader.
102 * Added FW family codes for SAS product families.
103 * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
104 * MSG_IOC_FACTS_REPLY.
105 * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
106 * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
107 * 01-15-05 01.05.05 Added event data for SAS SES Event.
108 * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
109 * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
110 * Reply and IOC Init Request.
111 * 03-11-05 01.05.08 Added family code for 1068E family.
112 * Removed IOCFacts Reply EEDP Capability bit.
113 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
114 * Added Max SATA Targets to SAS Discovery Error event.
115 * 08-30-05 01.05.10 Added 4 new events and their event data structures.
116 * Added new ReasonCode value for SAS Device Status Change
118 * Added new family code for FC949E.
119 * 03-27-06 01.05.11 Added MPI_IOCFACTS_CAPABILITY_TLR.
120 * Added additional Reason Codes and more event data fields
121 * to EVENT_DATA_SAS_DEVICE_STATUS_CHANGE.
122 * Added EVENT_DATA_SAS_BROADCAST_PRIMITIVE structure and
124 * Added MPI_EVENT_SAS_SMP_ERROR and event data structure.
125 * Added MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE and event
127 * Added MPI_EVENT_SAS_INIT_TABLE_OVERFLOW and event
129 * Added MPI_EXT_IMAGE_TYPE_INITIALIZATION.
130 * 10-11-06 01.05.12 Added MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED.
131 * Added MaxInitiators field to PortFacts reply.
132 * Added SAS Device Status Change ReasonCode for
133 * asynchronous notificaiton.
134 * Added MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE and event
136 * Added new ImageType values for FWDownload and FWUpload
138 * 02-28-07 01.05.13 Added MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT for SAS
139 * Broadcast Event Data (replacing _RESERVED2).
140 * For Discovery Error Event Data DiscoveryStatus field,
141 * replaced _MULTPL_PATHS with _UNSUPPORTED_DEVICE and
142 * added _MULTI_PORT_DOMAIN.
143 * 05-24-07 01.05.14 Added Common Boot Block type to FWDownload Request.
144 * Added Common Boot Block type to FWUpload Request.
145 * 08-07-07 01.05.15 Added MPI_EVENT_SAS_INIT_RC_REMOVED define.
146 * Added MPI_EVENT_IR2_RC_DUAL_PORT_ADDED and
147 * MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED for IR2 event data.
148 * Added SASAddress field to SAS Initiator Device Table
149 * Overflow event data structure.
150 * 03-28-08 01.05.16 Added two new ReasonCode values to SAS Device Status
151 * Change Event data to indicate completion of internally
152 * generated task management.
153 * Added MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE define.
154 * Added MPI_EVENT_SAS_INIT_RC_INACCESSIBLE define.
155 * --------------------------------------------------------------------------
162 /*****************************************************************************
164 * I O C M e s s a g e s
166 *****************************************************************************/
168 /****************************************************************************/
169 /* IOCInit message */
170 /****************************************************************************/
172 typedef struct _MSG_IOC_INIT
174 U8 WhoInit; /* 00h */
175 U8 Reserved; /* 01h */
176 U8 ChainOffset; /* 02h */
177 U8 Function; /* 03h */
179 U8 MaxDevices; /* 05h */
180 U8 MaxBuses; /* 06h */
181 U8 MsgFlags; /* 07h */
182 U32 MsgContext; /* 08h */
183 U16 ReplyFrameSize; /* 0Ch */
184 U8 Reserved1[2]; /* 0Eh */
185 U32 HostMfaHighAddr; /* 10h */
186 U32 SenseBufferHighAddr; /* 14h */
187 U32 ReplyFifoHostSignalingAddr; /* 18h */
188 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
189 U16 MsgVersion; /* 28h */
190 U16 HeaderVersion; /* 2Ah */
191 } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
192 IOCInit_t, MPI_POINTER pIOCInit_t;
195 #define MPI_WHOINIT_NO_ONE (0x00)
196 #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
197 #define MPI_WHOINIT_ROM_BIOS (0x02)
198 #define MPI_WHOINIT_PCI_PEER (0x03)
199 #define MPI_WHOINIT_HOST_DRIVER (0x04)
200 #define MPI_WHOINIT_MANUFACTURER (0x05)
203 #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
204 #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
205 #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
208 #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
209 #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
210 #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
211 #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
214 #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
215 #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
216 #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
217 #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
220 typedef struct _MSG_IOC_INIT_REPLY
222 U8 WhoInit; /* 00h */
223 U8 Reserved; /* 01h */
224 U8 MsgLength; /* 02h */
225 U8 Function; /* 03h */
227 U8 MaxDevices; /* 05h */
228 U8 MaxBuses; /* 06h */
229 U8 MsgFlags; /* 07h */
230 U32 MsgContext; /* 08h */
231 U16 Reserved2; /* 0Ch */
232 U16 IOCStatus; /* 0Eh */
233 U32 IOCLogInfo; /* 10h */
234 } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
235 IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
239 /****************************************************************************/
240 /* IOC Facts message */
241 /****************************************************************************/
243 typedef struct _MSG_IOC_FACTS
245 U8 Reserved[2]; /* 00h */
246 U8 ChainOffset; /* 01h */
247 U8 Function; /* 02h */
248 U8 Reserved1[3]; /* 03h */
249 U8 MsgFlags; /* 04h */
250 U32 MsgContext; /* 08h */
251 } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
252 IOCFacts_t, MPI_POINTER pIOCFacts_t;
254 typedef struct _MPI_FW_VERSION_STRUCT
260 } MPI_FW_VERSION_STRUCT;
262 typedef union _MPI_FW_VERSION
264 MPI_FW_VERSION_STRUCT Struct;
268 /* IOC Facts Reply */
269 typedef struct _MSG_IOC_FACTS_REPLY
271 U16 MsgVersion; /* 00h */
272 U8 MsgLength; /* 02h */
273 U8 Function; /* 03h */
274 U16 HeaderVersion; /* 04h */
275 U8 IOCNumber; /* 06h */
276 U8 MsgFlags; /* 07h */
277 U32 MsgContext; /* 08h */
278 U16 IOCExceptions; /* 0Ch */
279 U16 IOCStatus; /* 0Eh */
280 U32 IOCLogInfo; /* 10h */
281 U8 MaxChainDepth; /* 14h */
282 U8 WhoInit; /* 15h */
283 U8 BlockSize; /* 16h */
285 U16 ReplyQueueDepth; /* 18h */
286 U16 RequestFrameSize; /* 1Ah */
287 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
288 U16 ProductID; /* 1Eh */
289 U32 CurrentHostMfaHighAddr; /* 20h */
290 U16 GlobalCredits; /* 24h */
291 U8 NumberOfPorts; /* 26h */
292 U8 EventState; /* 27h */
293 U32 CurrentSenseBufferHighAddr; /* 28h */
294 U16 CurReplyFrameSize; /* 2Ch */
295 U8 MaxDevices; /* 2Eh */
296 U8 MaxBuses; /* 2Fh */
297 U32 FWImageSize; /* 30h */
298 U32 IOCCapabilities; /* 34h */
299 MPI_FW_VERSION FWVersion; /* 38h */
300 U16 HighPriorityQueueDepth; /* 3Ch */
301 U16 Reserved2; /* 3Eh */
302 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
303 U32 ReplyFifoHostSignalingAddr; /* 4Ch */
304 } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
305 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
307 #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
308 #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
309 #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
310 #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
312 #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
313 #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
314 #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
315 #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
317 #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
318 #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
319 #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
320 #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
321 #define MPI_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010)
323 #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
324 #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
325 #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
327 #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
328 #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
330 #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
331 #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
332 #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
333 #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
334 #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
335 #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
336 #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
337 #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
338 #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
339 #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
340 #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
341 #define MPI_IOCFACTS_CAPABILITY_TLR (0x00000800)
344 /*****************************************************************************
346 * P o r t M e s s a g e s
348 *****************************************************************************/
350 /****************************************************************************/
351 /* Port Facts message and Reply */
352 /****************************************************************************/
354 typedef struct _MSG_PORT_FACTS
356 U8 Reserved[2]; /* 00h */
357 U8 ChainOffset; /* 02h */
358 U8 Function; /* 03h */
359 U8 Reserved1[2]; /* 04h */
360 U8 PortNumber; /* 06h */
361 U8 MsgFlags; /* 07h */
362 U32 MsgContext; /* 08h */
363 } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
364 PortFacts_t, MPI_POINTER pPortFacts_t;
366 typedef struct _MSG_PORT_FACTS_REPLY
368 U16 Reserved; /* 00h */
369 U8 MsgLength; /* 02h */
370 U8 Function; /* 03h */
371 U16 Reserved1; /* 04h */
372 U8 PortNumber; /* 06h */
373 U8 MsgFlags; /* 07h */
374 U32 MsgContext; /* 08h */
375 U16 Reserved2; /* 0Ch */
376 U16 IOCStatus; /* 0Eh */
377 U32 IOCLogInfo; /* 10h */
378 U8 Reserved3; /* 14h */
379 U8 PortType; /* 15h */
380 U16 MaxDevices; /* 16h */
381 U16 PortSCSIID; /* 18h */
382 U16 ProtocolFlags; /* 1Ah */
383 U16 MaxPostedCmdBuffers; /* 1Ch */
384 U16 MaxPersistentIDs; /* 1Eh */
385 U16 MaxLanBuckets; /* 20h */
386 U8 MaxInitiators; /* 22h */
387 U8 Reserved4; /* 23h */
388 U32 Reserved5; /* 24h */
389 } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
390 PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
393 /* PortTypes values */
395 #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
396 #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
397 #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
398 #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
399 #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
401 /* ProtocolFlags values */
403 #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
404 #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
405 #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
406 #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
409 /****************************************************************************/
410 /* Port Enable Message */
411 /****************************************************************************/
413 typedef struct _MSG_PORT_ENABLE
415 U8 Reserved[2]; /* 00h */
416 U8 ChainOffset; /* 02h */
417 U8 Function; /* 03h */
418 U8 Reserved1[2]; /* 04h */
419 U8 PortNumber; /* 06h */
420 U8 MsgFlags; /* 07h */
421 U32 MsgContext; /* 08h */
422 } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
423 PortEnable_t, MPI_POINTER pPortEnable_t;
425 typedef struct _MSG_PORT_ENABLE_REPLY
427 U8 Reserved[2]; /* 00h */
428 U8 MsgLength; /* 02h */
429 U8 Function; /* 03h */
430 U8 Reserved1[2]; /* 04h */
431 U8 PortNumber; /* 05h */
432 U8 MsgFlags; /* 07h */
433 U32 MsgContext; /* 08h */
434 U16 Reserved2; /* 0Ch */
435 U16 IOCStatus; /* 0Eh */
436 U32 IOCLogInfo; /* 10h */
437 } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
438 PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
441 /*****************************************************************************
443 * E v e n t M e s s a g e s
445 *****************************************************************************/
447 /****************************************************************************/
448 /* Event Notification messages */
449 /****************************************************************************/
451 typedef struct _MSG_EVENT_NOTIFY
454 U8 Reserved; /* 01h */
455 U8 ChainOffset; /* 02h */
456 U8 Function; /* 03h */
457 U8 Reserved1[3]; /* 04h */
458 U8 MsgFlags; /* 07h */
459 U32 MsgContext; /* 08h */
460 } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
461 EventNotification_t, MPI_POINTER pEventNotification_t;
463 /* Event Notification Reply */
465 typedef struct _MSG_EVENT_NOTIFY_REPLY
467 U16 EventDataLength; /* 00h */
468 U8 MsgLength; /* 02h */
469 U8 Function; /* 03h */
470 U8 Reserved1[2]; /* 04h */
471 U8 AckRequired; /* 06h */
472 U8 MsgFlags; /* 07h */
473 U32 MsgContext; /* 08h */
474 U8 Reserved2[2]; /* 0Ch */
475 U16 IOCStatus; /* 0Eh */
476 U32 IOCLogInfo; /* 10h */
478 U32 EventContext; /* 18h */
479 U32 Data[1]; /* 1Ch */
480 } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
481 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
483 /* Event Acknowledge */
485 typedef struct _MSG_EVENT_ACK
487 U8 Reserved[2]; /* 00h */
488 U8 ChainOffset; /* 02h */
489 U8 Function; /* 03h */
490 U8 Reserved1[3]; /* 04h */
491 U8 MsgFlags; /* 07h */
492 U32 MsgContext; /* 08h */
494 U32 EventContext; /* 10h */
495 } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
496 EventAck_t, MPI_POINTER pEventAck_t;
498 typedef struct _MSG_EVENT_ACK_REPLY
500 U8 Reserved[2]; /* 00h */
501 U8 MsgLength; /* 02h */
502 U8 Function; /* 03h */
503 U8 Reserved1[3]; /* 04h */
504 U8 MsgFlags; /* 07h */
505 U32 MsgContext; /* 08h */
506 U16 Reserved2; /* 0Ch */
507 U16 IOCStatus; /* 0Eh */
508 U32 IOCLogInfo; /* 10h */
509 } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
510 EventAckReply_t, MPI_POINTER pEventAckReply_t;
514 #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
515 #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
519 #define MPI_EVENT_NONE (0x00000000)
520 #define MPI_EVENT_LOG_DATA (0x00000001)
521 #define MPI_EVENT_STATE_CHANGE (0x00000002)
522 #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
523 #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
524 #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
525 #define MPI_EVENT_RESCAN (0x00000006)
526 #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
527 #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
528 #define MPI_EVENT_LOGOUT (0x00000009)
529 #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
530 #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
531 #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
532 #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
533 #define MPI_EVENT_QUEUE_FULL (0x0000000E)
534 #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
535 #define MPI_EVENT_SAS_SES (0x00000010)
536 #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
537 #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
538 #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
539 #define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014)
540 #define MPI_EVENT_IR2 (0x00000015)
541 #define MPI_EVENT_SAS_DISCOVERY (0x00000016)
542 #define MPI_EVENT_SAS_BROADCAST_PRIMITIVE (0x00000017)
543 #define MPI_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x00000018)
544 #define MPI_EVENT_SAS_INIT_TABLE_OVERFLOW (0x00000019)
545 #define MPI_EVENT_SAS_SMP_ERROR (0x0000001A)
546 #define MPI_EVENT_SAS_EXPANDER_STATUS_CHANGE (0x0000001B)
547 #define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021)
549 /* AckRequired field values */
551 #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
552 #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
554 /* EventChange Event data */
556 typedef struct _EVENT_DATA_EVENT_CHANGE
558 U8 EventState; /* 00h */
559 U8 Reserved; /* 01h */
560 U16 Reserved1; /* 02h */
561 } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
562 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
564 /* LogEntryAdded Event data */
566 /* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */
567 #define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C)
568 typedef struct _EVENT_DATA_LOG_ENTRY
570 U32 TimeStamp; /* 00h */
571 U32 Reserved1; /* 04h */
572 U16 LogSequence; /* 08h */
573 U16 LogEntryQualifier; /* 0Ah */
574 U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */
575 } EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY,
576 MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t;
578 typedef struct _EVENT_DATA_LOG_ENTRY_ADDED
580 U16 LogSequence; /* 00h */
581 U16 Reserved1; /* 02h */
582 U32 Reserved2; /* 04h */
583 EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */
584 } EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED,
585 MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t;
587 /* SCSI Event data for Port, Bus and Device forms */
589 typedef struct _EVENT_DATA_SCSI
591 U8 TargetID; /* 00h */
592 U8 BusPort; /* 01h */
593 U16 Reserved; /* 02h */
594 } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
595 EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
597 /* SCSI Device Status Change Event data */
599 typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
601 U8 TargetID; /* 00h */
603 U8 ReasonCode; /* 02h */
607 U16 Reserved; /* 06h */
608 } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
609 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
610 MpiEventDataScsiDeviceStatusChange_t,
611 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
613 /* MPI SCSI Device Status Change Event data ReasonCode values */
614 #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
615 #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
616 #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
618 /* SAS Device Status Change Event data */
620 typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
622 U8 TargetID; /* 00h */
624 U8 ReasonCode; /* 02h */
625 U8 Reserved; /* 03h */
628 U16 DevHandle; /* 06h */
629 U32 DeviceInfo; /* 08h */
630 U16 ParentDevHandle; /* 0Ch */
632 U8 Reserved1; /* 0Fh */
633 U64 SASAddress; /* 10h */
635 U16 TaskTag; /* 20h */
636 U16 Reserved2; /* 22h */
637 } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
638 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
639 MpiEventDataSasDeviceStatusChange_t,
640 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
642 /* MPI SAS Device Status Change Event data ReasonCode values */
643 #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
644 #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
645 #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
646 #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
647 #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
648 #define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08)
649 #define MPI_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09)
650 #define MPI_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A)
651 #define MPI_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B)
652 #define MPI_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C)
653 #define MPI_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D)
654 #define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_INTERNAL_DEV_RESET (0x0E)
655 #define MPI_EVENT_SAS_DEV_STAT_RC_CMPL_TASK_ABORT_INTERNAL (0x0F)
658 /* SCSI Event data for Queue Full event */
660 typedef struct _EVENT_DATA_QUEUE_FULL
662 U8 TargetID; /* 00h */
664 U16 CurrentDepth; /* 02h */
665 } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
666 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
668 /* MPI Integrated RAID Event data */
670 typedef struct _EVENT_DATA_RAID
672 U8 VolumeID; /* 00h */
673 U8 VolumeBus; /* 01h */
674 U8 ReasonCode; /* 02h */
675 U8 PhysDiskNum; /* 03h */
678 U16 Reserved; /* 06h */
679 U32 SettingsStatus; /* 08h */
680 } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
681 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
683 /* MPI Integrated RAID Event data ReasonCode values */
684 #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
685 #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
686 #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
687 #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
688 #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
689 #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
690 #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
691 #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
692 #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
693 #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
694 #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
695 #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
698 /* MPI Integrated RAID Resync Update Event data */
700 typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE
702 U8 VolumeID; /* 00h */
703 U8 VolumeBus; /* 01h */
704 U8 ResyncComplete; /* 02h */
705 U8 Reserved1; /* 03h */
706 U32 Reserved2; /* 04h */
707 } MPI_EVENT_DATA_IR_RESYNC_UPDATE,
708 MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE,
709 MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t;
711 /* MPI IR2 Event data */
713 /* MPI_LD_STATE or MPI_PD_STATE */
714 typedef struct _IR2_STATE_CHANGED
716 U16 PreviousState; /* 00h */
717 U16 NewState; /* 02h */
718 } IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED;
720 typedef struct _IR2_PD_INFO
722 U16 DeviceHandle; /* 00h */
723 U8 TruncEnclosureHandle; /* 02h */
724 U8 TruncatedSlot; /* 03h */
725 } IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO;
727 typedef union _MPI_IR2_RC_EVENT_DATA
729 IR2_STATE_CHANGED StateChanged;
732 } MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA;
734 typedef struct _MPI_EVENT_DATA_IR2
736 U8 TargetID; /* 00h */
738 U8 ReasonCode; /* 02h */
739 U8 PhysDiskNum; /* 03h */
740 MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */
741 } MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2,
742 MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t;
744 /* MPI IR2 Event data ReasonCode values */
745 #define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01)
746 #define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02)
747 #define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03)
748 #define MPI_EVENT_IR2_RC_PD_INSERTED (0x04)
749 #define MPI_EVENT_IR2_RC_PD_REMOVED (0x05)
750 #define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06)
751 #define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07)
752 #define MPI_EVENT_IR2_RC_DUAL_PORT_ADDED (0x08)
753 #define MPI_EVENT_IR2_RC_DUAL_PORT_REMOVED (0x09)
755 /* defines for logical disk states */
756 #define MPI_LD_STATE_OPTIMAL (0x00)
757 #define MPI_LD_STATE_DEGRADED (0x01)
758 #define MPI_LD_STATE_FAILED (0x02)
759 #define MPI_LD_STATE_MISSING (0x03)
760 #define MPI_LD_STATE_OFFLINE (0x04)
762 /* defines for physical disk states */
763 #define MPI_PD_STATE_ONLINE (0x00)
764 #define MPI_PD_STATE_MISSING (0x01)
765 #define MPI_PD_STATE_NOT_COMPATIBLE (0x02)
766 #define MPI_PD_STATE_FAILED (0x03)
767 #define MPI_PD_STATE_INITIALIZING (0x04)
768 #define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05)
769 #define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06)
770 #define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF)
772 /* MPI Link Status Change Event data */
774 typedef struct _EVENT_DATA_LINK_STATUS
777 U8 Reserved; /* 01h */
778 U16 Reserved1; /* 02h */
779 U8 Reserved2; /* 04h */
781 U16 Reserved3; /* 06h */
782 } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
783 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
785 #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
786 #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
788 /* MPI Loop State Change Event data */
790 typedef struct _EVENT_DATA_LOOP_STATE
792 U8 Character4; /* 00h */
793 U8 Character3; /* 01h */
795 U8 Reserved; /* 03h */
796 U8 Reserved1; /* 04h */
798 U16 Reserved2; /* 06h */
799 } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
800 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
802 #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
803 #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
804 #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
806 /* MPI LOGOUT Event data */
808 typedef struct _EVENT_DATA_LOGOUT
810 U32 NPortID; /* 00h */
811 U8 AliasIndex; /* 04h */
813 U16 Reserved1; /* 06h */
814 } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
815 EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
817 #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
819 /* SAS SES Event data */
821 typedef struct _EVENT_DATA_SAS_SES
825 U8 PortWidth; /* 02h */
826 U8 Reserved1; /* 04h */
827 } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
828 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
830 /* SAS Broadcast Primitive Event data */
832 typedef struct _EVENT_DATA_SAS_BROADCAST_PRIMITIVE
836 U8 PortWidth; /* 02h */
837 U8 Primitive; /* 04h */
838 } EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
839 MPI_POINTER PTR_EVENT_DATA_SAS_BROADCAST_PRIMITIVE,
840 MpiEventDataSasBroadcastPrimitive_t,
841 MPI_POINTER pMpiEventDataSasBroadcastPrimitive_t;
843 #define MPI_EVENT_PRIMITIVE_CHANGE (0x01)
844 #define MPI_EVENT_PRIMITIVE_EXPANDER (0x03)
845 #define MPI_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04)
846 #define MPI_EVENT_PRIMITIVE_RESERVED3 (0x05)
847 #define MPI_EVENT_PRIMITIVE_RESERVED4 (0x06)
848 #define MPI_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07)
849 #define MPI_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08)
851 /* SAS Phy Link Status Event data */
853 typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
856 U8 LinkRates; /* 01h */
857 U16 DevHandle; /* 02h */
858 U64 SASAddress; /* 04h */
859 } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
860 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
862 /* defines for the LinkRates field of the SAS PHY Link Status event */
863 #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
864 #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
865 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
866 #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
867 #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
868 #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
869 #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
870 #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
871 #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
872 #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
873 #define MPI_EVENT_SAS_PLS_LR_RATE_6_0 (0x0A)
875 /* SAS Discovery Event data */
877 typedef struct _EVENT_DATA_SAS_DISCOVERY
879 U32 DiscoveryStatus; /* 00h */
880 U32 Reserved1; /* 04h */
881 } EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY,
882 EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t;
884 #define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000)
885 #define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001)
886 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
887 #define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
889 /* SAS Discovery Errror Event data */
891 typedef struct _EVENT_DATA_DISCOVERY_ERROR
893 U32 DiscoveryStatus; /* 00h */
895 U8 Reserved1; /* 05h */
896 U16 Reserved2; /* 06h */
897 } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
898 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
900 #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
901 #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
902 #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
903 #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
904 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
905 #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
906 #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
907 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
908 #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
909 #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
910 #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
911 #define MPI_EVENT_DSCVRY_ERR_DS_UNSUPPORTED_DEVICE (0x00000800)
912 #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
913 #define MPI_EVENT_DSCVRY_ERR_DS_MULTI_PORT_DOMAIN (0x00002000)
914 #define MPI_EVENT_DSCVRY_ERR_DS_SATA_INIT_FAILURE (0x00004000)
916 /* SAS SMP Error Event data */
918 typedef struct _EVENT_DATA_SAS_SMP_ERROR
922 U8 SMPFunctionResult; /* 02h */
923 U8 Reserved1; /* 03h */
924 U64 SASAddress; /* 04h */
925 } EVENT_DATA_SAS_SMP_ERROR, MPI_POINTER PTR_EVENT_DATA_SAS_SMP_ERROR,
926 MpiEventDataSasSmpError_t, MPI_POINTER pMpiEventDataSasSmpError_t;
928 /* defines for the Status field of the SAS SMP Error event */
929 #define MPI_EVENT_SAS_SMP_FUNCTION_RESULT_VALID (0x00)
930 #define MPI_EVENT_SAS_SMP_CRC_ERROR (0x01)
931 #define MPI_EVENT_SAS_SMP_TIMEOUT (0x02)
932 #define MPI_EVENT_SAS_SMP_NO_DESTINATION (0x03)
933 #define MPI_EVENT_SAS_SMP_BAD_DESTINATION (0x04)
935 /* SAS Initiator Device Status Change Event data */
937 typedef struct _EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE
939 U8 ReasonCode; /* 00h */
941 U16 DevHandle; /* 02h */
942 U64 SASAddress; /* 04h */
943 } EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
944 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE,
945 MpiEventDataSasInitDevStatusChange_t,
946 MPI_POINTER pMpiEventDataSasInitDevStatusChange_t;
948 /* defines for the ReasonCode field of the SAS Initiator Device Status Change event */
949 #define MPI_EVENT_SAS_INIT_RC_ADDED (0x01)
950 #define MPI_EVENT_SAS_INIT_RC_REMOVED (0x02)
951 #define MPI_EVENT_SAS_INIT_RC_INACCESSIBLE (0x03)
953 /* SAS Initiator Device Table Overflow Event data */
955 typedef struct _EVENT_DATA_SAS_INIT_TABLE_OVERFLOW
957 U8 MaxInit; /* 00h */
958 U8 CurrentInit; /* 01h */
959 U16 Reserved1; /* 02h */
960 U64 SASAddress; /* 04h */
961 } EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
962 MPI_POINTER PTR_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW,
963 MpiEventDataSasInitTableOverflow_t,
964 MPI_POINTER pMpiEventDataSasInitTableOverflow_t;
966 /* SAS Expander Status Change Event data */
968 typedef struct _EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE
970 U8 ReasonCode; /* 00h */
971 U8 Reserved1; /* 01h */
972 U16 Reserved2; /* 02h */
973 U8 PhysicalPort; /* 04h */
974 U8 Reserved3; /* 05h */
975 U16 EnclosureHandle; /* 06h */
976 U64 SASAddress; /* 08h */
977 U32 DiscoveryStatus; /* 10h */
978 U16 DevHandle; /* 14h */
979 U16 ParentDevHandle; /* 16h */
980 U16 ExpanderChangeCount; /* 18h */
981 U16 ExpanderRouteIndexes; /* 1Ah */
982 U8 NumPhys; /* 1Ch */
983 U8 SASLevel; /* 1Dh */
985 U8 Reserved4; /* 1Fh */
986 } EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
987 MPI_POINTER PTR_EVENT_DATA_SAS_EXPANDER_STATUS_CHANGE,
988 MpiEventDataSasExpanderStatusChange_t,
989 MPI_POINTER pMpiEventDataSasExpanderStatusChange_t;
991 /* values for ReasonCode field of SAS Expander Status Change Event data */
992 #define MPI_EVENT_SAS_EXP_RC_ADDED (0x00)
993 #define MPI_EVENT_SAS_EXP_RC_NOT_RESPONDING (0x01)
995 /* values for DiscoveryStatus field of SAS Expander Status Change Event data */
996 #define MPI_EVENT_SAS_EXP_DS_LOOP_DETECTED (0x00000001)
997 #define MPI_EVENT_SAS_EXP_DS_UNADDRESSABLE_DEVICE (0x00000002)
998 #define MPI_EVENT_SAS_EXP_DS_MULTIPLE_PORTS (0x00000004)
999 #define MPI_EVENT_SAS_EXP_DS_EXPANDER_ERR (0x00000008)
1000 #define MPI_EVENT_SAS_EXP_DS_SMP_TIMEOUT (0x00000010)
1001 #define MPI_EVENT_SAS_EXP_DS_OUT_ROUTE_ENTRIES (0x00000020)
1002 #define MPI_EVENT_SAS_EXP_DS_INDEX_NOT_EXIST (0x00000040)
1003 #define MPI_EVENT_SAS_EXP_DS_SMP_FUNCTION_FAILED (0x00000080)
1004 #define MPI_EVENT_SAS_EXP_DS_SMP_CRC_ERROR (0x00000100)
1005 #define MPI_EVENT_SAS_EXP_DS_SUBTRACTIVE_LINK (0x00000200)
1006 #define MPI_EVENT_SAS_EXP_DS_TABLE_LINK (0x00000400)
1007 #define MPI_EVENT_SAS_EXP_DS_UNSUPPORTED_DEVICE (0x00000800)
1009 /* values for Flags field of SAS Expander Status Change Event data */
1010 #define MPI_EVENT_SAS_EXP_FLAGS_ROUTE_TABLE_CONFIG (0x02)
1011 #define MPI_EVENT_SAS_EXP_FLAGS_CONFIG_IN_PROGRESS (0x01)
1015 /*****************************************************************************
1017 * F i r m w a r e L o a d M e s s a g e s
1019 *****************************************************************************/
1021 /****************************************************************************/
1022 /* Firmware Download message and associated structures */
1023 /****************************************************************************/
1025 typedef struct _MSG_FW_DOWNLOAD
1027 U8 ImageType; /* 00h */
1028 U8 Reserved; /* 01h */
1029 U8 ChainOffset; /* 02h */
1030 U8 Function; /* 03h */
1031 U8 Reserved1[3]; /* 04h */
1032 U8 MsgFlags; /* 07h */
1033 U32 MsgContext; /* 08h */
1034 SGE_MPI_UNION SGL; /* 0Ch */
1035 } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
1036 FWDownload_t, MPI_POINTER pFWDownload_t;
1038 #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
1040 #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
1041 #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
1042 #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
1043 #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
1044 #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
1045 #define MPI_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06)
1046 #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07)
1047 #define MPI_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08)
1048 #define MPI_FW_DOWNLOAD_ITYPE_MEGARAID (0x09)
1049 #define MPI_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1052 typedef struct _FWDownloadTCSGE
1054 U8 Reserved; /* 00h */
1055 U8 ContextSize; /* 01h */
1056 U8 DetailsLength; /* 02h */
1058 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
1059 U32 ImageOffset; /* 08h */
1060 U32 ImageSize; /* 0Ch */
1061 } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
1062 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
1064 /* Firmware Download reply */
1065 typedef struct _MSG_FW_DOWNLOAD_REPLY
1067 U8 ImageType; /* 00h */
1068 U8 Reserved; /* 01h */
1069 U8 MsgLength; /* 02h */
1070 U8 Function; /* 03h */
1071 U8 Reserved1[3]; /* 04h */
1072 U8 MsgFlags; /* 07h */
1073 U32 MsgContext; /* 08h */
1074 U16 Reserved2; /* 0Ch */
1075 U16 IOCStatus; /* 0Eh */
1076 U32 IOCLogInfo; /* 10h */
1077 } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
1078 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
1081 /****************************************************************************/
1082 /* Firmware Upload message and associated structures */
1083 /****************************************************************************/
1085 typedef struct _MSG_FW_UPLOAD
1087 U8 ImageType; /* 00h */
1088 U8 Reserved; /* 01h */
1089 U8 ChainOffset; /* 02h */
1090 U8 Function; /* 03h */
1091 U8 Reserved1[3]; /* 04h */
1092 U8 MsgFlags; /* 07h */
1093 U32 MsgContext; /* 08h */
1094 SGE_MPI_UNION SGL; /* 0Ch */
1095 } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
1096 FWUpload_t, MPI_POINTER pFWUpload_t;
1098 #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
1099 #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
1100 #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
1101 #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
1102 #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
1103 #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
1104 #define MPI_FW_UPLOAD_ITYPE_MANUFACTURING (0x06)
1105 #define MPI_FW_UPLOAD_ITYPE_CONFIG_1 (0x07)
1106 #define MPI_FW_UPLOAD_ITYPE_CONFIG_2 (0x08)
1107 #define MPI_FW_UPLOAD_ITYPE_MEGARAID (0x09)
1108 #define MPI_FW_UPLOAD_ITYPE_COMPLETE (0x0A)
1109 #define MPI_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B)
1111 typedef struct _FWUploadTCSGE
1113 U8 Reserved; /* 00h */
1114 U8 ContextSize; /* 01h */
1115 U8 DetailsLength; /* 02h */
1117 U32 Reserved1; /* 04h */
1118 U32 ImageOffset; /* 08h */
1119 U32 ImageSize; /* 0Ch */
1120 } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
1121 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
1123 /* Firmware Upload reply */
1124 typedef struct _MSG_FW_UPLOAD_REPLY
1126 U8 ImageType; /* 00h */
1127 U8 Reserved; /* 01h */
1128 U8 MsgLength; /* 02h */
1129 U8 Function; /* 03h */
1130 U8 Reserved1[3]; /* 04h */
1131 U8 MsgFlags; /* 07h */
1132 U32 MsgContext; /* 08h */
1133 U16 Reserved2; /* 0Ch */
1134 U16 IOCStatus; /* 0Eh */
1135 U32 IOCLogInfo; /* 10h */
1136 U32 ActualImageSize; /* 14h */
1137 } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
1138 FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
1141 typedef struct _MPI_FW_HEADER
1143 U32 ArmBranchInstruction0; /* 00h */
1144 U32 Signature0; /* 04h */
1145 U32 Signature1; /* 08h */
1146 U32 Signature2; /* 0Ch */
1147 U32 ArmBranchInstruction1; /* 10h */
1148 U32 ArmBranchInstruction2; /* 14h */
1149 U32 Reserved; /* 18h */
1150 U32 Checksum; /* 1Ch */
1151 U16 VendorId; /* 20h */
1152 U16 ProductId; /* 22h */
1153 MPI_FW_VERSION FWVersion; /* 24h */
1154 U32 SeqCodeVersion; /* 28h */
1155 U32 ImageSize; /* 2Ch */
1156 U32 NextImageHeaderOffset; /* 30h */
1157 U32 LoadStartAddress; /* 34h */
1158 U32 IopResetVectorValue; /* 38h */
1159 U32 IopResetRegAddr; /* 3Ch */
1160 U32 VersionNameWhat; /* 40h */
1161 U8 VersionName[32]; /* 44h */
1162 U32 VendorNameWhat; /* 64h */
1163 U8 VendorName[32]; /* 68h */
1164 } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
1165 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
1167 #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
1169 /* defines for using the ProductId field */
1170 #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
1171 #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
1172 #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
1173 #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
1175 #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
1176 #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
1177 #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
1179 #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
1180 #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
1181 #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
1182 #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
1183 #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
1184 #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
1185 #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
1186 #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
1188 #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
1190 #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
1191 #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
1192 #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
1193 #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
1194 #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
1195 #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
1196 #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
1197 #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
1198 #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
1199 #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
1200 #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
1201 #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
1203 #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
1204 #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
1205 #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
1206 #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
1207 #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
1208 #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
1209 #define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006)
1211 #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
1212 #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
1213 #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
1214 #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
1216 typedef struct _MPI_EXT_IMAGE_HEADER
1218 U8 ImageType; /* 00h */
1219 U8 Reserved; /* 01h */
1220 U16 Reserved1; /* 02h */
1221 U32 Checksum; /* 04h */
1222 U32 ImageSize; /* 08h */
1223 U32 NextImageHeaderOffset; /* 0Ch */
1224 U32 LoadStartAddress; /* 10h */
1225 U32 Reserved2; /* 14h */
1226 } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
1227 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
1229 /* defines for the ImageType field */
1230 #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
1231 #define MPI_EXT_IMAGE_TYPE_FW (0x01)
1232 #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
1233 #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
1234 #define MPI_EXT_IMAGE_TYPE_INITIALIZATION (0x05)