2 * Generic routines for LSI '909 FC adapters.
5 * Copyright (c) 2000, 2001 by Greg Ansley
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice immediately at the beginning of the file, without modification,
12 * this list of conditions, and the following disclaimer.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
31 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
32 * Copyright (c) 2005, WHEEL Sp. z o.o.
33 * Copyright (c) 2004, 2005 Justin T. Gibbs
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 #include <sys/cdefs.h>
64 __FBSDID("$FreeBSD$");
66 #include <dev/mpt/mpt.h>
67 #include <dev/mpt/mpt_cam.h> /* XXX For static handler registration */
68 #include <dev/mpt/mpt_raid.h> /* XXX For static handler registration */
70 #include <dev/mpt/mpilib/mpi.h>
71 #include <dev/mpt/mpilib/mpi_ioc.h>
73 #include <sys/sysctl.h>
75 #define MPT_MAX_TRYS 3
76 #define MPT_MAX_WAIT 300000
78 static int maxwait_ack = 0;
79 static int maxwait_int = 0;
80 static int maxwait_state = 0;
82 TAILQ_HEAD(, mpt_softc) mpt_tailq = TAILQ_HEAD_INITIALIZER(mpt_tailq);
83 mpt_reply_handler_t *mpt_reply_handlers[MPT_NUM_REPLY_HANDLERS];
85 static mpt_reply_handler_t mpt_default_reply_handler;
86 static mpt_reply_handler_t mpt_config_reply_handler;
87 static mpt_reply_handler_t mpt_handshake_reply_handler;
88 static mpt_reply_handler_t mpt_event_reply_handler;
89 static void mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req,
90 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context);
91 static int mpt_soft_reset(struct mpt_softc *mpt);
92 static void mpt_hard_reset(struct mpt_softc *mpt);
93 static int mpt_configure_ioc(struct mpt_softc *mpt);
94 static int mpt_enable_ioc(struct mpt_softc *mpt);
96 /************************* Personality Module Support *************************/
98 * We include one extra entry that is guaranteed to be NULL
99 * to simplify our itterator.
101 static struct mpt_personality *mpt_personalities[MPT_MAX_PERSONALITIES + 1];
102 static __inline struct mpt_personality*
103 mpt_pers_find(struct mpt_softc *, u_int);
104 static __inline struct mpt_personality*
105 mpt_pers_find_reverse(struct mpt_softc *, u_int);
107 static __inline struct mpt_personality *
108 mpt_pers_find(struct mpt_softc *mpt, u_int start_at)
110 KASSERT(start_at <= MPT_MAX_PERSONALITIES,
111 ("mpt_pers_find: starting position out of range\n"));
113 while (start_at < MPT_MAX_PERSONALITIES
114 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) {
117 return (mpt_personalities[start_at]);
121 * Used infrequenstly, so no need to optimize like a forward
122 * traversal where we use the MAX+1 is guaranteed to be NULL
125 static __inline struct mpt_personality *
126 mpt_pers_find_reverse(struct mpt_softc *mpt, u_int start_at)
128 while (start_at < MPT_MAX_PERSONALITIES
129 && (mpt->mpt_pers_mask & (0x1 << start_at)) == 0) {
132 if (start_at < MPT_MAX_PERSONALITIES)
133 return (mpt_personalities[start_at]);
137 #define MPT_PERS_FOREACH(mpt, pers) \
138 for (pers = mpt_pers_find(mpt, /*start_at*/0); \
140 pers = mpt_pers_find(mpt, /*start_at*/pers->id+1))
142 #define MPT_PERS_FOREACH_REVERSE(mpt, pers) \
143 for (pers = mpt_pers_find_reverse(mpt, MPT_MAX_PERSONALITIES-1);\
145 pers = mpt_pers_find_reverse(mpt, /*start_at*/pers->id-1))
147 static mpt_load_handler_t mpt_stdload;
148 static mpt_probe_handler_t mpt_stdprobe;
149 static mpt_attach_handler_t mpt_stdattach;
150 static mpt_event_handler_t mpt_stdevent;
151 static mpt_reset_handler_t mpt_stdreset;
152 static mpt_shutdown_handler_t mpt_stdshutdown;
153 static mpt_detach_handler_t mpt_stddetach;
154 static mpt_unload_handler_t mpt_stdunload;
155 static struct mpt_personality mpt_default_personality =
158 .probe = mpt_stdprobe,
159 .attach = mpt_stdattach,
160 .event = mpt_stdevent,
161 .reset = mpt_stdreset,
162 .shutdown = mpt_stdshutdown,
163 .detach = mpt_stddetach,
164 .unload = mpt_stdunload
167 static mpt_load_handler_t mpt_core_load;
168 static mpt_attach_handler_t mpt_core_attach;
169 static mpt_reset_handler_t mpt_core_ioc_reset;
170 static mpt_event_handler_t mpt_core_event;
171 static mpt_shutdown_handler_t mpt_core_shutdown;
172 static mpt_shutdown_handler_t mpt_core_detach;
173 static mpt_unload_handler_t mpt_core_unload;
174 static struct mpt_personality mpt_core_personality =
177 .load = mpt_core_load,
178 .attach = mpt_core_attach,
179 .event = mpt_core_event,
180 .reset = mpt_core_ioc_reset,
181 .shutdown = mpt_core_shutdown,
182 .detach = mpt_core_detach,
183 .unload = mpt_core_unload,
187 * Manual declaration so that DECLARE_MPT_PERSONALITY doesn't need
188 * ordering information. We want the core to always register FIRST.
189 * other modules are set to SI_ORDER_SECOND.
191 static moduledata_t mpt_core_mod = {
192 "mpt_core", mpt_modevent, &mpt_core_personality
194 DECLARE_MODULE(mpt_core, mpt_core_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST);
195 MODULE_VERSION(mpt_core, 1);
197 #define MPT_PERS_ATACHED(pers, mpt) \
198 ((mpt)->pers_mask & (0x1 << pers->id))
202 mpt_modevent(module_t mod, int type, void *data)
204 struct mpt_personality *pers;
207 pers = (struct mpt_personality *)data;
213 mpt_load_handler_t **def_handler;
214 mpt_load_handler_t **pers_handler;
217 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) {
218 if (mpt_personalities[i] == NULL)
221 if (i >= MPT_MAX_PERSONALITIES) {
226 mpt_personalities[i] = pers;
228 /* Install standard/noop handlers for any NULL entries. */
229 def_handler = MPT_PERS_FIRST_HANDLER(&mpt_default_personality);
230 pers_handler = MPT_PERS_FIRST_HANDLER(pers);
231 while (pers_handler <= MPT_PERS_LAST_HANDLER(pers)) {
232 if (*pers_handler == NULL)
233 *pers_handler = *def_handler;
238 error = (pers->load(pers));
240 mpt_personalities[i] = NULL;
248 error = pers->unload(pers);
249 mpt_personalities[pers->id] = NULL;
259 mpt_stdload(struct mpt_personality *pers)
261 /* Load is always successfull. */
266 mpt_stdprobe(struct mpt_softc *mpt)
268 /* Probe is always successfull. */
273 mpt_stdattach(struct mpt_softc *mpt)
275 /* Attach is always successfull. */
280 mpt_stdevent(struct mpt_softc *mpt, request_t *req, MSG_EVENT_NOTIFY_REPLY *rep)
282 /* Event was not for us. */
287 mpt_stdreset(struct mpt_softc *mpt, int type)
292 mpt_stdshutdown(struct mpt_softc *mpt)
297 mpt_stddetach(struct mpt_softc *mpt)
302 mpt_stdunload(struct mpt_personality *pers)
304 /* Unload is always successfull. */
308 /******************************* Bus DMA Support ******************************/
310 mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
312 struct mpt_map_info *map_info;
314 map_info = (struct mpt_map_info *)arg;
315 map_info->error = error;
316 map_info->phys = segs->ds_addr;
319 /**************************** Reply/Event Handling ****************************/
321 mpt_register_handler(struct mpt_softc *mpt, mpt_handler_type type,
322 mpt_handler_t handler, uint32_t *phandler_id)
326 case MPT_HANDLER_REPLY:
331 if (phandler_id == NULL)
334 free_cbi = MPT_HANDLER_ID_NONE;
335 for (cbi = 0; cbi < MPT_NUM_REPLY_HANDLERS; cbi++) {
337 * If the same handler is registered multiple
338 * times, don't error out. Just return the
339 * index of the original registration.
341 if (mpt_reply_handlers[cbi] == handler.reply_handler) {
342 *phandler_id = MPT_CBI_TO_HID(cbi);
347 * Fill from the front in the hope that
348 * all registered handlers consume only a
351 * We don't break on the first empty slot so
352 * that the full table is checked to see if
353 * this handler was previously registered.
355 if (free_cbi == MPT_HANDLER_ID_NONE
356 && (mpt_reply_handlers[cbi]
357 == mpt_default_reply_handler))
360 if (free_cbi == MPT_HANDLER_ID_NONE)
362 mpt_reply_handlers[free_cbi] = handler.reply_handler;
363 *phandler_id = MPT_CBI_TO_HID(free_cbi);
367 mpt_prt(mpt, "mpt_register_handler unknown type %d\n", type);
374 mpt_deregister_handler(struct mpt_softc *mpt, mpt_handler_type type,
375 mpt_handler_t handler, uint32_t handler_id)
379 case MPT_HANDLER_REPLY:
383 cbi = MPT_CBI(handler_id);
384 if (cbi >= MPT_NUM_REPLY_HANDLERS
385 || mpt_reply_handlers[cbi] != handler.reply_handler)
387 mpt_reply_handlers[cbi] = mpt_default_reply_handler;
391 mpt_prt(mpt, "mpt_deregister_handler unknown type %d\n", type);
398 mpt_default_reply_handler(struct mpt_softc *mpt, request_t *req,
399 MSG_DEFAULT_REPLY *reply_frame)
401 mpt_prt(mpt, "XXXX Default Handler Called. Req %p, Frame %p\n",
404 if (reply_frame != NULL)
405 mpt_dump_reply_frame(mpt, reply_frame);
407 mpt_prt(mpt, "XXXX Reply Frame Ignored\n");
409 return (/*free_reply*/TRUE);
413 mpt_config_reply_handler(struct mpt_softc *mpt, request_t *req,
414 MSG_DEFAULT_REPLY *reply_frame)
418 if (reply_frame != NULL) {
420 MSG_CONFIG_REPLY *reply;
422 cfgp = (MSG_CONFIG *)req->req_vbuf;
423 reply = (MSG_CONFIG_REPLY *)reply_frame;
424 req->IOCStatus = le16toh(reply_frame->IOCStatus);
425 bcopy(&reply->Header, &cfgp->Header,
426 sizeof(cfgp->Header));
428 req->state &= ~REQ_STATE_QUEUED;
429 req->state |= REQ_STATE_DONE;
430 TAILQ_REMOVE(&mpt->request_pending_list, req, links);
432 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0)
436 return (/*free_reply*/TRUE);
440 mpt_handshake_reply_handler(struct mpt_softc *mpt, request_t *req,
441 MSG_DEFAULT_REPLY *reply_frame)
443 /* Nothing to be done. */
444 return (/*free_reply*/TRUE);
448 mpt_event_reply_handler(struct mpt_softc *mpt, request_t *req,
449 MSG_DEFAULT_REPLY *reply_frame)
453 if (reply_frame == NULL) {
454 mpt_prt(mpt, "Event Handler: req %p - Unexpected NULL reply\n");
455 return (/*free_reply*/TRUE);
459 switch (reply_frame->Function) {
460 case MPI_FUNCTION_EVENT_NOTIFICATION:
462 MSG_EVENT_NOTIFY_REPLY *msg;
463 struct mpt_personality *pers;
467 msg = (MSG_EVENT_NOTIFY_REPLY *)reply_frame;
468 MPT_PERS_FOREACH(mpt, pers)
469 handled += pers->event(mpt, req, msg);
473 "Unhandled Event Notify Frame. Event %#x.\n",
476 if (msg->AckRequired) {
480 context = htole32(req->index|MPT_REPLY_HANDLER_EVENTS);
481 ack_req = mpt_get_request(mpt, /*sleep_ok*/FALSE);
482 if (ack_req == NULL) {
483 struct mpt_evtf_record *evtf;
485 evtf = (struct mpt_evtf_record *)reply_frame;
486 evtf->context = context;
487 LIST_INSERT_HEAD(&mpt->ack_frames, evtf, links);
491 mpt_send_event_ack(mpt, ack_req, msg, context);
495 case MPI_FUNCTION_PORT_ENABLE:
496 mpt_lprt(mpt, MPT_PRT_DEBUG, "enable port reply\n");
498 case MPI_FUNCTION_EVENT_ACK:
501 mpt_prt(mpt, "Unknown Event Function: %x\n",
502 reply_frame->Function);
507 && (reply_frame->MsgFlags & MPI_MSGFLAGS_CONTINUATION_REPLY) == 0) {
509 req->state &= ~REQ_STATE_QUEUED;
510 req->state |= REQ_STATE_DONE;
511 TAILQ_REMOVE(&mpt->request_pending_list, req, links);
513 if ((req->state & REQ_STATE_NEED_WAKEUP) != 0)
516 mpt_free_request(mpt, req);
522 * Process an asynchronous event from the IOC.
525 mpt_core_event(struct mpt_softc *mpt, request_t *req,
526 MSG_EVENT_NOTIFY_REPLY *msg)
528 switch(msg->Event & 0xFF) {
531 case MPI_EVENT_LOG_DATA:
535 /* Some error occured that LSI wants logged */
536 mpt_prt(mpt, "EvtLogData: IOCLogInfo: 0x%08x\n",
538 mpt_prt(mpt, "\tEvtLogData: Event Data:");
539 for (i = 0; i < msg->EventDataLength; i++)
540 mpt_prtc(mpt, " %08x", msg->Data[i]);
544 case MPI_EVENT_EVENT_CHANGE:
546 * This is just an acknowledgement
547 * of our mpt_send_event_request.
551 return (/*handled*/0);
554 return (/*handled*/1);
558 mpt_send_event_ack(struct mpt_softc *mpt, request_t *ack_req,
559 MSG_EVENT_NOTIFY_REPLY *msg, uint32_t context)
563 ackp = (MSG_EVENT_ACK *)ack_req->req_vbuf;
564 bzero(ackp, sizeof *ackp);
565 ackp->Function = MPI_FUNCTION_EVENT_ACK;
566 ackp->Event = msg->Event;
567 ackp->EventContext = msg->EventContext;
568 ackp->MsgContext = context;
569 mpt_check_doorbell(mpt);
570 mpt_send_cmd(mpt, ack_req);
573 /***************************** Interrupt Handling *****************************/
577 struct mpt_softc *mpt;
580 mpt = (struct mpt_softc *)arg;
581 while ((reply_desc = mpt_pop_reply_queue(mpt)) != MPT_REPLY_EMPTY) {
583 MSG_DEFAULT_REPLY *reply_frame;
584 uint32_t reply_baddr;
592 if ((reply_desc & MPI_ADDRESS_REPLY_A_BIT) != 0) {
596 * Insure that the reply frame is coherent.
598 reply_baddr = (reply_desc << 1);
599 offset = reply_baddr - (mpt->reply_phys & 0xFFFFFFFF);
600 bus_dmamap_sync_range(mpt->reply_dmat, mpt->reply_dmap,
601 offset, MPT_REPLY_SIZE,
602 BUS_DMASYNC_POSTREAD);
603 reply_frame = MPT_REPLY_OTOV(mpt, offset);
604 reply_desc = le32toh(reply_frame->MsgContext);
606 cb_index = MPT_CONTEXT_TO_CBI(reply_desc);
607 req_index = MPT_CONTEXT_TO_REQI(reply_desc);
608 if (req_index < MPT_MAX_REQUESTS(mpt))
609 req = &mpt->request_pool[req_index];
611 free_rf = mpt_reply_handlers[cb_index](mpt, req, reply_frame);
613 if (reply_frame != NULL && free_rf)
614 mpt_free_reply(mpt, reply_baddr);
618 /******************************* Error Recovery *******************************/
620 mpt_complete_request_chain(struct mpt_softc *mpt, struct req_queue *chain,
623 MSG_DEFAULT_REPLY ioc_status_frame;
626 bzero(&ioc_status_frame, sizeof(ioc_status_frame));
627 ioc_status_frame.MsgLength = roundup2(sizeof(ioc_status_frame), 4);
628 ioc_status_frame.IOCStatus = iocstatus;
629 while((req = TAILQ_FIRST(chain)) != NULL) {
630 MSG_REQUEST_HEADER *msg_hdr;
633 msg_hdr = (MSG_REQUEST_HEADER *)req->req_vbuf;
634 ioc_status_frame.Function = msg_hdr->Function;
635 ioc_status_frame.MsgContext = msg_hdr->MsgContext;
636 cb_index = MPT_CONTEXT_TO_CBI(le32toh(msg_hdr->MsgContext));
637 mpt_reply_handlers[cb_index](mpt, req, &ioc_status_frame);
641 /********************************* Diagnostics ********************************/
643 * Perform a diagnostic dump of a reply frame.
646 mpt_dump_reply_frame(struct mpt_softc *mpt, MSG_DEFAULT_REPLY *reply_frame)
649 mpt_prt(mpt, "Address Reply:\n");
650 mpt_print_reply(reply_frame);
653 /******************************* Doorbell Access ******************************/
654 static __inline uint32_t mpt_rd_db(struct mpt_softc *mpt);
655 static __inline uint32_t mpt_rd_intr(struct mpt_softc *mpt);
657 static __inline uint32_t
658 mpt_rd_db(struct mpt_softc *mpt)
660 return mpt_read(mpt, MPT_OFFSET_DOORBELL);
663 static __inline uint32_t
664 mpt_rd_intr(struct mpt_softc *mpt)
666 return mpt_read(mpt, MPT_OFFSET_INTR_STATUS);
669 /* Busy wait for a door bell to be read by IOC */
671 mpt_wait_db_ack(struct mpt_softc *mpt)
674 for (i=0; i < MPT_MAX_WAIT; i++) {
675 if (!MPT_DB_IS_BUSY(mpt_rd_intr(mpt))) {
676 maxwait_ack = i > maxwait_ack ? i : maxwait_ack;
685 /* Busy wait for a door bell interrupt */
687 mpt_wait_db_int(struct mpt_softc *mpt)
690 for (i=0; i < MPT_MAX_WAIT; i++) {
691 if (MPT_DB_INTR(mpt_rd_intr(mpt))) {
692 maxwait_int = i > maxwait_int ? i : maxwait_int;
700 /* Wait for IOC to transition to a give state */
702 mpt_check_doorbell(struct mpt_softc *mpt)
704 uint32_t db = mpt_rd_db(mpt);
705 if (MPT_STATE(db) != MPT_DB_STATE_RUNNING) {
706 mpt_prt(mpt, "Device not running\n");
711 /* Wait for IOC to transition to a give state */
713 mpt_wait_state(struct mpt_softc *mpt, enum DB_STATE_BITS state)
717 for (i = 0; i < MPT_MAX_WAIT; i++) {
718 uint32_t db = mpt_rd_db(mpt);
719 if (MPT_STATE(db) == state) {
720 maxwait_state = i > maxwait_state ? i : maxwait_state;
729 /************************* Intialization/Configuration ************************/
730 static int mpt_download_fw(struct mpt_softc *mpt);
732 /* Issue the reset COMMAND to the IOC */
734 mpt_soft_reset(struct mpt_softc *mpt)
736 mpt_lprt(mpt, MPT_PRT_DEBUG, "soft reset\n");
738 /* Have to use hard reset if we are not in Running state */
739 if (MPT_STATE(mpt_rd_db(mpt)) != MPT_DB_STATE_RUNNING) {
740 mpt_prt(mpt, "soft reset failed: device not running\n");
744 /* If door bell is in use we don't have a chance of getting
745 * a word in since the IOC probably crashed in message
746 * processing. So don't waste our time.
748 if (MPT_DB_IS_IN_USE(mpt_rd_db(mpt))) {
749 mpt_prt(mpt, "soft reset failed: doorbell wedged\n");
753 /* Send the reset request to the IOC */
754 mpt_write(mpt, MPT_OFFSET_DOORBELL,
755 MPI_FUNCTION_IOC_MESSAGE_UNIT_RESET << MPI_DOORBELL_FUNCTION_SHIFT);
756 if (mpt_wait_db_ack(mpt) != MPT_OK) {
757 mpt_prt(mpt, "soft reset failed: ack timeout\n");
761 /* Wait for the IOC to reload and come out of reset state */
762 if (mpt_wait_state(mpt, MPT_DB_STATE_READY) != MPT_OK) {
763 mpt_prt(mpt, "soft reset failed: device did not restart\n");
771 mpt_enable_diag_mode(struct mpt_softc *mpt)
778 if ((mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC) & MPI_DIAG_DRWE) != 0)
781 /* Enable diagnostic registers */
782 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFF);
783 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_1ST_KEY_VALUE);
784 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_2ND_KEY_VALUE);
785 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_3RD_KEY_VALUE);
786 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_4TH_KEY_VALUE);
787 mpt_write(mpt, MPT_OFFSET_SEQUENCE, MPI_WRSEQ_5TH_KEY_VALUE);
797 mpt_disable_diag_mode(struct mpt_softc *mpt)
799 mpt_write(mpt, MPT_OFFSET_SEQUENCE, 0xFFFFFFFF);
802 /* This is a magic diagnostic reset that resets all the ARM
803 * processors in the chip.
806 mpt_hard_reset(struct mpt_softc *mpt)
812 mpt_lprt(mpt, MPT_PRT_DEBUG, "hard reset\n");
814 error = mpt_enable_diag_mode(mpt);
816 mpt_prt(mpt, "WARNING - Could not enter diagnostic mode !\n");
817 mpt_prt(mpt, "Trying to reset anyway.\n");
820 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC);
823 * This appears to be a workaround required for some
824 * firmware or hardware revs.
826 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_DISABLE_ARM);
829 /* Diag. port is now active so we can now hit the reset bit */
830 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, diagreg | MPI_DIAG_RESET_ADAPTER);
833 * Ensure that the reset has finished. We delay 1ms
834 * prior to reading the register to make sure the chip
835 * has sufficiently completed its reset to handle register
841 diagreg = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC);
842 } while (--wait && (diagreg & MPI_DIAG_RESET_ADAPTER) == 0);
845 mpt_prt(mpt, "WARNING - Failed hard reset! "
846 "Trying to initialize anyway.\n");
850 * If we have firmware to download, it must be loaded before
851 * the controller will become operational. Do so now.
853 if (mpt->fw_image != NULL) {
855 error = mpt_download_fw(mpt);
858 mpt_prt(mpt, "WARNING - Firmware Download Failed!\n");
859 mpt_prt(mpt, "Trying to initialize anyway.\n");
864 * Reseting the controller should have disabled write
865 * access to the diagnostic registers, but disable
866 * manually to be sure.
868 mpt_disable_diag_mode(mpt);
872 mpt_core_ioc_reset(struct mpt_softc *mpt, int type)
875 * Complete all pending requests with a status
876 * appropriate for an IOC reset.
878 mpt_complete_request_chain(mpt, &mpt->request_pending_list,
879 MPI_IOCSTATUS_INVALID_STATE);
884 * Reset the IOC when needed. Try software command first then if needed
885 * poke at the magic diagnostic reset. Note that a hard reset resets
886 * *both* IOCs on dual function chips (FC929 && LSI1030) as well as
887 * fouls up the PCI configuration registers.
890 mpt_reset(struct mpt_softc *mpt, int reinit)
892 struct mpt_personality *pers;
895 /* Try a soft reset */
896 if ((ret = mpt_soft_reset(mpt)) != MPT_OK) {
897 /* Failed; do a hard reset */
900 /* Wait for the IOC to reload and come out of reset state */
901 ret = mpt_wait_state(mpt, MPT_DB_STATE_READY);
903 mpt_prt(mpt, "failed to reset device\n");
907 * Invoke reset handlers. We bump the reset count so
908 * that mpt_wait_req() understands that regardless of
909 * the specified wait condition, it should stop its wait.
912 MPT_PERS_FOREACH(mpt, pers)
913 pers->reset(mpt, ret);
921 /* Return a command buffer to the free queue */
923 mpt_free_request(struct mpt_softc *mpt, request_t *req)
925 struct mpt_evtf_record *record;
926 uint32_t reply_baddr;
928 if (req == NULL || req != &mpt->request_pool[req->index]) {
929 panic("mpt_free_request bad req ptr\n");
933 req->state = REQ_STATE_FREE;
934 if (LIST_EMPTY(&mpt->ack_frames)) {
935 TAILQ_INSERT_HEAD(&mpt->request_free_list, req, links);
936 if (mpt->getreqwaiter != 0) {
937 mpt->getreqwaiter = 0;
938 wakeup(&mpt->request_free_list);
944 * Process an ack frame deferred due to resource shortage.
946 record = LIST_FIRST(&mpt->ack_frames);
947 LIST_REMOVE(record, links);
948 mpt_send_event_ack(mpt, req, &record->reply, record->context);
949 reply_baddr = (uint32_t)((uint8_t *)record - mpt->reply)
950 + (mpt->reply_phys & 0xFFFFFFFF);
951 mpt_free_reply(mpt, reply_baddr);
954 /* Get a command buffer from the free queue */
956 mpt_get_request(struct mpt_softc *mpt, int sleep_ok)
961 req = TAILQ_FIRST(&mpt->request_free_list);
963 KASSERT(req == &mpt->request_pool[req->index],
964 ("mpt_get_request: corrupted request free list\n"));
965 TAILQ_REMOVE(&mpt->request_free_list, req, links);
966 req->state = REQ_STATE_ALLOCATED;
967 } else if (sleep_ok != 0) {
968 mpt->getreqwaiter = 1;
969 mpt_sleep(mpt, &mpt->request_free_list, PUSER, "mptgreq", 0);
975 /* Pass the command to the IOC */
977 mpt_send_cmd(struct mpt_softc *mpt, request_t *req)
981 pReq = req->req_vbuf;
982 mpt_lprt(mpt, MPT_PRT_TRACE, "Send Request %d (0x%x):\n",
983 req->index, req->req_pbuf);
984 mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n",
985 pReq[0], pReq[1], pReq[2], pReq[3]);
986 mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n",
987 pReq[4], pReq[5], pReq[6], pReq[7]);
988 mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n",
989 pReq[8], pReq[9], pReq[10], pReq[11]);
990 mpt_lprt(mpt, MPT_PRT_TRACE, "%08x %08x %08x %08x\n",
991 pReq[12], pReq[13], pReq[14], pReq[15]);
993 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap,
994 BUS_DMASYNC_PREWRITE);
995 req->state |= REQ_STATE_QUEUED;
996 TAILQ_INSERT_HEAD(&mpt->request_pending_list, req, links);
997 mpt_write(mpt, MPT_OFFSET_REQUEST_Q, (uint32_t) req->req_pbuf);
1001 * Wait for a request to complete.
1004 * mpt softc of controller executing request
1005 * req request to wait for
1006 * sleep_ok nonzero implies may sleep in this context
1007 * time_ms timeout in ms. 0 implies no timeout.
1010 * 0 Request completed
1011 * non-0 Timeout fired before request completion.
1014 mpt_wait_req(struct mpt_softc *mpt, request_t *req,
1015 mpt_req_state_t state, mpt_req_state_t mask,
1016 int sleep_ok, int time_ms)
1023 * timeout is in ms. 0 indicates infinite wait.
1024 * Convert to ticks or 500us units depending on
1028 timeout = (time_ms * hz) / 1000;
1030 timeout = time_ms * 2;
1031 saved_cnt = mpt->reset_cnt;
1032 req->state |= REQ_STATE_NEED_WAKEUP;
1033 mask &= ~REQ_STATE_NEED_WAKEUP;
1034 while ((req->state & mask) != state
1035 && mpt->reset_cnt == saved_cnt) {
1037 if (sleep_ok != 0) {
1038 error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout);
1039 if (error == EWOULDBLOCK) {
1044 if (time_ms != 0 && --timeout == 0) {
1045 mpt_prt(mpt, "mpt_wait_req timed out\n");
1052 req->state &= ~REQ_STATE_NEED_WAKEUP;
1053 if (mpt->reset_cnt != saved_cnt)
1055 if (time_ms && timeout == 0)
1061 * Send a command to the IOC via the handshake register.
1063 * Only done at initialization time and for certain unusual
1064 * commands such as device/bus reset as specified by LSI.
1067 mpt_send_handshake_cmd(struct mpt_softc *mpt, size_t len, void *cmd)
1070 uint32_t data, *data32;
1072 /* Check condition of the IOC */
1073 data = mpt_rd_db(mpt);
1074 if ((MPT_STATE(data) != MPT_DB_STATE_READY
1075 && MPT_STATE(data) != MPT_DB_STATE_RUNNING
1076 && MPT_STATE(data) != MPT_DB_STATE_FAULT)
1077 || MPT_DB_IS_IN_USE(data)) {
1078 mpt_prt(mpt, "handshake aborted - invalid doorbell state\n");
1083 /* We move things in 32 bit chunks */
1084 len = (len + 3) >> 2;
1087 /* Clear any left over pending doorbell interupts */
1088 if (MPT_DB_INTR(mpt_rd_intr(mpt)))
1089 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1092 * Tell the handshake reg. we are going to send a command
1093 * and how long it is going to be.
1095 data = (MPI_FUNCTION_HANDSHAKE << MPI_DOORBELL_FUNCTION_SHIFT) |
1096 (len << MPI_DOORBELL_ADD_DWORDS_SHIFT);
1097 mpt_write(mpt, MPT_OFFSET_DOORBELL, data);
1099 /* Wait for the chip to notice */
1100 if (mpt_wait_db_int(mpt) != MPT_OK) {
1101 mpt_prt(mpt, "mpt_send_handshake_cmd timeout1\n");
1105 /* Clear the interrupt */
1106 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1108 if (mpt_wait_db_ack(mpt) != MPT_OK) {
1109 mpt_prt(mpt, "mpt_send_handshake_cmd timeout2\n");
1113 /* Send the command */
1114 for (i = 0; i < len; i++) {
1115 mpt_write(mpt, MPT_OFFSET_DOORBELL, *data32++);
1116 if (mpt_wait_db_ack(mpt) != MPT_OK) {
1118 "mpt_send_handshake_cmd timeout! index = %d\n",
1126 /* Get the response from the handshake register */
1128 mpt_recv_handshake_reply(struct mpt_softc *mpt, size_t reply_len, void *reply)
1130 int left, reply_left;
1132 MSG_DEFAULT_REPLY *hdr;
1134 /* We move things out in 16 bit chunks */
1136 data16 = (u_int16_t *)reply;
1138 hdr = (MSG_DEFAULT_REPLY *)reply;
1140 /* Get first word */
1141 if (mpt_wait_db_int(mpt) != MPT_OK) {
1142 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout1\n");
1145 *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK;
1146 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1148 /* Get Second Word */
1149 if (mpt_wait_db_int(mpt) != MPT_OK) {
1150 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout2\n");
1153 *data16++ = mpt_read(mpt, MPT_OFFSET_DOORBELL) & MPT_DB_DATA_MASK;
1154 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1156 /* With the second word, we can now look at the length */
1157 if (((reply_len >> 1) != hdr->MsgLength)) {
1158 mpt_prt(mpt, "reply length does not match message length: "
1159 "got 0x%02x, expected 0x%02x\n",
1160 hdr->MsgLength << 2, reply_len << 1);
1163 /* Get rest of the reply; but don't overflow the provided buffer */
1164 left = (hdr->MsgLength << 1) - 2;
1165 reply_left = reply_len - 2;
1169 if (mpt_wait_db_int(mpt) != MPT_OK) {
1170 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout3\n");
1173 datum = mpt_read(mpt, MPT_OFFSET_DOORBELL);
1175 if (reply_left-- > 0)
1176 *data16++ = datum & MPT_DB_DATA_MASK;
1178 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1181 /* One more wait & clear at the end */
1182 if (mpt_wait_db_int(mpt) != MPT_OK) {
1183 mpt_prt(mpt, "mpt_recv_handshake_cmd timeout4\n");
1186 mpt_write(mpt, MPT_OFFSET_INTR_STATUS, 0);
1188 if ((hdr->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1189 if (mpt->verbose >= MPT_PRT_TRACE)
1190 mpt_print_reply(hdr);
1191 return (MPT_FAIL | hdr->IOCStatus);
1198 mpt_get_iocfacts(struct mpt_softc *mpt, MSG_IOC_FACTS_REPLY *freplp)
1200 MSG_IOC_FACTS f_req;
1203 bzero(&f_req, sizeof f_req);
1204 f_req.Function = MPI_FUNCTION_IOC_FACTS;
1205 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
1206 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req);
1209 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp);
1214 mpt_get_portfacts(struct mpt_softc *mpt, MSG_PORT_FACTS_REPLY *freplp)
1216 MSG_PORT_FACTS f_req;
1219 /* XXX: Only getting PORT FACTS for Port 0 */
1220 memset(&f_req, 0, sizeof f_req);
1221 f_req.Function = MPI_FUNCTION_PORT_FACTS;
1222 f_req.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
1223 error = mpt_send_handshake_cmd(mpt, sizeof f_req, &f_req);
1226 error = mpt_recv_handshake_reply(mpt, sizeof (*freplp), freplp);
1231 * Send the initialization request. This is where we specify how many
1232 * SCSI busses and how many devices per bus we wish to emulate.
1233 * This is also the command that specifies the max size of the reply
1234 * frames from the IOC that we will be allocating.
1237 mpt_send_ioc_init(struct mpt_softc *mpt, uint32_t who)
1241 MSG_IOC_INIT_REPLY reply;
1243 bzero(&init, sizeof init);
1245 init.Function = MPI_FUNCTION_IOC_INIT;
1247 init.MaxDevices = 255;
1249 init.MaxDevices = 16;
1252 init.ReplyFrameSize = MPT_REPLY_SIZE;
1253 init.MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
1255 if ((error = mpt_send_handshake_cmd(mpt, sizeof init, &init)) != 0) {
1259 error = mpt_recv_handshake_reply(mpt, sizeof reply, &reply);
1265 * Utiltity routine to read configuration headers and pages
1268 mpt_issue_cfg_req(struct mpt_softc *mpt, request_t *req, u_int Action,
1269 u_int PageVersion, u_int PageLength, u_int PageNumber,
1270 u_int PageType, uint32_t PageAddress, bus_addr_t addr,
1271 bus_size_t len, int sleep_ok, int timeout_ms)
1276 cfgp = req->req_vbuf;
1277 memset(cfgp, 0, sizeof *cfgp);
1278 cfgp->Action = Action;
1279 cfgp->Function = MPI_FUNCTION_CONFIG;
1280 cfgp->Header.PageVersion = PageVersion;
1281 cfgp->Header.PageLength = PageLength;
1282 cfgp->Header.PageNumber = PageNumber;
1283 cfgp->Header.PageType = PageType;
1284 cfgp->PageAddress = PageAddress;
1285 se = (SGE_SIMPLE32 *)&cfgp->PageBufferSGE;
1287 MPI_pSGE_SET_LENGTH(se, len);
1288 MPI_pSGE_SET_FLAGS(se, (MPI_SGE_FLAGS_SIMPLE_ELEMENT |
1289 MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER |
1290 MPI_SGE_FLAGS_END_OF_LIST |
1291 ((Action == MPI_CONFIG_ACTION_PAGE_WRITE_CURRENT
1292 || Action == MPI_CONFIG_ACTION_PAGE_WRITE_NVRAM)
1293 ? MPI_SGE_FLAGS_HOST_TO_IOC : MPI_SGE_FLAGS_IOC_TO_HOST)));
1294 cfgp->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG);
1296 mpt_check_doorbell(mpt);
1297 mpt_send_cmd(mpt, req);
1298 return (mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE,
1299 sleep_ok, timeout_ms));
1304 mpt_read_cfg_header(struct mpt_softc *mpt, int PageType, int PageNumber,
1305 uint32_t PageAddress, CONFIG_PAGE_HEADER *rslt,
1306 int sleep_ok, int timeout_ms)
1311 req = mpt_get_request(mpt, sleep_ok);
1313 mpt_prt(mpt, "mpt_read_cfg_header: Get request failed!\n");
1317 error = mpt_issue_cfg_req(mpt, req, MPI_CONFIG_ACTION_PAGE_HEADER,
1318 /*PageVersion*/0, /*PageLength*/0, PageNumber,
1319 PageType, PageAddress, /*addr*/0, /*len*/0,
1320 sleep_ok, timeout_ms);
1322 mpt_prt(mpt, "read_cfg_header timed out\n");
1326 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1327 mpt_prt(mpt, "mpt_read_cfg_header: Config Info Status %x\n",
1333 cfgp = req->req_vbuf;
1334 bcopy(&cfgp->Header, rslt, sizeof(*rslt));
1337 mpt_free_request(mpt, req);
1341 #define CFG_DATA_OFF 128
1344 mpt_read_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress,
1345 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok,
1351 req = mpt_get_request(mpt, sleep_ok);
1353 mpt_prt(mpt, "mpt_read_cfg_page: Get request failed!\n");
1357 error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion,
1358 hdr->PageLength, hdr->PageNumber,
1359 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK,
1360 PageAddress, req->req_pbuf + CFG_DATA_OFF,
1361 len, sleep_ok, timeout_ms);
1363 mpt_prt(mpt, "read_cfg_page(%d) timed out\n", Action);
1367 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1368 mpt_prt(mpt, "mpt_read_cfg_page: Config Info Status %x\n",
1370 mpt_free_request(mpt, req);
1373 bus_dmamap_sync(mpt->request_dmat, mpt->request_dmap,
1374 BUS_DMASYNC_POSTREAD);
1375 memcpy(hdr, ((uint8_t *)req->req_vbuf)+CFG_DATA_OFF, len);
1376 mpt_free_request(mpt, req);
1381 mpt_write_cfg_page(struct mpt_softc *mpt, int Action, uint32_t PageAddress,
1382 CONFIG_PAGE_HEADER *hdr, size_t len, int sleep_ok,
1389 hdr_attr = hdr->PageType & MPI_CONFIG_PAGEATTR_MASK;
1390 if (hdr_attr != MPI_CONFIG_PAGEATTR_CHANGEABLE &&
1391 hdr_attr != MPI_CONFIG_PAGEATTR_PERSISTENT) {
1392 mpt_prt(mpt, "page type 0x%x not changeable\n",
1393 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK);
1396 hdr->PageType &= MPI_CONFIG_PAGETYPE_MASK,
1398 req = mpt_get_request(mpt, sleep_ok);
1402 memcpy(((caddr_t)req->req_vbuf)+CFG_DATA_OFF, hdr, len);
1403 /* Restore stripped out attributes */
1404 hdr->PageType |= hdr_attr;
1406 error = mpt_issue_cfg_req(mpt, req, Action, hdr->PageVersion,
1407 hdr->PageLength, hdr->PageNumber,
1408 hdr->PageType & MPI_CONFIG_PAGETYPE_MASK,
1409 PageAddress, req->req_pbuf + CFG_DATA_OFF,
1410 len, sleep_ok, timeout_ms);
1412 mpt_prt(mpt, "mpt_write_cfg_page timed out\n");
1416 if ((req->IOCStatus & MPI_IOCSTATUS_MASK) != MPI_IOCSTATUS_SUCCESS) {
1417 mpt_prt(mpt, "mpt_write_cfg_page: Config Info Status %x\n",
1419 mpt_free_request(mpt, req);
1422 mpt_free_request(mpt, req);
1427 * Read IOC configuration information
1430 mpt_read_config_info_ioc(struct mpt_softc *mpt)
1432 CONFIG_PAGE_HEADER hdr;
1433 struct mpt_raid_volume *mpt_raid;
1438 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC,
1439 /*PageNumber*/2, /*PageAddress*/0, &hdr,
1440 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1444 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 2 Header: ver %x, len %x, "
1445 "num %x, type %x\n", hdr.PageVersion,
1446 hdr.PageLength * sizeof(uint32_t),
1447 hdr.PageNumber, hdr.PageType);
1449 len = hdr.PageLength * sizeof(uint32_t);
1450 mpt->ioc_page2 = malloc(len, M_DEVBUF, M_NOWAIT);
1451 if (mpt->ioc_page2 == NULL)
1453 memset(mpt->ioc_page2, 0, sizeof(*mpt->ioc_page2));
1454 memcpy(&mpt->ioc_page2->Header, &hdr, sizeof(hdr));
1455 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0,
1456 &mpt->ioc_page2->Header, len,
1457 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1459 mpt_prt(mpt, "failed to read IOC Page 2\n");
1460 } else if (mpt->ioc_page2->CapabilitiesFlags != 0) {
1463 mpt_prt(mpt, "Capabilities: (");
1464 for (mask = 1; mask != 0; mask <<= 1) {
1465 if ((mpt->ioc_page2->CapabilitiesFlags & mask) == 0)
1469 case MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT:
1470 mpt_prtc(mpt, " RAID-0");
1472 case MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT:
1473 mpt_prtc(mpt, " RAID-1E");
1475 case MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT:
1476 mpt_prtc(mpt, " RAID-1");
1478 case MPI_IOCPAGE2_CAP_FLAGS_SES_SUPPORT:
1479 mpt_prtc(mpt, " SES");
1481 case MPI_IOCPAGE2_CAP_FLAGS_SAFTE_SUPPORT:
1482 mpt_prtc(mpt, " SAFTE");
1484 case MPI_IOCPAGE2_CAP_FLAGS_CROSS_CHANNEL_SUPPORT:
1485 mpt_prtc(mpt, " Multi-Channel-Arrays");
1490 mpt_prtc(mpt, " )\n");
1491 if ((mpt->ioc_page2->CapabilitiesFlags
1492 & (MPI_IOCPAGE2_CAP_FLAGS_IS_SUPPORT
1493 | MPI_IOCPAGE2_CAP_FLAGS_IME_SUPPORT
1494 | MPI_IOCPAGE2_CAP_FLAGS_IM_SUPPORT)) != 0) {
1495 mpt_prt(mpt, "%d Active Volume%s(%d Max)\n",
1496 mpt->ioc_page2->NumActiveVolumes,
1497 mpt->ioc_page2->NumActiveVolumes != 1
1499 mpt->ioc_page2->MaxVolumes);
1500 mpt_prt(mpt, "%d Hidden Drive Member%s(%d Max)\n",
1501 mpt->ioc_page2->NumActivePhysDisks,
1502 mpt->ioc_page2->NumActivePhysDisks != 1
1504 mpt->ioc_page2->MaxPhysDisks);
1508 len = mpt->ioc_page2->MaxVolumes * sizeof(struct mpt_raid_volume);
1509 mpt->raid_volumes = malloc(len, M_DEVBUF, M_NOWAIT);
1510 if (mpt->raid_volumes == NULL) {
1511 mpt_prt(mpt, "Could not allocate RAID volume data\n");
1513 memset(mpt->raid_volumes, 0, len);
1517 * Copy critical data out of ioc_page2 so that we can
1518 * safely refresh the page without windows of unreliable
1521 mpt->raid_max_volumes = mpt->ioc_page2->MaxVolumes;
1523 len = sizeof(*mpt->raid_volumes->config_page)
1524 + (sizeof(RAID_VOL0_PHYS_DISK)*(mpt->ioc_page2->MaxPhysDisks - 1));
1525 for (i = 0; i < mpt->ioc_page2->MaxVolumes; i++) {
1526 mpt_raid = &mpt->raid_volumes[i];
1527 mpt_raid->config_page = malloc(len, M_DEVBUF, M_NOWAIT);
1528 if (mpt_raid->config_page == NULL) {
1529 mpt_prt(mpt, "Could not allocate RAID page data\n");
1532 memset(mpt_raid->config_page, 0, len);
1534 mpt->raid_page0_len = len;
1536 len = mpt->ioc_page2->MaxPhysDisks * sizeof(struct mpt_raid_disk);
1537 mpt->raid_disks = malloc(len, M_DEVBUF, M_NOWAIT);
1538 if (mpt->raid_disks == NULL) {
1539 mpt_prt(mpt, "Could not allocate RAID disk data\n");
1541 memset(mpt->raid_disks, 0, len);
1544 mpt->raid_max_disks = mpt->ioc_page2->MaxPhysDisks;
1546 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_IOC,
1547 /*PageNumber*/3, /*PageAddress*/0, &hdr,
1548 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1552 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC Page 3 Header: %x %x %x %x\n",
1553 hdr.PageVersion, hdr.PageLength, hdr.PageNumber, hdr.PageType);
1555 if (mpt->ioc_page3 != NULL)
1556 free(mpt->ioc_page3, M_DEVBUF);
1557 len = hdr.PageLength * sizeof(uint32_t);
1558 mpt->ioc_page3 = malloc(len, M_DEVBUF, M_NOWAIT);
1559 if (mpt->ioc_page3 == NULL)
1561 memset(mpt->ioc_page3, 0, sizeof(*mpt->ioc_page3));
1562 memcpy(&mpt->ioc_page3->Header, &hdr, sizeof(hdr));
1563 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0,
1564 &mpt->ioc_page3->Header, len,
1565 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1567 mpt_prt(mpt, "failed to read IOC Page 3\n");
1570 mpt_raid_wakeup(mpt);
1576 * Read SCSI configuration information
1579 mpt_read_config_info_spi(struct mpt_softc *mpt)
1583 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 0,
1584 0, &mpt->mpt_port_page0.Header,
1585 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1588 mpt_lprt(mpt, MPT_PRT_DEBUG,
1589 "SPI Port Page 0 Header: %x %x %x %x\n",
1590 mpt->mpt_port_page0.Header.PageVersion,
1591 mpt->mpt_port_page0.Header.PageLength,
1592 mpt->mpt_port_page0.Header.PageNumber,
1593 mpt->mpt_port_page0.Header.PageType);
1595 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 1,
1596 0, &mpt->mpt_port_page1.Header,
1597 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1601 mpt_lprt(mpt, MPT_PRT_DEBUG, "SPI Port Page 1 Header: %x %x %x %x\n",
1602 mpt->mpt_port_page1.Header.PageVersion,
1603 mpt->mpt_port_page1.Header.PageLength,
1604 mpt->mpt_port_page1.Header.PageNumber,
1605 mpt->mpt_port_page1.Header.PageType);
1607 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_PORT, 2,
1608 /*PageAddress*/0, &mpt->mpt_port_page2.Header,
1609 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1613 mpt_lprt(mpt, MPT_PRT_DEBUG,
1614 "SPI Port Page 2 Header: %x %x %x %x\n",
1615 mpt->mpt_port_page1.Header.PageVersion,
1616 mpt->mpt_port_page1.Header.PageLength,
1617 mpt->mpt_port_page1.Header.PageNumber,
1618 mpt->mpt_port_page1.Header.PageType);
1620 for (i = 0; i < 16; i++) {
1621 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE,
1622 0, i, &mpt->mpt_dev_page0[i].Header,
1623 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1627 mpt_lprt(mpt, MPT_PRT_DEBUG,
1628 "SPI Target %d Device Page 0 Header: %x %x %x %x\n",
1629 i, mpt->mpt_dev_page0[i].Header.PageVersion,
1630 mpt->mpt_dev_page0[i].Header.PageLength,
1631 mpt->mpt_dev_page0[i].Header.PageNumber,
1632 mpt->mpt_dev_page0[i].Header.PageType);
1634 rv = mpt_read_cfg_header(mpt, MPI_CONFIG_PAGETYPE_SCSI_DEVICE,
1635 1, i, &mpt->mpt_dev_page1[i].Header,
1636 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1640 mpt_lprt(mpt, MPT_PRT_DEBUG,
1641 "SPI Target %d Device Page 1 Header: %x %x %x %x\n",
1642 i, mpt->mpt_dev_page1[i].Header.PageVersion,
1643 mpt->mpt_dev_page1[i].Header.PageLength,
1644 mpt->mpt_dev_page1[i].Header.PageNumber,
1645 mpt->mpt_dev_page1[i].Header.PageType);
1649 * At this point, we don't *have* to fail. As long as we have
1650 * valid config header information, we can (barely) lurch
1654 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0,
1655 &mpt->mpt_port_page0.Header,
1656 sizeof(mpt->mpt_port_page0),
1657 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1659 mpt_prt(mpt, "failed to read SPI Port Page 0\n");
1661 mpt_lprt(mpt, MPT_PRT_DEBUG,
1662 "SPI Port Page 0: Capabilities %x PhysicalInterface %x\n",
1663 mpt->mpt_port_page0.Capabilities,
1664 mpt->mpt_port_page0.PhysicalInterface);
1667 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0,
1668 &mpt->mpt_port_page1.Header,
1669 sizeof(mpt->mpt_port_page1),
1670 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1672 mpt_prt(mpt, "failed to read SPI Port Page 1\n");
1674 mpt_lprt(mpt, MPT_PRT_DEBUG,
1675 "SPI Port Page 1: Configuration %x OnBusTimerValue %x\n",
1676 mpt->mpt_port_page1.Configuration,
1677 mpt->mpt_port_page1.OnBusTimerValue);
1680 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0,
1681 &mpt->mpt_port_page2.Header,
1682 sizeof(mpt->mpt_port_page2),
1683 /*sleep_ok*/FALSE, /*timeout_ms*/5000);
1685 mpt_prt(mpt, "failed to read SPI Port Page 2\n");
1687 mpt_lprt(mpt, MPT_PRT_DEBUG,
1688 "SPI Port Page 2: Flags %x Settings %x\n",
1689 mpt->mpt_port_page2.PortFlags,
1690 mpt->mpt_port_page2.PortSettings);
1691 for (i = 0; i < 16; i++) {
1692 mpt_lprt(mpt, MPT_PRT_DEBUG,
1693 "SPI Port Page 2 Tgt %d: timo %x SF %x Flags %x\n",
1694 i, mpt->mpt_port_page2.DeviceSettings[i].Timeout,
1695 mpt->mpt_port_page2.DeviceSettings[i].SyncFactor,
1696 mpt->mpt_port_page2.DeviceSettings[i].DeviceFlags);
1700 for (i = 0; i < 16; i++) {
1701 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i,
1702 &mpt->mpt_dev_page0[i].Header,
1703 sizeof(*mpt->mpt_dev_page0),
1705 /*timeout_ms*/5000);
1708 "cannot read SPI Tgt %d Device Page 0\n", i);
1711 mpt_lprt(mpt, MPT_PRT_DEBUG,
1712 "SPI Tgt %d Page 0: NParms %x Information %x",
1713 i, mpt->mpt_dev_page0[i].NegotiatedParameters,
1714 mpt->mpt_dev_page0[i].Information);
1716 rv = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i,
1717 &mpt->mpt_dev_page1[i].Header,
1718 sizeof(*mpt->mpt_dev_page1),
1720 /*timeout_ms*/5000);
1723 "cannot read SPI Tgt %d Device Page 1\n", i);
1726 mpt_lprt(mpt, MPT_PRT_DEBUG,
1727 "SPI Tgt %d Page 1: RParms %x Configuration %x\n",
1728 i, mpt->mpt_dev_page1[i].RequestedParameters,
1729 mpt->mpt_dev_page1[i].Configuration);
1735 * Validate SPI configuration information.
1737 * In particular, validate SPI Port Page 1.
1740 mpt_set_initial_config_spi(struct mpt_softc *mpt)
1742 int i, pp1val = ((1 << mpt->mpt_ini_id) << 16) | mpt->mpt_ini_id;
1745 mpt->mpt_disc_enable = 0xff;
1746 mpt->mpt_tag_enable = 0;
1748 if (mpt->mpt_port_page1.Configuration != pp1val) {
1749 CONFIG_PAGE_SCSI_PORT_1 tmp;
1752 "SPI Port Page 1 Config value bad (%x)- should be %x\n",
1753 mpt->mpt_port_page1.Configuration, pp1val);
1754 tmp = mpt->mpt_port_page1;
1755 tmp.Configuration = pp1val;
1756 error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/0,
1757 &tmp.Header, sizeof(tmp),
1759 /*timeout_ms*/5000);
1762 error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/0,
1763 &tmp.Header, sizeof(tmp),
1765 /*timeout_ms*/5000);
1768 if (tmp.Configuration != pp1val) {
1770 "failed to reset SPI Port Page 1 Config value\n");
1773 mpt->mpt_port_page1 = tmp;
1776 for (i = 0; i < 16; i++) {
1777 CONFIG_PAGE_SCSI_DEVICE_1 tmp;
1778 tmp = mpt->mpt_dev_page1[i];
1779 tmp.RequestedParameters = 0;
1780 tmp.Configuration = 0;
1781 mpt_lprt(mpt, MPT_PRT_DEBUG,
1782 "Set Tgt %d SPI DevicePage 1 values to %x 0 %x\n",
1783 i, tmp.RequestedParameters, tmp.Configuration);
1784 error = mpt_write_cur_cfg_page(mpt, /*PageAddress*/i,
1785 &tmp.Header, sizeof(tmp),
1787 /*timeout_ms*/5000);
1790 error = mpt_read_cur_cfg_page(mpt, /*PageAddress*/i,
1791 &tmp.Header, sizeof(tmp),
1793 /*timeout_ms*/5000);
1796 mpt->mpt_dev_page1[i] = tmp;
1797 mpt_lprt(mpt, MPT_PRT_DEBUG,
1798 "SPI Tgt %d Page 1: RParm %x Configuration %x\n", i,
1799 mpt->mpt_dev_page1[i].RequestedParameters,
1800 mpt->mpt_dev_page1[i].Configuration);
1809 mpt_send_port_enable(struct mpt_softc *mpt, int port)
1812 MSG_PORT_ENABLE *enable_req;
1815 req = mpt_get_request(mpt, /*sleep_ok*/FALSE);
1819 enable_req = req->req_vbuf;
1820 bzero(enable_req, sizeof *enable_req);
1822 enable_req->Function = MPI_FUNCTION_PORT_ENABLE;
1823 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_CONFIG);
1824 enable_req->PortNumber = port;
1826 mpt_check_doorbell(mpt);
1827 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling port %d\n", port);
1829 mpt_send_cmd(mpt, req);
1830 error = mpt_wait_req(mpt, req, REQ_STATE_DONE, REQ_STATE_DONE,
1831 /*sleep_ok*/FALSE, /*time_ms*/500);
1833 mpt_prt(mpt, "port enable timed out");
1836 mpt_free_request(mpt, req);
1841 * Enable/Disable asynchronous event reporting.
1843 * NB: this is the first command we send via shared memory
1844 * instead of the handshake register.
1847 mpt_send_event_request(struct mpt_softc *mpt, int onoff)
1850 MSG_EVENT_NOTIFY *enable_req;
1852 req = mpt_get_request(mpt, /*sleep_ok*/FALSE);
1854 enable_req = req->req_vbuf;
1855 bzero(enable_req, sizeof *enable_req);
1857 enable_req->Function = MPI_FUNCTION_EVENT_NOTIFICATION;
1858 enable_req->MsgContext = htole32(req->index | MPT_REPLY_HANDLER_EVENTS);
1859 enable_req->Switch = onoff;
1861 mpt_check_doorbell(mpt);
1862 mpt_lprt(mpt, MPT_PRT_DEBUG,
1863 "%sabling async events\n", onoff ? "en" : "dis");
1864 mpt_send_cmd(mpt, req);
1870 * Un-mask the interupts on the chip.
1873 mpt_enable_ints(struct mpt_softc *mpt)
1875 /* Unmask every thing except door bell int */
1876 mpt_write(mpt, MPT_OFFSET_INTR_MASK, MPT_INTR_DB_MASK);
1880 * Mask the interupts on the chip.
1883 mpt_disable_ints(struct mpt_softc *mpt)
1885 /* Mask all interrupts */
1886 mpt_write(mpt, MPT_OFFSET_INTR_MASK,
1887 MPT_INTR_REPLY_MASK | MPT_INTR_DB_MASK);
1891 mpt_sysctl_attach(struct mpt_softc *mpt)
1893 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(mpt->dev);
1894 struct sysctl_oid *tree = device_get_sysctl_tree(mpt->dev);
1896 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1897 "debug", CTLFLAG_RW, &mpt->verbose, 0,
1898 "Debugging/Verbose level");
1902 mpt_attach(struct mpt_softc *mpt)
1906 for (i = 0; i < MPT_MAX_PERSONALITIES; i++) {
1907 struct mpt_personality *pers;
1910 pers = mpt_personalities[i];
1914 if (pers->probe(mpt) == 0) {
1915 error = pers->attach(mpt);
1920 mpt->mpt_pers_mask |= (0x1 << pers->id);
1928 mpt_shutdown(struct mpt_softc *mpt)
1930 struct mpt_personality *pers;
1932 MPT_PERS_FOREACH_REVERSE(mpt, pers)
1933 pers->shutdown(mpt);
1935 mpt_reset(mpt, /*reinit*/FALSE);
1940 mpt_detach(struct mpt_softc *mpt)
1942 struct mpt_personality *pers;
1944 MPT_PERS_FOREACH_REVERSE(mpt, pers) {
1946 mpt->mpt_pers_mask &= ~(0x1 << pers->id);
1954 mpt_core_load(struct mpt_personality *pers)
1959 * Setup core handlers and insert the default handler
1960 * into all "empty slots".
1962 for (i = 0; i < MPT_NUM_REPLY_HANDLERS; i++)
1963 mpt_reply_handlers[i] = mpt_default_reply_handler;
1965 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_EVENTS)] =
1966 mpt_event_reply_handler;
1967 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_CONFIG)] =
1968 mpt_config_reply_handler;
1969 mpt_reply_handlers[MPT_CBI(MPT_REPLY_HANDLER_HANDSHAKE)] =
1970 mpt_handshake_reply_handler;
1976 * Initialize per-instance driver data and perform
1977 * initial controller configuration.
1980 mpt_core_attach(struct mpt_softc *mpt)
1985 LIST_INIT(&mpt->ack_frames);
1987 /* Put all request buffers on the free list */
1988 TAILQ_INIT(&mpt->request_pending_list);
1989 TAILQ_INIT(&mpt->request_free_list);
1990 for (val = 0; val < MPT_MAX_REQUESTS(mpt); val++)
1991 mpt_free_request(mpt, &mpt->request_pool[val]);
1993 mpt_sysctl_attach(mpt);
1995 mpt_lprt(mpt, MPT_PRT_DEBUG, "doorbell req = %s\n",
1996 mpt_ioc_diag(mpt_read(mpt, MPT_OFFSET_DOORBELL)));
1998 error = mpt_configure_ioc(mpt);
2004 mpt_core_shutdown(struct mpt_softc *mpt)
2009 mpt_core_detach(struct mpt_softc *mpt)
2014 mpt_core_unload(struct mpt_personality *pers)
2016 /* Unload is always successfull. */
2020 #define FW_UPLOAD_REQ_SIZE \
2021 (sizeof(MSG_FW_UPLOAD) - sizeof(SGE_MPI_UNION) \
2022 + sizeof(FW_UPLOAD_TCSGE) + sizeof(SGE_SIMPLE32))
2025 mpt_upload_fw(struct mpt_softc *mpt)
2027 uint8_t fw_req_buf[FW_UPLOAD_REQ_SIZE];
2028 MSG_FW_UPLOAD_REPLY fw_reply;
2029 MSG_FW_UPLOAD *fw_req;
2030 FW_UPLOAD_TCSGE *tsge;
2035 memset(&fw_req_buf, 0, sizeof(fw_req_buf));
2036 fw_req = (MSG_FW_UPLOAD *)fw_req_buf;
2037 fw_req->ImageType = MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM;
2038 fw_req->Function = MPI_FUNCTION_FW_UPLOAD;
2039 fw_req->MsgContext = htole32(MPT_REPLY_HANDLER_HANDSHAKE);
2040 tsge = (FW_UPLOAD_TCSGE *)&fw_req->SGL;
2041 tsge->DetailsLength = 12;
2042 tsge->Flags = MPI_SGE_FLAGS_TRANSACTION_ELEMENT;
2043 tsge->ImageSize = htole32(mpt->fw_image_size);
2044 sge = (SGE_SIMPLE32 *)(tsge + 1);
2045 flags = (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER
2046 | MPI_SGE_FLAGS_END_OF_LIST | MPI_SGE_FLAGS_SIMPLE_ELEMENT
2047 | MPI_SGE_FLAGS_32_BIT_ADDRESSING | MPI_SGE_FLAGS_IOC_TO_HOST);
2048 flags <<= MPI_SGE_FLAGS_SHIFT;
2049 sge->FlagsLength = htole32(flags | mpt->fw_image_size);
2050 sge->Address = htole32(mpt->fw_phys);
2051 error = mpt_send_handshake_cmd(mpt, sizeof(fw_req_buf), &fw_req_buf);
2054 error = mpt_recv_handshake_reply(mpt, sizeof(fw_reply), &fw_reply);
2059 mpt_diag_outsl(struct mpt_softc *mpt, uint32_t addr,
2060 uint32_t *data, bus_size_t len)
2064 data_end = data + (roundup2(len, sizeof(uint32_t)) / 4);
2065 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, addr);
2066 while (data != data_end) {
2067 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, *data);
2073 mpt_download_fw(struct mpt_softc *mpt)
2075 MpiFwHeader_t *fw_hdr;
2077 uint32_t ext_offset;
2080 mpt_prt(mpt, "Downloading Firmware - Image Size %d\n",
2081 mpt->fw_image_size);
2083 error = mpt_enable_diag_mode(mpt);
2085 mpt_prt(mpt, "Could not enter diagnostic mode!\n");
2089 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC,
2090 MPI_DIAG_RW_ENABLE|MPI_DIAG_DISABLE_ARM);
2092 fw_hdr = (MpiFwHeader_t *)mpt->fw_image;
2093 mpt_diag_outsl(mpt, fw_hdr->LoadStartAddress, (uint32_t*)fw_hdr,
2096 ext_offset = fw_hdr->NextImageHeaderOffset;
2097 while (ext_offset != 0) {
2098 MpiExtImageHeader_t *ext;
2100 ext = (MpiExtImageHeader_t *)((uintptr_t)fw_hdr + ext_offset);
2101 ext_offset = ext->NextImageHeaderOffset;
2103 mpt_diag_outsl(mpt, ext->LoadStartAddress, (uint32_t*)ext,
2107 /* Setup the address to jump to on reset. */
2108 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, fw_hdr->IopResetRegAddr);
2109 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, fw_hdr->IopResetVectorValue);
2112 * The controller sets the "flash bad" status after attempting
2113 * to auto-boot from flash. Clear the status so that the controller
2114 * will continue the boot process with our newly installed firmware.
2116 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE);
2117 data = mpt_pio_read(mpt, MPT_OFFSET_DIAG_DATA) | MPT_DIAG_MEM_CFG_BADFL;
2118 mpt_pio_write(mpt, MPT_OFFSET_DIAG_ADDR, MPT_DIAG_MEM_CFG_BASE);
2119 mpt_pio_write(mpt, MPT_OFFSET_DIAG_DATA, data);
2122 * Re-enable the processor and clear the boot halt flag.
2124 data = mpt_read(mpt, MPT_OFFSET_DIAGNOSTIC);
2125 data &= ~(MPI_DIAG_PREVENT_IOC_BOOT|MPI_DIAG_DISABLE_ARM);
2126 mpt_write(mpt, MPT_OFFSET_DIAGNOSTIC, data);
2128 mpt_disable_diag_mode(mpt);
2133 * Allocate/Initialize data structures for the controller. Called
2134 * once at instance startup.
2137 mpt_configure_ioc(struct mpt_softc *mpt)
2139 MSG_PORT_FACTS_REPLY pfp;
2140 MSG_IOC_FACTS_REPLY facts;
2145 for (try = 0; try < MPT_MAX_TRYS; try++) {
2148 * No need to reset if the IOC is already in the READY state.
2150 * Force reset if initialization failed previously.
2151 * Note that a hard_reset of the second channel of a '929
2152 * will stop operation of the first channel. Hopefully, if the
2153 * first channel is ok, the second will not require a hard
2156 if (needreset || (mpt_rd_db(mpt) & MPT_DB_STATE_MASK) !=
2157 MPT_DB_STATE_READY) {
2158 if (mpt_reset(mpt, /*reinit*/FALSE) != MPT_OK)
2163 if (mpt_get_iocfacts(mpt, &facts) != MPT_OK) {
2164 mpt_prt(mpt, "mpt_get_iocfacts failed\n");
2169 mpt->mpt_global_credits = le16toh(facts.GlobalCredits);
2170 mpt->request_frame_size = le16toh(facts.RequestFrameSize);
2171 mpt_prt(mpt, "MPI Version=%d.%d.%d.%d\n",
2172 le16toh(facts.MsgVersion) >> 8,
2173 le16toh(facts.MsgVersion) & 0xFF,
2174 le16toh(facts.HeaderVersion) >> 8,
2175 le16toh(facts.HeaderVersion) & 0xFF);
2176 mpt_lprt(mpt, MPT_PRT_DEBUG,
2177 "MsgLength=%u IOCNumber = %d\n",
2178 facts.MsgLength, facts.IOCNumber);
2179 mpt_lprt(mpt, MPT_PRT_DEBUG,
2180 "IOCFACTS: GlobalCredits=%d BlockSize=%u "
2181 "Request Frame Size %u\n", mpt->mpt_global_credits,
2182 facts.BlockSize * 8, mpt->request_frame_size * 8);
2183 mpt_lprt(mpt, MPT_PRT_DEBUG,
2184 "IOCFACTS: Num Ports %d, FWImageSize %d, "
2185 "Flags=%#x\n", facts.NumberOfPorts,
2186 le32toh(facts.FWImageSize), facts.Flags);
2188 if ((facts.Flags & MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT) != 0) {
2189 struct mpt_map_info mi;
2193 * In some configurations, the IOC's firmware is
2194 * stored in a shared piece of system NVRAM that
2195 * is only accessable via the BIOS. In this
2196 * case, the firmware keeps a copy of firmware in
2197 * RAM until the OS driver retrieves it. Once
2198 * retrieved, we are responsible for re-downloading
2199 * the firmware after any hard-reset.
2201 mpt->fw_image_size = le32toh(facts.FWImageSize);
2202 error = mpt_dma_tag_create(mpt, mpt->parent_dmat,
2203 /*alignment*/1, /*boundary*/0,
2204 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
2205 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL,
2206 /*filterarg*/NULL, mpt->fw_image_size,
2207 /*nsegments*/1, /*maxsegsz*/mpt->fw_image_size,
2208 /*flags*/0, &mpt->fw_dmat);
2210 mpt_prt(mpt, "cannot create fw dma tag\n");
2213 error = bus_dmamem_alloc(mpt->fw_dmat,
2214 (void **)&mpt->fw_image, BUS_DMA_NOWAIT,
2217 mpt_prt(mpt, "cannot allocate fw mem.\n");
2218 bus_dma_tag_destroy(mpt->fw_dmat);
2223 bus_dmamap_load(mpt->fw_dmat, mpt->fw_dmap,
2224 mpt->fw_image, mpt->fw_image_size, mpt_map_rquest,
2226 mpt->fw_phys = mi.phys;
2228 error = mpt_upload_fw(mpt);
2230 mpt_prt(mpt, "fw upload failed.\n");
2231 bus_dmamap_unload(mpt->fw_dmat, mpt->fw_dmap);
2232 bus_dmamem_free(mpt->fw_dmat, mpt->fw_image,
2234 bus_dma_tag_destroy(mpt->fw_dmat);
2235 mpt->fw_image = NULL;
2240 if (mpt_get_portfacts(mpt, &pfp) != MPT_OK) {
2241 mpt_prt(mpt, "mpt_get_portfacts failed\n");
2246 mpt_lprt(mpt, MPT_PRT_DEBUG,
2247 "PORTFACTS: Type %x PFlags %x IID %d MaxDev %d\n",
2248 pfp.PortType, pfp.ProtocolFlags, pfp.PortSCSIID,
2251 mpt->mpt_port_type = pfp.PortType;
2252 mpt->mpt_proto_flags = pfp.ProtocolFlags;
2253 if (pfp.PortType != MPI_PORTFACTS_PORTTYPE_SCSI &&
2254 pfp.PortType != MPI_PORTFACTS_PORTTYPE_FC) {
2255 mpt_prt(mpt, "Unsupported Port Type (%x)\n",
2259 if (!(pfp.ProtocolFlags & MPI_PORTFACTS_PROTOCOL_INITIATOR)) {
2260 mpt_prt(mpt, "initiator role unsupported\n");
2263 if (pfp.PortType == MPI_PORTFACTS_PORTTYPE_FC) {
2268 mpt->mpt_ini_id = pfp.PortSCSIID;
2270 if (mpt_enable_ioc(mpt) != 0) {
2271 mpt_prt(mpt, "Unable to initialize IOC\n");
2276 * Read and set up initial configuration information
2277 * (IOC and SPI only for now)
2279 * XXX Should figure out what "personalities" are
2280 * available and defer all initialization junk to
2283 mpt_read_config_info_ioc(mpt);
2285 if (mpt->is_fc == 0) {
2286 if (mpt_read_config_info_spi(mpt)) {
2289 if (mpt_set_initial_config_spi(mpt)) {
2294 /* Everything worked */
2298 if (try >= MPT_MAX_TRYS) {
2299 mpt_prt(mpt, "failed to initialize IOC");
2303 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabling interrupts\n");
2305 mpt_enable_ints(mpt);
2310 mpt_enable_ioc(struct mpt_softc *mpt)
2315 if (mpt_send_ioc_init(mpt, MPT_DB_INIT_HOST) != MPT_OK) {
2316 mpt_prt(mpt, "mpt_send_ioc_init failed\n");
2320 mpt_lprt(mpt, MPT_PRT_DEBUG, "mpt_send_ioc_init ok\n");
2322 if (mpt_wait_state(mpt, MPT_DB_STATE_RUNNING) != MPT_OK) {
2323 mpt_prt(mpt, "IOC failed to go to run state\n");
2326 mpt_lprt(mpt, MPT_PRT_DEBUG, "IOC now at RUNSTATE");
2329 * Give it reply buffers
2331 * Do *not* exceed global credits.
2333 for (val = 0, pptr = mpt->reply_phys;
2334 (pptr + MPT_REPLY_SIZE) < (mpt->reply_phys + PAGE_SIZE);
2335 pptr += MPT_REPLY_SIZE) {
2336 mpt_free_reply(mpt, pptr);
2337 if (++val == mpt->mpt_global_credits - 1)
2342 * Enable asynchronous event reporting
2344 mpt_send_event_request(mpt, 1);
2347 * Now enable the port
2349 if (mpt_send_port_enable(mpt, 0) != MPT_OK) {
2350 mpt_prt(mpt, "failed to enable port 0\n");
2354 mpt_lprt(mpt, MPT_PRT_DEBUG, "enabled port 0\n");