3 * FreeBSD/CAM specific routines for LSI '909 FC adapters.
6 * Copyright (c) 2000, 2001 by Greg Ansley
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice immediately at the beginning of the file, without modification,
13 * this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
33 #include <dev/mpt/mpt_freebsd.h>
35 static void mpt_poll(struct cam_sim *);
36 static timeout_t mpttimeout;
37 static timeout_t mpttimeout2;
38 static void mpt_action(struct cam_sim *, union ccb *);
39 static int mpt_setwidth(mpt_softc_t *, int, int);
40 static int mpt_setsync(mpt_softc_t *, int, int, int);
43 mpt_cam_attach(mpt_softc_t *mpt)
45 struct cam_devq *devq;
50 maxq = (mpt->mpt_global_credits < MPT_MAX_REQUESTS(mpt))?
51 mpt->mpt_global_credits : MPT_MAX_REQUESTS(mpt);
55 * Create the device queue for our SIM(s).
58 devq = cam_simq_alloc(maxq);
64 * Construct our SIM entry.
66 sim = cam_sim_alloc(mpt_action, mpt_poll, "mpt", mpt,
67 mpt->unit, 1, maxq, devq);
74 * Register exactly the bus.
77 if (xpt_bus_register(sim, 0) != CAM_SUCCESS) {
78 cam_sim_free(sim, TRUE);
82 if (xpt_create_path(&mpt->path, NULL, cam_sim_path(sim),
83 CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
84 xpt_bus_deregister(cam_sim_path(sim));
85 cam_sim_free(sim, TRUE);
92 mpt_cam_detach(mpt_softc_t *mpt)
94 if (mpt->sim != NULL) {
95 xpt_free_path(mpt->path);
96 xpt_bus_deregister(cam_sim_path(mpt->sim));
97 cam_sim_free(mpt->sim, TRUE);
102 /* This routine is used after a system crash to dump core onto the
106 mpt_poll(struct cam_sim *sim)
108 mpt_softc_t *mpt = (mpt_softc_t *) cam_sim_softc(sim);
115 * This routine is called if the 9x9 does not return completion status
116 * for a command after a CAM specified time.
119 mpttimeout(void *arg)
122 union ccb *ccb = arg;
126 mpt = ccb->ccb_h.ccb_mpt_ptr;
128 req = ccb->ccb_h.ccb_req_ptr;
129 oseq = req->sequence;
132 if (req->sequence != oseq) {
133 mpt_prt(mpt, "bullet missed in timeout");
137 mpt_prt(mpt, "bullet U-turned in timeout: got us");
140 "time out on request index = 0x%02x sequence = 0x%08x",
141 req->index, req->sequence);
142 mpt_check_doorbell(mpt);
143 mpt_prt(mpt, "Status %08x; Mask %08x; Doorbell %08x",
144 mpt_read(mpt, MPT_OFFSET_INTR_STATUS),
145 mpt_read(mpt, MPT_OFFSET_INTR_MASK),
146 mpt_read(mpt, MPT_OFFSET_DOORBELL) );
147 printf("request state %s\n", mpt_req_state(req->debug));
148 if (ccb != req->ccb) {
149 printf("time out: ccb %p != req->ccb %p\n",
152 mpt_print_scsi_io_request((MSG_SCSI_IO_REQUEST *)req->req_vbuf);
153 req->debug = REQ_TIMEOUT;
155 req->link.sle_next = (void *) mpt;
156 (void) timeout(mpttimeout2, (caddr_t)req, hz / 10);
157 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
158 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
160 MPTLOCK_2_CAMLOCK(mpt);
162 CAMLOCK_2_MPTLOCK(mpt);
167 mpttimeout2(void *arg)
169 request_t *req = arg;
170 if (req->debug == REQ_TIMEOUT) {
171 mpt_softc_t *mpt = (mpt_softc_t *) req->link.sle_next;
173 mpt_free_request(mpt, req);
179 * Callback routine from "bus_dmamap_load" or in simple case called directly.
181 * Takes a list of physical segments and builds the SGL for SCSI IO command
182 * and forwards the commard to the IOC after one last check that CAM has not
183 * aborted the transaction.
186 mpt_execute_req(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
191 MSG_SCSI_IO_REQUEST *mpt_req;
194 req = (request_t *)arg;
197 mpt = ccb->ccb_h.ccb_mpt_ptr;
198 req = ccb->ccb_h.ccb_req_ptr;
199 mpt_req = req->req_vbuf;
201 if (error == 0 && nseg > MPT_SGL_MAX) {
207 mpt_prt(mpt, "bus_dmamap_load returned %d", error);
208 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
209 xpt_freeze_devq(ccb->ccb_h.path, 1);
210 ccb->ccb_h.status = CAM_DEV_QFRZN;
212 ccb->ccb_h.status |= CAM_REQ_TOO_BIG;
214 ccb->ccb_h.status |= CAM_REQ_CMP_ERR;
216 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
218 CAMLOCK_2_MPTLOCK(mpt);
219 mpt_free_request(mpt, req);
220 MPTLOCK_2_CAMLOCK(mpt);
224 if (nseg > MPT_NSGL_FIRST(mpt)) {
230 mpt_req->DataLength = ccb->csio.dxfer_len;
231 flags = MPI_SGE_FLAGS_SIMPLE_ELEMENT;
232 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
233 flags |= MPI_SGE_FLAGS_HOST_TO_IOC;
235 se = (SGE_SIMPLE32 *) &mpt_req->SGL;
236 for (i = 0; i < MPT_NSGL_FIRST(mpt) - 1; i++, se++, dm_segs++) {
239 bzero(se, sizeof (*se));
240 se->Address = dm_segs->ds_addr;
241 MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
243 if (i == MPT_NSGL_FIRST(mpt) - 2) {
244 tf |= MPI_SGE_FLAGS_LAST_ELEMENT;
246 MPI_pSGE_SET_FLAGS(se, tf);
251 * Tell the IOC where to find the first chain element
253 mpt_req->ChainOffset = ((char *)se - (char *)mpt_req) >> 2;
256 * Until we're finished with all segments...
261 * Construct the chain element that point to the
264 ce = (SGE_CHAIN32 *) se++;
265 if (nleft > MPT_NSGL(mpt)) {
266 ntodo = MPT_NSGL(mpt) - 1;
267 ce->NextChainOffset = (MPT_RQSL(mpt) -
268 sizeof (SGE_SIMPLE32)) >> 2;
271 ce->NextChainOffset = 0;
273 ce->Length = ntodo * sizeof (SGE_SIMPLE32);
274 ce->Address = req->req_pbuf +
275 ((char *)se - (char *)mpt_req);
276 ce->Flags = MPI_SGE_FLAGS_CHAIN_ELEMENT;
277 for (i = 0; i < ntodo; i++, se++, dm_segs++) {
280 bzero(se, sizeof (*se));
281 se->Address = dm_segs->ds_addr;
282 MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
284 if (i == ntodo - 1) {
285 tf |= MPI_SGE_FLAGS_LAST_ELEMENT;
286 if (ce->NextChainOffset == 0) {
288 MPI_SGE_FLAGS_END_OF_LIST |
289 MPI_SGE_FLAGS_END_OF_BUFFER;
292 MPI_pSGE_SET_FLAGS(se, tf);
298 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
299 op = BUS_DMASYNC_PREREAD;
301 op = BUS_DMASYNC_PREWRITE;
302 if (!(ccb->ccb_h.flags & (CAM_SG_LIST_PHYS|CAM_DATA_PHYS))) {
303 bus_dmamap_sync(mpt->buffer_dmat, req->dmap, op);
305 } else if (nseg > 0) {
310 mpt_req->DataLength = ccb->csio.dxfer_len;
311 flags = MPI_SGE_FLAGS_SIMPLE_ELEMENT;
312 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
313 flags |= MPI_SGE_FLAGS_HOST_TO_IOC;
315 /* Copy the segments into our SG list */
316 se = (SGE_SIMPLE32 *) &mpt_req->SGL;
317 for (i = 0; i < nseg; i++, se++, dm_segs++) {
320 bzero(se, sizeof (*se));
321 se->Address = dm_segs->ds_addr;
322 MPI_pSGE_SET_LENGTH(se, dm_segs->ds_len);
326 MPI_SGE_FLAGS_LAST_ELEMENT |
327 MPI_SGE_FLAGS_END_OF_BUFFER |
328 MPI_SGE_FLAGS_END_OF_LIST;
330 MPI_pSGE_SET_FLAGS(se, tf);
333 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
334 op = BUS_DMASYNC_PREREAD;
336 op = BUS_DMASYNC_PREWRITE;
337 if (!(ccb->ccb_h.flags & (CAM_SG_LIST_PHYS|CAM_DATA_PHYS))) {
338 bus_dmamap_sync(mpt->buffer_dmat, req->dmap, op);
341 se = (SGE_SIMPLE32 *) &mpt_req->SGL;
343 * No data to transfer so we just make a single simple SGL
346 MPI_pSGE_SET_FLAGS(se,
347 (MPI_SGE_FLAGS_LAST_ELEMENT | MPI_SGE_FLAGS_END_OF_BUFFER |
348 MPI_SGE_FLAGS_SIMPLE_ELEMENT | MPI_SGE_FLAGS_END_OF_LIST));
352 * Last time we need to check if this CCB needs to be aborted.
354 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
355 if (nseg && (ccb->ccb_h.flags & CAM_SG_LIST_PHYS) == 0)
356 bus_dmamap_unload(mpt->buffer_dmat, req->dmap);
357 CAMLOCK_2_MPTLOCK(mpt);
358 mpt_free_request(mpt, req);
359 MPTLOCK_2_CAMLOCK(mpt);
364 ccb->ccb_h.status |= CAM_SIM_QUEUED;
365 MPTLOCK_2_CAMLOCK(mpt);
366 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
367 ccb->ccb_h.timeout_ch =
368 timeout(mpttimeout, (caddr_t)ccb,
369 (ccb->ccb_h.timeout * hz) / 1000);
371 callout_handle_init(&ccb->ccb_h.timeout_ch);
373 if (mpt->verbose > 1)
374 mpt_print_scsi_io_request(mpt_req);
375 mpt_send_cmd(mpt, req);
376 MPTLOCK_2_CAMLOCK(mpt);
380 mpt_start(union ccb *ccb)
383 struct mpt_softc *mpt;
384 MSG_SCSI_IO_REQUEST *mpt_req;
385 struct ccb_scsiio *csio = &ccb->csio;
386 struct ccb_hdr *ccbh = &ccb->ccb_h;
388 /* Get the pointer for the physical addapter */
389 mpt = ccb->ccb_h.ccb_mpt_ptr;
391 CAMLOCK_2_MPTLOCK(mpt);
392 /* Get a request structure off the free list */
393 if ((req = mpt_get_request(mpt)) == NULL) {
394 if (mpt->outofbeer == 0) {
396 xpt_freeze_simq(mpt->sim, 1);
397 if (mpt->verbose > 1) {
398 mpt_prt(mpt, "FREEZEQ");
401 MPTLOCK_2_CAMLOCK(mpt);
402 ccb->ccb_h.status = CAM_REQUEUE_REQ;
406 MPTLOCK_2_CAMLOCK(mpt);
408 /* Link the ccb and the request structure so we can find */
409 /* the other knowing either the request or the ccb */
411 ccb->ccb_h.ccb_req_ptr = req;
413 /* Now we build the command for the IOC */
414 mpt_req = req->req_vbuf;
415 bzero(mpt_req, sizeof *mpt_req);
417 mpt_req->Function = MPI_FUNCTION_SCSI_IO_REQUEST;
418 mpt_req->Bus = mpt->bus;
420 mpt_req->SenseBufferLength =
421 (csio->sense_len < MPT_SENSE_SIZE) ?
422 csio->sense_len : MPT_SENSE_SIZE;
424 /* We use the message context to find the request structure when we */
425 /* Get the command competion interrupt from the FC IOC. */
426 mpt_req->MsgContext = req->index;
428 /* Which physical device to do the I/O on */
429 mpt_req->TargetID = ccb->ccb_h.target_id;
430 mpt_req->LUN[1] = ccb->ccb_h.target_lun;
432 /* Set the direction of the transfer */
433 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
434 mpt_req->Control = MPI_SCSIIO_CONTROL_READ;
435 else if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
436 mpt_req->Control = MPI_SCSIIO_CONTROL_WRITE;
438 mpt_req->Control = MPI_SCSIIO_CONTROL_NODATATRANSFER;
440 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0) {
441 switch(ccb->csio.tag_action) {
442 case MSG_HEAD_OF_Q_TAG:
443 mpt_req->Control |= MPI_SCSIIO_CONTROL_HEADOFQ;
446 mpt_req->Control |= MPI_SCSIIO_CONTROL_ACAQ;
448 case MSG_ORDERED_Q_TAG:
449 mpt_req->Control |= MPI_SCSIIO_CONTROL_ORDEREDQ;
451 case MSG_SIMPLE_Q_TAG:
453 mpt_req->Control |= MPI_SCSIIO_CONTROL_SIMPLEQ;
458 mpt_req->Control |= MPI_SCSIIO_CONTROL_SIMPLEQ;
460 mpt_req->Control |= MPI_SCSIIO_CONTROL_UNTAGGED;
463 if (mpt->is_fc == 0) {
464 if (ccb->ccb_h.flags & CAM_DIS_DISCONNECT) {
465 mpt_req->Control |= MPI_SCSIIO_CONTROL_NO_DISCONNECT;
469 /* Copy the scsi command block into place */
470 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0)
471 bcopy(csio->cdb_io.cdb_ptr, mpt_req->CDB, csio->cdb_len);
473 bcopy(csio->cdb_io.cdb_bytes, mpt_req->CDB, csio->cdb_len);
475 mpt_req->CDBLength = csio->cdb_len;
476 mpt_req->DataLength = csio->dxfer_len;
477 mpt_req->SenseBufferLowAddr = req->sense_pbuf;
480 * If we have any data to send with this command,
481 * map it into bus space.
484 if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
485 if ((ccbh->flags & CAM_SCATTER_VALID) == 0) {
487 * We've been given a pointer to a single buffer.
489 if ((ccbh->flags & CAM_DATA_PHYS) == 0) {
491 * Virtual address that needs to translated into
492 * one or more physical pages.
496 error = bus_dmamap_load(mpt->buffer_dmat,
497 req->dmap, csio->data_ptr, csio->dxfer_len,
498 mpt_execute_req, req, 0);
499 if (error == EINPROGRESS) {
501 * So as to maintain ordering,
502 * freeze the controller queue
503 * until our mapping is
506 xpt_freeze_simq(mpt->sim, 1);
507 ccbh->status |= CAM_RELEASE_SIMQ;
511 * We have been given a pointer to single
514 struct bus_dma_segment seg;
515 seg.ds_addr = (bus_addr_t)csio->data_ptr;
516 seg.ds_len = csio->dxfer_len;
517 mpt_execute_req(req, &seg, 1, 0);
521 * We have been given a list of addresses.
522 * These case could be easily done but they are not
523 * currently generated by the CAM subsystem so there
524 * is no point in wasting the time right now.
526 struct bus_dma_segment *segs;
527 if ((ccbh->flags & CAM_SG_LIST_PHYS) == 0) {
528 mpt_execute_req(req, NULL, 0, EFAULT);
530 /* Just use the segments provided */
531 segs = (struct bus_dma_segment *)csio->data_ptr;
532 mpt_execute_req(req, segs, csio->sglist_cnt,
533 (csio->sglist_cnt < MPT_SGL_MAX)?
538 mpt_execute_req(req, NULL, 0, 0);
543 mpt_bus_reset(union ccb *ccb)
548 MSG_SCSI_TASK_MGMT *reset_req;
550 /* Get the pointer for the physical adapter */
551 mpt = ccb->ccb_h.ccb_mpt_ptr;
553 /* Get a request structure off the free list */
554 if ((req = mpt_get_request(mpt)) == NULL) {
555 return (CAM_REQUEUE_REQ);
558 /* Link the ccb and the request structure so we can find */
559 /* the other knowing either the request or the ccb */
561 ccb->ccb_h.ccb_req_ptr = req;
563 reset_req = req->req_vbuf;
564 bzero(reset_req, sizeof *reset_req);
566 reset_req->Function = MPI_FUNCTION_SCSI_TASK_MGMT;
567 reset_req->MsgContext = req->index;
568 reset_req->TaskType = MPI_SCSITASKMGMT_TASKTYPE_RESET_BUS;
571 * Should really be TARGET_RESET_OPTION
573 reset_req->MsgFlags =
574 MPI_SCSITASKMGMT_MSGFLAGS_LIP_RESET_OPTION;
576 /* Which physical device Reset */
577 reset_req->TargetID = ccb->ccb_h.target_id;
578 reset_req->LUN[1] = ccb->ccb_h.target_lun;
580 ccb->ccb_h.status |= CAM_SIM_QUEUED;
582 error = mpt_send_handshake_cmd(mpt,
583 sizeof (MSG_SCSI_TASK_MGMT), reset_req);
586 "mpt_bus_reset: mpt_send_handshake return %d", error);
587 return (CAM_REQ_CMP_ERR);
589 return (CAM_REQ_CMP);
594 * Process an asynchronous event from the IOC.
596 static void mpt_ctlop(mpt_softc_t *, void *, u_int32_t);
597 static void mpt_event_notify_reply(mpt_softc_t *mpt, MSG_EVENT_NOTIFY_REPLY *);
600 mpt_ctlop(mpt_softc_t *mpt, void *vmsg, u_int32_t reply)
602 MSG_DEFAULT_REPLY *dmsg = vmsg;
604 if (dmsg->Function == MPI_FUNCTION_EVENT_NOTIFICATION) {
605 mpt_event_notify_reply(mpt, vmsg);
606 mpt_free_reply(mpt, (reply << 1));
607 } else if (dmsg->Function == MPI_FUNCTION_EVENT_ACK) {
608 mpt_free_reply(mpt, (reply << 1));
609 } else if (dmsg->Function == MPI_FUNCTION_PORT_ENABLE) {
610 MSG_PORT_ENABLE_REPLY *msg = vmsg;
611 int index = msg->MsgContext & ~0x80000000;
612 if (mpt->verbose > 1) {
613 mpt_prt(mpt, "enable port reply idx %d", index);
615 if (index >= 0 && index < MPT_MAX_REQUESTS(mpt)) {
616 request_t *req = &mpt->request_pool[index];
617 req->debug = REQ_DONE;
619 mpt_free_reply(mpt, (reply << 1));
620 } else if (dmsg->Function == MPI_FUNCTION_CONFIG) {
621 MSG_CONFIG_REPLY *msg = vmsg;
622 int index = msg->MsgContext & ~0x80000000;
623 if (index >= 0 && index < MPT_MAX_REQUESTS(mpt)) {
624 request_t *req = &mpt->request_pool[index];
625 req->debug = REQ_DONE;
626 req->sequence = reply;
628 mpt_free_reply(mpt, (reply << 1));
631 mpt_prt(mpt, "unknown mpt_ctlop: %x", dmsg->Function);
636 mpt_event_notify_reply(mpt_softc_t *mpt, MSG_EVENT_NOTIFY_REPLY *msg)
639 case MPI_EVENT_LOG_DATA:
640 /* Some error occured that LSI wants logged */
641 printf("\tEvtLogData: IOCLogInfo: 0x%08x\n", msg->IOCLogInfo);
642 printf("\tEvtLogData: Event Data:");
645 for (i = 0; i < msg->EventDataLength; i++) {
646 printf(" %08x", msg->Data[i]);
652 case MPI_EVENT_UNIT_ATTENTION:
653 mpt_prt(mpt, "Bus: 0x%02x TargetID: 0x%02x",
654 (msg->Data[0] >> 8) & 0xff, msg->Data[0] & 0xff);
657 case MPI_EVENT_IOC_BUS_RESET:
658 /* We generated a bus reset */
659 mpt_prt(mpt, "IOC Bus Reset Port: %d",
660 (msg->Data[0] >> 8) & 0xff);
663 case MPI_EVENT_EXT_BUS_RESET:
664 /* Someone else generated a bus reset */
665 mpt_prt(mpt, "Ext Bus Reset");
667 * These replies don't return EventData like the MPI
670 /* xpt_async(AC_BUS_RESET, path, NULL); */
673 case MPI_EVENT_RESCAN:
675 * In general this means a device has been added
678 mpt_prt(mpt, "Rescan Port: %d", (msg->Data[0] >> 8) & 0xff);
679 /* xpt_async(AC_FOUND_DEVICE, path, NULL); */
682 case MPI_EVENT_LINK_STATUS_CHANGE:
683 mpt_prt(mpt, "Port %d: LinkState: %s",
684 (msg->Data[1] >> 8) & 0xff,
685 ((msg->Data[0] & 0xff) == 0)? "Failed" : "Active");
688 case MPI_EVENT_LOOP_STATE_CHANGE:
689 switch ((msg->Data[0] >> 16) & 0xff) {
692 "Port 0x%x: FC LinkEvent: LIP(%02x,%02x) (Loop Initialization)\n",
693 (msg->Data[1] >> 8) & 0xff,
694 (msg->Data[0] >> 8) & 0xff,
695 (msg->Data[0] ) & 0xff);
696 switch ((msg->Data[0] >> 8) & 0xff) {
698 if ((msg->Data[0] & 0xff) == 0xF7) {
699 printf("Device needs AL_PA\n");
701 printf("Device %02x doesn't like FC performance\n",
702 msg->Data[0] & 0xFF);
706 if ((msg->Data[0] & 0xff) == 0xF7) {
707 printf("Device had loop failure at its receiver prior to acquiring AL_PA\n");
709 printf("Device %02x detected loop failure at its receiver\n",
710 msg->Data[0] & 0xFF);
714 printf("Device %02x requests that device %02x reset itself\n",
716 (msg->Data[0] >> 8) & 0xFF);
721 mpt_prt(mpt, "Port 0x%x: FC LinkEvent: LPE(%02x,%02x) (Loop Port Enable)",
722 (msg->Data[1] >> 8) & 0xff, /* Port */
723 (msg->Data[0] >> 8) & 0xff, /* Character 3 */
724 (msg->Data[0] ) & 0xff /* Character 4 */
728 mpt_prt(mpt, "Port 0x%x: FC LinkEvent: LPB(%02x,%02x) (Loop Port Bypass)",
729 (msg->Data[1] >> 8) & 0xff, /* Port */
730 (msg->Data[0] >> 8) & 0xff, /* Character 3 */
731 (msg->Data[0] ) & 0xff /* Character 4 */
735 mpt_prt(mpt, "Port 0x%x: FC LinkEvent: Unknown FC event (%02x %02x %02x)",
736 (msg->Data[1] >> 8) & 0xff, /* Port */
737 (msg->Data[0] >> 16) & 0xff, /* Event */
738 (msg->Data[0] >> 8) & 0xff, /* Character 3 */
739 (msg->Data[0] ) & 0xff /* Character 4 */
744 case MPI_EVENT_LOGOUT:
745 mpt_prt(mpt, "FC Logout Port: %d N_PortID: %02x",
746 (msg->Data[1] >> 8) & 0xff, msg->Data[0]);
748 case MPI_EVENT_EVENT_CHANGE:
749 /* This is just an acknowledgement of our
750 mpt_send_event_request */
753 mpt_prt(mpt, "Unknown event 0x%x\n", msg->Event);
755 if (msg->AckRequired) {
758 if ((req = mpt_get_request(mpt)) == NULL) {
759 panic("unable to get request to acknowledge notify");
761 ackp = (MSG_EVENT_ACK *) req->req_vbuf;
762 bzero(ackp, sizeof *ackp);
763 ackp->Function = MPI_FUNCTION_EVENT_ACK;
764 ackp->Event = msg->Event;
765 ackp->EventContext = msg->EventContext;
766 ackp->MsgContext = req->index | 0x80000000;
767 mpt_check_doorbell(mpt);
768 mpt_send_cmd(mpt, req);
773 mpt_done(mpt_softc_t *mpt, u_int32_t reply)
778 MSG_REQUEST_HEADER *mpt_req;
779 MSG_SCSI_IO_REPLY *mpt_reply;
781 index = -1; /* Shutup the complier */
783 if ((reply & MPT_CONTEXT_REPLY) == 0) {
786 index = reply & MPT_CONTEXT_MASK;
790 bus_dmamap_sync(mpt->reply_dmat, mpt->reply_dmap,
791 BUS_DMASYNC_POSTREAD);
792 /* address reply (Error) */
793 mpt_reply = MPT_REPLY_PTOV(mpt, reply);
794 if (mpt->verbose > 1) {
795 pReply = (unsigned *) mpt_reply;
796 mpt_prt(mpt, "Address Reply (index %u)",
797 mpt_reply->MsgContext & 0xffff);
798 printf("%08x %08x %08x %08x\n",
799 pReply[0], pReply[1], pReply[2], pReply[3]);
800 printf("%08x %08x %08x %08x\n",
801 pReply[4], pReply[5], pReply[6], pReply[7]);
802 printf("%08x %08x %08x %08x\n\n",
803 pReply[8], pReply[9], pReply[10], pReply[11]);
805 index = mpt_reply->MsgContext;
809 * Address reply with MessageContext high bit set
810 * This is most likely a notify message so we try
811 * to process it then free it
813 if ((index & 0x80000000) != 0) {
814 if (mpt_reply != NULL) {
815 mpt_ctlop(mpt, mpt_reply, reply);
817 mpt_prt(mpt, "mpt_done: index 0x%x, NULL reply", index);
822 /* Did we end up with a valid index into the table? */
823 if (index < 0 || index >= MPT_MAX_REQUESTS(mpt)) {
824 mpt_prt(mpt, "mpt_done: invalid index (%x) in reply", index);
828 req = &mpt->request_pool[index];
830 /* Make sure memory hasn't been trashed */
831 if (req->index != index) {
832 printf("mpt_done: corrupted request struct");
836 /* Short cut for task management replys; nothing more for us to do */
837 mpt_req = req->req_vbuf;
838 if (mpt_req->Function == MPI_FUNCTION_SCSI_TASK_MGMT) {
839 if (mpt->verbose > 1) {
840 mpt_prt(mpt, "mpt_done: TASK MGMT");
845 if (mpt_req->Function == MPI_FUNCTION_PORT_ENABLE) {
850 * At this point it better be a SCSI IO command, but don't
853 if (mpt_req->Function != MPI_FUNCTION_SCSI_IO_REQUEST) {
857 /* Recover the CAM control block from the request structure */
860 /* Can't have had a SCSI command with out a CAM control block */
861 if (ccb == NULL || (ccb->ccb_h.status & CAM_SIM_QUEUED) == 0) {
863 "mpt_done: corrupted ccb, index = 0x%02x seq = 0x%08x",
864 req->index, req->sequence);
865 printf(" request state %s\nmpt_request:\n",
866 mpt_req_state(req->debug));
867 mpt_print_scsi_io_request((MSG_SCSI_IO_REQUEST *)req->req_vbuf);
869 if (mpt_reply != NULL) {
870 printf("\nmpt_done: reply:\n");
871 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
873 printf("\nmpt_done: context reply: 0x%08x\n", reply);
878 untimeout(mpttimeout, ccb, ccb->ccb_h.timeout_ch);
880 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
883 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
884 op = BUS_DMASYNC_POSTREAD;
886 op = BUS_DMASYNC_POSTWRITE;
888 bus_dmamap_sync(mpt->buffer_dmat, req->dmap, op);
889 bus_dmamap_unload(mpt->buffer_dmat, req->dmap);
893 if (mpt_reply == NULL) {
894 /* Context reply; report that the command was successfull */
895 ccb->ccb_h.status = CAM_REQ_CMP;
896 ccb->csio.scsi_status = SCSI_STATUS_OK;
897 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
898 if (mpt->outofbeer) {
899 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
901 if (mpt->verbose > 1) {
902 mpt_prt(mpt, "THAWQ");
905 MPTLOCK_2_CAMLOCK(mpt);
907 CAMLOCK_2_MPTLOCK(mpt);
911 ccb->csio.scsi_status = mpt_reply->SCSIStatus;
912 switch(mpt_reply->IOCStatus) {
913 case MPI_IOCSTATUS_SCSI_DATA_OVERRUN:
914 ccb->ccb_h.status = CAM_DATA_RUN_ERR;
917 case MPI_IOCSTATUS_SCSI_DATA_UNDERRUN:
919 * Yikes, Tagged queue full comes through this path!
921 * So we'll change it to a status error and anything
922 * that returns status should probably be a status
926 ccb->csio.dxfer_len - mpt_reply->TransferCount;
927 if (mpt_reply->SCSIState & MPI_SCSI_STATE_NO_SCSI_STATUS) {
928 ccb->ccb_h.status = CAM_DATA_RUN_ERR;
932 case MPI_IOCSTATUS_SUCCESS:
933 case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR:
934 switch (ccb->csio.scsi_status) {
936 ccb->ccb_h.status = CAM_REQ_CMP;
939 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
943 case MPI_IOCSTATUS_BUSY:
944 case MPI_IOCSTATUS_INSUFFICIENT_RESOURCES:
945 ccb->ccb_h.status = CAM_BUSY;
948 case MPI_IOCSTATUS_SCSI_INVALID_BUS:
949 case MPI_IOCSTATUS_SCSI_INVALID_TARGETID:
950 case MPI_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
951 ccb->ccb_h.status = CAM_DEV_NOT_THERE;
954 case MPI_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
955 ccb->ccb_h.status = CAM_DATA_RUN_ERR;
958 case MPI_IOCSTATUS_SCSI_PROTOCOL_ERROR:
959 case MPI_IOCSTATUS_SCSI_IO_DATA_ERROR:
960 ccb->ccb_h.status = CAM_UNCOR_PARITY;
963 case MPI_IOCSTATUS_SCSI_TASK_TERMINATED:
964 ccb->ccb_h.status = CAM_REQ_CMP;
967 case MPI_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
968 ccb->ccb_h.status = CAM_UA_TERMIO;
971 case MPI_IOCSTATUS_SCSI_IOC_TERMINATED:
972 ccb->ccb_h.status = CAM_REQ_TERMIO;
975 case MPI_IOCSTATUS_SCSI_EXT_TERMINATED:
976 ccb->ccb_h.status = CAM_SCSI_BUS_RESET;
980 ccb->ccb_h.status = CAM_UNREC_HBA_ERROR;
984 if ((mpt_reply->SCSIState & MPI_SCSI_STATE_AUTOSENSE_VALID) != 0) {
985 if (ccb->ccb_h.flags & (CAM_SENSE_PHYS | CAM_SENSE_PTR)) {
986 ccb->ccb_h.status |= CAM_AUTOSENSE_FAIL;
988 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
989 ccb->csio.sense_resid = mpt_reply->SenseCount;
990 bcopy(req->sense_vbuf, &ccb->csio.sense_data,
991 ccb->csio.sense_len);
993 } else if (mpt_reply->SCSIState & MPI_SCSI_STATE_AUTOSENSE_FAILED) {
994 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
995 ccb->ccb_h.status |= CAM_AUTOSENSE_FAIL;
998 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
999 if ((ccb->ccb_h.status & CAM_DEV_QFRZN) == 0) {
1000 ccb->ccb_h.status |= CAM_DEV_QFRZN;
1001 xpt_freeze_devq(ccb->ccb_h.path, 1);
1006 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1007 if (mpt->outofbeer) {
1008 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1010 if (mpt->verbose > 1) {
1011 mpt_prt(mpt, "THAWQ");
1014 MPTLOCK_2_CAMLOCK(mpt);
1016 CAMLOCK_2_MPTLOCK(mpt);
1019 /* If IOC done with this request free it up */
1020 if (mpt_reply == NULL || (mpt_reply->MsgFlags & 0x80) == 0)
1021 mpt_free_request(mpt, req);
1023 /* If address reply; give the buffer back to the IOC */
1024 if (mpt_reply != NULL)
1025 mpt_free_reply(mpt, (reply << 1));
1029 mpt_action(struct cam_sim *sim, union ccb *ccb)
1033 struct ccb_trans_settings *cts;
1035 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("mpt_action\n"));
1037 mpt = (mpt_softc_t *)cam_sim_softc(sim);
1039 ccb->ccb_h.ccb_mpt_ptr = mpt;
1041 switch (ccb->ccb_h.func_code) {
1043 if (mpt->verbose > 1)
1044 mpt_prt(mpt, "XPT_RESET_BUS");
1045 CAMLOCK_2_MPTLOCK(mpt);
1046 error = mpt_bus_reset(ccb);
1048 case CAM_REQ_INPROG:
1049 MPTLOCK_2_CAMLOCK(mpt);
1051 case CAM_REQUEUE_REQ:
1052 if (mpt->outofbeer == 0) {
1054 xpt_freeze_simq(sim, 1);
1055 if (mpt->verbose > 1) {
1056 mpt_prt(mpt, "FREEZEQ");
1059 ccb->ccb_h.status = CAM_REQUEUE_REQ;
1060 MPTLOCK_2_CAMLOCK(mpt);
1065 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1066 ccb->ccb_h.status |= CAM_REQ_CMP;
1067 if (mpt->outofbeer) {
1068 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1070 if (mpt->verbose > 1) {
1071 mpt_prt(mpt, "THAWQ");
1074 MPTLOCK_2_CAMLOCK(mpt);
1079 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1080 MPTLOCK_2_CAMLOCK(mpt);
1085 case XPT_SCSI_IO: /* Execute the requested I/O operation */
1087 * Do a couple of preliminary checks...
1089 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) {
1090 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) != 0) {
1091 ccb->ccb_h.status = CAM_REQ_INVALID;
1096 /* Max supported CDB length is 16 bytes */
1097 if (ccb->csio.cdb_len >
1098 sizeof (((PTR_MSG_SCSI_IO_REQUEST)0)->CDB)) {
1099 ccb->ccb_h.status = CAM_REQ_INVALID;
1103 ccb->csio.scsi_status = SCSI_STATUS_OK;
1109 * XXX: Need to implement
1111 ccb->ccb_h.status = CAM_UA_ABORT;
1115 #ifdef CAM_NEW_TRAN_CODE
1116 #define IS_CURRENT_SETTINGS(c) (c->type == CTS_TYPE_CURRENT_SETTINGS)
1118 #define IS_CURRENT_SETTINGS(c) (c->flags & CCB_TRANS_CURRENT_SETTINGS)
1120 #define DP_DISC_ENABLE 0x1
1121 #define DP_DISC_DISABL 0x2
1122 #define DP_DISC (DP_DISC_ENABLE|DP_DISC_DISABL)
1124 #define DP_TQING_ENABLE 0x4
1125 #define DP_TQING_DISABL 0x8
1126 #define DP_TQING (DP_TQING_ENABLE|DP_TQING_DISABL)
1128 #define DP_WIDE 0x10
1129 #define DP_NARROW 0x20
1130 #define DP_WIDTH (DP_WIDE|DP_NARROW)
1132 #define DP_SYNC 0x40
1134 case XPT_SET_TRAN_SETTINGS: /* Nexus Settings */
1136 if (!IS_CURRENT_SETTINGS(cts)) {
1137 ccb->ccb_h.status = CAM_REQ_INVALID;
1141 tgt = cts->ccb_h.target_id;
1142 if (mpt->is_fc == 0) {
1144 u_int period = 0, offset = 0;
1145 #ifndef CAM_NEW_TRAN_CODE
1146 if (cts->valid & CCB_TRANS_DISC_VALID) {
1147 dval |= DP_DISC_ENABLE;
1149 if (cts->valid & CCB_TRANS_TQ_VALID) {
1150 dval |= DP_TQING_ENABLE;
1152 if (cts->valid & CCB_TRANS_BUS_WIDTH_VALID) {
1159 * Any SYNC RATE of nonzero and SYNC_OFFSET
1160 * of nonzero will cause us to go to the
1161 * selected (from NVRAM) maximum value for
1162 * this device. At a later point, we'll
1163 * allow finer control.
1165 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) &&
1166 (cts->valid & CCB_TRANS_SYNC_OFFSET_VALID)) {
1168 period = cts->sync_period;
1169 offset = cts->sync_offset;
1172 struct ccb_trans_settings_scsi *scsi =
1173 &cts->proto_specific.scsi;
1174 struct ccb_trans_settings_spi *spi =
1175 &cts->xport_specific.spi;
1177 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
1178 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
1179 dval |= DP_DISC_ENABLE;
1181 dval |= DP_DISC_DISABL;
1184 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
1185 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
1186 dval |= DP_TQING_ENABLE;
1188 dval |= DP_TQING_DISABL;
1191 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
1192 if (spi->bus_width == MSG_EXT_WDTR_BUS_16_BIT)
1198 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) &&
1199 (spi->valid & CTS_SPI_VALID_SYNC_RATE) &&
1200 (spi->sync_period && spi->sync_offset)) {
1202 period = spi->sync_period;
1203 offset = spi->sync_offset;
1206 CAMLOCK_2_MPTLOCK(mpt);
1207 if (dval & DP_DISC_ENABLE) {
1208 mpt->mpt_disc_enable |= (1 << tgt);
1209 } else if (dval & DP_DISC_DISABL) {
1210 mpt->mpt_disc_enable &= ~(1 << tgt);
1212 if (dval & DP_TQING_ENABLE) {
1213 mpt->mpt_tag_enable |= (1 << tgt);
1214 } else if (dval & DP_TQING_DISABL) {
1215 mpt->mpt_tag_enable &= ~(1 << tgt);
1217 if (dval & DP_WIDTH) {
1218 if (mpt_setwidth(mpt, tgt, dval & DP_WIDE)) {
1219 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1220 MPTLOCK_2_CAMLOCK(mpt);
1225 if (dval & DP_SYNC) {
1226 if (mpt_setsync(mpt, tgt, period, offset)) {
1227 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
1228 MPTLOCK_2_CAMLOCK(mpt);
1233 MPTLOCK_2_CAMLOCK(mpt);
1234 if (mpt->verbose > 1) {
1236 "SET tgt %d flags %x period %x off %x",
1237 tgt, dval, period, offset);
1240 ccb->ccb_h.status = CAM_REQ_CMP;
1244 case XPT_GET_TRAN_SETTINGS:
1246 tgt = cts->ccb_h.target_id;
1248 #ifndef CAM_NEW_TRAN_CODE
1250 * a lot of normal SCSI things don't make sense.
1252 cts->flags = CCB_TRANS_TAG_ENB | CCB_TRANS_DISC_ENB;
1253 cts->valid = CCB_TRANS_DISC_VALID | CCB_TRANS_TQ_VALID;
1255 * How do you measure the width of a high
1256 * speed serial bus? Well, in bytes.
1258 * Offset and period make no sense, though, so we set
1259 * (above) a 'base' transfer speed to be gigabit.
1261 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1263 struct ccb_trans_settings_fc *fc =
1264 &cts->xport_specific.fc;
1266 cts->protocol = PROTO_SCSI;
1267 cts->protocol_version = SCSI_REV_2;
1268 cts->transport = XPORT_FC;
1269 cts->transport_version = 0;
1271 fc->valid = CTS_FC_VALID_SPEED;
1272 fc->bitrate = 100000; /* XXX: Need for 2Gb/s */
1273 /* XXX: need a port database for each target */
1276 #ifdef CAM_NEW_TRAN_CODE
1277 struct ccb_trans_settings_scsi *scsi =
1278 &cts->proto_specific.scsi;
1279 struct ccb_trans_settings_spi *spi =
1280 &cts->xport_specific.spi;
1282 u_int8_t dval, pval, oval;
1285 * We aren't going off of Port PAGE2 params for
1286 * tagged queuing or disconnect capabilities
1287 * for current settings. For goal settings,
1288 * we assert all capabilities- we've had some
1289 * problems with reading NVRAM data.
1291 if (IS_CURRENT_SETTINGS(cts)) {
1292 fCONFIG_PAGE_SCSI_DEVICE_0 tmp;
1295 tmp = mpt->mpt_dev_page0[tgt];
1296 CAMLOCK_2_MPTLOCK(mpt);
1297 if (mpt_read_cfg_page(mpt, tgt, &tmp.Header)) {
1299 "cannot get target %d DP0", tgt);
1301 if (mpt->verbose > 1) {
1303 "SPI Tgt %d Page 0: NParms %x Information %x",
1305 tmp.NegotiatedParameters,
1309 MPTLOCK_2_CAMLOCK(mpt);
1311 if (tmp.NegotiatedParameters &
1312 MPI_SCSIDEVPAGE0_NP_WIDE)
1315 if (mpt->mpt_disc_enable & (1 << tgt)) {
1316 dval |= DP_DISC_ENABLE;
1318 if (mpt->mpt_tag_enable & (1 << tgt)) {
1319 dval |= DP_TQING_ENABLE;
1321 oval = (tmp.NegotiatedParameters >> 16) & 0xff;
1322 pval = (tmp.NegotiatedParameters >> 8) & 0xff;
1325 * XXX: Fix wrt NVRAM someday. Attempts
1326 * XXX: to read port page2 device data
1327 * XXX: just returns zero in these areas.
1329 dval = DP_WIDE|DP_DISC|DP_TQING;
1330 oval = (mpt->mpt_port_page0.Capabilities >> 16);
1331 pval = (mpt->mpt_port_page0.Capabilities >> 8);
1333 #ifndef CAM_NEW_TRAN_CODE
1334 cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
1335 if (dval & DP_DISC_ENABLE) {
1336 cts->flags |= CCB_TRANS_DISC_ENB;
1338 if (dval & DP_TQING_ENABLE) {
1339 cts->flags |= CCB_TRANS_TAG_ENB;
1341 if (dval & DP_WIDE) {
1342 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
1344 cts->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1346 cts->valid = CCB_TRANS_BUS_WIDTH_VALID |
1347 CCB_TRANS_DISC_VALID | CCB_TRANS_TQ_VALID;
1349 cts->sync_period = pval;
1350 cts->sync_offset = oval;
1352 CCB_TRANS_SYNC_RATE_VALID |
1353 CCB_TRANS_SYNC_OFFSET_VALID;
1356 cts->protocol = PROTO_SCSI;
1357 cts->protocol_version = SCSI_REV_2;
1358 cts->transport = XPORT_SPI;
1359 cts->transport_version = 2;
1361 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
1362 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
1363 if (dval & DP_DISC_ENABLE) {
1364 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
1366 if (dval & DP_TQING_ENABLE) {
1367 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
1370 spi->sync_offset = oval;
1371 spi->sync_period = pval;
1372 spi->valid |= CTS_SPI_VALID_SYNC_OFFSET;
1373 spi->valid |= CTS_SPI_VALID_SYNC_RATE;
1375 spi->valid |= CTS_SPI_VALID_BUS_WIDTH;
1376 if (dval & DP_WIDE) {
1377 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
1379 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1381 if (cts->ccb_h.target_lun != CAM_LUN_WILDCARD) {
1382 scsi->valid = CTS_SCSI_VALID_TQ;
1383 spi->valid |= CTS_SPI_VALID_DISC;
1388 if (mpt->verbose > 1) {
1390 "GET %s tgt %d flags %x period %x off %x",
1391 IS_CURRENT_SETTINGS(cts)? "ACTIVE" :
1392 "NVRAM", tgt, dval, pval, oval);
1395 ccb->ccb_h.status = CAM_REQ_CMP;
1399 case XPT_CALC_GEOMETRY:
1401 struct ccb_calc_geometry *ccg;
1402 u_int32_t secs_per_cylinder;
1406 if (ccg->block_size == 0) {
1407 ccb->ccb_h.status = CAM_REQ_INVALID;
1412 size_mb = ccg->volume_size /((1024L * 1024L) / ccg->block_size);
1413 if (size_mb > 1024) {
1415 ccg->secs_per_track = 63;
1418 ccg->secs_per_track = 32;
1420 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1421 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1422 ccb->ccb_h.status = CAM_REQ_CMP;
1426 case XPT_PATH_INQ: /* Path routing inquiry */
1428 struct ccb_pathinq *cpi = &ccb->cpi;
1430 cpi->version_num = 1;
1431 cpi->target_sprt = 0;
1432 cpi->hba_eng_cnt = 0;
1434 cpi->bus_id = cam_sim_bus(sim);
1436 cpi->max_target = 255;
1437 cpi->hba_misc = PIM_NOBUSRESET;
1438 cpi->initiator_id = cpi->max_target + 1;
1439 cpi->base_transfer_speed = 100000;
1440 cpi->hba_inquiry = PI_TAG_ABLE;
1442 cpi->initiator_id = mpt->mpt_ini_id;
1443 cpi->base_transfer_speed = 3300;
1444 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16;
1446 cpi->max_target = 15;
1449 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1450 strncpy(cpi->hba_vid, "LSI", HBA_IDLEN);
1451 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1452 cpi->unit_number = cam_sim_unit(sim);
1453 cpi->ccb_h.status = CAM_REQ_CMP;
1458 ccb->ccb_h.status = CAM_REQ_INVALID;
1465 mpt_setwidth(mpt_softc_t *mpt, int tgt, int onoff)
1467 fCONFIG_PAGE_SCSI_DEVICE_1 tmp;
1468 tmp = mpt->mpt_dev_page1[tgt];
1470 tmp.RequestedParameters |= MPI_SCSIDEVPAGE1_RP_WIDE;
1472 tmp.RequestedParameters &= ~MPI_SCSIDEVPAGE1_RP_WIDE;
1474 if (mpt_write_cfg_page(mpt, tgt, &tmp.Header)) {
1477 if (mpt_read_cfg_page(mpt, tgt, &tmp.Header)) {
1480 mpt->mpt_dev_page1[tgt] = tmp;
1481 if (mpt->verbose > 1) {
1483 "SPI Target %d Page 1: RequestedParameters %x Config %x",
1484 tgt, mpt->mpt_dev_page1[tgt].RequestedParameters,
1485 mpt->mpt_dev_page1[tgt].Configuration);
1491 mpt_setsync(mpt_softc_t *mpt, int tgt, int period, int offset)
1493 fCONFIG_PAGE_SCSI_DEVICE_1 tmp;
1494 tmp = mpt->mpt_dev_page1[tgt];
1495 tmp.RequestedParameters &=
1496 ~MPI_SCSIDEVPAGE1_RP_MIN_SYNC_PERIOD_MASK;
1497 tmp.RequestedParameters &=
1498 ~MPI_SCSIDEVPAGE1_RP_MAX_SYNC_OFFSET_MASK;
1499 tmp.RequestedParameters &=
1500 ~MPI_SCSIDEVPAGE1_RP_DT;
1501 tmp.RequestedParameters &=
1502 ~MPI_SCSIDEVPAGE1_RP_QAS;
1503 tmp.RequestedParameters &=
1504 ~MPI_SCSIDEVPAGE1_RP_IU;
1506 * XXX: For now, we're ignoring specific settings
1508 if (period && offset) {
1509 int factor, offset, np;
1510 factor = (mpt->mpt_port_page0.Capabilities >> 8) & 0xff;
1511 offset = (mpt->mpt_port_page0.Capabilities >> 16) & 0xff;
1514 np |= MPI_SCSIDEVPAGE1_RP_QAS;
1515 np |= MPI_SCSIDEVPAGE1_RP_IU;
1518 np |= MPI_SCSIDEVPAGE1_RP_DT;
1520 np |= (factor << 8) | (offset << 16);
1521 tmp.RequestedParameters |= np;
1523 if (mpt_write_cfg_page(mpt, tgt, &tmp.Header)) {
1526 if (mpt_read_cfg_page(mpt, tgt, &tmp.Header)) {
1529 mpt->mpt_dev_page1[tgt] = tmp;
1530 if (mpt->verbose > 1) {
1532 "SPI Target %d Page 1: RParams %x Config %x",
1533 tgt, mpt->mpt_dev_page1[tgt].RequestedParameters,
1534 mpt->mpt_dev_page1[tgt].Configuration);