2 * PCI specific probe and attach routines for LSI Fusion Adapters
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
101 #include <sys/cdefs.h>
102 __FBSDID("$FreeBSD$");
104 #include <dev/mpt/mpt.h>
105 #include <dev/mpt/mpt_cam.h>
106 #include <dev/mpt/mpt_raid.h>
109 * XXX it seems no other MPT driver knows about the following chips.
112 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB
113 #define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620
116 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
117 #define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625
120 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
121 #define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623
124 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
125 #define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627
128 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
129 #define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629
132 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
133 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055
136 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
137 #define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059
140 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
141 #define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C
144 static int mpt_pci_probe(device_t);
145 static int mpt_pci_attach(device_t);
146 static void mpt_free_bus_resources(struct mpt_softc *mpt);
147 static int mpt_pci_detach(device_t);
148 static int mpt_pci_shutdown(device_t);
149 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
150 static void mpt_dma_mem_free(struct mpt_softc *mpt);
152 static void mpt_read_config_regs(struct mpt_softc *mpt);
153 static void mpt_set_config_regs(struct mpt_softc *mpt);
155 static void mpt_pci_intr(void *);
157 static device_method_t mpt_methods[] = {
158 /* Device interface */
159 DEVMETHOD(device_probe, mpt_pci_probe),
160 DEVMETHOD(device_attach, mpt_pci_attach),
161 DEVMETHOD(device_detach, mpt_pci_detach),
162 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
166 static driver_t mpt_driver = {
167 "mpt", mpt_methods, sizeof(struct mpt_softc)
170 static devclass_t mpt_devclass;
171 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
172 MODULE_DEPEND(mpt, pci, 1, 1, 1);
173 MODULE_VERSION(mpt, 1);
176 mpt_pci_probe(device_t dev)
181 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
184 rval = BUS_PROBE_DEFAULT;
185 switch (pci_get_device(dev)) {
186 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
187 desc = "LSILogic FC909 FC Adapter";
189 case MPI_MANUFACTPAGE_DEVICEID_FC909:
190 desc = "LSILogic FC909A FC Adapter";
192 case MPI_MANUFACTPAGE_DEVICEID_FC919:
193 desc = "LSILogic FC919 FC Adapter";
195 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
196 desc = "LSILogic FC919 LAN Adapter";
198 case MPI_MANUFACTPAGE_DEVICEID_FC929:
199 desc = "Dual LSILogic FC929 FC Adapter";
201 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
202 desc = "Dual LSILogic FC929 LAN Adapter";
204 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
205 desc = "LSILogic FC919 FC PCI-X Adapter";
207 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
208 desc = "LSILogic FC919 LAN PCI-X Adapter";
210 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
211 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
213 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
214 desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
216 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
217 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
219 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
220 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
222 case MPI_MANUFACTPAGE_DEVID_53C1030:
223 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
224 desc = "LSILogic 1030 Ultra4 Adapter";
226 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
228 * Allow mfi(4) to claim this device in case it's in MegaRAID
231 rval = BUS_PROBE_LOW_PRIORITY;
233 case MPI_MANUFACTPAGE_DEVID_SAS1064:
234 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
235 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
236 case MPI_MANUFACTPAGE_DEVID_SAS1066:
237 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
238 case MPI_MANUFACTPAGE_DEVID_SAS1068:
239 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
240 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
241 case MPI_MANUFACTPAGE_DEVID_SAS1078:
242 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
243 desc = "LSILogic SAS/SATA Adapter";
249 device_set_desc(dev, desc);
254 mpt_set_options(struct mpt_softc *mpt)
259 if (resource_int_value(device_get_name(mpt->dev),
260 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
264 if (resource_int_value(device_get_name(mpt->dev),
265 device_get_unit(mpt->dev), "role", &tval) == 0 && tval >= 0 &&
267 mpt->cfg_role = tval;
268 mpt->do_cfg_role = 1;
274 if (resource_int_value(device_get_name(mpt->dev),
275 device_get_unit(mpt->dev), "msi_enable", &tval) == 0) {
276 mpt->msi_enable = tval;
282 mpt_link_peer(struct mpt_softc *mpt)
284 struct mpt_softc *mpt2;
286 if (mpt->unit == 0) {
290 * XXX: depends on probe order
292 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
297 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
300 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
305 if (mpt->verbose >= MPT_PRT_DEBUG) {
306 mpt_prt(mpt, "linking with peer (mpt%d)\n",
307 device_get_unit(mpt2->dev));
312 mpt_unlink_peer(struct mpt_softc *mpt)
316 mpt->mpt2->mpt2 = NULL;
322 mpt_pci_attach(device_t dev)
324 struct mpt_softc *mpt;
327 int mpt_io_bar, mpt_mem_bar;
329 mpt = (struct mpt_softc*)device_get_softc(dev);
331 switch (pci_get_device(dev)) {
332 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
333 case MPI_MANUFACTPAGE_DEVICEID_FC909:
334 case MPI_MANUFACTPAGE_DEVICEID_FC919:
335 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
336 case MPI_MANUFACTPAGE_DEVICEID_FC929:
337 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
338 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
339 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
340 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
341 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
342 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
343 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
346 case MPI_MANUFACTPAGE_DEVID_SAS1078:
347 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
350 case MPI_MANUFACTPAGE_DEVID_SAS1064:
351 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
352 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
353 case MPI_MANUFACTPAGE_DEVID_SAS1066:
354 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
355 case MPI_MANUFACTPAGE_DEVID_SAS1068:
356 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
357 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
358 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
366 mpt->unit = device_get_unit(dev);
367 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
368 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
369 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
370 mpt->verbose = MPT_PRT_NONE;
371 mpt->role = MPT_ROLE_NONE;
372 mpt->mpt_ini_id = MPT_INI_ID_NONE;
375 mpt->mpt_ini_id = OF_getscsinitid(dev);
377 mpt_set_options(mpt);
378 if (mpt->verbose == MPT_PRT_NONE) {
379 mpt->verbose = MPT_PRT_WARN;
380 /* Print INFO level (if any) if bootverbose is set */
381 mpt->verbose += (bootverbose != 0)? 1 : 0;
385 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
387 val = pci_read_config(dev, PCIR_COMMAND, 2);
388 val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
389 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
390 pci_write_config(dev, PCIR_COMMAND, val, 2);
393 * Make sure we've disabled the ROM.
395 val = pci_read_config(dev, PCIR_BIOS, 4);
396 val &= ~PCIM_BIOS_ENABLE;
397 pci_write_config(dev, PCIR_BIOS, val, 4);
401 * Is this part a dual?
402 * If so, link with our partner (around yet)
404 switch (pci_get_device(dev)) {
405 case MPI_MANUFACTPAGE_DEVICEID_FC929:
406 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
407 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
408 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
409 case MPI_MANUFACTPAGE_DEVID_53C1030:
410 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
419 * Figure out which are the I/O and MEM Bars
421 val = pci_read_config(dev, PCIR_BAR(0), 4);
422 if (PCI_BAR_IO(val)) {
423 /* BAR0 is IO, BAR1 is memory */
427 /* BAR0 is memory, BAR1 is IO */
433 * Set up register access. PIO mode is required for
434 * certain reset operations (but must be disabled for
435 * some cards otherwise).
437 mpt_io_bar = PCIR_BAR(mpt_io_bar);
438 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
439 &mpt_io_bar, RF_ACTIVE);
440 if (mpt->pci_pio_reg == NULL) {
443 "unable to map registers in PIO mode\n");
446 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
447 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
450 mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
451 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
452 &mpt_mem_bar, RF_ACTIVE);
453 if (mpt->pci_reg == NULL) {
454 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
456 "Unable to memory map registers.\n");
458 if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
459 device_printf(dev, "Giving Up.\n");
463 device_printf(dev, "Falling back to PIO mode.\n");
465 mpt->pci_st = mpt->pci_pio_st;
466 mpt->pci_sh = mpt->pci_pio_sh;
468 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
469 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
472 /* Get a handle to the interrupt */
474 if (mpt->msi_enable) {
476 * First try to alloc an MSI-X message. If that
477 * fails, then try to alloc an MSI message instead.
480 if (pci_alloc_msix(dev, &val) == 0)
483 if (iqd == 0 && pci_alloc_msi(dev, &val) == 0)
486 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
487 RF_ACTIVE | (iqd != 0 ? 0 : RF_SHAREABLE));
488 if (mpt->pci_irq == NULL) {
489 device_printf(dev, "could not allocate interrupt\n");
495 /* Disable interrupts at the part */
496 mpt_disable_ints(mpt);
498 /* Register the interrupt handler */
499 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
501 device_printf(dev, "could not setup interrupt\n");
505 /* Allocate dma memory */
506 if (mpt_dma_mem_alloc(mpt)) {
507 mpt_prt(mpt, "Could not allocate DMA memory\n");
513 * Save the PCI config register values
515 * Hard resets are known to screw up the BAR for diagnostic
516 * memory accesses (Mem1).
518 * Using Mem1 is known to make the chip stop responding to
519 * configuration space transfers, so we need to save it now
522 mpt_read_config_regs(mpt);
526 * Disable PIO until we need it
529 pci_disable_io(dev, SYS_RES_IOPORT);
532 /* Initialize the hardware */
533 if (mpt->disabled == 0) {
534 if (mpt_attach(mpt) != 0) {
538 mpt_prt(mpt, "device disabled at user request\n");
542 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
543 dev, SHUTDOWN_PRI_LAST);
545 if (mpt->eh == NULL) {
546 mpt_prt(mpt, "shutdown event registration failed\n");
547 mpt_disable_ints(mpt);
548 (void) mpt_detach(mpt);
549 mpt_reset(mpt, /*reinit*/FALSE);
550 mpt_raid_free_mem(mpt);
556 mpt_dma_mem_free(mpt);
557 mpt_free_bus_resources(mpt);
559 mpt_unlink_peer(mpt);
562 MPT_LOCK_DESTROY(mpt);
565 * but return zero to preserve unit numbering
574 mpt_free_bus_resources(struct mpt_softc *mpt)
578 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
583 bus_release_resource(mpt->dev, SYS_RES_IRQ,
584 rman_get_rid(mpt->pci_irq), mpt->pci_irq);
585 pci_release_msi(mpt->dev);
589 if (mpt->pci_pio_reg) {
590 bus_release_resource(mpt->dev, SYS_RES_IOPORT,
591 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
592 mpt->pci_pio_reg = NULL;
596 bus_release_resource(mpt->dev, SYS_RES_MEMORY,
597 rman_get_rid(mpt->pci_reg), mpt->pci_reg);
603 * Disconnect ourselves from the system.
606 mpt_pci_detach(device_t dev)
608 struct mpt_softc *mpt;
610 mpt = (struct mpt_softc*)device_get_softc(dev);
613 mpt_disable_ints(mpt);
615 mpt_reset(mpt, /*reinit*/FALSE);
616 mpt_raid_free_mem(mpt);
617 mpt_dma_mem_free(mpt);
618 mpt_free_bus_resources(mpt);
620 mpt_unlink_peer(mpt);
622 if (mpt->eh != NULL) {
623 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
625 MPT_LOCK_DESTROY(mpt);
631 * Disable the hardware
634 mpt_pci_shutdown(device_t dev)
636 struct mpt_softc *mpt;
638 mpt = (struct mpt_softc *)device_get_softc(dev);
640 return (mpt_shutdown(mpt));
645 mpt_dma_mem_alloc(struct mpt_softc *mpt)
648 struct mpt_map_info mi;
650 /* Check if we alreay have allocated the reply memory */
651 if (mpt->reply_phys != 0) {
655 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
656 mpt->request_pool = (request_t *)malloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
657 if (mpt->request_pool == NULL) {
658 mpt_prt(mpt, "cannot allocate request pool\n");
663 * Create a parent dma tag for this device.
665 * Align at byte boundaries,
666 * Limit to 32-bit addressing for request/reply queues.
668 if (mpt_dma_tag_create(mpt, /*parent*/bus_get_dma_tag(mpt->dev),
669 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
670 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
671 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
672 /*nsegments*/BUS_SPACE_UNRESTRICTED,
673 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
674 &mpt->parent_dmat) != 0) {
675 mpt_prt(mpt, "cannot create parent dma tag\n");
679 /* Create a child tag for reply buffers */
680 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
681 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
682 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
683 &mpt->reply_dmat) != 0) {
684 mpt_prt(mpt, "cannot create a dma tag for replies\n");
688 /* Allocate some DMA accessible memory for replies */
689 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
690 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
691 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
692 (u_long) (2 * PAGE_SIZE));
699 /* Load and lock it into "bus space" */
700 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
701 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
704 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
708 mpt->reply_phys = mi.phys;
713 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
716 mpt_dma_mem_free(struct mpt_softc *mpt)
719 /* Make sure we aren't double destroying */
720 if (mpt->reply_dmat == 0) {
721 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
725 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
726 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
727 bus_dma_tag_destroy(mpt->reply_dmat);
728 bus_dma_tag_destroy(mpt->parent_dmat);
729 mpt->reply_dmat = NULL;
730 free(mpt->request_pool, M_DEVBUF);
731 mpt->request_pool = NULL;
735 /* Reads modifiable (via PCI transactions) config registers */
737 mpt_read_config_regs(struct mpt_softc *mpt)
740 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
741 mpt->pci_cfg.LatencyTimer_LineSize =
742 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
743 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
744 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
745 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
746 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
747 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
748 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
749 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
750 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
753 /* Sets modifiable config registers */
755 mpt_set_config_regs(struct mpt_softc *mpt)
759 #define MPT_CHECK(reg, offset, size) \
760 val = pci_read_config(mpt->dev, offset, size); \
761 if (mpt->pci_cfg.reg != val) { \
763 "Restoring " #reg " to 0x%X from 0x%X\n", \
764 mpt->pci_cfg.reg, val); \
767 if (mpt->verbose >= MPT_PRT_DEBUG) {
768 MPT_CHECK(Command, PCIR_COMMAND, 2);
769 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
770 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
771 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
772 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
773 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
774 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
775 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
776 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
777 MPT_CHECK(PMCSR, 0x44, 4);
781 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
782 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
783 mpt->pci_cfg.LatencyTimer_LineSize, 2);
784 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
785 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
786 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
787 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
788 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
789 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
790 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
791 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
796 mpt_pci_intr(void *arg)
798 struct mpt_softc *mpt;
800 mpt = (struct mpt_softc *)arg;