2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/module.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/endian.h>
38 #include <sys/malloc.h>
40 #include <sys/mutex.h>
42 #include <machine/stdarg.h>
43 #include <machine/resource.h>
44 #include <machine/bus.h>
47 #include <arm/mv/mvreg.h>
48 #include <arm/mv/mvvar.h>
49 #include <dev/ofw/ofw_bus.h>
50 #include <dev/ofw/ofw_bus_subr.h>
53 /* local prototypes */
54 static int mvs_setup_interrupt(device_t dev);
55 static void mvs_intr(void *data);
56 static int mvs_suspend(device_t dev);
57 static int mvs_resume(device_t dev);
58 static int mvs_ctlr_setup(device_t dev);
67 {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC},
68 {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC},
69 {MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC},
70 {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
71 {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
72 {MV_DEV_MV78260, 0x00, "Marvell MV78260", 2, MVS_Q_GENIIE|MVS_Q_SOC},
73 {MV_DEV_MV78460, 0x00, "Marvell MV78460", 2, MVS_Q_GENIIE|MVS_Q_SOC},
78 mvs_probe(device_t dev)
82 uint32_t devid, revid;
84 if (!ofw_bus_status_okay(dev))
87 if (!ofw_bus_is_compatible(dev, "mrvl,sata"))
90 soc_id(&devid, &revid);
91 for (i = 0; mvs_ids[i].id != 0; i++) {
92 if (mvs_ids[i].id == devid &&
93 mvs_ids[i].rev <= revid) {
94 snprintf(buf, sizeof(buf), "%s SATA controller",
96 device_set_desc_copy(dev, buf);
97 return (BUS_PROBE_DEFAULT);
104 mvs_attach(device_t dev)
106 struct mvs_controller *ctlr = device_get_softc(dev);
109 uint32_t devid, revid;
111 soc_id(&devid, &revid);
114 while (mvs_ids[i].id != 0 &&
115 (mvs_ids[i].id != devid ||
116 mvs_ids[i].rev > revid))
118 ctlr->channels = mvs_ids[i].ports;
119 ctlr->quirks = mvs_ids[i].quirks;
121 resource_int_value(device_get_name(dev),
122 device_get_unit(dev), "ccc", &ctlr->ccc);
124 resource_int_value(device_get_name(dev),
125 device_get_unit(dev), "cccc", &ctlr->cccc);
126 if (ctlr->ccc == 0 || ctlr->cccc == 0) {
130 if (ctlr->ccc > 100000)
133 "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
134 ((ctlr->quirks & MVS_Q_GENI) ? "I" :
135 ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
137 ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
138 ((ctlr->quirks & MVS_Q_GENI) ?
139 "not supported" : "supported"),
140 ((ctlr->quirks & MVS_Q_GENIIE) ?
142 mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
143 /* We should have a memory BAR(0). */
145 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
146 &ctlr->r_rid, RF_ACTIVE)))
148 if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0)
149 ctlr->quirks |= MVS_Q_SOC65;
150 /* Setup our own memory management for channels. */
151 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
152 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
153 ctlr->sc_iomem.rm_type = RMAN_ARRAY;
154 ctlr->sc_iomem.rm_descr = "I/O memory addresses";
155 if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
156 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
159 if ((error = rman_manage_region(&ctlr->sc_iomem,
160 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
161 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
162 rman_fini(&ctlr->sc_iomem);
166 /* Setup interrupts. */
167 if (mvs_setup_interrupt(dev)) {
168 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
169 rman_fini(&ctlr->sc_iomem);
172 /* Attach all channels on this controller */
173 for (unit = 0; unit < ctlr->channels; unit++) {
174 child = device_add_child(dev, "mvsch", -1);
176 device_printf(dev, "failed to add channel device\n");
178 device_set_ivars(child, (void *)(intptr_t)unit);
180 bus_generic_attach(dev);
185 mvs_detach(device_t dev)
187 struct mvs_controller *ctlr = device_get_softc(dev);
189 /* Detach & delete all children */
190 device_delete_children(dev);
192 /* Free interrupt. */
193 if (ctlr->irq.r_irq) {
194 bus_teardown_intr(dev, ctlr->irq.r_irq,
196 bus_release_resource(dev, SYS_RES_IRQ,
197 ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
200 rman_fini(&ctlr->sc_iomem);
202 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
203 mtx_destroy(&ctlr->mtx);
208 mvs_ctlr_setup(device_t dev)
210 struct mvs_controller *ctlr = device_get_softc(dev);
211 int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0;
213 /* Mask chip interrupts */
214 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
215 /* Clear HC interrupts */
216 ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000);
217 /* Clear chip interrupts */
218 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0);
219 /* Configure per-HC CCC */
220 if (ccc && bootverbose) {
222 "CCC with %dus/%dcmd enabled\n",
223 ctlr->ccc, ctlr->cccc);
226 ATA_OUTL(ctlr->r_mem, HC_ICT, cccc);
227 ATA_OUTL(ctlr->r_mem, HC_ITT, ccc);
229 ccim |= IC_HC0_COAL_DONE;
230 /* Enable chip interrupts */
231 ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE :
232 (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) |
233 (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels)));
234 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
239 mvs_edma(device_t dev, device_t child, int mode)
241 struct mvs_controller *ctlr = device_get_softc(dev);
242 int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
243 int bit = IC_DONE_IRQ << (unit * 2);
247 /* CCC is not working for non-EDMA mode. Unmask device interrupts. */
248 mtx_lock(&ctlr->mtx);
249 if (mode == MVS_EDMA_OFF)
253 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
254 mtx_unlock(&ctlr->mtx);
258 mvs_suspend(device_t dev)
260 struct mvs_controller *ctlr = device_get_softc(dev);
262 bus_generic_suspend(dev);
263 /* Mask chip interrupts */
264 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
269 mvs_resume(device_t dev)
273 return (bus_generic_resume(dev));
277 mvs_setup_interrupt(device_t dev)
279 struct mvs_controller *ctlr = device_get_softc(dev);
281 /* Allocate all IRQs. */
282 ctlr->irq.r_irq_rid = 0;
283 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
284 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
285 device_printf(dev, "unable to map interrupt\n");
288 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
289 mvs_intr, ctlr, &ctlr->irq.handle))) {
290 device_printf(dev, "unable to setup interrupt\n");
291 bus_release_resource(dev, SYS_RES_IRQ,
292 ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
293 ctlr->irq.r_irq = NULL;
300 * Common case interrupt handler.
305 struct mvs_controller *ctlr = data;
306 struct mvs_intr_arg arg;
307 void (*function)(void *);
311 ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC);
312 if ((ic & IC_HC0) == 0)
315 /* Acknowledge interrupts of this HC. */
318 /* Processing interrupts from each initialized channel */
319 for (chan_num = 0; chan_num < ctlr->channels; chan_num++) {
320 if (ic & (IC_DONE_IRQ << (chan_num * 2)))
321 aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num);
324 if (ic & IC_HC0_COAL_DONE)
326 ATA_OUTL(ctlr->r_mem, HC_IC, ~aic);
328 /* Call per-port interrupt handler. */
329 for (p = 0; p < ctlr->channels; p++) {
330 arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
331 if ((arg.cause != 0) &&
332 (function = ctlr->interrupt[p].function)) {
333 arg.arg = ctlr->interrupt[p].argument;
340 static struct resource *
341 mvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
342 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
344 struct mvs_controller *ctlr = device_get_softc(dev);
345 int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
346 struct resource *res = NULL;
347 int offset = PORT_BASE(unit & 0x03);
352 st = rman_get_start(ctlr->r_mem);
353 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
354 st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
356 bus_space_handle_t bsh;
358 bsh = rman_get_bushandle(ctlr->r_mem);
359 bst = rman_get_bustag(ctlr->r_mem);
360 bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
361 rman_set_bushandle(res, bsh);
362 rman_set_bustag(res, bst);
366 if (*rid == ATA_IRQ_RID)
367 res = ctlr->irq.r_irq;
374 mvs_release_resource(device_t dev, device_t child, int type, int rid,
380 rman_release_resource(r);
383 if (rid != ATA_IRQ_RID)
391 mvs_setup_intr(device_t dev, device_t child, struct resource *irq,
392 int flags, driver_filter_t *filter, driver_intr_t *function,
393 void *argument, void **cookiep)
395 struct mvs_controller *ctlr = device_get_softc(dev);
396 int unit = (intptr_t)device_get_ivars(child);
398 if (filter != NULL) {
399 printf("mvs.c: we cannot use a filter here\n");
402 ctlr->interrupt[unit].function = function;
403 ctlr->interrupt[unit].argument = argument;
408 mvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
411 struct mvs_controller *ctlr = device_get_softc(dev);
412 int unit = (intptr_t)device_get_ivars(child);
414 ctlr->interrupt[unit].function = NULL;
415 ctlr->interrupt[unit].argument = NULL;
420 mvs_print_child(device_t dev, device_t child)
424 retval = bus_print_child_header(dev, child);
425 retval += printf(" at channel %d",
426 (int)(intptr_t)device_get_ivars(child));
427 retval += bus_print_child_footer(dev, child);
433 mvs_child_location(device_t dev, device_t child, struct sbuf *sb)
436 sbuf_printf(sb, "channel=%d", (int)(intptr_t)device_get_ivars(child));
441 mvs_get_dma_tag(device_t bus, device_t child)
444 return (bus_get_dma_tag(bus));
447 static device_method_t mvs_methods[] = {
448 DEVMETHOD(device_probe, mvs_probe),
449 DEVMETHOD(device_attach, mvs_attach),
450 DEVMETHOD(device_detach, mvs_detach),
451 DEVMETHOD(device_suspend, mvs_suspend),
452 DEVMETHOD(device_resume, mvs_resume),
453 DEVMETHOD(bus_print_child, mvs_print_child),
454 DEVMETHOD(bus_alloc_resource, mvs_alloc_resource),
455 DEVMETHOD(bus_release_resource, mvs_release_resource),
456 DEVMETHOD(bus_setup_intr, mvs_setup_intr),
457 DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
458 DEVMETHOD(bus_child_location, mvs_child_location),
459 DEVMETHOD(bus_get_dma_tag, mvs_get_dma_tag),
460 DEVMETHOD(mvs_edma, mvs_edma),
463 static driver_t mvs_driver = {
466 sizeof(struct mvs_controller)
468 DRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0);
469 MODULE_VERSION(mvs, 1);
470 MODULE_DEPEND(mvs, cam, 1, 1, 1);