2 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/module.h>
32 #include <sys/systm.h>
33 #include <sys/kernel.h>
35 #include <sys/endian.h>
36 #include <sys/malloc.h>
38 #include <sys/mutex.h>
40 #include <machine/stdarg.h>
41 #include <machine/resource.h>
42 #include <machine/bus.h>
44 #include <arm/mv/mvreg.h>
45 #include <arm/mv/mvvar.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
50 /* local prototypes */
51 static int mvs_setup_interrupt(device_t dev);
52 static void mvs_intr(void *data);
53 static int mvs_suspend(device_t dev);
54 static int mvs_resume(device_t dev);
55 static int mvs_ctlr_setup(device_t dev);
64 {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC},
65 {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC},
66 {MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC},
67 {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
68 {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},
69 {MV_DEV_MV78260, 0x00, "Marvell MV78260", 2, MVS_Q_GENIIE|MVS_Q_SOC},
70 {MV_DEV_MV78460, 0x00, "Marvell MV78460", 2, MVS_Q_GENIIE|MVS_Q_SOC},
75 mvs_probe(device_t dev)
79 uint32_t devid, revid;
81 if (!ofw_bus_is_compatible(dev, "mrvl,sata"))
84 soc_id(&devid, &revid);
85 for (i = 0; mvs_ids[i].id != 0; i++) {
86 if (mvs_ids[i].id == devid &&
87 mvs_ids[i].rev <= revid) {
88 snprintf(buf, sizeof(buf), "%s SATA controller",
90 device_set_desc_copy(dev, buf);
91 return (BUS_PROBE_VENDOR);
98 mvs_attach(device_t dev)
100 struct mvs_controller *ctlr = device_get_softc(dev);
103 uint32_t devid, revid;
105 soc_id(&devid, &revid);
108 while (mvs_ids[i].id != 0 &&
109 (mvs_ids[i].id != devid ||
110 mvs_ids[i].rev > revid))
112 ctlr->channels = mvs_ids[i].ports;
113 ctlr->quirks = mvs_ids[i].quirks;
114 resource_int_value(device_get_name(dev),
115 device_get_unit(dev), "ccc", &ctlr->ccc);
117 resource_int_value(device_get_name(dev),
118 device_get_unit(dev), "cccc", &ctlr->cccc);
119 if (ctlr->ccc == 0 || ctlr->cccc == 0) {
123 if (ctlr->ccc > 100000)
126 "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n",
127 ((ctlr->quirks & MVS_Q_GENI) ? "I" :
128 ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")),
130 ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"),
131 ((ctlr->quirks & MVS_Q_GENI) ?
132 "not supported" : "supported"),
133 ((ctlr->quirks & MVS_Q_GENIIE) ?
135 mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF);
136 /* We should have a memory BAR(0). */
138 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
139 &ctlr->r_rid, RF_ACTIVE)))
141 if (ATA_INL(ctlr->r_mem, PORT_BASE(0) + SATA_PHYCFG_OFS) != 0)
142 ctlr->quirks |= MVS_Q_SOC65;
143 /* Setup our own memory management for channels. */
144 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem);
145 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem);
146 ctlr->sc_iomem.rm_type = RMAN_ARRAY;
147 ctlr->sc_iomem.rm_descr = "I/O memory addresses";
148 if ((error = rman_init(&ctlr->sc_iomem)) != 0) {
149 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
152 if ((error = rman_manage_region(&ctlr->sc_iomem,
153 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) {
154 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
155 rman_fini(&ctlr->sc_iomem);
159 /* Setup interrupts. */
160 if (mvs_setup_interrupt(dev)) {
161 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
162 rman_fini(&ctlr->sc_iomem);
165 /* Attach all channels on this controller */
166 for (unit = 0; unit < ctlr->channels; unit++) {
167 child = device_add_child(dev, "mvsch", -1);
169 device_printf(dev, "failed to add channel device\n");
171 device_set_ivars(child, (void *)(intptr_t)unit);
173 bus_generic_attach(dev);
178 mvs_detach(device_t dev)
180 struct mvs_controller *ctlr = device_get_softc(dev);
182 /* Detach & delete all children */
183 device_delete_children(dev);
185 /* Free interrupt. */
186 if (ctlr->irq.r_irq) {
187 bus_teardown_intr(dev, ctlr->irq.r_irq,
189 bus_release_resource(dev, SYS_RES_IRQ,
190 ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
193 rman_fini(&ctlr->sc_iomem);
195 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem);
196 mtx_destroy(&ctlr->mtx);
201 mvs_ctlr_setup(device_t dev)
203 struct mvs_controller *ctlr = device_get_softc(dev);
204 int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0;
206 /* Mask chip interrupts */
207 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
208 /* Clear HC interrupts */
209 ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000);
210 /* Clear chip interrupts */
211 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0);
212 /* Configure per-HC CCC */
213 if (ccc && bootverbose) {
215 "CCC with %dus/%dcmd enabled\n",
216 ctlr->ccc, ctlr->cccc);
219 ATA_OUTL(ctlr->r_mem, HC_ICT, cccc);
220 ATA_OUTL(ctlr->r_mem, HC_ITT, ccc);
222 ccim |= IC_HC0_COAL_DONE;
223 /* Enable chip interrupts */
224 ctlr->gmim = ((ccc ? IC_HC0_COAL_DONE :
225 (IC_DONE_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels))) |
226 (IC_ERR_HC0 & CHIP_SOC_HC0_MASK(ctlr->channels)));
227 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
232 mvs_edma(device_t dev, device_t child, int mode)
234 struct mvs_controller *ctlr = device_get_softc(dev);
235 int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
236 int bit = IC_DONE_IRQ << (unit * 2);
240 /* CCC is not working for non-EDMA mode. Unmask device interrupts. */
241 mtx_lock(&ctlr->mtx);
242 if (mode == MVS_EDMA_OFF)
246 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim);
247 mtx_unlock(&ctlr->mtx);
251 mvs_suspend(device_t dev)
253 struct mvs_controller *ctlr = device_get_softc(dev);
255 bus_generic_suspend(dev);
256 /* Mask chip interrupts */
257 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000);
262 mvs_resume(device_t dev)
266 return (bus_generic_resume(dev));
270 mvs_setup_interrupt(device_t dev)
272 struct mvs_controller *ctlr = device_get_softc(dev);
274 /* Allocate all IRQs. */
275 ctlr->irq.r_irq_rid = 0;
276 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
277 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) {
278 device_printf(dev, "unable to map interrupt\n");
281 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL,
282 mvs_intr, ctlr, &ctlr->irq.handle))) {
283 device_printf(dev, "unable to setup interrupt\n");
284 bus_release_resource(dev, SYS_RES_IRQ,
285 ctlr->irq.r_irq_rid, ctlr->irq.r_irq);
293 * Common case interrupt handler.
298 struct mvs_controller *ctlr = data;
299 struct mvs_intr_arg arg;
300 void (*function)(void *);
304 ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC);
305 if ((ic & IC_HC0) == 0)
308 /* Acknowledge interrupts of this HC. */
311 /* Processing interrupts from each initialized channel */
312 for (chan_num = 0; chan_num < ctlr->channels; chan_num++) {
313 if (ic & (IC_DONE_IRQ << (chan_num * 2)))
314 aic |= HC_IC_DONE(chan_num) | HC_IC_DEV(chan_num);
317 if (ic & IC_HC0_COAL_DONE)
319 ATA_OUTL(ctlr->r_mem, HC_IC, ~aic);
321 /* Call per-port interrupt handler. */
322 for (p = 0; p < ctlr->channels; p++) {
323 arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ);
324 if ((arg.cause != 0) &&
325 (function = ctlr->interrupt[p].function)) {
326 arg.arg = ctlr->interrupt[p].argument;
333 static struct resource *
334 mvs_alloc_resource(device_t dev, device_t child, int type, int *rid,
335 u_long start, u_long end, u_long count, u_int flags)
337 struct mvs_controller *ctlr = device_get_softc(dev);
338 int unit = ((struct mvs_channel *)device_get_softc(child))->unit;
339 struct resource *res = NULL;
340 int offset = PORT_BASE(unit & 0x03);
345 st = rman_get_start(ctlr->r_mem);
346 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset,
347 st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child);
349 bus_space_handle_t bsh;
351 bsh = rman_get_bushandle(ctlr->r_mem);
352 bst = rman_get_bustag(ctlr->r_mem);
353 bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh);
354 rman_set_bushandle(res, bsh);
355 rman_set_bustag(res, bst);
359 if (*rid == ATA_IRQ_RID)
360 res = ctlr->irq.r_irq;
367 mvs_release_resource(device_t dev, device_t child, int type, int rid,
373 rman_release_resource(r);
376 if (rid != ATA_IRQ_RID)
384 mvs_setup_intr(device_t dev, device_t child, struct resource *irq,
385 int flags, driver_filter_t *filter, driver_intr_t *function,
386 void *argument, void **cookiep)
388 struct mvs_controller *ctlr = device_get_softc(dev);
389 int unit = (intptr_t)device_get_ivars(child);
391 if (filter != NULL) {
392 printf("mvs.c: we cannot use a filter here\n");
395 ctlr->interrupt[unit].function = function;
396 ctlr->interrupt[unit].argument = argument;
401 mvs_teardown_intr(device_t dev, device_t child, struct resource *irq,
404 struct mvs_controller *ctlr = device_get_softc(dev);
405 int unit = (intptr_t)device_get_ivars(child);
407 ctlr->interrupt[unit].function = NULL;
408 ctlr->interrupt[unit].argument = NULL;
413 mvs_print_child(device_t dev, device_t child)
417 retval = bus_print_child_header(dev, child);
418 retval += printf(" at channel %d",
419 (int)(intptr_t)device_get_ivars(child));
420 retval += bus_print_child_footer(dev, child);
426 mvs_child_location_str(device_t dev, device_t child, char *buf,
430 snprintf(buf, buflen, "channel=%d",
431 (int)(intptr_t)device_get_ivars(child));
436 mvs_get_dma_tag(device_t bus, device_t child)
439 return (bus_get_dma_tag(bus));
442 static device_method_t mvs_methods[] = {
443 DEVMETHOD(device_probe, mvs_probe),
444 DEVMETHOD(device_attach, mvs_attach),
445 DEVMETHOD(device_detach, mvs_detach),
446 DEVMETHOD(device_suspend, mvs_suspend),
447 DEVMETHOD(device_resume, mvs_resume),
448 DEVMETHOD(bus_print_child, mvs_print_child),
449 DEVMETHOD(bus_alloc_resource, mvs_alloc_resource),
450 DEVMETHOD(bus_release_resource, mvs_release_resource),
451 DEVMETHOD(bus_setup_intr, mvs_setup_intr),
452 DEVMETHOD(bus_teardown_intr,mvs_teardown_intr),
453 DEVMETHOD(bus_child_location_str, mvs_child_location_str),
454 DEVMETHOD(bus_get_dma_tag, mvs_get_dma_tag),
455 DEVMETHOD(mvs_edma, mvs_edma),
458 static driver_t mvs_driver = {
461 sizeof(struct mvs_controller)
463 DRIVER_MODULE(mvs, simplebus, mvs_driver, mvs_devclass, 0, 0);
464 MODULE_VERSION(mvs, 1);
465 MODULE_DEPEND(mvs, cam, 1, 1, 1);