2 * Copyright (C) 2009-2012 Semihalf
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 #include <sys/param.h>
36 #include <sys/taskqueue.h>
37 #include <sys/queue.h>
40 #include <sys/mutex.h>
41 #include <sys/malloc.h>
43 #include <dev/nand/nand_dev.h>
45 MALLOC_DECLARE(M_NAND);
48 #define NAND_CMD_READ 0x00
49 #define NAND_CMD_CHNG_READ_COL 0x05
50 #define NAND_CMD_READ_END 0x30
51 #define NAND_CMD_READ_CACHE 0x31
52 #define NAND_CMD_READ_CPBK 0x35
53 #define NAND_CMD_READ_CACHE_END 0x3F
54 #define NAND_CMD_CHNG_READ_COL_END 0xE0
57 #define NAND_CMD_ERASE 0x60
58 #define NAND_CMD_ERASE_END 0xD0
59 #define NAND_CMD_ERASE_INTLV 0xD1
61 /* Program commands */
62 #define NAND_CMD_PROG 0x80
63 #define NAND_CMD_CHNG_WRITE_COL 0x85
64 #define NAND_CMD_PROG_END 0x10
65 #define NAND_CMD_PROG_INTLV 0x11
66 #define NAND_CMD_PROG_CACHE 0x15
69 #define NAND_CMD_STATUS 0x70
70 #define NAND_CMD_STATUS_ENH 0x78
71 #define NAND_CMD_READ_ID 0x90
72 #define NAND_CMD_READ_PARAMETER 0xec
73 #define NAND_CMD_READ_UNIQUE_ID 0xed
74 #define NAND_CMD_GET_FEATURE 0xee
75 #define NAND_CMD_SET_FEATURE 0xef
78 #define NAND_CMD_SYNCH_RESET 0xfc
79 #define NAND_CMD_RESET 0xff
81 /* Small page flash commands */
82 #define NAND_CMD_SMALLA 0x00
83 #define NAND_CMD_SMALLB 0x01
84 #define NAND_CMD_SMALLOOB 0x50
86 #define NAND_STATUS_FAIL 0x1
87 #define NAND_STATUS_FAILC 0x2
88 #define NAND_STATUS_ARDY 0x20
89 #define NAND_STATUS_RDY 0x40
90 #define NAND_STATUS_WP 0x80
92 #define NAND_LP_OOB_COLUMN_START 0x800
93 #define NAND_LP_OOBSZ 0x40
94 #define NAND_SP_OOB_COLUMN_START 0x200
95 #define NAND_SP_OOBSZ 0x10
97 #define PAGE_PARAM_LENGTH 0x100
98 #define PAGE_PARAMETER_DEF 0x0
99 #define PAGE_PARAMETER_RED_1 0x100
100 #define PAGE_PARAMETER_RED_2 0x200
102 #define ONFI_SIG_ADDR 0x20
104 #define NAND_MAX_CHIPS 0x4
105 #define NAND_MAX_OOBSZ 512
106 #define NAND_MAX_PAGESZ 16384
108 #define NAND_SMALL_PAGE_SIZE 0x200
110 #define NAND_16_BIT 0x00000001
112 #define NAND_ECC_NONE 0x0
113 #define NAND_ECC_SOFT 0x1
114 #define NAND_ECC_FULLHW 0x2
115 #define NAND_ECC_PARTHW 0x4
116 #define NAND_ECC_MODE_MASK 0x7
119 #define ECC_CORRECTABLE 1
120 #define ECC_ERROR_ECC (-1)
121 #define ECC_UNCORRECTABLE (-2)
123 #define NAND_MAN_SAMSUNG 0xec
124 #define NAND_MAN_HYNIX 0xad
125 #define NAND_MAN_STMICRO 0x20
138 uint32_t pages_per_block;
142 /* nand debug levels */
143 #define NDBG_NAND 0x01
144 #define NDBG_CDEV 0x02
145 #define NDBG_GEN 0x04
146 #define NDBG_GEOM 0x08
147 #define NDBG_BUS 0x10
148 #define NDBG_SIM 0x20
149 #define NDBG_CTRL 0x40
150 #define NDBG_DRV 0x80
151 #define NDBG_ECC 0x100
153 /* nand_debug_function */
154 void nand_debug(int level, const char *fmt, ...);
155 extern int nand_debug_flag;
157 /* ONFI features bit*/
158 #define ONFI_FEAT_16BIT 0x01
159 #define ONFI_FEAT_MULT_LUN 0x02
160 #define ONFI_FEAT_INTLV_OPS 0x04
161 #define ONFI_FEAT_CPBK_RESTRICT 0x08
162 #define ONFI_FEAT_SRC_SYNCH 0x10
164 /* ONFI optional commands bits */
165 #define ONFI_OPTCOM_PROG_CACHE 0x01
166 #define ONFI_OPTCOM_READ_CACHE 0x02
167 #define ONFI_OPTCOM_GETSET_FEAT 0x04
168 #define ONFI_OPTCOM_STATUS_ENH 0x08
169 #define ONFI_OPTCOM_COPYBACK 0x10
170 #define ONFI_OPTCOM_UNIQUE_ID 0x20
173 /* Layout of parameter page is defined in ONFI */
178 uint16_t optional_commands;
180 char manufacturer_name[12];
181 char device_model[20];
182 uint8_t manufacturer_id;
185 uint32_t bytes_per_page;
186 uint16_t spare_bytes_per_page;
187 uint32_t bytes_per_partial_page;
188 uint16_t spare_bytes_per_partial_page;
189 uint32_t pages_per_block;
190 uint32_t blocks_per_lun;
192 uint8_t address_cycles;
193 uint8_t bits_per_cell;
194 uint16_t max_bad_block_per_lun;
195 uint16_t block_endurance;
196 uint8_t guaranteed_valid_blocks;
197 uint16_t valid_block_endurance;
198 uint8_t programs_per_page;
199 uint8_t partial_prog_attr;
201 uint8_t interleaved_addr_bits;
202 uint8_t interleaved_oper_attr;
204 uint8_t pin_capacitance;
205 uint16_t asynch_timing_mode_support;
206 uint16_t asynch_prog_cache_timing_mode_support;
207 uint16_t t_prog; /* us, max page program time */
208 uint16_t t_bers; /* us, max block erase time */
209 uint16_t t_r; /* us, max page read time */
210 uint16_t t_ccs; /* ns, min change column setup time */
211 uint16_t source_synch_timing_mode_support;
212 uint8_t source_synch_feat;
213 uint16_t clk_input_capacitance;
214 uint16_t io_capacitance;
215 uint16_t input_capacitance;
216 uint8_t input_capacitance_max;
217 uint8_t driver_strength_support;
220 uint8_t vendor_spec[8];
222 }__attribute__((packed));
224 struct nand_ecc_data {
225 int eccsize; /* Number of data bytes per ECC step */
227 int eccbytes; /* Number of ECC bytes per step */
229 uint16_t *eccpositions; /* Positions of ecc bytes */
230 uint8_t ecccalculated[NAND_MAX_OOBSZ];
231 uint8_t eccread[NAND_MAX_OOBSZ];
235 uint32_t ecc_succeded;
236 uint32_t ecc_corrected;
241 struct ecc_stat ecc_stat;
243 uint32_t page_raw_read;
244 uint32_t page_written;
245 uint32_t page_raw_written;
249 uint32_t block_erased;
259 uint32_t blks_per_lun;
260 uint32_t blks_per_chip;
261 uint32_t pgs_per_blk;
273 struct chip_geom chip_geom;
275 uint16_t t_prog; /* us, max page program time */
276 uint16_t t_bers; /* us, max block erase time */
277 uint16_t t_r; /* us, max page read time */
278 uint16_t t_ccs; /* ns, min change column setup time */
282 struct page_stat *pg_stat;
283 struct block_stat *blk_stat;
284 struct nand_softc *nand;
285 struct nand_bbt *bbt;
286 struct nand_ops *ops;
291 struct bio_queue_head bioq; /* bio queue */
292 struct mtx qlock; /* bioq lock */
293 struct taskqueue *tq; /* private task queue for i/o request */
294 struct task iotask; /* i/o processing */
301 char *chip_cdev_name;
302 struct nand_ecc_data ecc;
306 int nand_erase_blocks(struct nand_chip *chip, off_t offset, size_t len);
307 int nand_prog_pages(struct nand_chip *chip, uint32_t offset, uint8_t *buf,
309 int nand_read_pages(struct nand_chip *chip, uint32_t offset, void *buf,
311 int nand_read_pages_raw(struct nand_chip *chip, uint32_t offset, void *buf,
313 int nand_prog_pages_raw(struct nand_chip *chip, uint32_t offset, void *buf,
315 int nand_read_oob(struct nand_chip *chip, uint32_t page, void *buf,
317 int nand_prog_oob(struct nand_chip *chip, uint32_t page, void *buf,
320 int nand_select_cs(device_t dev, uint8_t cs);
322 int nand_read_parameter(struct nand_softc *nand, struct onfi_params *param);
323 int nand_synch_reset(struct nand_softc *nand);
324 int nand_chng_read_col(device_t dev, uint32_t col, void *buf, size_t len);
325 int nand_chng_write_col(device_t dev, uint32_t col, void *buf, size_t len);
326 int nand_get_feature(device_t dev, uint8_t feat, void* buf);
327 int nand_set_feature(device_t dev, uint8_t feat, void* buf);
330 int nand_erase_block_intlv(device_t dev, uint32_t block);
331 int nand_copyback_read(device_t dev, uint32_t page, uint32_t col,
332 void *buf, size_t len);
333 int nand_copyback_prog(device_t dev, uint32_t page, uint32_t col,
334 void *buf, size_t len);
335 int nand_copyback_prog_intlv(device_t dev, uint32_t page);
336 int nand_prog_cache(device_t dev, uint32_t page, uint32_t col,
337 void *buf, size_t len, uint8_t end);
338 int nand_prog_intlv(device_t dev, uint32_t page, uint32_t col,
339 void *buf, size_t len);
340 int nand_read_cache(device_t dev, uint32_t page, uint32_t col,
341 void *buf, size_t len, uint8_t end);
343 int nand_write_ecc(struct nand_softc *nand, uint32_t page, uint8_t *data);
344 int nand_read_ecc(struct nand_softc *nand, uint32_t page, uint8_t *data);
346 int nand_softecc_get(device_t dev, uint8_t *buf, int pagesize, uint8_t *ecc);
347 int nand_softecc_correct(device_t dev, uint8_t *buf, int pagesize,
348 uint8_t *readecc, uint8_t *calcecc);
350 /* Chip initialization */
351 void nand_init(struct nand_softc *nand, device_t dev, int ecc_mode,
352 int ecc_bytes, int ecc_size, uint16_t* eccposition, char* cdev_name);
353 void nand_detach(struct nand_softc *nand);
354 struct nand_params *nand_get_params(struct nand_id *id);
356 void nand_onfi_set_params(struct nand_chip *chip, struct onfi_params *params);
357 void nand_set_params(struct nand_chip *chip, struct nand_params *params);
358 int nand_init_stat(struct nand_chip *chip);
359 void nand_destroy_stat(struct nand_chip *chip);
362 int nand_init_bbt(struct nand_chip *chip);
363 void nand_destroy_bbt(struct nand_chip *chip);
364 int nand_update_bbt(struct nand_chip *chip);
365 int nand_mark_bad_block(struct nand_chip* chip, uint32_t block_num);
366 int nand_check_bad_block(struct nand_chip* chip, uint32_t block_num);
368 /* cdev creation/removal */
369 int nand_make_dev(struct nand_chip* chip);
370 void nand_destroy_dev(struct nand_chip *chip);
372 int create_geom_disk(struct nand_chip* chip);
373 int create_geom_raw_disk(struct nand_chip *chip);
374 void destroy_geom_disk(struct nand_chip *chip);
375 void destroy_geom_raw_disk(struct nand_chip *chip);
377 int init_chip_geom(struct chip_geom* cg, uint32_t luns, uint32_t blks_per_lun,
378 uint32_t pgs_per_blk, uint32_t pg_size, uint32_t oob_size);
379 int nand_row_to_blkpg(struct chip_geom *cg, uint32_t row, uint32_t *lun,
380 uint32_t *blk, uint32_t *pg);
381 int page_to_row(struct chip_geom *cg, uint32_t page, uint32_t *row);
382 int nand_check_page_boundary(struct nand_chip *chip, uint32_t page);
383 void nand_get_chip_param(struct nand_chip *chip, struct chip_param_io *param);
385 #endif /* _DEV_NAND_H_ */