sys/dev/nand/nand_generic.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (C) 2009-2012 Semihalf
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /* Generic NAND driver */
  30
  31 #include <sys/cdefs.h>
  32 __FBSDID("$FreeBSD$");
  33
  34 #include <sys/param.h>
  35 #include <sys/systm.h>
  36 #include <sys/proc.h>
  37 #include <sys/bus.h>
  38 #include <sys/conf.h>
  39 #include <sys/endian.h>
  40 #include <sys/kernel.h>
  41 #include <sys/module.h>
  42 #include <sys/rman.h>
  43 #include <sys/lock.h>
  44 #include <sys/mutex.h>
  45 #include <sys/time.h>
  46 #include <sys/malloc.h>
  47
  48 #include <dev/nand/nand.h>
  49 #include <dev/nand/nandbus.h>
  50 #include "nfc_if.h"
  51 #include "nand_if.h"
  52 #include "nandbus_if.h"
  53
  54
  55 static int onfi_nand_probe(device_t dev);
  56 static int large_nand_probe(device_t dev);
  57 static int small_nand_probe(device_t dev);
  58 static int generic_nand_attach(device_t dev);
  59 static int generic_nand_detach(device_t dev);
  60
  61 static int generic_erase_block(device_t, uint32_t);
  62 static int generic_erase_block_intlv(device_t, uint32_t);
  63 static int generic_read_page (device_t, uint32_t, void *, uint32_t, uint32_t);
  64 static int generic_read_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  65 static int generic_program_page(device_t, uint32_t, void *, uint32_t, uint32_t);
  66 static int generic_program_page_intlv(device_t, uint32_t, void *, uint32_t,
  67     uint32_t);
  68 static int generic_program_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  69 static int generic_is_blk_bad(device_t, uint32_t, uint8_t *);
  70 static int generic_get_ecc(device_t, void *, void *, int *);
  71 static int generic_correct_ecc(device_t, void *, void *, void *);
  72
  73 static int small_read_page(device_t, uint32_t, void *, uint32_t, uint32_t);
  74 static int small_read_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  75 static int small_program_page(device_t, uint32_t, void *, uint32_t, uint32_t);
  76 static int small_program_oob(device_t, uint32_t, void *, uint32_t, uint32_t);
  77
  78 static int onfi_is_blk_bad(device_t, uint32_t, uint8_t *);
  79 static int onfi_read_parameter(struct nand_chip *, struct onfi_chip_params *);
  80
  81 static int nand_send_address(device_t, int32_t, int32_t, int8_t);
  82
  83 static device_method_t onand_methods[] = {
  84         /* Device interface */
  85         DEVMETHOD(device_probe,                 onfi_nand_probe),
  86         DEVMETHOD(device_attach,                generic_nand_attach),
  87         DEVMETHOD(device_detach,                generic_nand_detach),
  88
  89         DEVMETHOD(nand_read_page,               generic_read_page),
  90         DEVMETHOD(nand_program_page,            generic_program_page),
  91         DEVMETHOD(nand_program_page_intlv,      generic_program_page_intlv),
  92         DEVMETHOD(nand_read_oob,                generic_read_oob),
  93         DEVMETHOD(nand_program_oob,             generic_program_oob),
  94         DEVMETHOD(nand_erase_block,             generic_erase_block),
  95         DEVMETHOD(nand_erase_block_intlv,       generic_erase_block_intlv),
  96
  97         DEVMETHOD(nand_is_blk_bad,              onfi_is_blk_bad),
  98         DEVMETHOD(nand_get_ecc,                 generic_get_ecc),
  99         DEVMETHOD(nand_correct_ecc,             generic_correct_ecc),
 100         { 0, 0 }
 101 };
 102
 103 static device_method_t lnand_methods[] = {
 104         /* Device interface */
 105         DEVMETHOD(device_probe,         large_nand_probe),
 106         DEVMETHOD(device_attach,        generic_nand_attach),
 107         DEVMETHOD(device_detach,        generic_nand_detach),
 108
 109         DEVMETHOD(nand_read_page,       generic_read_page),
 110         DEVMETHOD(nand_program_page,    generic_program_page),
 111         DEVMETHOD(nand_read_oob,        generic_read_oob),
 112         DEVMETHOD(nand_program_oob,     generic_program_oob),
 113         DEVMETHOD(nand_erase_block,     generic_erase_block),
 114
 115         DEVMETHOD(nand_is_blk_bad,      generic_is_blk_bad),
 116         DEVMETHOD(nand_get_ecc,         generic_get_ecc),
 117         DEVMETHOD(nand_correct_ecc,     generic_correct_ecc),
 118         { 0, 0 }
 119 };
 120
 121 static device_method_t snand_methods[] = {
 122         /* Device interface */
 123         DEVMETHOD(device_probe,         small_nand_probe),
 124         DEVMETHOD(device_attach,        generic_nand_attach),
 125         DEVMETHOD(device_detach,        generic_nand_detach),
 126
 127         DEVMETHOD(nand_read_page,       small_read_page),
 128         DEVMETHOD(nand_program_page,    small_program_page),
 129         DEVMETHOD(nand_read_oob,        small_read_oob),
 130         DEVMETHOD(nand_program_oob,     small_program_oob),
 131         DEVMETHOD(nand_erase_block,     generic_erase_block),
 132
 133         DEVMETHOD(nand_is_blk_bad,      generic_is_blk_bad),
 134         DEVMETHOD(nand_get_ecc,         generic_get_ecc),
 135         DEVMETHOD(nand_correct_ecc,     generic_correct_ecc),
 136         { 0, 0 }
 137 };
 138
 139 devclass_t onand_devclass;
 140 devclass_t lnand_devclass;
 141 devclass_t snand_devclass;
 142
 143 driver_t onand_driver = {
 144         "onand",
 145         onand_methods,
 146         sizeof(struct nand_chip)
 147 };
 148
 149 driver_t lnand_driver = {
 150         "lnand",
 151         lnand_methods,
 152         sizeof(struct nand_chip)
 153 };
 154
 155 driver_t snand_driver = {
 156         "snand",
 157         snand_methods,
 158         sizeof(struct nand_chip)
 159 };
 160
 161 DRIVER_MODULE(onand, nandbus, onand_driver, onand_devclass, 0, 0);
 162 DRIVER_MODULE(lnand, nandbus, lnand_driver, lnand_devclass, 0, 0);
 163 DRIVER_MODULE(snand, nandbus, snand_driver, snand_devclass, 0, 0);
 164
 165 static int
 166 onfi_nand_probe(device_t dev)
 167 {
 168         struct nandbus_ivar *ivar;
 169
 170         ivar = device_get_ivars(dev);
 171         if (ivar && ivar->is_onfi) {
 172                 device_set_desc(dev, "ONFI compliant NAND");
 173                 return (BUS_PROBE_DEFAULT);
 174         }
 175
 176         return (ENODEV);
 177 }
 178
 179 static int
 180 large_nand_probe(device_t dev)
 181 {
 182         struct nandbus_ivar *ivar;
 183
 184         ivar = device_get_ivars(dev);
 185         if (ivar && !ivar->is_onfi && ivar->params->page_size >= 512) {
 186                 device_set_desc(dev, ivar->params->name);
 187                 return (BUS_PROBE_DEFAULT);
 188         }
 189
 190         return (ENODEV);
 191 }
 192
 193 static int
 194 small_nand_probe(device_t dev)
 195 {
 196         struct nandbus_ivar *ivar;
 197
 198         ivar = device_get_ivars(dev);
 199         if (ivar && !ivar->is_onfi && ivar->params->page_size == 512) {
 200                 device_set_desc(dev, ivar->params->name);
 201                 return (BUS_PROBE_DEFAULT);
 202         }
 203
 204         return (ENODEV);
 205 }
 206
 207 static int
 208 generic_nand_attach(device_t dev)
 209 {
 210         struct nand_chip *chip;
 211         struct nandbus_ivar *ivar;
 212         struct onfi_chip_params *onfi_chip_params;
 213         device_t nandbus, nfc;
 214         int err;
 215
 216         chip = device_get_softc(dev);
 217         chip->dev = dev;
 218
 219         ivar = device_get_ivars(dev);
 220         chip->id.man_id = ivar->man_id;
 221         chip->id.dev_id = ivar->dev_id;
 222         chip->num = ivar->cs;
 223
 224         /* TODO remove when HW ECC supported */
 225         nandbus = device_get_parent(dev);
 226         nfc = device_get_parent(nandbus);
 227
 228         chip->nand = device_get_softc(nfc);
 229
 230         if (ivar->is_onfi) {
 231                 onfi_chip_params = malloc(sizeof(struct onfi_chip_params),
 232                     M_NAND, M_WAITOK | M_ZERO);
 233
 234                 if (onfi_read_parameter(chip, onfi_chip_params)) {
 235                         nand_debug(NDBG_GEN,"Could not read parameter page!\n");
 236                         free(onfi_chip_params, M_NAND);
 237                         return (ENXIO);
 238                 }
 239
 240                 nand_onfi_set_params(chip, onfi_chip_params);
 241                 /* Set proper column and row cycles */
 242                 ivar->cols = (onfi_chip_params->address_cycles >> 4) & 0xf;
 243                 ivar->rows = onfi_chip_params->address_cycles & 0xf;
 244                 free(onfi_chip_params, M_NAND);
 245
 246         } else {
 247                 nand_set_params(chip, ivar->params);
 248         }
 249
 250         err = nand_init_stat(chip);
 251         if (err) {
 252                 generic_nand_detach(dev);
 253                 return (err);
 254         }
 255
 256         err = nand_init_bbt(chip);
 257         if (err) {
 258                 generic_nand_detach(dev);
 259                 return (err);
 260         }
 261
 262         err = nand_make_dev(chip);
 263         if (err) {
 264                 generic_nand_detach(dev);
 265                 return (err);
 266         }
 267
 268         err = create_geom_disk(chip);
 269         if (err) {
 270                 generic_nand_detach(dev);
 271                 return (err);
 272         }
 273
 274         return (0);
 275 }
 276
 277 static int
 278 generic_nand_detach(device_t dev)
 279 {
 280         struct nand_chip *chip;
 281
 282         chip = device_get_softc(dev);
 283
 284         nand_destroy_bbt(chip);
 285         destroy_geom_disk(chip);
 286         nand_destroy_dev(chip);
 287         nand_destroy_stat(chip);
 288
 289         return (0);
 290 }
 291
 292 static int
 293 can_write(device_t nandbus)
 294 {
 295         uint8_t status;
 296
 297         if (NANDBUS_WAIT_READY(nandbus, &status))
 298                 return (0);
 299
 300         if (!(status & NAND_STATUS_WP)) {
 301                 nand_debug(NDBG_GEN,"Chip is write-protected");
 302                 return (0);
 303         }
 304
 305         return (1);
 306 }
 307
 308 static int
 309 check_fail(device_t nandbus)
 310 {
 311         uint8_t status;
 312
 313         NANDBUS_WAIT_READY(nandbus, &status);
 314         if (status & NAND_STATUS_FAIL) {
 315                 nand_debug(NDBG_GEN,"Status failed %x", status);
 316                 return (ENXIO);
 317         }
 318
 319         return (0);
 320 }
 321
 322 static uint16_t
 323 onfi_crc(const void *buf, size_t buflen)
 324 {
 325         int i, j;
 326         uint16_t crc;
 327         const uint8_t *bufptr;
 328
 329         bufptr = buf;
 330         crc = 0x4f4e;
 331         for (j = 0; j < buflen; j++) {
 332                 crc ^= *bufptr++ << 8;
 333                 for (i = 0; i < 8; i++)
 334                         if (crc & 0x8000)
 335                                 crc = (crc << 1) ^ 0x8005;
 336                         else
 337                                 crc <<= 1;
 338         }
 339        return crc;
 340 }
 341
 342 static int
 343 onfi_read_parameter(struct nand_chip *chip, struct onfi_chip_params *chip_params)
 344 {
 345         device_t nandbus;
 346         struct onfi_params params;
 347         int found, sigcount, trycopy;
 348
 349         nand_debug(NDBG_GEN,"read parameter");
 350
 351         nandbus = device_get_parent(chip->dev);
 352
 353         NANDBUS_SELECT_CS(nandbus, chip->num);
 354
 355         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_READ_PARAMETER))
 356                 return (ENXIO);
 357
 358         if (nand_send_address(chip->dev, -1, -1, PAGE_PARAMETER_DEF))
 359                 return (ENXIO);
 360
 361         if (NANDBUS_START_COMMAND(nandbus))
 362                 return (ENXIO);
 363
 364         /*
 365          * XXX Bogus DELAY, we really need a nandbus_wait_ready() here, but it's
 366          * not accessible from here (static to nandbus).
 367          */
 368         DELAY(1000);
 369
 370         /*
 371          * The ONFI spec mandates a minimum of three copies of the parameter
 372          * data, so loop up to 3 times trying to find good data.  Each copy is
 373          * validated by a signature of "ONFI" and a crc. There is a very strange
 374          * rule that the signature is valid if any 2 of the 4 bytes are correct.
 375          */
 376         for (found= 0, trycopy = 0; !found && trycopy < 3; trycopy++) {
 377                 NANDBUS_READ_BUFFER(nandbus, &params, sizeof(struct onfi_params));
 378                 sigcount  = params.signature[0] == 'O';
 379                 sigcount += params.signature[1] == 'N';
 380                 sigcount += params.signature[2] == 'F';
 381                 sigcount += params.signature[3] == 'I';
 382                 if (sigcount < 2)
 383                         continue;
 384                 if (onfi_crc(&params, 254) != params.crc)
 385                         continue;
 386                 found = 1;
 387         }
 388         if (!found)
 389                 return (ENXIO);
 390
 391         chip_params->luns = params.luns;
 392         chip_params->blocks_per_lun = le32dec(&params.blocks_per_lun);
 393         chip_params->pages_per_block = le32dec(&params.pages_per_block);
 394         chip_params->bytes_per_page = le32dec(&params.bytes_per_page);
 395         chip_params->spare_bytes_per_page = le16dec(&params.spare_bytes_per_page);
 396         chip_params->t_bers = le16dec(&params.t_bers);
 397         chip_params->t_prog = le16dec(&params.t_prog);
 398         chip_params->t_r = le16dec(&params.t_r);
 399         chip_params->t_ccs = le16dec(&params.t_ccs);
 400         chip_params->features = le16dec(&params.features);
 401         chip_params->address_cycles = params.address_cycles;
 402
 403         return (0);
 404 }
 405
 406 static int
 407 send_read_page(device_t nand, uint8_t start_command, uint8_t end_command,
 408     uint32_t row, uint32_t column)
 409 {
 410         device_t nandbus = device_get_parent(nand);
 411
 412         if (NANDBUS_SEND_COMMAND(nandbus, start_command))
 413                 return (ENXIO);
 414
 415         if (nand_send_address(nand, row, column, -1))
 416                 return (ENXIO);
 417
 418         if (NANDBUS_SEND_COMMAND(nandbus, end_command))
 419                 return (ENXIO);
 420
 421         if (NANDBUS_START_COMMAND(nandbus))
 422                 return (ENXIO);
 423
 424         return (0);
 425 }
 426
 427 static int
 428 generic_read_page(device_t nand, uint32_t page, void *buf, uint32_t len,
 429     uint32_t offset)
 430 {
 431         struct nand_chip *chip;
 432         struct page_stat *pg_stat;
 433         device_t nandbus;
 434         uint32_t row;
 435
 436         nand_debug(NDBG_GEN,"%p raw read page %x[%x] at %x", nand, page, len, offset);
 437         chip = device_get_softc(nand);
 438         nandbus = device_get_parent(nand);
 439
 440         if (nand_check_page_boundary(chip, page))
 441                 return (ENXIO);
 442
 443         page_to_row(&chip->chip_geom, page, &row);
 444
 445         if (send_read_page(nand, NAND_CMD_READ, NAND_CMD_READ_END, row,
 446             offset))
 447                 return (ENXIO);
 448
 449         DELAY(chip->t_r);
 450
 451         NANDBUS_READ_BUFFER(nandbus, buf, len);
 452
 453         if (check_fail(nandbus))
 454                 return (ENXIO);
 455
 456         pg_stat = &(chip->pg_stat[page]);
 457         pg_stat->page_raw_read++;
 458
 459         return (0);
 460 }
 461
 462 static int
 463 generic_read_oob(device_t nand, uint32_t page, void* buf, uint32_t len,
 464     uint32_t offset)
 465 {
 466         struct nand_chip *chip;
 467         device_t nandbus;
 468         uint32_t row;
 469
 470         nand_debug(NDBG_GEN,"%p raw read oob %x[%x] at %x", nand, page, len, offset);
 471         chip = device_get_softc(nand);
 472         nandbus = device_get_parent(nand);
 473
 474         if (nand_check_page_boundary(chip, page)) {
 475                 nand_debug(NDBG_GEN,"page boundary check failed: %08x\n", page);
 476                 return (ENXIO);
 477         }
 478
 479         page_to_row(&chip->chip_geom, page, &row);
 480
 481         offset += chip->chip_geom.page_size;
 482
 483         if (send_read_page(nand, NAND_CMD_READ, NAND_CMD_READ_END, row,
 484             offset))
 485                 return (ENXIO);
 486
 487         DELAY(chip->t_r);
 488
 489         NANDBUS_READ_BUFFER(nandbus, buf, len);
 490
 491         if (check_fail(nandbus))
 492                 return (ENXIO);
 493
 494         return (0);
 495 }
 496
 497 static int
 498 send_start_program_page(device_t nand, uint32_t row, uint32_t column)
 499 {
 500         device_t nandbus = device_get_parent(nand);
 501
 502         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_PROG))
 503                 return (ENXIO);
 504
 505         if (nand_send_address(nand, row, column, -1))
 506                 return (ENXIO);
 507
 508         return (0);
 509 }
 510
 511 static int
 512 send_end_program_page(device_t nandbus, uint8_t end_command)
 513 {
 514
 515         if (NANDBUS_SEND_COMMAND(nandbus, end_command))
 516                 return (ENXIO);
 517
 518         if (NANDBUS_START_COMMAND(nandbus))
 519                 return (ENXIO);
 520
 521         return (0);
 522 }
 523
 524 static int
 525 generic_program_page(device_t nand, uint32_t page, void *buf, uint32_t len,
 526     uint32_t offset)
 527 {
 528         struct nand_chip *chip;
 529         struct page_stat *pg_stat;
 530         device_t nandbus;
 531         uint32_t row;
 532
 533         nand_debug(NDBG_GEN,"%p raw prog page %x[%x] at %x", nand, page, len,
 534             offset);
 535         chip = device_get_softc(nand);
 536         nandbus = device_get_parent(nand);
 537
 538         if (nand_check_page_boundary(chip, page))
 539                 return (ENXIO);
 540
 541         page_to_row(&chip->chip_geom, page, &row);
 542
 543         if (!can_write(nandbus))
 544                 return (ENXIO);
 545
 546         if (send_start_program_page(nand, row, offset))
 547                 return (ENXIO);
 548
 549         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 550
 551         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 552                 return (ENXIO);
 553
 554         DELAY(chip->t_prog);
 555
 556         if (check_fail(nandbus))
 557                 return (ENXIO);
 558
 559         pg_stat = &(chip->pg_stat[page]);
 560         pg_stat->page_raw_written++;
 561
 562         return (0);
 563 }
 564
 565 static int
 566 generic_program_page_intlv(device_t nand, uint32_t page, void *buf,
 567     uint32_t len, uint32_t offset)
 568 {
 569         struct nand_chip *chip;
 570         struct page_stat *pg_stat;
 571         device_t nandbus;
 572         uint32_t row;
 573
 574         nand_debug(NDBG_GEN,"%p raw prog page %x[%x] at %x", nand, page, len, offset);
 575         chip = device_get_softc(nand);
 576         nandbus = device_get_parent(nand);
 577
 578         if (nand_check_page_boundary(chip, page))
 579                 return (ENXIO);
 580
 581         page_to_row(&chip->chip_geom, page, &row);
 582
 583         if (!can_write(nandbus))
 584                 return (ENXIO);
 585
 586         if (send_start_program_page(nand, row, offset))
 587                 return (ENXIO);
 588
 589         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 590
 591         if (send_end_program_page(nandbus, NAND_CMD_PROG_INTLV))
 592                 return (ENXIO);
 593
 594         DELAY(chip->t_prog);
 595
 596         if (check_fail(nandbus))
 597                 return (ENXIO);
 598
 599         pg_stat = &(chip->pg_stat[page]);
 600         pg_stat->page_raw_written++;
 601
 602         return (0);
 603 }
 604
 605 static int
 606 generic_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len,
 607     uint32_t offset)
 608 {
 609         struct nand_chip *chip;
 610         device_t nandbus;
 611         uint32_t row;
 612
 613         nand_debug(NDBG_GEN,"%p raw prog oob %x[%x] at %x", nand, page, len,
 614             offset);
 615         chip = device_get_softc(nand);
 616         nandbus = device_get_parent(nand);
 617
 618         if (nand_check_page_boundary(chip, page))
 619                 return (ENXIO);
 620
 621         page_to_row(&chip->chip_geom, page, &row);
 622         offset += chip->chip_geom.page_size;
 623
 624         if (!can_write(nandbus))
 625                 return (ENXIO);
 626
 627         if (send_start_program_page(nand, row, offset))
 628                 return (ENXIO);
 629
 630         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 631
 632         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 633                 return (ENXIO);
 634
 635         DELAY(chip->t_prog);
 636
 637         if (check_fail(nandbus))
 638                 return (ENXIO);
 639
 640         return (0);
 641 }
 642
 643 static int
 644 send_erase_block(device_t nand, uint32_t row, uint8_t second_command)
 645 {
 646         device_t nandbus = device_get_parent(nand);
 647
 648         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_ERASE))
 649                 return (ENXIO);
 650
 651         if (nand_send_address(nand, row, -1, -1))
 652                 return (ENXIO);
 653
 654         if (NANDBUS_SEND_COMMAND(nandbus, second_command))
 655                 return (ENXIO);
 656
 657         if (NANDBUS_START_COMMAND(nandbus))
 658                 return (ENXIO);
 659
 660         return (0);
 661 }
 662
 663 static int
 664 generic_erase_block(device_t nand, uint32_t block)
 665 {
 666         struct block_stat *blk_stat;
 667         struct nand_chip *chip;
 668         device_t nandbus;
 669         int row;
 670
 671         nand_debug(NDBG_GEN,"%p erase block  %x", nand, block);
 672         nandbus = device_get_parent(nand);
 673         chip = device_get_softc(nand);
 674
 675         if (block >= (chip->chip_geom.blks_per_lun * chip->chip_geom.luns))
 676                 return (ENXIO);
 677
 678         row = (block << chip->chip_geom.blk_shift) &
 679             chip->chip_geom.blk_mask;
 680
 681         nand_debug(NDBG_GEN,"%p erase block  row %x", nand, row);
 682
 683         if (!can_write(nandbus))
 684                 return (ENXIO);
 685
 686         send_erase_block(nand, row, NAND_CMD_ERASE_END);
 687
 688         DELAY(chip->t_bers);
 689
 690         if (check_fail(nandbus))
 691                 return (ENXIO);
 692
 693         blk_stat = &(chip->blk_stat[block]);
 694         blk_stat->block_erased++;
 695
 696         return (0);
 697 }
 698
 699 static int
 700 generic_erase_block_intlv(device_t nand, uint32_t block)
 701 {
 702         struct block_stat *blk_stat;
 703         struct nand_chip *chip;
 704         device_t nandbus;
 705         int row;
 706
 707         nand_debug(NDBG_GEN,"%p erase block  %x", nand, block);
 708         nandbus = device_get_parent(nand);
 709         chip = device_get_softc(nand);
 710
 711         if (block >= (chip->chip_geom.blks_per_lun * chip->chip_geom.luns))
 712                 return (ENXIO);
 713
 714         row = (block << chip->chip_geom.blk_shift) &
 715             chip->chip_geom.blk_mask;
 716
 717         if (!can_write(nandbus))
 718                 return (ENXIO);
 719
 720         send_erase_block(nand, row, NAND_CMD_ERASE_INTLV);
 721
 722         DELAY(chip->t_bers);
 723
 724         if (check_fail(nandbus))
 725                 return (ENXIO);
 726
 727         blk_stat = &(chip->blk_stat[block]);
 728         blk_stat->block_erased++;
 729
 730         return (0);
 731
 732 }
 733
 734 static int
 735 onfi_is_blk_bad(device_t device, uint32_t block_number, uint8_t *bad)
 736 {
 737         struct nand_chip *chip;
 738         int page_number, i, j, err;
 739         uint8_t *oob;
 740
 741         chip = device_get_softc(device);
 742
 743         oob = malloc(chip->chip_geom.oob_size, M_NAND, M_WAITOK);
 744
 745         page_number = block_number * chip->chip_geom.pgs_per_blk;
 746         *bad = 0;
 747         /* Check OOB of first and last page */
 748         for (i = 0; i < 2; i++, page_number+= chip->chip_geom.pgs_per_blk - 1) {
 749                 err = generic_read_oob(device, page_number, oob,
 750                     chip->chip_geom.oob_size, 0);
 751                 if (err) {
 752                         device_printf(device, "%s: cannot allocate oob\n",
 753                             __func__);
 754                         free(oob, M_NAND);
 755                         return (ENOMEM);
 756                 }
 757
 758                 for (j = 0; j < chip->chip_geom.oob_size; j++) {
 759                         if (!oob[j]) {
 760                                 *bad = 1;
 761                                 free(oob, M_NAND);
 762                                 return (0);
 763                         }
 764                 }
 765         }
 766
 767         free(oob, M_NAND);
 768
 769         return (0);
 770 }
 771
 772 static int
 773 send_small_read_page(device_t nand, uint8_t start_command,
 774     uint32_t row, uint32_t column)
 775 {
 776         device_t nandbus = device_get_parent(nand);
 777
 778         if (NANDBUS_SEND_COMMAND(nandbus, start_command))
 779                 return (ENXIO);
 780
 781         if (nand_send_address(nand, row, column, -1))
 782                 return (ENXIO);
 783
 784         if (NANDBUS_START_COMMAND(nandbus))
 785                 return (ENXIO);
 786
 787         return (0);
 788 }
 789
 790
 791 static int
 792 small_read_page(device_t nand, uint32_t page, void *buf, uint32_t len,
 793     uint32_t offset)
 794 {
 795         struct nand_chip *chip;
 796         struct page_stat *pg_stat;
 797         device_t nandbus;
 798         uint32_t row;
 799
 800         nand_debug(NDBG_GEN,"%p small read page %x[%x] at %x", nand, page, len, offset);
 801         chip = device_get_softc(nand);
 802         nandbus = device_get_parent(nand);
 803
 804         if (nand_check_page_boundary(chip, page))
 805                 return (ENXIO);
 806
 807         page_to_row(&chip->chip_geom, page, &row);
 808
 809         if (offset < 256) {
 810                 if (send_small_read_page(nand, NAND_CMD_SMALLA, row, offset))
 811                         return (ENXIO);
 812         } else {
 813                 offset -= 256;
 814                 if (send_small_read_page(nandbus, NAND_CMD_SMALLB, row, offset))
 815                         return (ENXIO);
 816         }
 817
 818         DELAY(chip->t_r);
 819
 820         NANDBUS_READ_BUFFER(nandbus, buf, len);
 821
 822         if (check_fail(nandbus))
 823                 return (ENXIO);
 824
 825         pg_stat = &(chip->pg_stat[page]);
 826         pg_stat->page_raw_read++;
 827
 828         return (0);
 829 }
 830
 831 static int
 832 small_read_oob(device_t nand, uint32_t page, void *buf, uint32_t len,
 833     uint32_t offset)
 834 {
 835         struct nand_chip *chip;
 836         struct page_stat *pg_stat;
 837         device_t nandbus;
 838         uint32_t row;
 839
 840         nand_debug(NDBG_GEN,"%p small read oob %x[%x] at %x", nand, page, len, offset);
 841         chip = device_get_softc(nand);
 842         nandbus = device_get_parent(nand);
 843
 844         if (nand_check_page_boundary(chip, page))
 845                 return (ENXIO);
 846
 847         page_to_row(&chip->chip_geom, page, &row);
 848
 849         if (send_small_read_page(nand, NAND_CMD_SMALLOOB, row, 0))
 850                 return (ENXIO);
 851
 852         DELAY(chip->t_r);
 853
 854         NANDBUS_READ_BUFFER(nandbus, buf, len);
 855
 856         if (check_fail(nandbus))
 857                 return (ENXIO);
 858
 859         pg_stat = &(chip->pg_stat[page]);
 860         pg_stat->page_raw_read++;
 861
 862         return (0);
 863 }
 864
 865 static int
 866 small_program_page(device_t nand, uint32_t page, void* buf, uint32_t len,
 867     uint32_t offset)
 868 {
 869         struct nand_chip *chip;
 870         device_t nandbus;
 871         uint32_t row;
 872
 873         nand_debug(NDBG_GEN,"%p small prog page %x[%x] at %x", nand, page, len, offset);
 874         chip = device_get_softc(nand);
 875         nandbus = device_get_parent(nand);
 876
 877         if (nand_check_page_boundary(chip, page))
 878                 return (ENXIO);
 879
 880         page_to_row(&chip->chip_geom, page, &row);
 881
 882         if (!can_write(nandbus))
 883                 return (ENXIO);
 884
 885         if (offset < 256) {
 886                 if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SMALLA))
 887                         return (ENXIO);
 888         } else {
 889                 if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SMALLB))
 890                         return (ENXIO);
 891         }
 892
 893         if (send_start_program_page(nand, row, offset))
 894                 return (ENXIO);
 895
 896         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 897
 898         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 899                 return (ENXIO);
 900
 901         DELAY(chip->t_prog);
 902
 903         if (check_fail(nandbus))
 904                 return (ENXIO);
 905
 906         return (0);
 907 }
 908
 909 static int
 910 small_program_oob(device_t nand, uint32_t page, void* buf, uint32_t len,
 911     uint32_t offset)
 912 {
 913         struct nand_chip *chip;
 914         device_t nandbus;
 915         uint32_t row;
 916
 917         nand_debug(NDBG_GEN,"%p small prog oob %x[%x] at %x", nand, page, len, offset);
 918         chip = device_get_softc(nand);
 919         nandbus = device_get_parent(nand);
 920
 921         if (nand_check_page_boundary(chip, page))
 922                 return (ENXIO);
 923
 924         page_to_row(&chip->chip_geom, page, &row);
 925
 926         if (!can_write(nandbus))
 927                 return (ENXIO);
 928
 929         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SMALLOOB))
 930                 return (ENXIO);
 931
 932         if (send_start_program_page(nand, row, offset))
 933                 return (ENXIO);
 934
 935         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
 936
 937         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
 938                 return (ENXIO);
 939
 940         DELAY(chip->t_prog);
 941
 942         if (check_fail(nandbus))
 943                 return (ENXIO);
 944
 945         return (0);
 946 }
 947
 948 int
 949 nand_send_address(device_t nand, int32_t row, int32_t col, int8_t id)
 950 {
 951         struct nandbus_ivar *ivar;
 952         device_t nandbus;
 953         uint8_t addr;
 954         int err = 0;
 955         int i;
 956
 957         nandbus = device_get_parent(nand);
 958         ivar = device_get_ivars(nand);
 959
 960         if (id != -1) {
 961                 nand_debug(NDBG_GEN,"send_address: send id %02x", id);
 962                 err = NANDBUS_SEND_ADDRESS(nandbus, id);
 963         }
 964
 965         if (!err && col != -1) {
 966                 for (i = 0; i < ivar->cols; i++, col >>= 8) {
 967                         addr = (uint8_t)(col & 0xff);
 968                         nand_debug(NDBG_GEN,"send_address: send address column "
 969                             "%02x", addr);
 970                         err = NANDBUS_SEND_ADDRESS(nandbus, addr);
 971                         if (err)
 972                                 break;
 973                 }
 974         }
 975
 976         if (!err && row != -1) {
 977                 for (i = 0; i < ivar->rows; i++, row >>= 8) {
 978                         addr = (uint8_t)(row & 0xff);
 979                         nand_debug(NDBG_GEN,"send_address: send address row "
 980                             "%02x", addr);
 981                         err = NANDBUS_SEND_ADDRESS(nandbus, addr);
 982                         if (err)
 983                                 break;
 984                 }
 985         }
 986
 987         return (err);
 988 }
 989
 990 static int
 991 generic_is_blk_bad(device_t dev, uint32_t block, uint8_t *bad)
 992 {
 993         struct nand_chip *chip;
 994         int page_number, err, i;
 995         uint8_t *oob;
 996
 997         chip = device_get_softc(dev);
 998
 999         oob = malloc(chip->chip_geom.oob_size, M_NAND, M_WAITOK);
1000
1001         page_number = block * chip->chip_geom.pgs_per_blk;
1002         *bad = 0;
1003
1004         /* Check OOB of first and second page */
1005         for (i = 0; i < 2; i++) {
1006                 err = NAND_READ_OOB(dev, page_number + i, oob,
1007                     chip->chip_geom.oob_size, 0);
1008                 if (err) {
1009                         device_printf(dev, "%s: cannot allocate OOB\n",
1010                             __func__);
1011                         free(oob, M_NAND);
1012                         return (ENOMEM);
1013                 }
1014
1015                 if (!oob[0]) {
1016                         *bad = 1;
1017                         free(oob, M_NAND);
1018                         return (0);
1019                 }
1020         }
1021
1022         free(oob, M_NAND);
1023
1024         return (0);
1025 }
1026
1027 static int
1028 generic_get_ecc(device_t dev, void *buf, void *ecc, int *needwrite)
1029 {
1030         struct nand_chip *chip = device_get_softc(dev);
1031         struct chip_geom *cg = &chip->chip_geom;
1032
1033         return (NANDBUS_GET_ECC(device_get_parent(dev), buf, cg->page_size,
1034             ecc, needwrite));
1035 }
1036
1037 static int
1038 generic_correct_ecc(device_t dev, void *buf, void *readecc, void *calcecc)
1039 {
1040         struct nand_chip *chip = device_get_softc(dev);
1041         struct chip_geom *cg = &chip->chip_geom;
1042
1043         return (NANDBUS_CORRECT_ECC(device_get_parent(dev), buf,
1044             cg->page_size, readecc, calcecc));
1045 }
1046
1047
1048 #if 0
1049 int
1050 nand_chng_read_col(device_t nand, uint32_t col, void *buf, size_t len)
1051 {
1052         struct nand_chip *chip;
1053         device_t nandbus;
1054
1055         chip = device_get_softc(nand);
1056         nandbus = device_get_parent(nand);
1057
1058         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_READ_COL))
1059                 return (ENXIO);
1060
1061         if (NANDBUS_SEND_ADDRESS(nandbus, -1, col, -1))
1062                 return (ENXIO);
1063
1064         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_READ_COL_END))
1065                 return (ENXIO);
1066
1067         if (NANDBUS_START_COMMAND(nandbus))
1068                 return (ENXIO);
1069
1070         if (buf != NULL && len > 0)
1071                 NANDBUS_READ_BUFFER(nandbus, buf, len);
1072
1073         return (0);
1074 }
1075
1076 int
1077 nand_chng_write_col(device_t dev, uint32_t col, void *buf,
1078     size_t len)
1079 {
1080         struct nand_chip *chip;
1081         device_t nandbus;
1082
1083         chip = device_get_softc(dev);
1084         nandbus = device_get_parent(dev);
1085
1086         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_WRITE_COL))
1087                 return (ENXIO);
1088
1089         if (NANDBUS_SEND_ADDRESS(nandbus, -1, col, -1))
1090                 return (ENXIO);
1091
1092         if (buf != NULL && len > 0)
1093                 NANDBUS_WRITE_BUFFER(nandbus, buf, len);
1094
1095         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_READ_COL_END))
1096                 return (ENXIO);
1097
1098         if (NANDBUS_START_COMMAND(nandbus))
1099                 return (ENXIO);
1100
1101         return (0);
1102 }
1103
1104 int
1105 nand_copyback_read(device_t dev, uint32_t page, uint32_t col,
1106     void *buf, size_t len)
1107 {
1108         struct nand_chip *chip;
1109         struct page_stat *pg_stat;
1110         device_t nandbus;
1111         uint32_t row;
1112
1113         nand_debug(NDBG_GEN," raw read page %x[%x] at %x", page, col, len);
1114         chip = device_get_softc(dev);
1115         nandbus = device_get_parent(dev);
1116
1117         if (nand_check_page_boundary(chip, page))
1118                 return (ENXIO);
1119
1120         page_to_row(&chip->chip_geom, page, &row);
1121
1122         if (send_read_page(nand, NAND_CMD_READ, NAND_CMD_READ_CPBK, row, 0))
1123                 return (ENXIO);
1124
1125         DELAY(chip->t_r);
1126         if (check_fail(nandbus))
1127                 return (ENXIO);
1128
1129         if (buf != NULL && len > 0)
1130                 NANDBUS_READ_BUFFER(nandbus, buf, len);
1131
1132         pg_stat = &(chip->pg_stat[page]);
1133         pg_stat->page_raw_read++;
1134
1135         return (0);
1136 }
1137
1138 int
1139 nand_copyback_prog(device_t dev, uint32_t page, uint32_t col,
1140     void *buf, size_t len)
1141 {
1142         struct nand_chip *chip;
1143         struct page_stat *pg_stat;
1144         device_t nandbus;
1145         uint32_t row;
1146
1147         nand_debug(NDBG_GEN,"copyback prog page %x[%x]",  page, len);
1148         chip = device_get_softc(dev);
1149         nandbus = device_get_parent(dev);
1150
1151         if (nand_check_page_boundary(chip, page))
1152                 return (ENXIO);
1153
1154         page_to_row(&chip->chip_geom, page, &row);
1155
1156         if (!can_write(nandbus))
1157                 return (ENXIO);
1158
1159         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_CHNG_WRITE_COL))
1160                 return (ENXIO);
1161
1162         if (NANDBUS_SEND_ADDRESS(nandbus, row, col, -1))
1163                 return (ENXIO);
1164
1165         if (buf != NULL && len > 0)
1166                 NANDBUS_WRITE_BUFFER(nandbus, buf, len);
1167
1168         if (send_end_program_page(nandbus, NAND_CMD_PROG_END))
1169                 return (ENXIO);
1170
1171         DELAY(chip->t_prog);
1172
1173         if (check_fail(nandbus))
1174                 return (ENXIO);
1175
1176         pg_stat = &(chip->pg_stat[page]);
1177         pg_stat->page_raw_written++;
1178
1179         return (0);
1180 }
1181
1182 int
1183 nand_copyback_prog_intlv(device_t dev, uint32_t page)
1184 {
1185         struct nand_chip *chip;
1186         struct page_stat *pg_stat;
1187         device_t nandbus;
1188         uint32_t row;
1189
1190         nand_debug(NDBG_GEN,"cache prog page %x", page);
1191         chip = device_get_softc(dev);
1192         nandbus = device_get_parent(dev);
1193
1194         if (nand_check_page_boundary(chip, page))
1195                 return (ENXIO);
1196
1197         page_to_row(&chip->chip_geom, page, &row);
1198
1199         if (!can_write(nandbus))
1200                 return (ENXIO);
1201
1202         if (send_start_program_page(nand, row, 0))
1203                 return (ENXIO);
1204
1205         if (send_end_program_page(nandbus, NAND_CMD_PROG_INTLV))
1206                 return (ENXIO);
1207
1208         DELAY(chip->t_prog);
1209
1210         if (check_fail(nandbus))
1211                 return (ENXIO);
1212
1213         pg_stat = &(chip->pg_stat[page]);
1214         pg_stat->page_raw_written++;
1215
1216         return (0);
1217 }
1218
1219 int
1220 nand_prog_cache(device_t dev, uint32_t page, uint32_t col,
1221     void *buf, size_t len, uint8_t end)
1222 {
1223         struct nand_chip *chip;
1224         struct page_stat *pg_stat;
1225         device_t nandbus;
1226         uint32_t row;
1227         uint8_t command;
1228
1229         nand_debug(NDBG_GEN,"cache prog page %x[%x]",  page, len);
1230         chip = device_get_softc(dev);
1231         nandbus = device_get_parent(dev);
1232
1233         if (nand_check_page_boundary(chip, page))
1234                 return (ENXIO);
1235
1236         page_to_row(&chip->chip_geom, page, &row);
1237
1238         if (!can_write(nandbus))
1239                 return (ENXIO);
1240
1241         if (send_start_program_page(dev, row, 0))
1242                 return (ENXIO);
1243
1244         NANDBUS_WRITE_BUFFER(nandbus, buf, len);
1245
1246         if (end)
1247                 command = NAND_CMD_PROG_END;
1248         else
1249                 command = NAND_CMD_PROG_CACHE;
1250
1251         if (send_end_program_page(nandbus, command))
1252                 return (ENXIO);
1253
1254         DELAY(chip->t_prog);
1255
1256         if (check_fail(nandbus))
1257                 return (ENXIO);
1258
1259         pg_stat = &(chip->pg_stat[page]);
1260         pg_stat->page_raw_written++;
1261
1262         return (0);
1263 }
1264
1265 int
1266 nand_read_cache(device_t dev, uint32_t page, uint32_t col,
1267     void *buf, size_t len, uint8_t end)
1268 {
1269         struct nand_chip *chip;
1270         struct page_stat *pg_stat;
1271         device_t nandbus;
1272         uint32_t row;
1273         uint8_t command;
1274
1275         nand_debug(NDBG_GEN,"cache read page %x[%x] ", page, len);
1276         chip = device_get_softc(dev);
1277         nandbus = device_get_parent(dev);
1278
1279         if (nand_check_page_boundary(chip, page))
1280                 return (ENXIO);
1281
1282         page_to_row(&chip->chip_geom, page, &row);
1283
1284         if (page != -1) {
1285                 if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_READ))
1286                         return (ENXIO);
1287
1288                 if (NANDBUS_SEND_ADDRESS(nandbus, row, col, -1))
1289                         return (ENXIO);
1290         }
1291
1292         if (end)
1293                 command = NAND_CMD_READ_CACHE_END;
1294         else
1295                 command = NAND_CMD_READ_CACHE;
1296
1297         if (NANDBUS_SEND_COMMAND(nandbus, command))
1298                 return (ENXIO);
1299
1300         if (NANDBUS_START_COMMAND(nandbus))
1301                 return (ENXIO);
1302
1303         DELAY(chip->t_r);
1304         if (check_fail(nandbus))
1305                 return (ENXIO);
1306
1307         if (buf != NULL && len > 0)
1308                 NANDBUS_READ_BUFFER(nandbus, buf, len);
1309
1310         pg_stat = &(chip->pg_stat[page]);
1311         pg_stat->page_raw_read++;
1312
1313         return (0);
1314 }
1315
1316 int
1317 nand_get_feature(device_t dev, uint8_t feat, void *buf)
1318 {
1319         struct nand_chip *chip;
1320         device_t nandbus;
1321
1322         nand_debug(NDBG_GEN,"nand get feature");
1323
1324         chip = device_get_softc(dev);
1325         nandbus = device_get_parent(dev);
1326
1327         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_GET_FEATURE))
1328                 return (ENXIO);
1329
1330         if (NANDBUS_SEND_ADDRESS(nandbus, -1, -1, feat))
1331                 return (ENXIO);
1332
1333         if (NANDBUS_START_COMMAND(nandbus))
1334                 return (ENXIO);
1335
1336         DELAY(chip->t_r);
1337         NANDBUS_READ_BUFFER(nandbus, buf, 4);
1338
1339         return (0);
1340 }
1341
1342 int
1343 nand_set_feature(device_t dev, uint8_t feat, void *buf)
1344 {
1345         struct nand_chip *chip;
1346         device_t nandbus;
1347
1348         nand_debug(NDBG_GEN,"nand set feature");
1349
1350         chip = device_get_softc(dev);
1351         nandbus = device_get_parent(dev);
1352
1353         if (NANDBUS_SEND_COMMAND(nandbus, NAND_CMD_SET_FEATURE))
1354                 return (ENXIO);
1355
1356         if (NANDBUS_SEND_ADDRESS(nandbus, -1, -1, feat))
1357                 return (ENXIO);
1358
1359         NANDBUS_WRITE_BUFFER(nandbus, buf, 4);
1360
1361         if (NANDBUS_START_COMMAND(nandbus))
1362                 return (ENXIO);
1363
1364         return (0);
1365 }
1366 #endif