2 * Copyright (c) 2017 Stormshield.
3 * Copyright (c) 2017 Semihalf.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
31 #ifndef _IF_MVNETAVAR_H_
32 #define _IF_MVNETAVAR_H_
35 #define MVNETA_HWHEADER_SIZE 2 /* Marvell Header */
36 #define MVNETA_ETHER_SIZE 22 /* Maximum ether size */
37 #define MVNETA_A370_MAX_CSUM_MTU 1600 /* Max frame len for TX csum */
38 #define MVNETA_A3700_MAX_CSUM_MTU 9600
40 #define MVNETA_MAX_FRAME (MJUM9BYTES)
43 * Default limit of queue length
45 * queue 0 is lowest priority and queue 7 is highest priority.
46 * IP packet is received on queue 7 by default.
48 #define MVNETA_TX_RING_CNT 512
49 #define MVNETA_RX_RING_CNT 256
51 #define MVNETA_BUFRING_SIZE 1024
53 #define MVNETA_PACKET_OFFSET 64
55 #define MVNETA_RXTH_COUNT 128
56 #define MVNETA_RX_REFILL_COUNT 8
57 #define MVNETA_TX_RECLAIM_COUNT 32
60 * Device Register access
62 #define MVNETA_READ(sc, reg) \
63 bus_read_4((sc)->res[0], (reg))
64 #define MVNETA_WRITE(sc, reg, val) \
65 bus_write_4((sc)->res[0], (reg), (val))
67 #define MVNETA_READ_REGION(sc, reg, val, c) \
68 bus_read_region_4((sc)->res[0], (reg), (val), (c))
69 #define MVNETA_WRITE_REGION(sc, reg, val, c) \
70 bus_write_region_4((sc)->res[0], (reg), (val), (c))
72 #define MVNETA_READ_MIB_4(sc, reg) \
73 bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
74 #define MVNETA_READ_MIB_8(sc, reg) \
75 bus_read_8((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
77 #define MVNETA_IS_LINKUP(sc) \
78 (MVNETA_READ((sc), MVNETA_PSR) & MVNETA_PSR_LINKUP)
80 #define MVNETA_IS_QUEUE_SET(queues, q) \
81 ((((queues) >> (q)) & 0x1))
84 * EEE: Lower Power Idle config
85 * Default timer is duration of MTU sized frame transmission.
86 * The timer can be negotiated by LLDP protocol, but we have no
89 #define MVNETA_LPI_TS (ETHERMTU * 8 / 1000) /* [us] */
90 #define MVNETA_LPI_TW (ETHERMTU * 8 / 1000) /* [us] */
91 #define MVNETA_LPI_LI (ETHERMTU * 8 / 1000) /* [us] */
96 * the ethernet device has 8 rx/tx DMA queues. each of queue has its own
97 * decriptor list. descriptors are simply index by counter inside the device.
99 #define MVNETA_TX_SEGLIMIT 32
101 #define MVNETA_QUEUE_IDLE 1
102 #define MVNETA_QUEUE_WORKING 2
103 #define MVNETA_QUEUE_DISABLED 3
106 struct mbuf * m; /* pointer to related mbuf */
110 struct mvneta_rx_ring {
112 /* Real descriptors array. shared by RxDMA */
113 struct mvneta_rx_desc *desc;
114 bus_dmamap_t desc_map;
117 /* Virtual address of the RX buffer */
118 void *rxbuf_virt_addr[MVNETA_RX_RING_CNT];
120 /* Managment entries for each of descritors */
121 struct mvneta_buf rxbuf[MVNETA_RX_RING_CNT];
131 int queue_th_received;
132 int queue_th_time; /* [Tclk] */
136 boolean_t lro_enabled;
137 /* Is this queue out of mbuf */
138 boolean_t needs_refill;
139 } __aligned(CACHE_LINE_SIZE);
141 struct mvneta_tx_ring {
142 /* Index of this queue */
146 /* Ring buffer for IFNET */
148 /* Real descriptors array. shared by TxDMA */
149 struct mvneta_tx_desc *desc;
150 bus_dmamap_t desc_map;
153 /* Managment entries for each of descritors */
154 struct mvneta_buf txbuf[MVNETA_TX_RING_CNT];
165 #define MVNETA_WATCHDOG_TXCOMP (hz / 10) /* 100ms */
166 #define MVNETA_WATCHDOG (10 * hz) /* 10s */
169 boolean_t queue_hung;
173 struct taskqueue *taskq;
177 } __aligned(CACHE_LINE_SIZE);
180 tx_counter_adv(int ctr, int n)
184 while (__predict_false(ctr >= MVNETA_TX_RING_CNT))
185 ctr -= MVNETA_TX_RING_CNT;
191 rx_counter_adv(int ctr, int n)
195 while (__predict_false(ctr >= MVNETA_RX_RING_CNT))
196 ctr -= MVNETA_RX_RING_CNT;
204 #define MVNETA_PHY_TIMEOUT 10000 /* msec */
205 #define RX_DISABLE_TIMEOUT 0x1000000 /* times */
206 #define TX_DISABLE_TIMEOUT 0x1000000 /* times */
207 #define TX_FIFO_EMPTY_TIMEOUT 0x1000000 /* times */
212 #define KASSERT_SC_MTX(sc) \
213 KASSERT(mtx_owned(&(sc)->mtx), ("SC mutex not owned"))
214 #define KASSERT_BM_MTX(sc) \
215 KASSERT(mtx_owned(&(sc)->bm.bm_mtx), ("BM mutex not owned"))
216 #define KASSERT_RX_MTX(sc, q) \
217 KASSERT(mtx_owned(&(sc)->rx_ring[(q)].ring_mtx),\
218 ("RX mutex not owned"))
219 #define KASSERT_TX_MTX(sc, q) \
220 KASSERT(mtx_owned(&(sc)->tx_ring[(q)].ring_mtx),\
221 ("TX mutex not owned"))
224 * sysctl(9) parameters
226 struct mvneta_sysctl_queue {
227 struct mvneta_softc *sc;
231 #define MVNETA_SYSCTL_RX 0
232 #define MVNETA_SYSCTL_TX 1
234 struct mvneta_sysctl_mib {
235 struct mvneta_softc *sc;
240 enum mvneta_phy_mode {
248 * Ethernet Device main context
250 DECLARE_CLASS(mvneta_driver);
252 struct mvneta_softc {
256 * mtx must be held by interface functions to/from
257 * other frameworks. interrupt hander, sysctl hander,
258 * ioctl hander, and so on.
261 struct resource *res[2];
265 uint32_t mvneta_if_flags;
266 uint32_t mvneta_media;
267 uint32_t tx_csum_limit;
268 uint32_t rx_frame_size;
271 enum mvneta_phy_mode phy_mode;
273 int phy_speed; /* PHY speed */
274 boolean_t phy_fdx; /* Full duplex mode */
275 boolean_t autoneg; /* Autonegotiation status */
276 boolean_t use_inband_status; /* In-band link status */
283 struct mii_data *mii;
284 uint8_t enaddr[ETHER_ADDR_LEN];
285 struct ifmedia mvneta_ifmedia;
287 bus_dma_tag_t rx_dtag;
288 bus_dma_tag_t rxbuf_dtag;
289 bus_dma_tag_t tx_dtag;
290 bus_dma_tag_t txmbuf_dtag;
291 struct mvneta_rx_ring rx_ring[MVNETA_RX_QNUM_MAX];
292 struct mvneta_tx_ring tx_ring[MVNETA_TX_QNUM_MAX];
297 struct callout tick_ch;
306 struct mvneta_sysctl_queue sysctl_rx_queue[MVNETA_RX_QNUM_MAX];
307 struct mvneta_sysctl_queue sysctl_tx_queue[MVNETA_TX_QNUM_MAX];
312 struct mvneta_sysctl_mib sysctl_mib[MVNETA_PORTMIB_NOCOUNTER];
313 uint64_t counter_pdfc;
314 uint64_t counter_pofc;
315 uint32_t counter_watchdog; /* manual reset when clearing mib */
316 uint32_t counter_watchdog_mib; /* reset after each mib update */
318 #define MVNETA_RX_RING(sc, q) \
319 (&(sc)->rx_ring[(q)])
320 #define MVNETA_TX_RING(sc, q) \
321 (&(sc)->tx_ring[(q)])
323 int mvneta_attach(device_t);
326 int mvneta_fdt_mac_address(struct mvneta_softc *, uint8_t *);
329 #endif /* _IF_MVNETAVAR_H_ */