2 * Copyright (c) 2017 Stormshield.
3 * Copyright (c) 2017 Semihalf.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
31 #ifndef _IF_MVNETAVAR_H_
32 #define _IF_MVNETAVAR_H_
35 #define MVNETA_HWHEADER_SIZE 2 /* Marvell Header */
36 #define MVNETA_ETHER_SIZE 22 /* Maximum ether size */
37 #define MVNETA_MAX_CSUM_MTU 1600 /* Port1,2 hw limit */
40 * Limit support for frame up to hw csum limit
41 * until jumbo frame support is added.
43 #define MVNETA_MAX_FRAME (MVNETA_MAX_CSUM_MTU + MVNETA_ETHER_SIZE)
46 * Default limit of queue length
48 * queue 0 is lowest priority and queue 7 is highest priority.
49 * IP packet is received on queue 7 by default.
51 #define MVNETA_TX_RING_CNT 512
52 #define MVNETA_RX_RING_CNT 256
54 #define MVNETA_BUFRING_SIZE 1024
56 #define MVNETA_PACKET_OFFSET 64
57 #define MVNETA_PACKET_SIZE MCLBYTES
59 #define MVNETA_RXTH_COUNT 128
60 #define MVNETA_RX_REFILL_COUNT 8
61 #define MVNETA_TX_RECLAIM_COUNT 32
64 * Device Register access
66 #define MVNETA_READ(sc, reg) \
67 bus_read_4((sc)->res[0], (reg))
68 #define MVNETA_WRITE(sc, reg, val) \
69 bus_write_4((sc)->res[0], (reg), (val))
71 #define MVNETA_READ_REGION(sc, reg, val, c) \
72 bus_read_region_4((sc)->res[0], (reg), (val), (c))
73 #define MVNETA_WRITE_REGION(sc, reg, val, c) \
74 bus_write_region_4((sc)->res[0], (reg), (val), (c))
76 #define MVNETA_READ_MIB_4(sc, reg) \
77 bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
78 #define MVNETA_READ_MIB_8(sc, reg) \
79 bus_read_8((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
81 #define MVNETA_IS_LINKUP(sc) \
82 (MVNETA_READ((sc), MVNETA_PSR) & MVNETA_PSR_LINKUP)
84 #define MVNETA_IS_QUEUE_SET(queues, q) \
85 ((((queues) >> (q)) & 0x1))
88 * EEE: Lower Power Idle config
89 * Default timer is duration of MTU sized frame transmission.
90 * The timer can be negotiated by LLDP protocol, but we have no
93 #define MVNETA_LPI_TS (ETHERMTU * 8 / 1000) /* [us] */
94 #define MVNETA_LPI_TW (ETHERMTU * 8 / 1000) /* [us] */
95 #define MVNETA_LPI_LI (ETHERMTU * 8 / 1000) /* [us] */
100 * the ethernet device has 8 rx/tx DMA queues. each of queue has its own
101 * decriptor list. descriptors are simply index by counter inside the device.
103 #define MVNETA_TX_SEGLIMIT 32
105 #define MVNETA_QUEUE_IDLE 1
106 #define MVNETA_QUEUE_WORKING 2
107 #define MVNETA_QUEUE_DISABLED 3
110 struct mbuf * m; /* pointer to related mbuf */
114 struct mvneta_rx_ring {
116 /* Real descriptors array. shared by RxDMA */
117 struct mvneta_rx_desc *desc;
118 bus_dmamap_t desc_map;
121 /* Managment entries for each of descritors */
122 struct mvneta_buf rxbuf[MVNETA_RX_RING_CNT];
132 int queue_th_received;
133 int queue_th_time; /* [Tclk] */
137 boolean_t lro_enabled;
138 /* Is this queue out of mbuf */
139 boolean_t needs_refill;
140 } __aligned(CACHE_LINE_SIZE);
142 struct mvneta_tx_ring {
143 /* Index of this queue */
147 /* Ring buffer for IFNET */
149 /* Real descriptors array. shared by TxDMA */
150 struct mvneta_tx_desc *desc;
151 bus_dmamap_t desc_map;
154 /* Managment entries for each of descritors */
155 struct mvneta_buf txbuf[MVNETA_TX_RING_CNT];
166 #define MVNETA_WATCHDOG_TXCOMP (hz / 10) /* 100ms */
167 #define MVNETA_WATCHDOG (10 * hz) /* 10s */
170 boolean_t queue_hung;
174 struct taskqueue *taskq;
178 } __aligned(CACHE_LINE_SIZE);
181 tx_counter_adv(int ctr, int n)
185 while (__predict_false(ctr >= MVNETA_TX_RING_CNT))
186 ctr -= MVNETA_TX_RING_CNT;
192 rx_counter_adv(int ctr, int n)
196 while (__predict_false(ctr >= MVNETA_RX_RING_CNT))
197 ctr -= MVNETA_RX_RING_CNT;
205 #define MVNETA_PHY_TIMEOUT 10000 /* msec */
206 #define RX_DISABLE_TIMEOUT 0x1000000 /* times */
207 #define TX_DISABLE_TIMEOUT 0x1000000 /* times */
208 #define TX_FIFO_EMPTY_TIMEOUT 0x1000000 /* times */
213 #define KASSERT_SC_MTX(sc) \
214 KASSERT(mtx_owned(&(sc)->mtx), ("SC mutex not owned"))
215 #define KASSERT_BM_MTX(sc) \
216 KASSERT(mtx_owned(&(sc)->bm.bm_mtx), ("BM mutex not owned"))
217 #define KASSERT_RX_MTX(sc, q) \
218 KASSERT(mtx_owned(&(sc)->rx_ring[(q)].ring_mtx),\
219 ("RX mutex not owned"))
220 #define KASSERT_TX_MTX(sc, q) \
221 KASSERT(mtx_owned(&(sc)->tx_ring[(q)].ring_mtx),\
222 ("TX mutex not owned"))
225 * sysctl(9) parameters
227 struct mvneta_sysctl_queue {
228 struct mvneta_softc *sc;
232 #define MVNETA_SYSCTL_RX 0
233 #define MVNETA_SYSCTL_TX 1
235 struct mvneta_sysctl_mib {
236 struct mvneta_softc *sc;
241 enum mvneta_phy_mode {
249 * Ethernet Device main context
251 DECLARE_CLASS(mvneta_driver);
253 struct mvneta_softc {
257 * mtx must be held by interface functions to/from
258 * other frameworks. interrupt hander, sysctl hander,
259 * ioctl hander, and so on.
262 struct resource *res[2];
266 uint32_t mvneta_if_flags;
267 uint32_t mvneta_media;
270 enum mvneta_phy_mode phy_mode;
272 int phy_speed; /* PHY speed */
273 boolean_t phy_fdx; /* Full duplex mode */
274 boolean_t autoneg; /* Autonegotiation status */
275 boolean_t use_inband_status; /* In-band link status */
282 struct mii_data *mii;
283 uint8_t enaddr[ETHER_ADDR_LEN];
284 struct ifmedia mvneta_ifmedia;
286 bus_dma_tag_t rx_dtag;
287 bus_dma_tag_t rxbuf_dtag;
288 bus_dma_tag_t tx_dtag;
289 bus_dma_tag_t txmbuf_dtag;
290 struct mvneta_rx_ring rx_ring[MVNETA_RX_QNUM_MAX];
291 struct mvneta_tx_ring tx_ring[MVNETA_TX_QNUM_MAX];
296 struct callout tick_ch;
305 struct mvneta_sysctl_queue sysctl_rx_queue[MVNETA_RX_QNUM_MAX];
306 struct mvneta_sysctl_queue sysctl_tx_queue[MVNETA_TX_QNUM_MAX];
311 struct mvneta_sysctl_mib sysctl_mib[MVNETA_PORTMIB_NOCOUNTER];
312 uint64_t counter_pdfc;
313 uint64_t counter_pofc;
314 uint32_t counter_watchdog; /* manual reset when clearing mib */
315 uint32_t counter_watchdog_mib; /* reset after each mib update */
317 #define MVNETA_RX_RING(sc, q) \
318 (&(sc)->rx_ring[(q)])
319 #define MVNETA_TX_RING(sc, q) \
320 (&(sc)->tx_ring[(q)])
322 int mvneta_attach(device_t);
325 int mvneta_fdt_mac_address(struct mvneta_softc *, uint8_t *);
328 #endif /* _IF_MVNETAVAR_H_ */