2 * Copyright (C) 2011-2014 Luigi Rizzo. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
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29 * netmap support for: re
31 * For more details on netmap support please see ixgbe_netmap.h
35 #include <net/netmap.h>
36 #include <sys/selinfo.h>
38 #include <vm/pmap.h> /* vtophys ? */
39 #include <dev/netmap/netmap_kern.h>
43 * Register/unregister. We are already under netmap lock.
46 re_netmap_reg(struct netmap_adapter *na, int onoff)
48 struct ifnet *ifp = na->ifp;
49 struct rl_softc *adapter = ifp->if_softc;
52 re_stop(adapter); /* also clears IFF_DRV_RUNNING */
54 nm_set_native_flags(na);
56 nm_clear_native_flags(na);
58 re_init_locked(adapter); /* also enables intr */
60 return (ifp->if_drv_flags & IFF_DRV_RUNNING ? 0 : 1);
65 * Reconcile kernel and user view of the transmit ring.
68 re_netmap_txsync(struct netmap_kring *kring, int flags)
70 struct netmap_adapter *na = kring->na;
71 struct ifnet *ifp = na->ifp;
72 struct netmap_ring *ring = kring->ring;
73 u_int nm_i; /* index into the netmap ring */
74 u_int nic_i; /* index into the NIC ring */
76 u_int const lim = kring->nkr_num_slots - 1;
77 u_int const head = kring->rhead;
80 struct rl_softc *sc = ifp->if_softc;
81 struct rl_txdesc *txd = sc->rl_ldata.rl_tx_desc;
83 bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag,
84 sc->rl_ldata.rl_tx_list_map,
85 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); // XXX extra postwrite ?
88 * First part: process new packets to send.
90 nm_i = kring->nr_hwcur;
91 if (nm_i != head) { /* we have new packets to send */
92 nic_i = sc->rl_ldata.rl_tx_prodidx;
93 // XXX or netmap_idx_k2n(kring, nm_i);
95 for (n = 0; nm_i != head; n++) {
96 struct netmap_slot *slot = &ring->slot[nm_i];
97 u_int len = slot->len;
99 void *addr = PNMB(na, slot, &paddr);
101 /* device-specific */
102 struct rl_desc *desc = &sc->rl_ldata.rl_tx_list[nic_i];
103 int cmd = slot->len | RL_TDESC_CMD_EOF |
104 RL_TDESC_CMD_OWN | RL_TDESC_CMD_SOF ;
106 NM_CHECK_ADDR_LEN(na, addr, len);
108 if (nic_i == lim) /* mark end of ring */
109 cmd |= RL_TDESC_CMD_EOR;
111 if (slot->flags & NS_BUF_CHANGED) {
112 /* buffer has changed, reload map */
113 desc->rl_bufaddr_lo = htole32(RL_ADDR_LO(paddr));
114 desc->rl_bufaddr_hi = htole32(RL_ADDR_HI(paddr));
115 netmap_reload_map(na, sc->rl_ldata.rl_tx_mtag,
116 txd[nic_i].tx_dmamap, addr);
118 slot->flags &= ~(NS_REPORT | NS_BUF_CHANGED);
120 /* Fill the slot in the NIC ring. */
121 desc->rl_cmdstat = htole32(cmd);
123 /* make sure changes to the buffer are synced */
124 bus_dmamap_sync(sc->rl_ldata.rl_tx_mtag,
125 txd[nic_i].tx_dmamap,
126 BUS_DMASYNC_PREWRITE);
128 nm_i = nm_next(nm_i, lim);
129 nic_i = nm_next(nic_i, lim);
131 sc->rl_ldata.rl_tx_prodidx = nic_i;
132 kring->nr_hwcur = head;
134 /* synchronize the NIC ring */
135 bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag,
136 sc->rl_ldata.rl_tx_list_map,
137 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
140 CSR_WRITE_1(sc, sc->rl_txstart, RL_TXSTART_START);
144 * Second part: reclaim buffers for completed transmissions.
146 if (flags & NAF_FORCE_RECLAIM || nm_kr_txempty(kring)) {
147 nic_i = sc->rl_ldata.rl_tx_considx;
148 for (n = 0; nic_i != sc->rl_ldata.rl_tx_prodidx;
149 n++, nic_i = RL_TX_DESC_NXT(sc, nic_i)) {
151 le32toh(sc->rl_ldata.rl_tx_list[nic_i].rl_cmdstat);
152 if (cmdstat & RL_TDESC_STAT_OWN)
156 sc->rl_ldata.rl_tx_considx = nic_i;
157 sc->rl_ldata.rl_tx_free += n;
158 kring->nr_hwtail = nm_prev(netmap_idx_n2k(kring, nic_i), lim);
167 * Reconcile kernel and user view of the receive ring.
170 re_netmap_rxsync(struct netmap_kring *kring, int flags)
172 struct netmap_adapter *na = kring->na;
173 struct ifnet *ifp = na->ifp;
174 struct netmap_ring *ring = kring->ring;
175 u_int nm_i; /* index into the netmap ring */
176 u_int nic_i; /* index into the NIC ring */
178 u_int const lim = kring->nkr_num_slots - 1;
179 u_int const head = kring->rhead;
180 int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR;
182 /* device-specific */
183 struct rl_softc *sc = ifp->if_softc;
184 struct rl_rxdesc *rxd = sc->rl_ldata.rl_rx_desc;
187 return netmap_ring_reinit(kring);
189 bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag,
190 sc->rl_ldata.rl_rx_list_map,
191 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
194 * First part: import newly received packets.
196 * This device uses all the buffers in the ring, so we need
197 * another termination condition in addition to RL_RDESC_STAT_OWN
198 * cleared (all buffers could have it cleared). The easiest one
199 * is to stop right before nm_hwcur.
201 if (netmap_no_pendintr || force_update) {
202 uint16_t slot_flags = kring->nkr_slot_flags;
203 uint32_t stop_i = nm_prev(kring->nr_hwcur, lim);
205 nic_i = sc->rl_ldata.rl_rx_prodidx; /* next pkt to check */
206 nm_i = netmap_idx_n2k(kring, nic_i);
208 while (nm_i != stop_i) {
209 struct rl_desc *cur_rx = &sc->rl_ldata.rl_rx_list[nic_i];
210 uint32_t rxstat = le32toh(cur_rx->rl_cmdstat);
213 if ((rxstat & RL_RDESC_STAT_OWN) != 0)
215 total_len = rxstat & sc->rl_rxlenmask;
216 /* XXX subtract crc */
217 total_len = (total_len < 4) ? 0 : total_len - 4;
218 ring->slot[nm_i].len = total_len;
219 ring->slot[nm_i].flags = slot_flags;
220 /* sync was in re_newbuf() */
221 bus_dmamap_sync(sc->rl_ldata.rl_rx_mtag,
222 rxd[nic_i].rx_dmamap, BUS_DMASYNC_POSTREAD);
223 // if_inc_counter(sc->rl_ifp, IFCOUNTER_IPACKETS, 1);
224 nm_i = nm_next(nm_i, lim);
225 nic_i = nm_next(nic_i, lim);
227 sc->rl_ldata.rl_rx_prodidx = nic_i;
228 kring->nr_hwtail = nm_i;
229 kring->nr_kflags &= ~NKR_PENDINTR;
233 * Second part: skip past packets that userspace has released.
235 nm_i = kring->nr_hwcur;
237 nic_i = netmap_idx_k2n(kring, nm_i);
238 for (n = 0; nm_i != head; n++) {
239 struct netmap_slot *slot = &ring->slot[nm_i];
241 void *addr = PNMB(na, slot, &paddr);
243 struct rl_desc *desc = &sc->rl_ldata.rl_rx_list[nic_i];
244 int cmd = NETMAP_BUF_SIZE(na) | RL_RDESC_CMD_OWN;
246 if (addr == NETMAP_BUF_BASE(na)) /* bad buf */
249 if (nic_i == lim) /* mark end of ring */
250 cmd |= RL_RDESC_CMD_EOR;
252 if (slot->flags & NS_BUF_CHANGED) {
253 /* buffer has changed, reload map */
254 desc->rl_bufaddr_lo = htole32(RL_ADDR_LO(paddr));
255 desc->rl_bufaddr_hi = htole32(RL_ADDR_HI(paddr));
256 netmap_reload_map(na, sc->rl_ldata.rl_rx_mtag,
257 rxd[nic_i].rx_dmamap, addr);
258 slot->flags &= ~NS_BUF_CHANGED;
260 desc->rl_cmdstat = htole32(cmd);
261 bus_dmamap_sync(sc->rl_ldata.rl_rx_mtag,
262 rxd[nic_i].rx_dmamap,
263 BUS_DMASYNC_PREREAD);
264 nm_i = nm_next(nm_i, lim);
265 nic_i = nm_next(nic_i, lim);
267 kring->nr_hwcur = head;
269 bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag,
270 sc->rl_ldata.rl_rx_list_map,
271 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
277 return netmap_ring_reinit(kring);
282 * Additional routines to init the tx and rx rings.
283 * In other drivers we do that inline in the main code.
286 re_netmap_tx_init(struct rl_softc *sc)
288 struct rl_txdesc *txd;
289 struct rl_desc *desc;
291 struct netmap_adapter *na = NA(sc->rl_ifp);
292 struct netmap_slot *slot;
294 slot = netmap_reset(na, NR_TX, 0, 0);
295 /* slot is NULL if we are not in native netmap mode */
298 /* in netmap mode, overwrite addresses and maps */
299 txd = sc->rl_ldata.rl_tx_desc;
300 desc = sc->rl_ldata.rl_tx_list;
301 n = sc->rl_ldata.rl_tx_desc_cnt;
303 /* l points in the netmap ring, i points in the NIC ring */
304 for (i = 0; i < n; i++) {
306 int l = netmap_idx_n2k(&na->tx_rings[0], i);
307 void *addr = PNMB(na, slot + l, &paddr);
309 desc[i].rl_bufaddr_lo = htole32(RL_ADDR_LO(paddr));
310 desc[i].rl_bufaddr_hi = htole32(RL_ADDR_HI(paddr));
311 netmap_load_map(na, sc->rl_ldata.rl_tx_mtag,
312 txd[i].tx_dmamap, addr);
317 re_netmap_rx_init(struct rl_softc *sc)
319 struct netmap_adapter *na = NA(sc->rl_ifp);
320 struct netmap_slot *slot = netmap_reset(na, NR_RX, 0, 0);
321 struct rl_desc *desc = sc->rl_ldata.rl_rx_list;
323 uint32_t nic_i, max_avail;
324 uint32_t const n = sc->rl_ldata.rl_rx_desc_cnt;
329 * Do not release the slots owned by userspace,
330 * and also keep one empty.
332 max_avail = n - 1 - nm_kr_rxspace(&na->rx_rings[0]);
333 for (nic_i = 0; nic_i < n; nic_i++) {
336 uint32_t nm_i = netmap_idx_n2k(&na->rx_rings[0], nic_i);
338 addr = PNMB(na, slot + nm_i, &paddr);
340 netmap_reload_map(na, sc->rl_ldata.rl_rx_mtag,
341 sc->rl_ldata.rl_rx_desc[nic_i].rx_dmamap, addr);
342 bus_dmamap_sync(sc->rl_ldata.rl_rx_mtag,
343 sc->rl_ldata.rl_rx_desc[nic_i].rx_dmamap, BUS_DMASYNC_PREREAD);
344 desc[nic_i].rl_bufaddr_lo = htole32(RL_ADDR_LO(paddr));
345 desc[nic_i].rl_bufaddr_hi = htole32(RL_ADDR_HI(paddr));
346 cmdstat = NETMAP_BUF_SIZE(na);
347 if (nic_i == n - 1) /* mark the end of ring */
348 cmdstat |= RL_RDESC_CMD_EOR;
349 if (nic_i < max_avail)
350 cmdstat |= RL_RDESC_CMD_OWN;
351 desc[nic_i].rl_cmdstat = htole32(cmdstat);
357 re_netmap_attach(struct rl_softc *sc)
359 struct netmap_adapter na;
361 bzero(&na, sizeof(na));
364 na.na_flags = NAF_BDG_MAYSLEEP;
365 na.num_tx_desc = sc->rl_ldata.rl_tx_desc_cnt;
366 na.num_rx_desc = sc->rl_ldata.rl_rx_desc_cnt;
367 na.nm_txsync = re_netmap_txsync;
368 na.nm_rxsync = re_netmap_rxsync;
369 na.nm_register = re_netmap_reg;
370 na.num_tx_rings = na.num_rx_rings = 1;