sys/dev/nsp/nsp.c

   1 /*      $NecBSD: nsp.c,v 1.21.12.6 2001/06/29 06:27:52 honda Exp $      */
   2 /*      $NetBSD$        */
   3
   4 #define NSP_DEBUG
   5 #define NSP_STATICS
   6 #define NSP_IO_CONTROL_FLAGS \
   7         (NSP_READ_SUSPEND_IO | NSP_WRITE_SUSPEND_IO | \
   8          NSP_READ_FIFO_INTERRUPTS | NSP_WRITE_FIFO_INTERRUPTS | \
   9          NSP_USE_MEMIO | NSP_WAIT_FOR_SELECT)
  10
  11 /*-
  12  *  Copyright (c) 1998, 1999, 2000, 2001
  13  *      NetBSD/pc98 porting staff. All rights reserved.
  14  *
  15  *  Copyright (c) 1998, 1999, 2000, 2001
  16  *      Naofumi HONDA. All rights reserved.
  17  *
  18  *  Redistribution and use in source and binary forms, with or without
  19  *  modification, are permitted provided that the following conditions
  20  *  are met:
  21  *  1. Redistributions of source code must retain the above copyright
  22  *     notice, this list of conditions and the following disclaimer.
  23  *  2. Redistributions in binary form must reproduce the above copyright
  24  *     notice, this list of conditions and the following disclaimer in the
  25  *     documentation and/or other materials provided with the distribution.
  26  *  3. The name of the author may not be used to endorse or promote products
  27  *     derived from this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  30  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  31  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  32  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  33  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  34  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  35  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  36  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  37  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  38  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  39  * POSSIBILITY OF SUCH DAMAGE.
  40  */
  41
  42 #include <sys/cdefs.h>
  43 __FBSDID("$FreeBSD$");
  44
  45 #include <sys/param.h>
  46 #include <sys/systm.h>
  47 #include <sys/kernel.h>
  48 #include <sys/bio.h>
  49 #include <sys/buf.h>
  50 #include <sys/queue.h>
  51 #include <sys/malloc.h>
  52 #include <sys/errno.h>
  53 #include <sys/rman.h>
  54
  55 #include <machine/cpu.h>
  56 #include <machine/bus.h>
  57
  58 #include <cam/scsi/scsi_low.h>
  59 #include <dev/nsp/nspreg.h>
  60 #include <dev/nsp/nspvar.h>
  61
  62 /***************************************************
  63  * USER SETTINGS
  64  ***************************************************/
  65 /* DEVICE CONFIGURATION FLAGS (MINOR)
  66  *
  67  * 0x01   DISCONNECT OFF
  68  * 0x02   PARITY LINE OFF
  69  * 0x04   IDENTIFY MSG OFF ( = single lun)
  70  * 0x08   SYNC TRANSFER OFF
  71  */
  72
  73 /***************************************************
  74  * PARAMS
  75  ***************************************************/
  76 #define NSP_NTARGETS    8
  77 #define NSP_NLUNS       8
  78
  79 #define NSP_MAX_DATA_SIZE       (64 * 1024)
  80 #define NSP_SELTIMEOUT          (200)
  81 #define NSP_DELAY_MAX           (2 * 1000 * 1000)
  82 #define NSP_DELAY_INTERVAL      (1)
  83 #define NSP_TIMER_1MS           (1000 / 51)
  84
  85 /***************************************************
  86  * DEBUG
  87  ***************************************************/
  88 #ifdef  NSP_DEBUG
  89 int nsp_debug;
  90 #endif  /* NSP_DEBUG */
  91
  92 #ifdef  NSP_STATICS
  93 struct nsp_statics {
  94         int arbit_conflict_1;
  95         int arbit_conflict_2;
  96         int device_data_write;
  97         int device_busy;
  98         int disconnect;
  99         int reselect;
 100         int data_phase_bypass;
 101 } nsp_statics;
 102 #endif  /* NSP_STATICS */
 103
 104 /***************************************************
 105  * IO control
 106  ***************************************************/
 107 #define NSP_READ_SUSPEND_IO             0x0001
 108 #define NSP_WRITE_SUSPEND_IO            0x0002
 109 #define NSP_USE_MEMIO                   0x0004
 110 #define NSP_READ_FIFO_INTERRUPTS        0x0010
 111 #define NSP_WRITE_FIFO_INTERRUPTS       0x0020
 112 #define NSP_WAIT_FOR_SELECT             0x0100
 113
 114 u_int nsp_io_control = NSP_IO_CONTROL_FLAGS;
 115 int nsp_read_suspend_bytes = DEV_BSIZE;
 116 int nsp_write_suspend_bytes = DEV_BSIZE;
 117 int nsp_read_interrupt_bytes = 4096;
 118 int nsp_write_interrupt_bytes = 4096;
 119
 120 /***************************************************
 121  * DEVICE STRUCTURE
 122  ***************************************************/
 123 extern struct cfdriver nsp_cd;
 124
 125 /**************************************************************
 126  * DECLARE
 127  **************************************************************/
 128 #define NSP_FIFO_ON     1
 129 #define NSP_FIFO_OFF    0
 130 static void nsp_pio_read(struct nsp_softc *, int);
 131 static void nsp_pio_write(struct nsp_softc *, int);
 132 static int nsp_xfer(struct nsp_softc *, u_int8_t *, int, int, int);
 133 static int nsp_msg(struct nsp_softc *, struct targ_info *, u_int);
 134 static int nsp_reselected(struct nsp_softc *);
 135 static int nsp_disconnected(struct nsp_softc *, struct targ_info *);
 136 static void nsp_pdma_end(struct nsp_softc *, struct targ_info *);
 137 static void nsphw_init(struct nsp_softc *);
 138 static int nsp_target_nexus_establish(struct nsp_softc *);
 139 static int nsp_lun_nexus_establish(struct nsp_softc *);
 140 static int nsp_ccb_nexus_establish(struct nsp_softc *);
 141 static int nsp_world_start(struct nsp_softc *, int);
 142 static int nsphw_start_selection(struct nsp_softc *sc, struct slccb *);
 143 static void nsphw_bus_reset(struct nsp_softc *);
 144 static void nsphw_attention(struct nsp_softc *);
 145 static u_int nsp_fifo_count(struct nsp_softc *);
 146 static u_int nsp_request_count(struct nsp_softc *);
 147 static int nsp_negate_signal(struct nsp_softc *, u_int8_t, u_char *);
 148 static int nsp_expect_signal(struct nsp_softc *, u_int8_t, u_int8_t);
 149 static void nsp_start_timer(struct nsp_softc *, int);
 150 static void nsp_setup_fifo(struct nsp_softc *, int, int, int);
 151 static int nsp_targ_init(struct nsp_softc *, struct targ_info *, int);
 152 static void nsphw_selection_done_and_expect_msgout(struct nsp_softc *);
 153 static void nsp_data_padding(struct nsp_softc *, int, u_int);
 154 static int nsp_timeout(struct nsp_softc *);
 155 static int nsp_read_fifo(struct nsp_softc *, int);
 156 static int nsp_write_fifo(struct nsp_softc *, int);
 157 static int nsp_phase_match(struct nsp_softc *, u_int8_t, u_int8_t);
 158 static int nsp_wait_interrupt(struct nsp_softc *);
 159
 160 struct scsi_low_funcs nspfuncs = {
 161         SC_LOW_INIT_T nsp_world_start,
 162         SC_LOW_BUSRST_T nsphw_bus_reset,
 163         SC_LOW_TARG_INIT_T nsp_targ_init,
 164         SC_LOW_LUN_INIT_T NULL,
 165
 166         SC_LOW_SELECT_T nsphw_start_selection,
 167         SC_LOW_NEXUS_T nsp_lun_nexus_establish,
 168         SC_LOW_NEXUS_T nsp_ccb_nexus_establish,
 169
 170         SC_LOW_ATTEN_T nsphw_attention,
 171         SC_LOW_MSG_T nsp_msg,
 172
 173         SC_LOW_TIMEOUT_T nsp_timeout,
 174         SC_LOW_POLL_T nspintr,
 175
 176         NULL,
 177 };
 178
 179 /****************************************************
 180  * hwfuncs
 181  ****************************************************/
 182 static __inline uint8_t
 183 nsp_cr_read_1(struct resource *res, bus_addr_t ofs)
 184 {
 185
 186         bus_write_1(res, nsp_idxr, ofs);
 187         return bus_read_1(res, nsp_datar);
 188 }
 189
 190 static __inline void
 191 nsp_cr_write_1(struct resource *res, bus_addr_t ofs, uint8_t va)
 192 {
 193
 194         bus_write_1(res, nsp_idxr, ofs);
 195         bus_write_1(res, nsp_datar, va);
 196 }
 197
 198 static int
 199 nsp_expect_signal(struct nsp_softc *sc, u_int8_t curphase, u_int8_t mask)
 200 {
 201         struct scsi_low_softc *slp = &sc->sc_sclow;
 202         int wc;
 203         u_int8_t ph, isrc;
 204
 205         for (wc = 0; wc < NSP_DELAY_MAX / NSP_DELAY_INTERVAL; wc ++)
 206         {
 207                 ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
 208                 if (ph == (u_int8_t) -1)
 209                         return -1;
 210
 211                 isrc = bus_read_1(sc->port_res, nsp_irqsr);
 212                 if (isrc & IRQSR_SCSI)
 213                         return 0;
 214
 215                 if ((ph & mask) != 0 && (ph & SCBUSMON_PHMASK) == curphase)
 216                         return 1;
 217
 218                 DELAY(NSP_DELAY_INTERVAL);
 219         }
 220
 221         device_printf(slp->sl_dev, "nsp_expect_signal timeout\n");
 222         return -1;
 223 }
 224
 225 static void
 226 nsphw_init(sc)
 227         struct nsp_softc *sc;
 228 {
 229
 230         /* block all interrupts */
 231         bus_write_1(sc->port_res, nsp_irqcr, IRQCR_ALLMASK);
 232
 233         /* setup SCSI interface */
 234         bus_write_1(sc->port_res, nsp_ifselr, IFSELR_IFSEL);
 235
 236         nsp_cr_write_1(sc->port_res, NSPR_SCIENR, 0);
 237
 238         nsp_cr_write_1(sc->port_res, NSPR_XFERMR, XFERMR_IO8);
 239         nsp_cr_write_1(sc->port_res, NSPR_CLKDIVR, sc->sc_iclkdiv);
 240
 241         nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
 242         nsp_cr_write_1(sc->port_res, NSPR_PARITYR, sc->sc_parr);
 243         nsp_cr_write_1(sc->port_res, NSPR_PTCLRR,
 244                        PTCLRR_ACK | PTCLRR_REQ | PTCLRR_HOST | PTCLRR_RSS);
 245
 246         /* setup fifo asic */
 247         bus_write_1(sc->port_res, nsp_ifselr, IFSELR_REGSEL);
 248         nsp_cr_write_1(sc->port_res, NSPR_TERMPWRC, 0);
 249         if ((nsp_cr_read_1(sc->port_res, NSPR_OCR) & OCR_TERMPWRS) == 0)
 250                 nsp_cr_write_1(sc->port_res, NSPR_TERMPWRC, TERMPWRC_POWON);
 251
 252         nsp_cr_write_1(sc->port_res, NSPR_XFERMR, XFERMR_IO8);
 253         nsp_cr_write_1(sc->port_res, NSPR_CLKDIVR, sc->sc_clkdiv);
 254         nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
 255         nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
 256
 257         nsp_cr_write_1(sc->port_res, NSPR_SYNCR, 0);
 258         nsp_cr_write_1(sc->port_res, NSPR_ACKWIDTH, 0);
 259
 260         /* enable interrupts and ack them */
 261         nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
 262         bus_write_1(sc->port_res, nsp_irqcr, IRQSR_MASK);
 263
 264         nsp_setup_fifo(sc, NSP_FIFO_OFF, SCSI_LOW_READ, 0);
 265 }
 266
 267 /****************************************************
 268  * scsi low interface
 269  ****************************************************/
 270 static void
 271 nsphw_attention(sc)
 272         struct nsp_softc *sc;
 273 {
 274         u_int8_t cr;
 275
 276         cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR)/*  & ~SCBUSCR_ACK */;
 277         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr | SCBUSCR_ATN);
 278         DELAY(10);
 279 }
 280
 281 static void
 282 nsphw_bus_reset(sc)
 283         struct nsp_softc *sc;
 284 {
 285         int i;
 286
 287         bus_write_1(sc->port_res, nsp_irqcr, IRQCR_ALLMASK);
 288
 289         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, SCBUSCR_RST);
 290         DELAY(100 * 1000);      /* 100ms */
 291         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, 0);
 292         for (i = 0; i < 5; i ++)
 293                 (void) nsp_cr_read_1(sc->port_res, NSPR_IRQPHS);
 294
 295         bus_write_1(sc->port_res, nsp_irqcr, IRQSR_MASK);
 296 }
 297
 298 static void
 299 nsphw_selection_done_and_expect_msgout(sc)
 300         struct nsp_softc *sc;
 301 {
 302         struct scsi_low_softc *slp = &sc->sc_sclow;
 303
 304         /* clear ack counter */
 305         sc->sc_cnt = 0;
 306         nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
 307                         PTCLRR_REQ | PTCLRR_HOST);
 308
 309         /* deassert sel and assert atten */
 310         sc->sc_seltout = 0;
 311         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, sc->sc_busc);
 312         DELAY(1);
 313         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
 314                         sc->sc_busc | SCBUSCR_ADIR | SCBUSCR_ACKEN);
 315         SCSI_LOW_ASSERT_ATN(slp);
 316 }
 317
 318 static int
 319 nsphw_start_selection(sc, cb)
 320         struct nsp_softc *sc;
 321         struct slccb *cb;
 322 {
 323         struct scsi_low_softc *slp = &sc->sc_sclow;
 324         struct targ_info *ti = cb->ti;
 325         register u_int8_t arbs, ph;
 326         int wc;
 327
 328         wc = sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
 329         sc->sc_dataout_timeout = 0;
 330
 331         /* check bus free */
 332         ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
 333         if (ph != SCBUSMON_FREE)
 334         {
 335 #ifdef  NSP_STATICS
 336                 nsp_statics.arbit_conflict_1 ++;
 337 #endif  /* NSP_STATICS */
 338                 return SCSI_LOW_START_FAIL;
 339         }
 340
 341         /* start arbitration */
 342         nsp_cr_write_1(sc->port_res, NSPR_ARBITS, ARBITS_EXEC);
 343
 344         SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
 345         do
 346         {
 347                 /* XXX: what a stupid chip! */
 348                 arbs = nsp_cr_read_1(sc->port_res, NSPR_ARBITS);
 349                 DELAY(1);
 350         }
 351         while ((arbs & (ARBITS_WIN | ARBITS_FAIL)) == 0 && wc -- > 0);
 352
 353         if ((arbs & ARBITS_WIN) == 0)
 354         {
 355                 nsp_cr_write_1(sc->port_res, NSPR_ARBITS, ARBITS_CLR);
 356 #ifdef  NSP_STATICS
 357                 nsp_statics.arbit_conflict_2 ++;
 358 #endif  /* NSP_STATICS */
 359                 return SCSI_LOW_START_FAIL;
 360         }
 361
 362         /* assert select line */
 363         SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
 364         scsi_low_arbit_win(slp);
 365
 366         DELAY(3);
 367         nsp_cr_write_1(sc->port_res, NSPR_DATA,
 368                        sc->sc_idbit | (1 << ti->ti_id));
 369         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
 370                         SCBUSCR_SEL | SCBUSCR_BSY | sc->sc_busc);
 371         DELAY(3);
 372         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, SCBUSCR_SEL |
 373                         SCBUSCR_BSY | SCBUSCR_DOUT | sc->sc_busc);
 374         nsp_cr_write_1(sc->port_res, NSPR_ARBITS, ARBITS_CLR);
 375         DELAY(3);
 376         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
 377                        SCBUSCR_SEL | SCBUSCR_DOUT | sc->sc_busc);
 378         DELAY(1);
 379
 380         if ((nsp_io_control & NSP_WAIT_FOR_SELECT) != 0)
 381         {
 382 #define NSP_FIRST_SEL_WAIT      300
 383 #define NSP_SEL_CHECK_INTERVAL  10
 384
 385                 /* wait for a selection response */
 386                 for (wc = 0; wc < NSP_FIRST_SEL_WAIT / NSP_SEL_CHECK_INTERVAL;
 387                      wc ++)
 388                 {
 389                         ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
 390                         if ((ph & SCBUSMON_BSY) == 0)
 391                         {
 392                                 DELAY(NSP_SEL_CHECK_INTERVAL);
 393                                 continue;
 394                         }
 395
 396                         DELAY(1);
 397                         ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
 398                         if ((ph & SCBUSMON_BSY) != 0)
 399                         {
 400                                 nsphw_selection_done_and_expect_msgout(sc);
 401
 402                                 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
 403                                 return SCSI_LOW_START_OK;
 404                         }
 405                 }
 406         }
 407
 408         /* check a selection timeout */
 409         nsp_start_timer(sc, NSP_TIMER_1MS);
 410         sc->sc_seltout = 1;
 411         return SCSI_LOW_START_OK;
 412 }
 413
 414 static int
 415 nsp_world_start(sc, fdone)
 416         struct nsp_softc *sc;
 417         int fdone;
 418 {
 419         struct scsi_low_softc *slp = &sc->sc_sclow;
 420
 421         sc->sc_cnt = 0;
 422         sc->sc_seltout = 0;
 423
 424         if ((slp->sl_cfgflags & CFG_NOATTEN) == 0)
 425                 sc->sc_busc = SCBUSCR_ATN;
 426         else
 427                 sc->sc_busc = 0;
 428
 429         if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
 430                 sc->sc_parr = PARITYR_ENABLE | PARITYR_CLEAR;
 431         else
 432                 sc->sc_parr = 0;
 433
 434         sc->sc_icr = (SCIENR_SCCHG | SCIENR_RESEL | SCIENR_RST);
 435
 436         nsphw_init(sc);
 437         scsi_low_bus_reset(slp);
 438
 439         return 0;
 440 }
 441
 442 struct ncp_synch_data {
 443         u_int min_period;
 444         u_int max_period;
 445         u_int chip_period;
 446         u_int ack_width;
 447 };
 448
 449 static struct ncp_synch_data ncp_sync_data_40M[] = {
 450         {0x0c,0x0c,0x1,0},      /* 20MB  50ns*/
 451         {0x19,0x19,0x3,1},      /* 10MB  100ns*/
 452         {0x1a,0x25,0x5,2},      /* 7.5MB 150ns*/
 453         {0x26,0x32,0x7,3},      /* 5MB   200ns*/
 454         {0x0, 0, 0, 0}
 455 };
 456
 457 static struct ncp_synch_data ncp_sync_data_20M[] = {
 458         {0x19,0x19,0x1,0},      /* 10MB  100ns*/
 459         {0x1a,0x25,0x2,0},      /* 7.5MB 150ns*/
 460         {0x26,0x32,0x3,1},      /* 5MB   200ns*/
 461         {0x0, 0, 0, 0}
 462 };
 463
 464 static int
 465 nsp_msg(sc, ti, msg)
 466         struct nsp_softc *sc;
 467         struct targ_info *ti;
 468         u_int msg;
 469 {
 470         struct ncp_synch_data *sdp;
 471         struct nsp_targ_info *nti = (void *) ti;
 472         u_int period, offset;
 473         int i, error;
 474
 475         if ((msg & SCSI_LOW_MSG_WIDE) != 0)
 476         {
 477                 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
 478                 {
 479                         ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
 480                         return EINVAL;
 481                 }
 482                 return 0;
 483         }
 484
 485         if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
 486                 return 0;
 487
 488         period = ti->ti_maxsynch.period;
 489         offset = ti->ti_maxsynch.offset;
 490         if (sc->sc_iclkdiv == CLKDIVR_20M)
 491                 sdp = &ncp_sync_data_20M[0];
 492         else
 493                 sdp = &ncp_sync_data_40M[0];
 494
 495         for (i = 0; sdp->max_period != 0; i ++, sdp ++)
 496         {
 497                 if (period >= sdp->min_period && period <= sdp->max_period)
 498                         break;
 499         }
 500
 501         if (period != 0 && sdp->max_period == 0)
 502         {
 503                 /*
 504                  * NO proper period/offset found,
 505                  * Retry neg with the target.
 506                  */
 507                 ti->ti_maxsynch.period = 0;
 508                 ti->ti_maxsynch.offset = 0;
 509                 nti->nti_reg_syncr = 0;
 510                 nti->nti_reg_ackwidth = 0;
 511                 error = EINVAL;
 512         }
 513         else
 514         {
 515                 nti->nti_reg_syncr = (sdp->chip_period << SYNCR_PERS) |
 516                                       (offset & SYNCR_OFFM);
 517                 nti->nti_reg_ackwidth = sdp->ack_width;
 518                 error = 0;
 519         }
 520
 521         nsp_cr_write_1(sc->port_res, NSPR_SYNCR, nti->nti_reg_syncr);
 522         nsp_cr_write_1(sc->port_res, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
 523         return error;
 524 }
 525
 526 static int
 527 nsp_targ_init(sc, ti, action)
 528         struct nsp_softc *sc;
 529         struct targ_info *ti;
 530         int action;
 531 {
 532         struct nsp_targ_info *nti = (void *) ti;
 533
 534         if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
 535         {
 536                 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
 537                 ti->ti_maxsynch.period = 100 / 4;
 538                 ti->ti_maxsynch.offset = 15;
 539                 nti->nti_reg_syncr = 0;
 540                 nti->nti_reg_ackwidth = 0;
 541         }
 542         return 0;
 543 }
 544
 545 static void
 546 nsp_start_timer(sc, time)
 547         struct nsp_softc *sc;
 548         int time;
 549 {
 550
 551         sc->sc_timer = time;
 552         nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, time);
 553 }
 554
 555 /**************************************************************
 556  * General probe attach
 557  **************************************************************/
 558 int
 559 nspprobesubr(struct resource *res, u_int dvcfg)
 560 {
 561         u_int8_t regv;
 562
 563         regv = bus_read_1(res, nsp_fifosr);
 564         if (regv < 0x11 || regv >= 0x20)
 565                 return 0;
 566         return 1;
 567 }
 568
 569 void
 570 nspattachsubr(sc)
 571         struct nsp_softc *sc;
 572 {
 573         struct scsi_low_softc *slp = &sc->sc_sclow;
 574
 575         sc->sc_idbit = (1 << slp->sl_hostid);
 576         slp->sl_flags |= HW_READ_PADDING;
 577         slp->sl_funcs = &nspfuncs;
 578         sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
 579
 580         (void) scsi_low_attach(slp, 0, NSP_NTARGETS, NSP_NLUNS,
 581                                sizeof(struct nsp_targ_info), 0);
 582 }
 583
 584 /**************************************************************
 585  * PDMA functions
 586  **************************************************************/
 587 static u_int
 588 nsp_fifo_count(sc)
 589         struct nsp_softc *sc;
 590 {
 591         u_int count;
 592
 593         nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_RSS_ACK | PTCLRR_PT);
 594         count = bus_read_1(sc->port_res, nsp_datar);
 595         count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 8);
 596         count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 16);
 597         return count;
 598 }
 599
 600 static u_int
 601 nsp_request_count(sc)
 602         struct nsp_softc *sc;
 603 {
 604         u_int count;
 605
 606         nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_RSS_REQ | PTCLRR_PT);
 607         count = bus_read_1(sc->port_res, nsp_datar);
 608         count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 8);
 609         count += (((u_int) bus_read_1(sc->port_res, nsp_datar)) << 16);
 610         return count;
 611 }
 612
 613 static void
 614 nsp_setup_fifo(sc, on, direction, datalen)
 615         struct nsp_softc *sc;
 616         int on;
 617         int direction;
 618         int datalen;
 619 {
 620         u_int8_t xfermode;
 621
 622         sc->sc_suspendio = 0;
 623         if (on == NSP_FIFO_OFF)
 624         {
 625                 xfermode = XFERMR_IO8;
 626                 goto out;
 627         }
 628
 629         /* check if suspend io OK ? */
 630         if (datalen > 0)
 631         {
 632                 if (direction == SCSI_LOW_READ)
 633                 {
 634                         if ((nsp_io_control & NSP_READ_SUSPEND_IO) != 0 &&
 635                             (datalen % nsp_read_suspend_bytes) == 0)
 636                                 sc->sc_suspendio = nsp_read_suspend_bytes;
 637                 }
 638                 else
 639                 {
 640                         if ((nsp_io_control & NSP_WRITE_SUSPEND_IO) != 0 &&
 641                             (datalen % nsp_write_suspend_bytes) == 0)
 642                                 sc->sc_suspendio = nsp_write_suspend_bytes;
 643                 }
 644         }
 645
 646         /* determine a transfer type */
 647         if (datalen < DEV_BSIZE || (datalen & 3) != 0)
 648         {
 649                 if (sc->mem_res != NULL &&
 650                     (nsp_io_control & NSP_USE_MEMIO) != 0)
 651                         xfermode = XFERMR_XEN | XFERMR_MEM8;
 652                 else
 653                         xfermode = XFERMR_XEN | XFERMR_IO8;
 654         }
 655         else
 656         {
 657                 if (sc->mem_res != NULL &&
 658                     (nsp_io_control & NSP_USE_MEMIO) != 0)
 659                         xfermode = XFERMR_XEN | XFERMR_MEM32;
 660                 else
 661                         xfermode = XFERMR_XEN | XFERMR_IO32;
 662
 663                 if (sc->sc_suspendio > 0)
 664                         xfermode |= XFERMR_FIFOEN;
 665         }
 666
 667 out:
 668         sc->sc_xfermr = xfermode;
 669         nsp_cr_write_1(sc->port_res, NSPR_XFERMR, sc->sc_xfermr);
 670 }
 671
 672 static void
 673 nsp_pdma_end(sc, ti)
 674         struct nsp_softc *sc;
 675         struct targ_info *ti;
 676 {
 677         struct scsi_low_softc *slp = &sc->sc_sclow;
 678         struct slccb *cb = slp->sl_Qnexus;
 679         u_int len = 0, cnt;
 680
 681         sc->sc_dataout_timeout = 0;
 682         slp->sl_flags &= ~HW_PDMASTART;
 683         nsp_setup_fifo(sc, NSP_FIFO_OFF, SCSI_LOW_READ, 0);
 684         if ((sc->sc_icr & SCIENR_FIFO) != 0)
 685         {
 686                 sc->sc_icr &= ~SCIENR_FIFO;
 687                 nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
 688         }
 689
 690         if (cb == NULL)
 691         {
 692                 slp->sl_error |= PDMAERR;
 693                 return;
 694         }
 695
 696         if (ti->ti_phase == PH_DATA)
 697         {
 698                 cnt = nsp_fifo_count(sc);
 699                 if (slp->sl_scp.scp_direction  == SCSI_LOW_WRITE)
 700                 {
 701                         len = sc->sc_cnt - cnt;
 702                         if (sc->sc_cnt >= cnt &&
 703                             slp->sl_scp.scp_datalen + len <=
 704                             cb->ccb_scp.scp_datalen)
 705                         {
 706                                 slp->sl_scp.scp_data -= len;
 707                                 slp->sl_scp.scp_datalen += len;
 708                         }
 709                         else
 710                         {
 711                                 slp->sl_error |= PDMAERR;
 712                                 device_printf(slp->sl_dev,
 713                                         "len %x >= datalen %x\n",
 714                                         len, slp->sl_scp.scp_datalen);
 715                         }
 716                 }
 717                 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
 718                 {
 719                         if (sc->sc_cnt != cnt ||
 720                             sc->sc_cnt > cb->ccb_scp.scp_datalen)
 721                         {
 722                                 slp->sl_error |= PDMAERR;
 723                                 device_printf(slp->sl_dev,
 724                                         "data read count error %x != %x (%x)\n",
 725                                         sc->sc_cnt, cnt,
 726                                         cb->ccb_scp.scp_datalen);
 727                         }
 728                 }
 729                 sc->sc_cnt = cnt;
 730                 scsi_low_data_finish(slp);
 731         }
 732         else
 733         {
 734
 735                 device_printf(slp->sl_dev, "data phase miss\n");
 736                 slp->sl_error |= PDMAERR;
 737         }
 738 }
 739
 740 #define RFIFO_CRIT      64
 741 #define WFIFO_CRIT      32
 742
 743 static void
 744 nsp_data_padding(sc, direction, count)
 745         struct nsp_softc *sc;
 746         int direction;
 747         u_int count;
 748 {
 749
 750         if (count > NSP_MAX_DATA_SIZE)
 751                 count = NSP_MAX_DATA_SIZE;
 752
 753         nsp_cr_write_1(sc->port_res, NSPR_XFERMR, XFERMR_XEN | XFERMR_IO8);
 754         if (direction == SCSI_LOW_READ)
 755         {
 756                 while (count -- > 0)
 757                         (void) bus_read_1(sc->port_res, nsp_fifodr);
 758         }
 759         else
 760         {
 761                 while (count -- > 0)
 762                         (void) bus_write_1(sc->port_res, nsp_fifodr, 0);
 763         }
 764         nsp_cr_write_1(sc->port_res, NSPR_XFERMR, sc->sc_xfermr);
 765 }
 766
 767 static int
 768 nsp_read_fifo(sc, suspendio)
 769         struct nsp_softc *sc;
 770         int suspendio;
 771 {
 772         struct scsi_low_softc *slp = &sc->sc_sclow;
 773         u_int res;
 774
 775         res = nsp_fifo_count(sc);
 776         if (res == sc->sc_cnt)
 777                 return 0;
 778
 779 #ifdef  NSP_DEBUG
 780         if (res < sc->sc_cnt || res == (u_int) -1)
 781         {
 782                 device_printf(slp->sl_dev,
 783                     "strange fifo ack count 0x%x < 0x%x\n", res, sc->sc_cnt);
 784                 return 0;
 785         }
 786 #endif  /* NSP_DEBUG */
 787
 788         res = res - sc->sc_cnt;
 789         if (res > slp->sl_scp.scp_datalen)
 790         {
 791                 if ((slp->sl_error & PDMAERR) == 0)
 792                 {
 793                         device_printf(slp->sl_dev, "data overrun 0x%x > 0x%x\n",
 794                             res, slp->sl_scp.scp_datalen);
 795                 }
 796
 797                 slp->sl_error |= PDMAERR;
 798                 slp->sl_scp.scp_datalen = 0;
 799
 800                 if ((slp->sl_flags & HW_READ_PADDING) == 0)
 801                 {
 802                         device_printf(slp->sl_dev, "read padding required\n");
 803                         return 0;
 804                 }
 805
 806                 nsp_data_padding(sc, SCSI_LOW_READ, res);
 807                 sc->sc_cnt += res;
 808                 return 1;       /* padding start */
 809         }
 810
 811         if (suspendio > 0 && slp->sl_scp.scp_datalen >= suspendio)
 812                 res = suspendio;
 813
 814         if ((sc->sc_xfermr & (XFERMR_MEM32 | XFERMR_MEM8)) != 0)
 815         {
 816                 if ((sc->sc_xfermr & XFERMR_MEM32) != 0)
 817                 {
 818                         res &= ~3;
 819                         bus_read_region_4(sc->mem_res, 0,
 820                                 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
 821                 }
 822                 else
 823                 {
 824                         bus_read_region_1(sc->mem_res, 0,
 825                                 (u_int8_t *) slp->sl_scp.scp_data, res);
 826                 }
 827         }
 828         else
 829         {
 830                 if ((sc->sc_xfermr & XFERMR_IO32) != 0)
 831                 {
 832                         res &= ~3;
 833                         bus_read_multi_4(sc->port_res, nsp_fifodr,
 834                                 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
 835                 }
 836                 else
 837                 {
 838                         bus_read_multi_1(sc->port_res, nsp_fifodr,
 839                                 (u_int8_t *) slp->sl_scp.scp_data, res);
 840                 }
 841         }
 842
 843         if (nsp_cr_read_1(sc->port_res, NSPR_PARITYR) & PARITYR_PE)
 844         {
 845                 nsp_cr_write_1(sc->port_res, NSPR_PARITYR,
 846                                PARITYR_ENABLE | PARITYR_CLEAR);
 847                 scsi_low_assert_msg(slp, slp->sl_Tnexus, SCSI_LOW_MSG_ERROR, 1);
 848         }
 849
 850         slp->sl_scp.scp_data += res;
 851         slp->sl_scp.scp_datalen -= res;
 852         sc->sc_cnt += res;
 853         return 0;
 854 }
 855
 856 static int
 857 nsp_write_fifo(sc, suspendio)
 858         struct nsp_softc *sc;
 859         int suspendio;
 860 {
 861         struct scsi_low_softc *slp = &sc->sc_sclow;
 862         u_int res;
 863         register u_int8_t stat;
 864
 865         if (suspendio > 0)
 866         {
 867 #ifdef  NSP_DEBUG
 868                 if ((slp->sl_scp.scp_datalen % WFIFO_CRIT) != 0)
 869                 {
 870                         device_printf(slp->sl_dev,
 871                             "strange write length 0x%x\n",
 872                             slp->sl_scp.scp_datalen);
 873                 }
 874 #endif  /* NSP_DEBUG */
 875                 res = slp->sl_scp.scp_datalen % suspendio;
 876                 if (res == 0)
 877                 {
 878                         res = suspendio;
 879                 }
 880         }
 881         else
 882         {
 883                 res = WFIFO_CRIT;
 884         }
 885
 886         if (res > slp->sl_scp.scp_datalen)
 887                 res = slp->sl_scp.scp_datalen;
 888
 889         /* XXX: reconfirm! */
 890         stat = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
 891         if (stat != PHASE_DATAOUT)
 892                 return 0;
 893
 894         if ((sc->sc_xfermr & (XFERMR_MEM32 | XFERMR_MEM8)) != 0)
 895         {
 896                 if ((sc->sc_xfermr & XFERMR_MEM32) != 0)
 897                 {
 898                         bus_write_region_4(sc->mem_res, 0,
 899                                 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
 900                 }
 901                 else
 902                 {
 903                         bus_write_region_1(sc->mem_res, 0,
 904                                 (u_int8_t *) slp->sl_scp.scp_data, res);
 905                 }
 906         }
 907         else
 908         {
 909                 if ((sc->sc_xfermr & XFERMR_IO32) != 0)
 910                 {
 911                         bus_write_multi_4(sc->port_res, nsp_fifodr,
 912                                 (u_int32_t *) slp->sl_scp.scp_data, res >> 2);
 913                 }
 914                 else
 915                 {
 916                         bus_write_multi_1(sc->port_res, nsp_fifodr,
 917                                 (u_int8_t *) slp->sl_scp.scp_data, res);
 918                 }
 919         }
 920
 921         slp->sl_scp.scp_datalen -= res;
 922         slp->sl_scp.scp_data += res;
 923         sc->sc_cnt += res;
 924         return 0;
 925 }
 926
 927 static int
 928 nsp_wait_interrupt(sc)
 929         struct nsp_softc *sc;
 930 {
 931         int tout;
 932         register u_int8_t isrc;
 933
 934         for (tout = 0; tout < DEV_BSIZE / 10; tout ++)
 935         {
 936                 isrc = bus_read_1(sc->port_res, nsp_irqsr);
 937                 if ((isrc & (IRQSR_SCSI | IRQSR_FIFO)) != 0)
 938                 {
 939                         if ((isrc & IRQSR_FIFO) != 0)
 940                         {
 941                                 bus_write_1(sc->port_res,
 942                                         nsp_irqcr, IRQCR_FIFOCL);
 943                         }
 944                         return 1;
 945                 }
 946                 DELAY(1);
 947         }
 948         return 0;
 949 }
 950
 951 static void
 952 nsp_pio_read(sc, suspendio)
 953         struct nsp_softc *sc;
 954         int suspendio;
 955 {
 956         struct scsi_low_softc *slp = &sc->sc_sclow;
 957         int tout, padding, datalen;
 958         register u_int8_t stat, fstat;
 959
 960         padding = 0;
 961         tout = sc->sc_tmaxcnt;
 962         slp->sl_flags |= HW_PDMASTART;
 963         datalen = slp->sl_scp.scp_datalen;
 964
 965 ReadLoop:
 966         while (1)
 967         {
 968                 stat = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
 969                 if (stat == (u_int8_t) -1)
 970                         return;
 971
 972                 /* out of data phase */
 973                 if ((stat & SCBUSMON_PHMASK) != PHASE_DATAIN)
 974                 {
 975                         nsp_read_fifo(sc, 0);
 976                         return;
 977                 }
 978
 979                 /* data phase */
 980                 fstat = bus_read_1(sc->port_res, nsp_fifosr);
 981                 if ((fstat & FIFOSR_FULLEMP) != 0)
 982                 {
 983                         if ((sc->sc_icr & SCIENR_FIFO) != 0)
 984                         {
 985                                 bus_write_1(sc->port_res, nsp_irqcr,
 986                                                   IRQCR_FIFOCL);
 987                         }
 988
 989                         if (suspendio > 0)
 990                         {
 991                                 padding |= nsp_read_fifo(sc, suspendio);
 992                         }
 993                         else
 994                         {
 995                                 padding |= nsp_read_fifo(sc, 0);
 996                         }
 997
 998                         if ((sc->sc_icr & SCIENR_FIFO) != 0)
 999                                 break;
1000                 }
1001                 else
1002                 {
1003                         if (padding == 0 && slp->sl_scp.scp_datalen <= 0)
1004                                 return;
1005
1006                         if ((sc->sc_icr & SCIENR_FIFO) != 0)
1007                                 break;
1008
1009                         DELAY(1);
1010                 }
1011
1012                 if ((-- tout) <= 0)
1013                 {
1014                         device_printf(slp->sl_dev, "nsp_pio_read: timeout\n");
1015                         return;
1016                 }
1017         }
1018
1019
1020         if (slp->sl_scp.scp_datalen > 0 &&
1021             slp->sl_scp.scp_datalen > datalen - nsp_read_interrupt_bytes)
1022         {
1023                 if (nsp_wait_interrupt(sc) != 0)
1024                         goto ReadLoop;
1025         }
1026 }
1027
1028 static void
1029 nsp_pio_write(sc, suspendio)
1030         struct nsp_softc *sc;
1031         int suspendio;
1032 {
1033         struct scsi_low_softc *slp = &sc->sc_sclow;
1034         u_int rcount, acount;
1035         int tout, datalen;
1036         register u_int8_t stat, fstat;
1037
1038         tout = sc->sc_tmaxcnt;
1039         slp->sl_flags |= HW_PDMASTART;
1040         datalen = slp->sl_scp.scp_datalen;
1041
1042 WriteLoop:
1043         while (1)
1044         {
1045                 stat = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON) & SCBUSMON_PHMASK;
1046                 if (stat != PHASE_DATAOUT)
1047                         return;
1048
1049                 if (slp->sl_scp.scp_datalen <= 0)
1050                 {
1051                         if (sc->sc_dataout_timeout == 0)
1052                                 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1053                         return;
1054                 }
1055
1056                 fstat = bus_read_1(sc->port_res, nsp_fifosr);
1057                 if ((fstat & FIFOSR_FULLEMP) != 0)
1058                 {
1059                         if ((sc->sc_icr & SCIENR_FIFO) != 0)
1060                         {
1061                                 bus_write_1(sc->port_res, nsp_irqcr,
1062                                                   IRQCR_FIFOCL);
1063                         }
1064
1065                         if (suspendio > 0)
1066                         {
1067                                 /* XXX:IMPORTANT:
1068                                  * To avoid timeout of pcmcia bus
1069                                  * (not scsi bus!), we should check
1070                                  * the scsi device sends us request
1071                                  * signals, which means the scsi device
1072                                  * is ready to receive data without
1073                                  * heavy delays.
1074                                  */
1075                                 if ((slp->sl_scp.scp_datalen % suspendio) == 0)
1076                                 {
1077                                         /* Step I:
1078                                          * fill the nsp fifo, and waiting for
1079                                          * the fifo empty.
1080                                          */
1081                                         nsp_write_fifo(sc, 0);
1082                                 }
1083                                 else
1084                                 {
1085                                         /* Step II:
1086                                          * check the request singals.
1087                                          */
1088                                         acount = nsp_fifo_count(sc);
1089                                         rcount = nsp_request_count(sc);
1090                                         if (rcount <= acount)
1091                                         {
1092                                                 nsp_write_fifo(sc, 0);
1093 #ifdef  NSP_STATICS
1094                                                 nsp_statics.device_busy ++;
1095 #endif  /* NSP_STATICS */
1096                                         }
1097                                         else
1098                                         {
1099                                                 nsp_write_fifo(sc, suspendio);
1100 #ifdef  NSP_STATICS
1101                                                 nsp_statics.device_data_write ++;
1102 #endif  /* NSP_STATICS */
1103                                         }
1104                                 }
1105                         }
1106                         else
1107                         {
1108                                 nsp_write_fifo(sc, 0);
1109                         }
1110
1111                         if ((sc->sc_icr & SCIENR_FIFO) != 0)
1112                                 break;
1113                 }
1114                 else
1115                 {
1116                         if ((sc->sc_icr & SCIENR_FIFO) != 0)
1117                                 break;
1118
1119                         DELAY(1);
1120                 }
1121
1122                 if ((-- tout) <= 0)
1123                 {
1124                         device_printf(slp->sl_dev, "nsp_pio_write: timeout\n");
1125                         return;
1126                 }
1127         }
1128
1129         if (slp->sl_scp.scp_datalen > 0 &&
1130             slp->sl_scp.scp_datalen > datalen - nsp_write_interrupt_bytes)
1131         {
1132                 if (nsp_wait_interrupt(sc) != 0)
1133                         goto WriteLoop;
1134         }
1135 }
1136
1137 static int
1138 nsp_negate_signal(struct nsp_softc *sc, u_int8_t mask, u_char *s)
1139 {
1140         struct scsi_low_softc *slp = &sc->sc_sclow;
1141         int wc;
1142         u_int8_t regv;
1143
1144         for (wc = 0; wc < NSP_DELAY_MAX / NSP_DELAY_INTERVAL; wc ++)
1145         {
1146                 regv = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
1147                 if (regv == (u_int8_t) -1)
1148                         return -1;
1149                 if ((regv & mask) == 0)
1150                         return 1;
1151                 DELAY(NSP_DELAY_INTERVAL);
1152         }
1153
1154         device_printf(slp->sl_dev, "%s nsp_negate_signal timeout\n", s);
1155         return -1;
1156 }
1157
1158 static int
1159 nsp_xfer(sc, buf, len, phase, clear_atn)
1160         struct nsp_softc *sc;
1161         u_int8_t *buf;
1162         int len;
1163         int phase;
1164         int clear_atn;
1165 {
1166         int ptr, rv;
1167
1168         for (ptr = 0; len > 0; len --, ptr ++)
1169         {
1170                 rv = nsp_expect_signal(sc, phase, SCBUSMON_REQ);
1171                 if (rv <= 0)
1172                         goto out;
1173
1174                 if (len == 1 && clear_atn != 0)
1175                 {
1176                         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR,
1177                                        SCBUSCR_ADIR | SCBUSCR_ACKEN);
1178                         SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
1179                 }
1180
1181                 if (phase & SCBUSMON_IO)
1182                 {
1183                         buf[ptr] = nsp_cr_read_1(sc->port_res, NSPR_DATAACK);
1184                 }
1185                 else
1186                 {
1187                         nsp_cr_write_1(sc->port_res, NSPR_DATAACK, buf[ptr]);
1188                 }
1189                 nsp_negate_signal(sc, SCBUSMON_ACK, "xfer<ACK>");
1190         }
1191
1192 out:
1193         return len;
1194 }
1195
1196 /**************************************************************
1197  * disconnect & reselect (HW low)
1198  **************************************************************/
1199 static int
1200 nsp_reselected(sc)
1201         struct nsp_softc *sc;
1202 {
1203         struct scsi_low_softc *slp = &sc->sc_sclow;
1204         struct targ_info *ti;
1205         u_int sid;
1206         u_int8_t cr;
1207
1208         sid = (u_int) nsp_cr_read_1(sc->port_res, NSPR_RESELR);
1209         sid &= ~sc->sc_idbit;
1210         sid = ffs(sid) - 1;
1211         if ((ti = scsi_low_reselected(slp, sid)) == NULL)
1212                 return EJUSTRETURN;
1213
1214         nsp_negate_signal(sc, SCBUSMON_SEL, "reselect<SEL>");
1215
1216         cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR);
1217         cr &= ~(SCBUSCR_BSY | SCBUSCR_ATN);
1218         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
1219         cr |= SCBUSCR_ADIR | SCBUSCR_ACKEN;
1220         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
1221
1222 #ifdef  NSP_STATICS
1223         nsp_statics.reselect ++;
1224 #endif  /* NSP_STATCIS */
1225         return EJUSTRETURN;
1226 }
1227
1228 static int
1229 nsp_disconnected(sc, ti)
1230         struct nsp_softc *sc;
1231         struct targ_info *ti;
1232 {
1233         struct scsi_low_softc *slp = &sc->sc_sclow;
1234
1235         nsp_cr_write_1(sc->port_res, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
1236                         PTCLRR_REQ | PTCLRR_HOST);
1237         if ((sc->sc_icr & SCIENR_FIFO) != 0)
1238         {
1239                 sc->sc_icr &= ~SCIENR_FIFO;
1240                 nsp_cr_write_1(sc->port_res, NSPR_SCIENR, sc->sc_icr);
1241         }
1242         sc->sc_cnt = 0;
1243         sc->sc_dataout_timeout = 0;
1244 #ifdef  NSP_STATICS
1245         nsp_statics.disconnect ++;
1246 #endif  /* NSP_STATICS */
1247         scsi_low_disconnected(slp, ti);
1248         return 1;
1249 }
1250
1251 /**************************************************************
1252  * SEQUENCER
1253  **************************************************************/
1254 static void nsp_error(struct nsp_softc *, u_char *, u_int8_t, u_int8_t, u_int8_t);
1255
1256 static void
1257 nsp_error(struct nsp_softc * sc, u_char *s, u_int8_t isrc, u_int8_t ph,
1258     u_int8_t irqphs)
1259 {
1260         struct scsi_low_softc *slp = &sc->sc_sclow;
1261
1262         device_printf(slp->sl_dev, "%s\n", s);
1263         device_printf(slp->sl_dev, "isrc 0x%x scmon 0x%x irqphs 0x%x\n",
1264             (u_int) isrc, (u_int) ph, (u_int) irqphs);
1265 }
1266
1267 static int
1268 nsp_target_nexus_establish(sc)
1269         struct nsp_softc *sc;
1270 {
1271         struct scsi_low_softc *slp = &sc->sc_sclow;
1272         struct targ_info *ti = slp->sl_Tnexus;
1273         struct nsp_targ_info *nti = (void *) ti;
1274
1275         /* setup synch transfer registers */
1276         nsp_cr_write_1(sc->port_res, NSPR_SYNCR, nti->nti_reg_syncr);
1277         nsp_cr_write_1(sc->port_res, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
1278
1279         /* setup pdma fifo (minimum) */
1280         nsp_setup_fifo(sc, NSP_FIFO_ON, SCSI_LOW_READ, 0);
1281         return 0;
1282 }
1283
1284 static int
1285 nsp_lun_nexus_establish(sc)
1286         struct nsp_softc *sc;
1287 {
1288
1289         return 0;
1290 }
1291
1292 static int
1293 nsp_ccb_nexus_establish(sc)
1294         struct nsp_softc *sc;
1295 {
1296         struct scsi_low_softc *slp = &sc->sc_sclow;
1297         struct slccb *cb = slp->sl_Qnexus;
1298
1299         sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
1300
1301         /* setup pdma fifo */
1302         nsp_setup_fifo(sc, NSP_FIFO_ON,
1303                        slp->sl_scp.scp_direction, slp->sl_scp.scp_datalen);
1304
1305         if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1306         {
1307                 if (sc->sc_suspendio > 0 &&
1308                     (nsp_io_control & NSP_READ_FIFO_INTERRUPTS) != 0)
1309                 {
1310                         sc->sc_icr |= SCIENR_FIFO;
1311                         nsp_cr_write_1(sc->port_res,
1312                                        NSPR_SCIENR, sc->sc_icr);
1313                 }
1314         }
1315         else
1316         {
1317                 if (sc->sc_suspendio > 0 &&
1318                     (nsp_io_control & NSP_WRITE_FIFO_INTERRUPTS) != 0)
1319                 {
1320                         sc->sc_icr |= SCIENR_FIFO;
1321                         nsp_cr_write_1(sc->port_res,
1322                                        NSPR_SCIENR, sc->sc_icr);
1323                 }
1324         }
1325         return 0;
1326 }
1327
1328 static int
1329 nsp_phase_match(struct nsp_softc *sc, u_int8_t phase, u_int8_t stat)
1330 {
1331         struct scsi_low_softc *slp = &sc->sc_sclow;
1332
1333         if ((stat & SCBUSMON_PHMASK) != phase)
1334         {
1335                 device_printf(slp->sl_dev, "phase mismatch 0x%x != 0x%x\n",
1336                     (u_int) phase, (u_int) stat);
1337                 return EINVAL;
1338         }
1339
1340         if ((stat & SCBUSMON_REQ) == 0)
1341                 return EINVAL;
1342
1343         return 0;
1344 }
1345
1346 int
1347 nspintr(arg)
1348         void *arg;
1349 {
1350         struct nsp_softc *sc = arg;
1351         struct scsi_low_softc *slp = &sc->sc_sclow;
1352         struct targ_info *ti;
1353         struct buf *bp;
1354         u_int derror, flags;
1355         int len, rv;
1356         u_int8_t isrc, ph, irqphs, cr, regv;
1357
1358         /*******************************************
1359          * interrupt check
1360          *******************************************/
1361         if (slp->sl_flags & HW_INACTIVE)
1362                 return 0;
1363
1364         bus_write_1(sc->port_res, nsp_irqcr, IRQCR_IRQDIS);
1365         isrc = bus_read_1(sc->port_res, nsp_irqsr);
1366         if (isrc == (u_int8_t) -1 || (isrc & IRQSR_MASK) == 0)
1367         {
1368                 bus_write_1(sc->port_res, nsp_irqcr, 0);
1369                 return 0;
1370         }
1371
1372         /* XXX: IMPORTANT
1373          * Do not read an irqphs register if no scsi phase interrupt.
1374          * Unless, you should lose a scsi phase interrupt.
1375          */
1376         ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
1377         if ((isrc & IRQSR_SCSI) != 0)
1378         {
1379                 irqphs = nsp_cr_read_1(sc->port_res, NSPR_IRQPHS);
1380         }
1381         else
1382                 irqphs = 0;
1383
1384         /*
1385          * timer interrupt handler (scsi vs timer interrupts)
1386          */
1387         if (sc->sc_timer != 0)
1388         {
1389                 nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
1390                 nsp_cr_write_1(sc->port_res, NSPR_TIMERCNT, 0);
1391                 sc->sc_timer = 0;
1392         }
1393
1394         /* check a timer interrupt */
1395         regv = 0;
1396         if ((isrc & IRQSR_TIMER) != 0)
1397         {
1398                 if ((isrc & IRQSR_MASK) == IRQSR_TIMER && sc->sc_seltout == 0)
1399                 {
1400                         bus_write_1(sc->port_res, nsp_irqcr, IRQCR_TIMERCL);
1401                         return 1;
1402                 }
1403                 regv |= IRQCR_TIMERCL;
1404         }
1405
1406         /* check a fifo interrupt */
1407         if ((isrc & IRQSR_FIFO) != 0)
1408         {
1409                 regv |= IRQCR_FIFOCL;
1410         }
1411
1412         /* OK. enable all interrupts */
1413         bus_write_1(sc->port_res, nsp_irqcr, regv);
1414
1415         /*******************************************
1416          * debug section
1417          *******************************************/
1418 #ifdef  NSP_DEBUG
1419         if (nsp_debug)
1420         {
1421                 nsp_error(sc, "current status", isrc, ph, irqphs);
1422                 scsi_low_print(slp, NULL);
1423 #ifdef  KDB
1424                 if (nsp_debug > 1)
1425                         kdb_enter(KDB_WHY_CAM, "nsp");
1426 #endif  /* KDB */
1427         }
1428 #endif  /* NSP_DEBUG */
1429
1430         /*******************************************
1431          * Parse hardware SCSI irq reasons register
1432          *******************************************/
1433         if ((isrc & IRQSR_SCSI) != 0)
1434         {
1435                 if ((irqphs & IRQPHS_RST) != 0)
1436                 {
1437                         scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
1438                                          "bus reset (power off?)");
1439                         return 1;
1440                 }
1441
1442                 if ((irqphs & IRQPHS_RSEL) != 0)
1443                 {
1444                         bus_write_1(sc->port_res, nsp_irqcr, IRQCR_RESCL);
1445                         if (nsp_reselected(sc) == EJUSTRETURN)
1446                                 return 1;
1447                 }
1448
1449                 if ((irqphs & (IRQPHS_PCHG | IRQPHS_LBF)) == 0)
1450                         return 1;
1451         }
1452
1453         /*******************************************
1454          * nexus check
1455          *******************************************/
1456         if ((ti = slp->sl_Tnexus) == NULL)
1457         {
1458                 /* unknown scsi phase changes */
1459                 nsp_error(sc, "unknown scsi phase changes", isrc, ph, irqphs);
1460                 return 0;
1461         }
1462
1463         /*******************************************
1464          * aribitration & selection
1465          *******************************************/
1466         switch (ti->ti_phase)
1467         {
1468         case PH_SELSTART:
1469                 if ((ph & SCBUSMON_BSY) == 0)
1470                 {
1471                         if (sc->sc_seltout >= NSP_SELTIMEOUT)
1472                         {
1473                                 sc->sc_seltout = 0;
1474                                 nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, 0);
1475                                 return nsp_disconnected(sc, ti);
1476                         }
1477                         sc->sc_seltout ++;
1478                         nsp_start_timer(sc, NSP_TIMER_1MS);
1479                         return 1;
1480                 }
1481
1482                 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1483                 nsphw_selection_done_and_expect_msgout(sc);
1484                 return 1;
1485
1486         case PH_SELECTED:
1487                 if ((isrc & IRQSR_SCSI) == 0)
1488                         return 1;
1489
1490                 nsp_target_nexus_establish(sc);
1491                 break;
1492
1493         case PH_RESEL:
1494                 if ((isrc & IRQSR_SCSI) == 0)
1495                         return 1;
1496
1497                 nsp_target_nexus_establish(sc);
1498                 if ((ph & SCBUSMON_PHMASK) != PHASE_MSGIN)
1499                 {
1500                         device_printf(slp->sl_dev,
1501                             "unexpected phase after reselect\n");
1502                         slp->sl_error |= FATALIO;
1503                         scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1504                         return 1;
1505                 }
1506                 break;
1507
1508         case PH_DATA:
1509                 if ((isrc & IRQSR_SCSI) != 0)
1510                         break;
1511                 if ((isrc & IRQSR_FIFO) != 0)
1512                 {
1513                         if (NSP_IS_PHASE_DATA(ph) == 0)
1514                                 return 1;
1515                         irqphs = (ph & IRQPHS_PHMASK);
1516                         break;
1517                 }
1518                 return 1;
1519
1520         default:
1521                 if ((isrc & IRQSR_SCSI) == 0)
1522                         return 1;
1523                 break;
1524         }
1525
1526         /*******************************************
1527          * data phase control
1528          *******************************************/
1529         if (slp->sl_flags & HW_PDMASTART)
1530         {
1531                 if ((isrc & IRQSR_SCSI) != 0 &&
1532                      NSP_IS_IRQPHS_DATA(irqphs) == 0)
1533                 {
1534                         if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1535                                 nsp_pio_read(sc, 0);
1536                         nsp_pdma_end(sc, ti);
1537                 }
1538         }
1539
1540         /*******************************************
1541          * scsi seq
1542          *******************************************/
1543         if (slp->sl_msgphase != 0 && (irqphs & IRQPHS_LBF) != 0)
1544                 return nsp_disconnected(sc, ti);
1545
1546         /* check unexpected bus free state */
1547         if (ph == 0)
1548         {
1549                 nsp_error(sc, "unexpected bus free", isrc, ph, irqphs);
1550                 return nsp_disconnected(sc, ti);
1551         }
1552
1553         /* check normal scsi phase */
1554         switch (irqphs & IRQPHS_PHMASK)
1555         {
1556         case IRQPHS_CMD:
1557                 if (nsp_phase_match(sc, PHASE_CMD, ph) != 0)
1558                         return 1;
1559
1560                 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1561                 if (scsi_low_cmd(slp, ti) != 0)
1562                 {
1563                         scsi_low_attention(slp);
1564                 }
1565
1566                 nsp_cr_write_1(sc->port_res, NSPR_CMDCR, CMDCR_PTCLR);
1567                 for (len = 0; len < slp->sl_scp.scp_cmdlen; len ++)
1568                         nsp_cr_write_1(sc->port_res, NSPR_CMDDR,
1569                                        slp->sl_scp.scp_cmd[len]);
1570
1571                 nsp_cr_write_1(sc->port_res, NSPR_CMDCR, CMDCR_PTCLR | CMDCR_EXEC);
1572                 break;
1573
1574         case IRQPHS_DATAOUT:
1575                 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1576                 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1577                 {
1578                         scsi_low_attention(slp);
1579                 }
1580
1581                 nsp_pio_write(sc, sc->sc_suspendio);
1582                 break;
1583
1584         case IRQPHS_DATAIN:
1585                 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1586                 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1587                 {
1588                         scsi_low_attention(slp);
1589                 }
1590
1591                 nsp_pio_read(sc, sc->sc_suspendio);
1592                 break;
1593
1594         case IRQPHS_STATUS:
1595                 if (nsp_phase_match(sc, PHASE_STATUS, ph) != 0)
1596                         return 1;
1597
1598                 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1599                 regv = nsp_cr_read_1(sc->port_res, NSPR_DATA);
1600                 if (nsp_cr_read_1(sc->port_res, NSPR_PARITYR) & PARITYR_PE)
1601                 {
1602                         nsp_cr_write_1(sc->port_res, NSPR_PARITYR,
1603                                        PARITYR_ENABLE | PARITYR_CLEAR);
1604                         derror = SCSI_LOW_DATA_PE;
1605                 }
1606                 else
1607                         derror = 0;
1608
1609                 /* assert ACK */
1610                 cr = SCBUSCR_ACK | nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR);
1611                 nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
1612
1613                 if (scsi_low_statusin(slp, ti, derror | regv) != 0)
1614                 {
1615                         scsi_low_attention(slp);
1616                 }
1617
1618                 /* check REQ nagated */
1619                 nsp_negate_signal(sc, SCBUSMON_REQ, "statin<REQ>");
1620
1621                 /* deassert ACK */
1622                 cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
1623                 nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
1624                 break;
1625
1626         case IRQPHS_MSGOUT:
1627                 if (nsp_phase_match(sc, PHASE_MSGOUT, ph) != 0)
1628                         return 1;
1629
1630 #ifdef  NSP_MSGOUT_SERIALIZE
1631                 /*
1632                  * XXX: NSP QUIRK
1633                  * NSP invoke interrupts only in the case of scsi phase changes,
1634                  * therefore we should poll the scsi phase here to catch
1635                  * the next "msg out" if exists (no scsi phase changes).
1636                  */
1637                 rv = len = 16;
1638                 do {
1639                         SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1640                         flags = (ti->ti_ophase != ti->ti_phase) ?
1641                                         SCSI_LOW_MSGOUT_INIT : 0;
1642                         len = scsi_low_msgout(slp, ti, flags);
1643
1644                         if (len > 1 && slp->sl_atten == 0)
1645                         {
1646                                 scsi_low_attention(slp);
1647                         }
1648
1649                         if (nsp_xfer(sc, ti->ti_msgoutstr, len, PHASE_MSGOUT,
1650                                      slp->sl_clear_atten) != 0)
1651                         {
1652                                 slp->sl_error |= FATALIO;
1653                                 nsp_error(sc, "MSGOUT: xfer short",
1654                                                     isrc, ph, irqphs);
1655                         }
1656
1657                         /* catch a next signal */
1658                         rv = nsp_expect_signal(sc, PHASE_MSGOUT, SCBUSMON_REQ);
1659                 }
1660                 while (rv > 0 && len -- > 0);
1661
1662 #else   /* !NSP_MSGOUT_SERIALIZE */
1663                 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1664                 flags = SCSI_LOW_MSGOUT_UNIFY;
1665                 if (ti->ti_ophase != ti->ti_phase)
1666                         flags |= SCSI_LOW_MSGOUT_INIT;
1667                 len = scsi_low_msgout(slp, ti, flags);
1668
1669                 if (len > 1 && slp->sl_atten == 0)
1670                 {
1671                         scsi_low_attention(slp);
1672                 }
1673
1674                 if (nsp_xfer(sc, ti->ti_msgoutstr, len, PHASE_MSGOUT,
1675                              slp->sl_clear_atten) != 0)
1676                 {
1677                         nsp_error(sc, "MSGOUT: xfer short", isrc, ph, irqphs);
1678                 }
1679
1680 #endif  /* !NSP_MSGOUT_SERIALIZE */
1681                 break;
1682
1683         case IRQPHS_MSGIN:
1684                 if (nsp_phase_match(sc, PHASE_MSGIN, ph) != 0)
1685                         return 1;
1686
1687                 /*
1688                  * XXX: NSP QUIRK
1689                  * NSP invoke interrupts only in the case of scsi phase changes,
1690                  * therefore we should poll the scsi phase here to catch
1691                  * the next "msg in" if exists (no scsi phase changes).
1692                  */
1693                 rv = len = 16;
1694                 do {
1695                         SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1696
1697                         /* read a data */
1698                         regv = nsp_cr_read_1(sc->port_res, NSPR_DATA);
1699                         if (nsp_cr_read_1(sc->port_res, NSPR_PARITYR) & PARITYR_PE)
1700                         {
1701                                 nsp_cr_write_1(sc->port_res,
1702                                                NSPR_PARITYR,
1703                                                PARITYR_ENABLE | PARITYR_CLEAR);
1704                                 derror = SCSI_LOW_DATA_PE;
1705                         }
1706                         else
1707                         {
1708                                 derror = 0;
1709                         }
1710
1711                         /* assert ack */
1712                         cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR) | SCBUSCR_ACK;
1713                         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
1714
1715                         if (scsi_low_msgin(slp, ti, regv | derror) == 0)
1716                         {
1717                                 if (scsi_low_is_msgout_continue(ti, 0) != 0)
1718                                 {
1719                                         scsi_low_attention(slp);
1720                                 }
1721                         }
1722
1723                         /* check REQ nagated */
1724                         nsp_negate_signal(sc, SCBUSMON_REQ, "msgin<REQ>");
1725
1726                         /* deassert ack */
1727                         cr = nsp_cr_read_1(sc->port_res, NSPR_SCBUSCR) & (~SCBUSCR_ACK);
1728                         nsp_cr_write_1(sc->port_res, NSPR_SCBUSCR, cr);
1729
1730                         /* catch a next signal */
1731                         rv = nsp_expect_signal(sc, PHASE_MSGIN, SCBUSMON_REQ);
1732                 }
1733                 while (rv > 0 && len -- > 0);
1734                 break;
1735
1736         default:
1737                 slp->sl_error |= FATALIO;
1738                 nsp_error(sc, "unknown scsi phase", isrc, ph, irqphs);
1739                 break;
1740         }
1741
1742         return 1;
1743
1744 #if     0
1745 timerout:
1746         nsp_start_timer(sc, NSP_TIMER_1MS);
1747         return 0;
1748 #endif
1749 }
1750
1751 static int
1752 nsp_timeout(sc)
1753         struct nsp_softc *sc;
1754 {
1755         struct scsi_low_softc *slp = &sc->sc_sclow;
1756         int tout;
1757         u_int8_t ph, regv;
1758
1759         if (slp->sl_Tnexus == NULL)
1760                 return 0;
1761
1762         ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
1763         switch (ph & SCBUSMON_PHMASK)
1764         {
1765         case PHASE_DATAOUT:
1766                 if (sc->sc_dataout_timeout == 0)
1767                         break;
1768
1769                 /* check a fifo empty */
1770                 regv = bus_read_1(sc->port_res, nsp_fifosr);
1771                 if ((regv & FIFOSR_FULLEMP) == 0)
1772                         break;
1773                 bus_write_1(sc->port_res, nsp_irqcr, IRQCR_FIFOCL);
1774
1775                 /* check still requested */
1776                 ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
1777                 if ((ph & SCBUSMON_REQ) == 0)
1778                         break;
1779                 /* check timeout */
1780                 if ((-- sc->sc_dataout_timeout) > 0)
1781                         break;
1782
1783                 slp->sl_error |= PDMAERR;
1784                 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1785                 {
1786                         device_printf(slp->sl_dev, "write padding required\n");
1787                         break;
1788                 }
1789
1790                 tout = NSP_DELAY_MAX;
1791                 while (tout -- > 0)
1792                 {
1793                         ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
1794                         if ((ph & SCBUSMON_PHMASK) != PHASE_DATAOUT)
1795                                 break;
1796                         regv = bus_read_1(sc->port_res, nsp_fifosr);
1797                         if ((regv & FIFOSR_FULLEMP) == 0)
1798                         {
1799                                 DELAY(1);
1800                                 continue;
1801                         }
1802
1803                         bus_write_1(sc->port_res, nsp_irqcr, IRQCR_FIFOCL);
1804                         nsp_data_padding(sc, SCSI_LOW_WRITE, 32);
1805                 }
1806                 ph = nsp_cr_read_1(sc->port_res, NSPR_SCBUSMON);
1807                 if ((ph & SCBUSMON_PHMASK) == PHASE_DATAOUT)
1808                         sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1809                 break;
1810
1811         default:
1812                 break;
1813         }
1814         return 0;
1815 }