2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>.
3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $
30 * NVIDIA nForce MCP Networking Adapter driver
32 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA
33 * through their web site.
35 * All mainstream nForce and nForce2 motherboards are supported. This module
36 * is as stable, sometimes more stable, than the linux version. (Recent
37 * Linux stability issues seem to be related to some issues with newer
38 * distributions using GCC 3.x, however this don't appear to effect FreeBSD
41 * In accordance with the NVIDIA distribution license it is necessary to
42 * link this module against the nvlibnet.o binary object included in the
43 * Linux driver source distribution. The binary component is not modified in
44 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c
45 * linux kernel module "wrapper".
47 * The Linux driver uses a common code API that is shared between Win32 and
48 * i386 Linux. This abstracts the low level driver functions and uses
49 * callbacks and hooks to access the underlying hardware device. By using
50 * this same API in a FreeBSD kernel module it is possible to support the
51 * hardware without breaching the Linux source distributions licensing
52 * requirements, or obtaining the hardware programming specifications.
54 * Although not conventional, it works, and given the relatively small
55 * amount of hardware centric code, it's hopefully no more buggy than its
58 * NVIDIA now support the nForce3 AMD64 platform, however I have been
59 * unable to access such a system to verify support. However, the code is
60 * reported to work with little modification when compiled with the AMD64
61 * version of the NVIDIA Linux library. All that should be necessary to make
62 * the driver work is to link it directly into the kernel, instead of as a
63 * module, and apply the docs/amd64.diff patch in this source distribution to
64 * the NVIDIA Linux driver source.
66 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well
67 * as recent versions of DragonFly.
69 * Written by Quinton Dolan <q@onthenet.com.au>
70 * Portions based on existing FreeBSD network drivers.
71 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files.
74 #include <sys/cdefs.h>
75 __FBSDID("$FreeBSD$");
77 #include <sys/param.h>
78 #include <sys/systm.h>
79 #include <sys/sockio.h>
81 #include <sys/malloc.h>
82 #include <sys/kernel.h>
83 #include <sys/socket.h>
84 #include <sys/sysctl.h>
85 #include <sys/queue.h>
86 #include <sys/module.h>
89 #include <net/if_arp.h>
90 #include <net/ethernet.h>
91 #include <net/if_dl.h>
92 #include <net/if_media.h>
93 #include <net/if_types.h>
95 #include <net/if_vlan_var.h>
97 #include <machine/bus.h>
98 #include <machine/resource.h>
100 #include <vm/vm.h> /* for vtophys */
101 #include <vm/pmap.h> /* for vtophys */
103 #include <sys/rman.h>
105 #include <dev/pci/pcireg.h>
106 #include <dev/pci/pcivar.h>
107 #include <dev/mii/mii.h>
108 #include <dev/mii/miivar.h>
109 #include "miibus_if.h"
111 /* Include NVIDIA Linux driver header files */
112 #include <contrib/dev/nve/nvenet_version.h>
114 #include <contrib/dev/nve/basetype.h>
115 #include <contrib/dev/nve/phy.h>
116 #include "os+%DIKED-nve.h"
117 #include <contrib/dev/nve/drvinfo.h>
118 #include <contrib/dev/nve/adapter.h>
121 #include <dev/nve/if_nvereg.h>
123 MODULE_DEPEND(nve, pci, 1, 1, 1);
124 MODULE_DEPEND(nve, ether, 1, 1, 1);
125 MODULE_DEPEND(nve, miibus, 1, 1, 1);
127 static int nve_probe(device_t);
128 static int nve_attach(device_t);
129 static int nve_detach(device_t);
130 static void nve_init(void *);
131 static void nve_init_locked(struct nve_softc *);
132 static void nve_stop(struct nve_softc *);
133 static int nve_shutdown(device_t);
134 static int nve_init_rings(struct nve_softc *);
135 static void nve_free_rings(struct nve_softc *);
137 static void nve_ifstart(struct ifnet *);
138 static void nve_ifstart_locked(struct ifnet *);
139 static int nve_ioctl(struct ifnet *, u_long, caddr_t);
140 static void nve_intr(void *);
141 static void nve_tick(void *);
142 static void nve_setmulti(struct nve_softc *);
143 static void nve_watchdog(struct nve_softc *);
144 static void nve_update_stats(struct nve_softc *);
146 static int nve_ifmedia_upd(struct ifnet *);
147 static void nve_ifmedia_upd_locked(struct ifnet *);
148 static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *);
149 static int nve_miibus_readreg(device_t, int, int);
150 static int nve_miibus_writereg(device_t, int, int, int);
152 static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int);
153 static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int);
155 static NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK);
156 static NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK);
157 static NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX);
158 static NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX);
159 static NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32);
160 static NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32);
161 static NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *);
162 static NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID);
163 static NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32);
164 static NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8);
165 static NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32);
166 static NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *);
167 static NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID);
168 static NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID);
169 static NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32);
170 static NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID);
172 static NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8);
173 static PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID);
174 static NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32);
175 static NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *);
176 static NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID);
177 static NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID);
178 static PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID);
180 static device_method_t nve_methods[] = {
181 /* Device interface */
182 DEVMETHOD(device_probe, nve_probe),
183 DEVMETHOD(device_attach, nve_attach),
184 DEVMETHOD(device_detach, nve_detach),
185 DEVMETHOD(device_shutdown, nve_shutdown),
188 DEVMETHOD(miibus_readreg, nve_miibus_readreg),
189 DEVMETHOD(miibus_writereg, nve_miibus_writereg),
194 static driver_t nve_driver = {
197 sizeof(struct nve_softc)
200 static devclass_t nve_devclass;
202 static int nve_pollinterval = 0;
203 SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW,
204 &nve_pollinterval, 0, "delay between interface polls");
206 DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0);
207 DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0);
209 static struct nve_type nve_devs[] = {
210 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN,
211 "NVIDIA nForce MCP Networking Adapter"},
212 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN,
213 "NVIDIA nForce2 MCP2 Networking Adapter"},
214 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1,
215 "NVIDIA nForce2 400 MCP4 Networking Adapter"},
216 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2,
217 "NVIDIA nForce2 400 MCP5 Networking Adapter"},
218 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1,
219 "NVIDIA nForce3 MCP3 Networking Adapter"},
220 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN,
221 "NVIDIA nForce3 250 MCP6 Networking Adapter"},
222 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4,
223 "NVIDIA nForce3 MCP7 Networking Adapter"},
224 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN1,
225 "NVIDIA nForce4 CK804 MCP8 Networking Adapter"},
226 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN2,
227 "NVIDIA nForce4 CK804 MCP9 Networking Adapter"},
228 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1,
229 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP10
230 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2,
231 "NVIDIA nForce MCP04 Networking Adapter"}, // MCP11
232 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN1,
233 "NVIDIA nForce 430 MCP12 Networking Adapter"},
234 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN2,
235 "NVIDIA nForce 430 MCP13 Networking Adapter"},
236 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1,
237 "NVIDIA nForce MCP55 Networking Adapter"},
238 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2,
239 "NVIDIA nForce MCP55 Networking Adapter"},
240 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN1,
241 "NVIDIA nForce MCP61 Networking Adapter"},
242 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN2,
243 "NVIDIA nForce MCP61 Networking Adapter"},
244 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN3,
245 "NVIDIA nForce MCP61 Networking Adapter"},
246 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN4,
247 "NVIDIA nForce MCP61 Networking Adapter"},
248 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN1,
249 "NVIDIA nForce MCP65 Networking Adapter"},
250 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN2,
251 "NVIDIA nForce MCP65 Networking Adapter"},
252 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN3,
253 "NVIDIA nForce MCP65 Networking Adapter"},
254 {PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN4,
255 "NVIDIA nForce MCP65 Networking Adapter"},
259 /* DMA MEM map callback function to get data segment physical address */
261 nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error)
267 ("Too many DMA segments returned when mapping DMA memory"));
268 *(bus_addr_t *)arg = segs->ds_addr;
271 /* DMA RX map callback function to get data segment physical address */
273 nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs,
274 bus_size_t mapsize, int error)
278 *(bus_addr_t *)arg = segs->ds_addr;
282 * DMA TX buffer callback function to allocate fragment data segment
286 nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error)
288 struct nve_tx_desc *info;
293 KASSERT(nsegs < NV_MAX_FRAGS,
294 ("Too many DMA segments returned when mapping mbuf"));
295 info->numfrags = nsegs;
296 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t));
299 /* Probe for supported hardware ID's */
301 nve_probe(device_t dev)
306 /* Check for matching PCI DEVICE ID's */
307 while (t->name != NULL) {
308 if ((pci_get_vendor(dev) == t->vid_id) &&
309 (pci_get_device(dev) == t->dev_id)) {
310 device_set_desc(dev, t->name);
311 return (BUS_PROBE_LOW_PRIORITY);
319 /* Attach driver and initialise hardware for use */
321 nve_attach(device_t dev)
323 u_char eaddr[ETHER_ADDR_LEN];
324 struct nve_softc *sc;
327 ADAPTER_OPEN_PARAMS OpenParams;
328 int error = 0, i, rid;
331 device_printf(dev, "nvenetlib.o version %s\n", DRIVER_VERSION);
333 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n");
335 sc = device_get_softc(dev);
338 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
340 callout_init_mtx(&sc->stat_callout, &sc->mtx, 0);
344 /* Preinitialize data structures */
345 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS));
347 /* Enable bus mastering */
348 pci_enable_busmaster(dev);
350 /* Allocate memory mapped address space */
352 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1,
355 if (sc->res == NULL) {
356 device_printf(dev, "couldn't map memory\n");
360 sc->sc_st = rman_get_bustag(sc->res);
361 sc->sc_sh = rman_get_bushandle(sc->res);
363 /* Allocate interrupt */
365 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
366 RF_SHAREABLE | RF_ACTIVE);
368 if (sc->irq == NULL) {
369 device_printf(dev, "couldn't map interrupt\n");
373 /* Allocate DMA tags */
374 error = bus_dma_tag_create(bus_get_dma_tag(dev),
375 4, 0, BUS_SPACE_MAXADDR_32BIT,
376 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS,
377 NV_MAX_FRAGS, MCLBYTES, 0,
378 busdma_lock_mutex, &Giant,
381 device_printf(dev, "couldn't allocate dma tag\n");
384 error = bus_dma_tag_create(bus_get_dma_tag(dev),
385 4, 0, BUS_SPACE_MAXADDR_32BIT,
386 BUS_SPACE_MAXADDR, NULL, NULL,
387 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1,
388 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0,
389 busdma_lock_mutex, &Giant,
392 device_printf(dev, "couldn't allocate dma tag\n");
395 error = bus_dma_tag_create(bus_get_dma_tag(dev),
396 4, 0, BUS_SPACE_MAXADDR_32BIT,
397 BUS_SPACE_MAXADDR, NULL, NULL,
398 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1,
399 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0,
400 busdma_lock_mutex, &Giant,
403 device_printf(dev, "couldn't allocate dma tag\n");
406 /* Allocate DMA safe memory and get the DMA addresses. */
407 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc,
408 BUS_DMA_WAITOK, &sc->tmap);
410 device_printf(dev, "couldn't allocate dma memory\n");
413 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE);
414 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc,
415 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb,
418 device_printf(dev, "couldn't map dma memory\n");
421 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc,
422 BUS_DMA_WAITOK, &sc->rmap);
424 device_printf(dev, "couldn't allocate dma memory\n");
427 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE);
428 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc,
429 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb,
432 device_printf(dev, "couldn't map dma memory\n");
435 /* Initialize rings. */
436 if (nve_init_rings(sc)) {
437 device_printf(dev, "failed to init rings\n");
441 /* Setup NVIDIA API callback routines */
444 osapi->pfnAllocMemory = nve_osalloc;
445 osapi->pfnFreeMemory = nve_osfree;
446 osapi->pfnAllocMemoryEx = nve_osallocex;
447 osapi->pfnFreeMemoryEx = nve_osfreeex;
448 osapi->pfnClearMemory = nve_osclear;
449 osapi->pfnStallExecution = nve_osdelay;
450 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf;
451 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf;
452 osapi->pfnPacketWasSent = nve_ospackettx;
453 osapi->pfnPacketWasReceived = nve_ospacketrx;
454 osapi->pfnLinkStateHasChanged = nve_oslinkchg;
455 osapi->pfnAllocTimer = nve_osalloctimer;
456 osapi->pfnFreeTimer = nve_osfreetimer;
457 osapi->pfnInitializeTimer = nve_osinittimer;
458 osapi->pfnSetTimer = nve_ossettimer;
459 osapi->pfnCancelTimer = nve_oscanceltimer;
460 osapi->pfnPreprocessPacket = nve_ospreprocpkt;
461 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq;
462 osapi->pfnIndicatePackets = nve_osindicatepkt;
463 osapi->pfnLockAlloc = nve_oslockalloc;
464 osapi->pfnLockAcquire = nve_oslockacquire;
465 osapi->pfnLockRelease = nve_oslockrelease;
466 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt;
469 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN;
471 /* TODO - We don't support hardware offload yet */
475 /* Set NVIDIA API startup parameters */
476 OpenParams.MaxDpcLoop = 2;
477 OpenParams.MaxRxPkt = RX_RING_SIZE;
478 OpenParams.MaxTxPkt = TX_RING_SIZE;
479 OpenParams.SentPacketStatusSuccess = 1;
480 OpenParams.SentPacketStatusFailure = 0;
481 OpenParams.MaxRxPktToAccumulate = 6;
482 OpenParams.ulPollInterval = nve_pollinterval;
483 OpenParams.SetForcedModeEveryNthRxPacket = 0;
484 OpenParams.SetForcedModeEveryNthTxPacket = 0;
485 OpenParams.RxForcedInterrupt = 0;
486 OpenParams.TxForcedInterrupt = 0;
487 OpenParams.pOSApi = osapi;
488 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res);
489 OpenParams.bASFEnabled = 0;
490 OpenParams.ulDescriptorVersion = sc->hwmode;
491 OpenParams.ulMaxPacketSize = sc->max_frame_size;
492 OpenParams.DeviceId = pci_get_device(dev);
494 /* Open NVIDIA Hardware API */
495 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr);
498 "failed to open NVIDIA Hardware API: 0x%x\n", error);
502 /* TODO - Add support for MODE2 hardware offload */
504 bzero(&sc->adapterdata, sizeof(sc->adapterdata));
506 sc->adapterdata.ulMediaIF = sc->media;
507 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1;
508 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata);
510 /* MAC is loaded backwards into h/w reg */
511 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr);
512 for (i = 0; i < 6; i++) {
513 eaddr[i] = sc->original_mac_addr[5 - i];
515 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr);
517 /* Display ethernet address ,... */
518 device_printf(dev, "Ethernet address %6D\n", eaddr, ":");
520 /* Allocate interface structures */
521 ifp = sc->ifp = if_alloc(IFT_ETHER);
523 device_printf(dev, "can not if_alloc()\n");
528 /* Setup interface parameters */
530 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
531 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
532 ifp->if_ioctl = nve_ioctl;
533 ifp->if_start = nve_ifstart;
534 ifp->if_init = nve_init;
535 ifp->if_mtu = ETHERMTU;
536 ifp->if_baudrate = IF_Mbps(100);
537 IFQ_SET_MAXLEN(&ifp->if_snd, TX_RING_SIZE - 1);
538 ifp->if_snd.ifq_drv_maxlen = TX_RING_SIZE - 1;
539 IFQ_SET_READY(&ifp->if_snd);
540 ifp->if_capabilities |= IFCAP_VLAN_MTU;
541 ifp->if_capenable |= IFCAP_VLAN_MTU;
543 /* Attach device for MII interface to PHY */
544 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_attach\n");
545 error = mii_attach(dev, &sc->miibus, ifp, nve_ifmedia_upd,
546 nve_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
548 device_printf(dev, "attaching PHYs failed\n");
552 /* Attach to OS's managers. */
553 ether_ifattach(ifp, eaddr);
555 /* Activate our interrupt handler. - attach last to avoid lock */
556 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
557 NULL, nve_intr, sc, &sc->sc_ih);
559 device_printf(dev, "couldn't set up interrupt handler\n");
562 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n");
571 /* Detach interface for module unload */
573 nve_detach(device_t dev)
575 struct nve_softc *sc = device_get_softc(dev);
578 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized"));
580 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n");
584 if (device_is_attached(dev)) {
589 callout_drain(&sc->stat_callout);
593 device_delete_child(dev, sc->miibus);
594 bus_generic_detach(dev);
596 /* Reload unreversed address back into MAC in original state */
597 if (sc->original_mac_addr)
598 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX,
599 sc->original_mac_addr);
601 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n");
602 /* Detach from NVIDIA hardware API */
603 if (sc->hwapi->pfnClose)
604 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE);
605 /* Release resources */
607 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih);
609 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq);
611 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res);
616 bus_dmamap_unload(sc->rtag, sc->rmap);
617 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap);
618 bus_dmamap_destroy(sc->rtag, sc->rmap);
621 bus_dma_tag_destroy(sc->mtag);
623 bus_dma_tag_destroy(sc->ttag);
625 bus_dma_tag_destroy(sc->rtag);
629 mtx_destroy(&sc->mtx);
631 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n");
636 /* Initialise interface and start it "RUNNING" */
640 struct nve_softc *sc = xsc;
648 nve_init_locked(struct nve_softc *sc)
654 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup);
658 /* Do nothing if already running */
659 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
663 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n");
665 nve_ifmedia_upd_locked(ifp);
667 /* Setup Hardware interface and allocate memory structures */
668 error = sc->hwapi->pfnInit(sc->hwapi->pADCX,
670 0, /* force full duplex */
672 0, /* force async mode */
676 device_printf(sc->dev,
677 "failed to start NVIDIA Hardware interface\n");
680 /* Set the MAC address */
681 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, IF_LLADDR(sc->ifp));
682 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
683 sc->hwapi->pfnStart(sc->hwapi->pADCX);
685 /* Setup multicast filter */
688 /* Update interface parameters */
689 ifp->if_drv_flags |= IFF_DRV_RUNNING;
690 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
692 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
694 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n");
699 /* Stop interface activity ie. not "RUNNING" */
701 nve_stop(struct nve_softc *sc)
707 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n");
712 /* Cancel tick timer */
713 callout_stop(&sc->stat_callout);
715 /* Stop hardware activity */
716 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
717 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0);
719 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n");
720 /* Shutdown interface and deallocate memory buffers */
721 if (sc->hwapi->pfnDeinit)
722 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0);
729 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
731 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n");
736 /* Shutdown interface for unload/reboot */
738 nve_shutdown(device_t dev)
740 struct nve_softc *sc;
742 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n");
744 sc = device_get_softc(dev);
746 /* Stop hardware activity */
754 /* Allocate TX ring buffers */
756 nve_init_rings(struct nve_softc *sc)
760 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n");
762 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0;
763 /* Initialise RX ring */
764 for (i = 0; i < RX_RING_SIZE; i++) {
765 struct nve_rx_desc *desc = sc->rx_desc + i;
766 struct nve_map_buffer *buf = &desc->buf;
768 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
769 if (buf->mbuf == NULL) {
770 device_printf(sc->dev, "couldn't allocate mbuf\n");
774 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
775 m_adj(buf->mbuf, ETHER_ALIGN);
777 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
779 device_printf(sc->dev, "couldn't create dma map\n");
783 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
784 nve_dmamap_rx_cb, &desc->paddr, 0);
786 device_printf(sc->dev, "couldn't dma map mbuf\n");
790 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
792 desc->buflength = buf->mbuf->m_len;
793 desc->vaddr = mtod(buf->mbuf, caddr_t);
795 bus_dmamap_sync(sc->rtag, sc->rmap,
796 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
798 /* Initialize TX ring */
799 for (i = 0; i < TX_RING_SIZE; i++) {
800 struct nve_tx_desc *desc = sc->tx_desc + i;
801 struct nve_map_buffer *buf = &desc->buf;
805 error = bus_dmamap_create(sc->mtag, 0, &buf->map);
807 device_printf(sc->dev, "couldn't create dma map\n");
812 bus_dmamap_sync(sc->ttag, sc->tmap,
813 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
815 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n");
820 /* Free the TX ring buffers */
822 nve_free_rings(struct nve_softc *sc)
826 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n");
828 for (i = 0; i < RX_RING_SIZE; i++) {
829 struct nve_rx_desc *desc = sc->rx_desc + i;
830 struct nve_map_buffer *buf = &desc->buf;
833 bus_dmamap_unload(sc->mtag, buf->map);
834 bus_dmamap_destroy(sc->mtag, buf->map);
840 for (i = 0; i < TX_RING_SIZE; i++) {
841 struct nve_tx_desc *desc = sc->tx_desc + i;
842 struct nve_map_buffer *buf = &desc->buf;
845 bus_dmamap_unload(sc->mtag, buf->map);
846 bus_dmamap_destroy(sc->mtag, buf->map);
852 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n");
855 /* Main loop for sending packets from OS to interface */
857 nve_ifstart(struct ifnet *ifp)
859 struct nve_softc *sc = ifp->if_softc;
862 nve_ifstart_locked(ifp);
867 nve_ifstart_locked(struct ifnet *ifp)
869 struct nve_softc *sc = ifp->if_softc;
870 struct nve_map_buffer *buf;
872 struct nve_tx_desc *desc;
873 ADAPTER_WRITE_DATA txdata;
876 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n");
880 /* If link is down/busy or queue is empty do nothing */
881 if (ifp->if_drv_flags & IFF_DRV_OACTIVE ||
882 IFQ_DRV_IS_EMPTY(&ifp->if_snd))
885 /* Transmit queued packets until sent or TX ring is full */
886 while (sc->pending_txs < TX_RING_SIZE) {
887 desc = sc->tx_desc + sc->cur_tx;
890 /* Get next packet to send. */
891 IFQ_DRV_DEQUEUE(&ifp->if_snd, m0);
893 /* If nothing to send, return. */
898 * On nForce4, the chip doesn't interrupt on transmit,
899 * so try to flush transmitted packets from the queue
900 * if it's getting large (see note in nve_watchdog).
902 if (sc->pending_txs > TX_RING_SIZE/2) {
903 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
904 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
905 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
908 /* Map MBUF for DMA access */
909 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0,
910 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
912 if (error && error != EFBIG) {
918 * Packet has too many fragments - defrag into new mbuf
922 m = m_defrag(m0, M_DONTWAIT);
930 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m,
931 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT);
938 /* Do sync on DMA bounce buffer */
939 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE);
942 txdata.ulNumberOfElements = desc->numfrags;
943 txdata.pvID = (PVOID)desc;
945 /* Put fragments into API element list */
946 txdata.ulTotalLength = buf->mbuf->m_len;
947 for (i = 0; i < desc->numfrags; i++) {
948 txdata.sElement[i].ulLength =
949 (ulong)desc->frags[i].ds_len;
950 txdata.sElement[i].pPhysical =
951 (PVOID)desc->frags[i].ds_addr;
954 /* Send packet to Nvidia API for transmission */
955 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata);
958 case ADAPTERERR_NONE:
959 /* Packet was queued in API TX queue successfully */
961 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE;
964 case ADAPTERERR_TRANSMIT_QUEUE_FULL:
965 /* The API TX queue is full - requeue the packet */
966 device_printf(sc->dev,
967 "nve_ifstart: transmit queue is full\n");
968 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
969 bus_dmamap_unload(sc->mtag, buf->map);
970 IFQ_DRV_PREPEND(&ifp->if_snd, buf->mbuf);
975 /* The API failed to queue/send the packet so dump it */
976 device_printf(sc->dev, "nve_ifstart: transmit error\n");
977 bus_dmamap_unload(sc->mtag, buf->map);
983 /* Set watchdog timer. */
986 /* Copy packet to BPF tap */
989 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
991 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n");
994 /* Handle IOCTL events */
996 nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
998 struct nve_softc *sc = ifp->if_softc;
999 struct ifreq *ifr = (struct ifreq *) data;
1000 struct mii_data *mii;
1003 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n");
1009 if (ifp->if_mtu == ifr->ifr_mtu) {
1013 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) {
1014 ifp->if_mtu = ifr->ifr_mtu;
1016 nve_init_locked(sc);
1023 /* Setup interface flags */
1025 if (ifp->if_flags & IFF_UP) {
1026 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1027 nve_init_locked(sc);
1032 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1038 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */
1045 /* Setup multicast filter */
1047 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
1055 /* Get/Set interface media parameters */
1056 mii = device_get_softc(sc->miibus);
1057 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1061 /* Everything else we forward to generic ether ioctl */
1062 error = ether_ioctl(ifp, command, data);
1066 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n");
1071 /* Interrupt service routine */
1075 struct nve_softc *sc = arg;
1076 struct ifnet *ifp = sc->ifp;
1078 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n");
1081 if (!ifp->if_flags & IFF_UP) {
1086 /* Handle interrupt event */
1087 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) {
1088 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1089 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1091 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1092 nve_ifstart_locked(ifp);
1094 /* If no pending packets we don't need a timeout */
1095 if (sc->pending_txs == 0)
1099 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n");
1104 /* Setup multicast filters */
1106 nve_setmulti(struct nve_softc *sc)
1109 struct ifmultiaddr *ifma;
1110 PACKET_FILTER hwfilter;
1112 u_int8_t andaddr[6], oraddr[6];
1114 NVE_LOCK_ASSERT(sc);
1116 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n");
1120 /* Initialize filter */
1121 hwfilter.ulFilterFlags = 0;
1122 for (i = 0; i < 6; i++) {
1123 hwfilter.acMulticastAddress[i] = 0;
1124 hwfilter.acMulticastMask[i] = 0;
1127 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) {
1128 /* Accept all packets */
1129 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS;
1130 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1133 /* Setup multicast filter */
1134 if_maddr_rlock(ifp);
1135 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
1138 if (ifma->ifma_addr->sa_family != AF_LINK)
1141 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
1142 for (i = 0; i < 6; i++) {
1143 u_int8_t mcaddr = addrp[i];
1144 andaddr[i] &= mcaddr;
1145 oraddr[i] |= mcaddr;
1148 if_maddr_runlock(ifp);
1149 for (i = 0; i < 6; i++) {
1150 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i];
1151 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]);
1154 /* Send filter to NVIDIA API */
1155 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter);
1157 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n");
1162 /* Change the current media/mediaopts */
1164 nve_ifmedia_upd(struct ifnet *ifp)
1166 struct nve_softc *sc = ifp->if_softc;
1169 nve_ifmedia_upd_locked(ifp);
1175 nve_ifmedia_upd_locked(struct ifnet *ifp)
1177 struct nve_softc *sc = ifp->if_softc;
1178 struct mii_data *mii;
1179 struct mii_softc *miisc;
1181 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n");
1183 NVE_LOCK_ASSERT(sc);
1184 mii = device_get_softc(sc->miibus);
1186 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1191 /* Update current miibus PHY status of media */
1193 nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1195 struct nve_softc *sc;
1196 struct mii_data *mii;
1198 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n");
1202 mii = device_get_softc(sc->miibus);
1205 ifmr->ifm_active = mii->mii_media_active;
1206 ifmr->ifm_status = mii->mii_media_status;
1212 /* miibus tick timer - maintain link status */
1216 struct nve_softc *sc = xsc;
1217 struct mii_data *mii;
1220 NVE_LOCK_ASSERT(sc);
1223 nve_update_stats(sc);
1225 mii = device_get_softc(sc->miibus);
1228 if (mii->mii_media_status & IFM_ACTIVE &&
1229 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1230 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1231 nve_ifstart_locked(ifp);
1234 if (sc->tx_timer > 0 && --sc->tx_timer == 0)
1236 callout_reset(&sc->stat_callout, hz, nve_tick, sc);
1241 /* Update ifnet data structure with collected interface stats from API */
1243 nve_update_stats(struct nve_softc *sc)
1245 struct ifnet *ifp = sc->ifp;
1246 ADAPTER_STATS stats;
1248 NVE_LOCK_ASSERT(sc);
1251 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats);
1253 ifp->if_ipackets = stats.ulSuccessfulReceptions;
1254 ifp->if_ierrors = stats.ulMissedFrames +
1255 stats.ulFailedReceptions +
1257 stats.ulFramingErrors +
1258 stats.ulOverFlowErrors;
1260 ifp->if_opackets = stats.ulSuccessfulTransmissions;
1261 ifp->if_oerrors = sc->tx_errors +
1262 stats.ulFailedTransmissions +
1263 stats.ulRetryErrors +
1264 stats.ulUnderflowErrors +
1265 stats.ulLossOfCarrierErrors +
1266 stats.ulLateCollisionErrors;
1268 ifp->if_collisions = stats.ulLateCollisionErrors;
1274 /* miibus Read PHY register wrapper - calls Nvidia API entry point */
1276 nve_miibus_readreg(device_t dev, int phy, int reg)
1278 struct nve_softc *sc = device_get_softc(dev);
1281 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n");
1283 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data);
1285 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n");
1290 /* miibus Write PHY register wrapper - calls Nvidia API entry point */
1292 nve_miibus_writereg(device_t dev, int phy, int reg, int data)
1294 struct nve_softc *sc = device_get_softc(dev);
1296 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n");
1298 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data);
1300 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n");
1305 /* Watchdog timer to prevent PHY lockups */
1307 nve_watchdog(struct nve_softc *sc)
1310 int pending_txs_start;
1312 NVE_LOCK_ASSERT(sc);
1316 * The nvidia driver blob defers tx completion notifications.
1317 * Thus, sometimes the watchdog timer will go off when the
1318 * tx engine is fine, but the tx completions are just deferred.
1319 * Try kicking the driver blob to clear out any pending tx
1320 * completions. If that clears up any of the pending tx
1321 * operations, then just return without printing the warning
1322 * message or resetting the adapter, as we can then conclude
1323 * the chip hasn't actually crashed (it's still sending packets).
1325 pending_txs_start = sc->pending_txs;
1326 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX);
1327 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX);
1328 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX);
1329 if (sc->pending_txs < pending_txs_start)
1332 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs);
1337 nve_init_locked(sc);
1339 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1340 nve_ifstart_locked(ifp);
1343 /* --- Start of NVOSAPI interface --- */
1345 /* Allocate DMA enabled general use memory for API */
1347 nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem)
1349 struct nve_softc *sc;
1350 bus_addr_t mem_physical;
1352 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength);
1354 sc = (struct nve_softc *)ctx;
1356 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF,
1357 M_NOWAIT | M_ZERO, 0, 0xffffffff, PAGE_SIZE, 0);
1359 if (!mem->pLogical) {
1360 device_printf(sc->dev, "memory allocation failed\n");
1363 memset(mem->pLogical, 0, (ulong)mem->uiLength);
1364 mem_physical = vtophys(mem->pLogical);
1365 mem->pPhysical = (PVOID)mem_physical;
1367 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n",
1368 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength);
1373 /* Free allocated memory */
1375 nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem)
1377 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n",
1378 (uint)mem->pLogical, (uint) mem->uiLength);
1380 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF);
1384 /* Copied directly from nvnet.c */
1386 nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1388 MEMORY_BLOCK mem_block;
1390 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n");
1392 mem_block_ex->pLogical = NULL;
1393 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength;
1395 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) &&
1396 (mem_block_ex->AlignmentSize > 1)) {
1397 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n",
1398 mem_block_ex->AlignmentSize);
1399 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize;
1401 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1403 if (nve_osalloc(ctx, &mem_block) == 0) {
1406 mem_block_ex->pLogicalOrig = mem_block.pLogical;
1407 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical;
1408 mem_block_ex->pPhysicalOrigHigh = 0;
1410 mem_block_ex->pPhysical = mem_block.pPhysical;
1411 mem_block_ex->pLogical = mem_block.pLogical;
1413 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) {
1414 unsigned int offset;
1415 offset = mem_block_ex->pPhysicalOrigLow &
1416 (mem_block_ex->AlignmentSize - 1);
1419 mem_block_ex->pPhysical =
1420 (PVOID)((ulong)mem_block_ex->pPhysical +
1421 mem_block_ex->AlignmentSize - offset);
1422 mem_block_ex->pLogical =
1423 (PVOID)((ulong)mem_block_ex->pLogical +
1424 mem_block_ex->AlignmentSize - offset);
1426 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */
1430 /* Copied directly from nvnet.c */
1432 nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex)
1434 MEMORY_BLOCK mem_block;
1436 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n");
1438 mem_block.pLogical = mem_block_ex->pLogicalOrig;
1439 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow);
1440 mem_block.uiLength = mem_block_ex->uiLengthOrig;
1442 return (nve_osfree(ctx, &mem_block));
1445 /* Clear memory region */
1447 nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length)
1449 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n");
1450 memset(mem, 0, length);
1454 /* Sleep for a tick */
1456 nve_osdelay(PNV_VOID ctx, NV_UINT32 usec)
1462 /* Allocate memory for rx buffer */
1464 nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id)
1466 struct nve_softc *sc = ctx;
1467 struct nve_rx_desc *desc;
1468 struct nve_map_buffer *buf;
1471 if (device_is_attached(sc->dev))
1472 NVE_LOCK_ASSERT(sc);
1474 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n");
1476 if (sc->pending_rxs == RX_RING_SIZE) {
1477 device_printf(sc->dev, "rx ring buffer is full\n");
1480 desc = sc->rx_desc + sc->cur_rx;
1483 if (buf->mbuf == NULL) {
1484 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
1485 if (buf->mbuf == NULL) {
1486 device_printf(sc->dev, "failed to allocate memory\n");
1489 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES;
1490 m_adj(buf->mbuf, ETHER_ALIGN);
1492 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf,
1493 nve_dmamap_rx_cb, &desc->paddr, 0);
1495 device_printf(sc->dev, "failed to dmamap mbuf\n");
1500 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD);
1501 desc->buflength = buf->mbuf->m_len;
1502 desc->vaddr = mtod(buf->mbuf, caddr_t);
1505 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE;
1507 mem->pLogical = (void *)desc->vaddr;
1508 mem->pPhysical = (void *)desc->paddr;
1509 mem->uiLength = desc->buflength;
1518 /* Free the rx buffer */
1520 nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id)
1522 struct nve_softc *sc = ctx;
1523 struct nve_rx_desc *desc;
1524 struct nve_map_buffer *buf;
1526 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n");
1528 desc = (struct nve_rx_desc *) id;
1532 bus_dmamap_unload(sc->mtag, buf->map);
1533 bus_dmamap_destroy(sc->mtag, buf->map);
1542 /* This gets called by the Nvidia API after our TX packet has been sent */
1544 nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success)
1546 struct nve_softc *sc = ctx;
1547 struct nve_map_buffer *buf;
1548 struct nve_tx_desc *desc = (struct nve_tx_desc *) id;
1551 NVE_LOCK_ASSERT(sc);
1553 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n");
1559 /* Unload and free mbuf cluster */
1560 if (buf->mbuf == NULL)
1563 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE);
1564 bus_dmamap_unload(sc->mtag, buf->map);
1568 /* Send more packets if we have them */
1569 if (sc->pending_txs < TX_RING_SIZE)
1570 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1572 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) && sc->pending_txs < TX_RING_SIZE)
1573 nve_ifstart_locked(ifp);
1580 /* This gets called by the Nvidia API when a new packet has been received */
1581 /* XXX What is newbuf used for? XXX */
1583 nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf,
1586 struct nve_softc *sc = ctx;
1588 struct nve_rx_desc *desc;
1589 struct nve_map_buffer *buf;
1590 ADAPTER_READ_DATA *readdata;
1593 NVE_LOCK_ASSERT(sc);
1595 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n");
1599 readdata = (ADAPTER_READ_DATA *) data;
1600 desc = readdata->pvID;
1602 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1605 /* Sync DMA bounce buffer. */
1606 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1608 /* First mbuf in packet holds the ethernet and packet headers */
1609 buf->mbuf->m_pkthdr.rcvif = ifp;
1610 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len =
1611 readdata->ulTotalLength;
1613 bus_dmamap_unload(sc->mtag, buf->map);
1615 /* Blat the mbuf pointer, kernel will free the mbuf cluster */
1619 /* Give mbuf to OS. */
1621 (*ifp->if_input)(ifp, m);
1623 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH)
1627 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD);
1628 bus_dmamap_unload(sc->mtag, buf->map);
1633 sc->cur_rx = desc - sc->rx_desc;
1639 /* This gets called by NVIDIA API when the PHY link state changes */
1641 nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled)
1644 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n");
1649 /* Setup a watchdog timer */
1651 nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer)
1653 struct nve_softc *sc = (struct nve_softc *)ctx;
1655 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n");
1657 callout_init(&sc->ostimer, CALLOUT_MPSAFE);
1658 *timer = &sc->ostimer;
1663 /* Free the timer */
1665 nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer)
1668 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n");
1670 callout_drain((struct callout *)timer);
1675 /* Setup timer parameters */
1677 nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters)
1679 struct nve_softc *sc = (struct nve_softc *)ctx;
1681 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n");
1683 sc->ostimer_func = func;
1684 sc->ostimer_params = parameters;
1689 /* Set the timer to go off */
1691 nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay)
1693 struct nve_softc *sc = ctx;
1695 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n");
1697 callout_reset((struct callout *)timer, delay, sc->ostimer_func,
1698 sc->ostimer_params);
1703 /* Cancel the timer */
1705 nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer)
1708 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n");
1710 callout_stop((struct callout *)timer);
1716 nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id,
1717 NV_UINT8 *newbuffer, NV_UINT8 priority)
1720 /* Not implemented */
1721 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1727 nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata)
1730 /* Not implemented */
1731 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n");
1737 nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno)
1740 /* Not implemented */
1741 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n");
1746 /* Allocate mutex context (already done in nve_attach) */
1748 nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock)
1750 struct nve_softc *sc = (struct nve_softc *)ctx;
1752 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n");
1754 *pLock = (void **)sc;
1759 /* Obtain a spin lock */
1761 nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1764 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n");
1771 nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock)
1774 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n");
1779 /* I have no idea what this is for */
1781 nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata)
1784 /* Not implemented */
1785 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n");
1786 panic("nve: nve_osreturnbufvirtual not implemented\n");
1791 /* --- End on NVOSAPI interface --- */