sys/dev/nvme/nvme.c

   1 /*-
   2  * Copyright (C) 2012 Intel Corporation
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/bus.h>
  32 #include <sys/conf.h>
  33 #include <sys/module.h>
  34
  35 #include <vm/uma.h>
  36
  37 #include <dev/pci/pcireg.h>
  38 #include <dev/pci/pcivar.h>
  39
  40 #include "nvme_private.h"
  41
  42 struct nvme_consumer {
  43         uint32_t                id;
  44         nvme_cons_ns_fn_t       ns_fn;
  45         nvme_cons_ctrlr_fn_t    ctrlr_fn;
  46         nvme_cons_async_fn_t    async_fn;
  47 };
  48
  49 struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
  50 #define INVALID_CONSUMER_ID     0xFFFF
  51
  52 uma_zone_t      nvme_request_zone;
  53 int32_t         nvme_retry_count;
  54
  55 MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
  56
  57 static int    nvme_probe(device_t);
  58 static int    nvme_attach(device_t);
  59 static int    nvme_detach(device_t);
  60 static int    nvme_modevent(module_t mod, int type, void *arg);
  61
  62 static devclass_t nvme_devclass;
  63
  64 static device_method_t nvme_pci_methods[] = {
  65         /* Device interface */
  66         DEVMETHOD(device_probe,     nvme_probe),
  67         DEVMETHOD(device_attach,    nvme_attach),
  68         DEVMETHOD(device_detach,    nvme_detach),
  69         { 0, 0 }
  70 };
  71
  72 static driver_t nvme_pci_driver = {
  73         "nvme",
  74         nvme_pci_methods,
  75         sizeof(struct nvme_controller),
  76 };
  77
  78 DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0);
  79 MODULE_VERSION(nvme, 1);
  80
  81 static struct _pcsid
  82 {
  83         u_int32_t   type;
  84         const char  *desc;
  85 } pci_ids[] = {
  86         { 0x01118086,           "NVMe Controller"  },
  87         { CHATHAM_PCI_ID,       "Chatham Prototype NVMe Controller"  },
  88         { IDT32_PCI_ID,         "IDT NVMe Controller (32 channel)"  },
  89         { IDT8_PCI_ID,          "IDT NVMe Controller (8 channel)" },
  90         { 0x00000000,           NULL  }
  91 };
  92
  93 static int
  94 nvme_probe (device_t device)
  95 {
  96         struct _pcsid   *ep;
  97         u_int32_t       type;
  98
  99         type = pci_get_devid(device);
 100         ep = pci_ids;
 101
 102         while (ep->type && ep->type != type)
 103                 ++ep;
 104
 105         if (ep->desc) {
 106                 device_set_desc(device, ep->desc);
 107                 return (BUS_PROBE_DEFAULT);
 108         }
 109
 110 #if defined(PCIS_STORAGE_NVM)
 111         if (pci_get_class(device)    == PCIC_STORAGE &&
 112             pci_get_subclass(device) == PCIS_STORAGE_NVM &&
 113             pci_get_progif(device)   == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) {
 114                 device_set_desc(device, "Generic NVMe Device");
 115                 return (BUS_PROBE_GENERIC);
 116         }
 117 #endif
 118
 119         return (ENXIO);
 120 }
 121
 122 static void
 123 nvme_init(void)
 124 {
 125         uint32_t        i;
 126
 127         nvme_request_zone = uma_zcreate("nvme_request",
 128             sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0);
 129
 130         for (i = 0; i < NVME_MAX_CONSUMERS; i++)
 131                 nvme_consumer[i].id = INVALID_CONSUMER_ID;
 132 }
 133
 134 SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL);
 135
 136 static void
 137 nvme_uninit(void)
 138 {
 139         uma_zdestroy(nvme_request_zone);
 140 }
 141
 142 SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL);
 143
 144 static void
 145 nvme_load(void)
 146 {
 147 }
 148
 149 static void
 150 nvme_unload(void)
 151 {
 152 }
 153
 154 static void
 155 nvme_shutdown(void)
 156 {
 157         device_t                *devlist;
 158         struct nvme_controller  *ctrlr;
 159         union cc_register       cc;
 160         union csts_register     csts;
 161         int                     dev, devcount;
 162
 163         if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
 164                 return;
 165
 166         for (dev = 0; dev < devcount; dev++) {
 167                 /*
 168                  * Only notify controller of shutdown when a real shutdown is
 169                  *  in process, not when a module unload occurs.  It seems at
 170                  *  least some controllers (Chatham at least) don't let you
 171                  *  re-enable the controller after shutdown notification has
 172                  *  been received.
 173                  */
 174                 ctrlr = DEVICE2SOFTC(devlist[dev]);
 175                 cc.raw = nvme_mmio_read_4(ctrlr, cc);
 176                 cc.bits.shn = NVME_SHN_NORMAL;
 177                 nvme_mmio_write_4(ctrlr, cc, cc.raw);
 178                 csts.raw = nvme_mmio_read_4(ctrlr, csts);
 179                 while (csts.bits.shst != NVME_SHST_COMPLETE) {
 180                         DELAY(5);
 181                         csts.raw = nvme_mmio_read_4(ctrlr, csts);
 182                 }
 183         }
 184
 185         free(devlist, M_TEMP);
 186 }
 187
 188 static int
 189 nvme_modevent(module_t mod, int type, void *arg)
 190 {
 191
 192         switch (type) {
 193         case MOD_LOAD:
 194                 nvme_load();
 195                 break;
 196         case MOD_UNLOAD:
 197                 nvme_unload();
 198                 break;
 199         case MOD_SHUTDOWN:
 200                 nvme_shutdown();
 201                 break;
 202         default:
 203                 break;
 204         }
 205
 206         return (0);
 207 }
 208
 209 void
 210 nvme_dump_command(struct nvme_command *cmd)
 211 {
 212         printf(
 213 "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n",
 214             cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
 215             cmd->rsvd2, cmd->rsvd3,
 216             (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2,
 217             cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
 218             cmd->cdw15);
 219 }
 220
 221 void
 222 nvme_dump_completion(struct nvme_completion *cpl)
 223 {
 224         printf("cdw0:%08x sqhd:%04x sqid:%04x "
 225             "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
 226             cpl->cdw0, cpl->sqhd, cpl->sqid,
 227             cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct,
 228             cpl->status.m, cpl->status.dnr);
 229 }
 230
 231 void
 232 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
 233 {
 234         struct nvme_tracker     *tr = arg;
 235         uint32_t                cur_nseg;
 236
 237         KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
 238
 239         /*
 240          * Note that we specified PAGE_SIZE for alignment and max
 241          *  segment size when creating the bus dma tags.  So here
 242          *  we can safely just transfer each segment to its
 243          *  associated PRP entry.
 244          */
 245         tr->req->cmd.prp1 = seg[0].ds_addr;
 246
 247         if (nseg == 2) {
 248                 tr->req->cmd.prp2 = seg[1].ds_addr;
 249         } else if (nseg > 2) {
 250                 cur_nseg = 1;
 251                 tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr;
 252                 while (cur_nseg < nseg) {
 253                         tr->prp[cur_nseg-1] =
 254                             (uint64_t)seg[cur_nseg].ds_addr;
 255                         cur_nseg++;
 256                 }
 257         }
 258
 259         nvme_qpair_submit_tracker(tr->qpair, tr);
 260 }
 261
 262 static int
 263 nvme_attach(device_t dev)
 264 {
 265         struct nvme_controller  *ctrlr = DEVICE2SOFTC(dev);
 266         int                     status;
 267
 268         status = nvme_ctrlr_construct(ctrlr, dev);
 269
 270         if (status != 0)
 271                 return (status);
 272
 273         /*
 274          * Reset controller twice to ensure we do a transition from cc.en==1
 275          *  to cc.en==0.  This is because we don't really know what status
 276          *  the controller was left in when boot handed off to OS.
 277          */
 278         status = nvme_ctrlr_hw_reset(ctrlr);
 279         if (status != 0)
 280                 return (status);
 281
 282         status = nvme_ctrlr_hw_reset(ctrlr);
 283         if (status != 0)
 284                 return (status);
 285
 286         ctrlr->config_hook.ich_func = nvme_ctrlr_start;
 287         ctrlr->config_hook.ich_arg = ctrlr;
 288
 289         config_intrhook_establish(&ctrlr->config_hook);
 290
 291         return (0);
 292 }
 293
 294 static int
 295 nvme_detach (device_t dev)
 296 {
 297         struct nvme_controller  *ctrlr = DEVICE2SOFTC(dev);
 298
 299         nvme_ctrlr_destruct(ctrlr, dev);
 300         return (0);
 301 }
 302
 303 static void
 304 nvme_notify_consumer(struct nvme_consumer *cons)
 305 {
 306         device_t                *devlist;
 307         struct nvme_controller  *ctrlr;
 308         struct nvme_namespace   *ns;
 309         void                    *ctrlr_cookie;
 310         int                     dev_idx, ns_idx, devcount;
 311
 312         if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
 313                 return;
 314
 315         for (dev_idx = 0; dev_idx < devcount; dev_idx++) {
 316                 ctrlr = DEVICE2SOFTC(devlist[dev_idx]);
 317                 if (cons->ctrlr_fn != NULL)
 318                         ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr);
 319                 else
 320                         ctrlr_cookie = NULL;
 321                 ctrlr->cons_cookie[cons->id] = ctrlr_cookie;
 322                 for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) {
 323                         ns = &ctrlr->ns[ns_idx];
 324                         if (cons->ns_fn != NULL)
 325                                 ns->cons_cookie[cons->id] =
 326                                     (*cons->ns_fn)(ns, ctrlr_cookie);
 327                 }
 328         }
 329
 330         free(devlist, M_TEMP);
 331 }
 332
 333 void
 334 nvme_notify_async_consumers(struct nvme_controller *ctrlr,
 335                             const struct nvme_completion *async_cpl,
 336                             uint32_t log_page_id, void *log_page_buffer,
 337                             uint32_t log_page_size)
 338 {
 339         struct nvme_consumer    *cons;
 340         uint32_t                i;
 341
 342         for (i = 0; i < NVME_MAX_CONSUMERS; i++) {
 343                 cons = &nvme_consumer[i];
 344                 if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL)
 345                         (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl,
 346                             log_page_id, log_page_buffer, log_page_size);
 347         }
 348 }
 349
 350 struct nvme_consumer *
 351 nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn,
 352                        nvme_cons_async_fn_t async_fn)
 353 {
 354         int i;
 355
 356         /*
 357          * TODO: add locking around consumer registration.  Not an issue
 358          *  right now since we only have one nvme consumer - nvd(4).
 359          */
 360         for (i = 0; i < NVME_MAX_CONSUMERS; i++)
 361                 if (nvme_consumer[i].id == INVALID_CONSUMER_ID) {
 362                         nvme_consumer[i].id = i;
 363                         nvme_consumer[i].ns_fn = ns_fn;
 364                         nvme_consumer[i].ctrlr_fn = ctrlr_fn;
 365                         nvme_consumer[i].async_fn = async_fn;
 366
 367                         nvme_notify_consumer(&nvme_consumer[i]);
 368                         return (&nvme_consumer[i]);
 369                 }
 370
 371         printf("nvme(4): consumer not registered - no slots available\n");
 372         return (NULL);
 373 }
 374
 375 void
 376 nvme_unregister_consumer(struct nvme_consumer *consumer)
 377 {
 378
 379         consumer->id = INVALID_CONSUMER_ID;
 380 }
 381