sys/dev/nvme/nvme.c

   1 /*-
   2  * Copyright (C) 2012 Intel Corporation
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/bus.h>
  32 #include <sys/conf.h>
  33 #include <sys/module.h>
  34
  35 #include <vm/uma.h>
  36
  37 #include <dev/pci/pcireg.h>
  38 #include <dev/pci/pcivar.h>
  39
  40 #include "nvme_private.h"
  41
  42 struct nvme_consumer {
  43         uint32_t                id;
  44         nvme_cons_ns_fn_t       ns_fn;
  45         nvme_cons_ctrlr_fn_t    ctrlr_fn;
  46         nvme_cons_async_fn_t    async_fn;
  47 };
  48
  49 struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
  50 #define INVALID_CONSUMER_ID     0xFFFF
  51
  52 uma_zone_t nvme_request_zone;
  53
  54 MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
  55
  56 static int    nvme_probe(device_t);
  57 static int    nvme_attach(device_t);
  58 static int    nvme_detach(device_t);
  59 static int    nvme_modevent(module_t mod, int type, void *arg);
  60
  61 static devclass_t nvme_devclass;
  62
  63 static device_method_t nvme_pci_methods[] = {
  64         /* Device interface */
  65         DEVMETHOD(device_probe,     nvme_probe),
  66         DEVMETHOD(device_attach,    nvme_attach),
  67         DEVMETHOD(device_detach,    nvme_detach),
  68         { 0, 0 }
  69 };
  70
  71 static driver_t nvme_pci_driver = {
  72         "nvme",
  73         nvme_pci_methods,
  74         sizeof(struct nvme_controller),
  75 };
  76
  77 DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0);
  78 MODULE_VERSION(nvme, 1);
  79
  80 static struct _pcsid
  81 {
  82         u_int32_t   type;
  83         const char  *desc;
  84 } pci_ids[] = {
  85         { 0x01118086,           "NVMe Controller"  },
  86         { CHATHAM_PCI_ID,       "Chatham Prototype NVMe Controller"  },
  87         { IDT32_PCI_ID,         "IDT NVMe Controller (32 channel)"  },
  88         { IDT8_PCI_ID,          "IDT NVMe Controller (8 channel)" },
  89         { 0x00000000,           NULL  }
  90 };
  91
  92 static int
  93 nvme_probe (device_t device)
  94 {
  95         struct _pcsid   *ep;
  96         u_int32_t       type;
  97
  98         type = pci_get_devid(device);
  99         ep = pci_ids;
 100
 101         while (ep->type && ep->type != type)
 102                 ++ep;
 103
 104         if (ep->desc) {
 105                 device_set_desc(device, ep->desc);
 106                 return (BUS_PROBE_DEFAULT);
 107         }
 108
 109 #if defined(PCIS_STORAGE_NVM)
 110         if (pci_get_class(device)    == PCIC_STORAGE &&
 111             pci_get_subclass(device) == PCIS_STORAGE_NVM &&
 112             pci_get_progif(device)   == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) {
 113                 device_set_desc(device, "Generic NVMe Device");
 114                 return (BUS_PROBE_GENERIC);
 115         }
 116 #endif
 117
 118         return (ENXIO);
 119 }
 120
 121 static void
 122 nvme_init(void)
 123 {
 124         uint32_t        i;
 125
 126         nvme_request_zone = uma_zcreate("nvme_request",
 127             sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0);
 128
 129         for (i = 0; i < NVME_MAX_CONSUMERS; i++)
 130                 nvme_consumer[i].id = INVALID_CONSUMER_ID;
 131 }
 132
 133 SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL);
 134
 135 static void
 136 nvme_uninit(void)
 137 {
 138         uma_zdestroy(nvme_request_zone);
 139 }
 140
 141 SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL);
 142
 143 static void
 144 nvme_load(void)
 145 {
 146 }
 147
 148 static void
 149 nvme_unload(void)
 150 {
 151 }
 152
 153 static void
 154 nvme_shutdown(void)
 155 {
 156         device_t                *devlist;
 157         struct nvme_controller  *ctrlr;
 158         union cc_register       cc;
 159         union csts_register     csts;
 160         int                     dev, devcount;
 161
 162         if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
 163                 return;
 164
 165         for (dev = 0; dev < devcount; dev++) {
 166                 /*
 167                  * Only notify controller of shutdown when a real shutdown is
 168                  *  in process, not when a module unload occurs.  It seems at
 169                  *  least some controllers (Chatham at least) don't let you
 170                  *  re-enable the controller after shutdown notification has
 171                  *  been received.
 172                  */
 173                 ctrlr = DEVICE2SOFTC(devlist[dev]);
 174                 cc.raw = nvme_mmio_read_4(ctrlr, cc);
 175                 cc.bits.shn = NVME_SHN_NORMAL;
 176                 nvme_mmio_write_4(ctrlr, cc, cc.raw);
 177                 csts.raw = nvme_mmio_read_4(ctrlr, csts);
 178                 while (csts.bits.shst != NVME_SHST_COMPLETE) {
 179                         DELAY(5);
 180                         csts.raw = nvme_mmio_read_4(ctrlr, csts);
 181                 }
 182         }
 183
 184         free(devlist, M_TEMP);
 185 }
 186
 187 static int
 188 nvme_modevent(module_t mod, int type, void *arg)
 189 {
 190
 191         switch (type) {
 192         case MOD_LOAD:
 193                 nvme_load();
 194                 break;
 195         case MOD_UNLOAD:
 196                 nvme_unload();
 197                 break;
 198         case MOD_SHUTDOWN:
 199                 nvme_shutdown();
 200                 break;
 201         default:
 202                 break;
 203         }
 204
 205         return (0);
 206 }
 207
 208 void
 209 nvme_dump_command(struct nvme_command *cmd)
 210 {
 211         printf(
 212 "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n",
 213             cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
 214             cmd->rsvd2, cmd->rsvd3,
 215             (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2,
 216             cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
 217             cmd->cdw15);
 218 }
 219
 220 void
 221 nvme_dump_completion(struct nvme_completion *cpl)
 222 {
 223         printf("cdw0:%08x sqhd:%04x sqid:%04x "
 224             "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
 225             cpl->cdw0, cpl->sqhd, cpl->sqid,
 226             cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct,
 227             cpl->status.m, cpl->status.dnr);
 228 }
 229
 230 void
 231 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
 232 {
 233         struct nvme_tracker     *tr = arg;
 234         uint32_t                cur_nseg;
 235
 236         KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
 237
 238         /*
 239          * Note that we specified PAGE_SIZE for alignment and max
 240          *  segment size when creating the bus dma tags.  So here
 241          *  we can safely just transfer each segment to its
 242          *  associated PRP entry.
 243          */
 244         tr->req->cmd.prp1 = seg[0].ds_addr;
 245
 246         if (nseg == 2) {
 247                 tr->req->cmd.prp2 = seg[1].ds_addr;
 248         } else if (nseg > 2) {
 249                 cur_nseg = 1;
 250                 tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr;
 251                 while (cur_nseg < nseg) {
 252                         tr->prp[cur_nseg-1] =
 253                             (uint64_t)seg[cur_nseg].ds_addr;
 254                         cur_nseg++;
 255                 }
 256         }
 257
 258         nvme_qpair_submit_tracker(tr->qpair, tr);
 259 }
 260
 261 static int
 262 nvme_attach(device_t dev)
 263 {
 264         struct nvme_controller  *ctrlr = DEVICE2SOFTC(dev);
 265         int                     status;
 266
 267         status = nvme_ctrlr_construct(ctrlr, dev);
 268
 269         if (status != 0)
 270                 return (status);
 271
 272         /*
 273          * Reset controller twice to ensure we do a transition from cc.en==1
 274          *  to cc.en==0.  This is because we don't really know what status
 275          *  the controller was left in when boot handed off to OS.
 276          */
 277         status = nvme_ctrlr_hw_reset(ctrlr);
 278         if (status != 0)
 279                 return (status);
 280
 281         status = nvme_ctrlr_hw_reset(ctrlr);
 282         if (status != 0)
 283                 return (status);
 284
 285         ctrlr->config_hook.ich_func = nvme_ctrlr_start;
 286         ctrlr->config_hook.ich_arg = ctrlr;
 287
 288         config_intrhook_establish(&ctrlr->config_hook);
 289
 290         return (0);
 291 }
 292
 293 static int
 294 nvme_detach (device_t dev)
 295 {
 296         struct nvme_controller  *ctrlr = DEVICE2SOFTC(dev);
 297
 298         nvme_ctrlr_destruct(ctrlr, dev);
 299         return (0);
 300 }
 301
 302 static void
 303 nvme_notify_consumer(struct nvme_consumer *cons)
 304 {
 305         device_t                *devlist;
 306         struct nvme_controller  *ctrlr;
 307         struct nvme_namespace   *ns;
 308         void                    *ctrlr_cookie;
 309         int                     dev_idx, ns_idx, devcount;
 310
 311         if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
 312                 return;
 313
 314         for (dev_idx = 0; dev_idx < devcount; dev_idx++) {
 315                 ctrlr = DEVICE2SOFTC(devlist[dev_idx]);
 316                 if (cons->ctrlr_fn != NULL)
 317                         ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr);
 318                 else
 319                         ctrlr_cookie = NULL;
 320                 ctrlr->cons_cookie[cons->id] = ctrlr_cookie;
 321                 for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) {
 322                         ns = &ctrlr->ns[ns_idx];
 323                         if (cons->ns_fn != NULL)
 324                                 ns->cons_cookie[cons->id] =
 325                                     (*cons->ns_fn)(ns, ctrlr_cookie);
 326                 }
 327         }
 328
 329         free(devlist, M_TEMP);
 330 }
 331
 332 void
 333 nvme_notify_async_consumers(struct nvme_controller *ctrlr,
 334                             const struct nvme_completion *async_cpl)
 335 {
 336         struct nvme_consumer    *cons;
 337         uint32_t                i;
 338
 339         for (i = 0; i < NVME_MAX_CONSUMERS; i++) {
 340                 cons = &nvme_consumer[i];
 341                 if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL)
 342                         (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl);
 343         }
 344 }
 345
 346 struct nvme_consumer *
 347 nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn,
 348                        nvme_cons_async_fn_t async_fn)
 349 {
 350         int i;
 351
 352         /*
 353          * TODO: add locking around consumer registration.  Not an issue
 354          *  right now since we only have one nvme consumer - nvd(4).
 355          */
 356         for (i = 0; i < NVME_MAX_CONSUMERS; i++)
 357                 if (nvme_consumer[i].id == INVALID_CONSUMER_ID) {
 358                         nvme_consumer[i].id = i;
 359                         nvme_consumer[i].ns_fn = ns_fn;
 360                         nvme_consumer[i].ctrlr_fn = ctrlr_fn;
 361                         nvme_consumer[i].async_fn = async_fn;
 362
 363                         nvme_notify_consumer(&nvme_consumer[i]);
 364                         return (&nvme_consumer[i]);
 365                 }
 366
 367         printf("nvme(4): consumer not registered - no slots available\n");
 368         return (NULL);
 369 }
 370
 371 void
 372 nvme_unregister_consumer(struct nvme_consumer *consumer)
 373 {
 374
 375         consumer->id = INVALID_CONSUMER_ID;
 376 }
 377