2 * Copyright (C) 2012 Intel Corporation
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
33 #include <sys/module.h>
37 #include <dev/pci/pcireg.h>
38 #include <dev/pci/pcivar.h>
40 #include "nvme_private.h"
42 struct nvme_consumer {
44 nvme_cons_ns_fn_t ns_fn;
45 nvme_cons_ctrlr_fn_t ctrlr_fn;
46 nvme_cons_async_fn_t async_fn;
49 struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
50 #define INVALID_CONSUMER_ID 0xFFFF
52 uma_zone_t nvme_request_zone;
54 MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
56 static int nvme_probe(device_t);
57 static int nvme_attach(device_t);
58 static int nvme_detach(device_t);
59 static int nvme_modevent(module_t mod, int type, void *arg);
61 static devclass_t nvme_devclass;
63 static device_method_t nvme_pci_methods[] = {
64 /* Device interface */
65 DEVMETHOD(device_probe, nvme_probe),
66 DEVMETHOD(device_attach, nvme_attach),
67 DEVMETHOD(device_detach, nvme_detach),
71 static driver_t nvme_pci_driver = {
74 sizeof(struct nvme_controller),
77 DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0);
78 MODULE_VERSION(nvme, 1);
85 { 0x01118086, "NVMe Controller" },
86 { CHATHAM_PCI_ID, "Chatham Prototype NVMe Controller" },
87 { IDT32_PCI_ID, "IDT NVMe Controller (32 channel)" },
88 { IDT8_PCI_ID, "IDT NVMe Controller (8 channel)" },
93 nvme_probe (device_t device)
98 type = pci_get_devid(device);
101 while (ep->type && ep->type != type)
105 device_set_desc(device, ep->desc);
106 return (BUS_PROBE_DEFAULT);
109 #if defined(PCIS_STORAGE_NVM)
110 if (pci_get_class(device) == PCIC_STORAGE &&
111 pci_get_subclass(device) == PCIS_STORAGE_NVM &&
112 pci_get_progif(device) == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) {
113 device_set_desc(device, "Generic NVMe Device");
114 return (BUS_PROBE_GENERIC);
126 nvme_request_zone = uma_zcreate("nvme_request",
127 sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0);
129 for (i = 0; i < NVME_MAX_CONSUMERS; i++)
130 nvme_consumer[i].id = INVALID_CONSUMER_ID;
133 SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL);
138 uma_zdestroy(nvme_request_zone);
141 SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL);
157 struct nvme_controller *ctrlr;
158 union cc_register cc;
159 union csts_register csts;
162 if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
165 for (dev = 0; dev < devcount; dev++) {
167 * Only notify controller of shutdown when a real shutdown is
168 * in process, not when a module unload occurs. It seems at
169 * least some controllers (Chatham at least) don't let you
170 * re-enable the controller after shutdown notification has
173 ctrlr = DEVICE2SOFTC(devlist[dev]);
174 cc.raw = nvme_mmio_read_4(ctrlr, cc);
175 cc.bits.shn = NVME_SHN_NORMAL;
176 nvme_mmio_write_4(ctrlr, cc, cc.raw);
177 csts.raw = nvme_mmio_read_4(ctrlr, csts);
178 while (csts.bits.shst != NVME_SHST_COMPLETE) {
180 csts.raw = nvme_mmio_read_4(ctrlr, csts);
184 free(devlist, M_TEMP);
188 nvme_modevent(module_t mod, int type, void *arg)
209 nvme_dump_command(struct nvme_command *cmd)
212 "opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x mptr:%jx prp1:%jx prp2:%jx cdw:%x %x %x %x %x %x\n",
213 cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
214 cmd->rsvd2, cmd->rsvd3,
215 (uintmax_t)cmd->mptr, (uintmax_t)cmd->prp1, (uintmax_t)cmd->prp2,
216 cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
221 nvme_dump_completion(struct nvme_completion *cpl)
223 printf("cdw0:%08x sqhd:%04x sqid:%04x "
224 "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
225 cpl->cdw0, cpl->sqhd, cpl->sqid,
226 cpl->cid, cpl->status.p, cpl->status.sc, cpl->status.sct,
227 cpl->status.m, cpl->status.dnr);
231 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
233 struct nvme_tracker *tr = arg;
236 KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
239 * Note that we specified PAGE_SIZE for alignment and max
240 * segment size when creating the bus dma tags. So here
241 * we can safely just transfer each segment to its
242 * associated PRP entry.
244 tr->req->cmd.prp1 = seg[0].ds_addr;
247 tr->req->cmd.prp2 = seg[1].ds_addr;
248 } else if (nseg > 2) {
250 tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr;
251 while (cur_nseg < nseg) {
252 tr->prp[cur_nseg-1] =
253 (uint64_t)seg[cur_nseg].ds_addr;
258 nvme_qpair_submit_tracker(tr->qpair, tr);
262 nvme_attach(device_t dev)
264 struct nvme_controller *ctrlr = DEVICE2SOFTC(dev);
267 status = nvme_ctrlr_construct(ctrlr, dev);
273 * Reset controller twice to ensure we do a transition from cc.en==1
274 * to cc.en==0. This is because we don't really know what status
275 * the controller was left in when boot handed off to OS.
277 status = nvme_ctrlr_hw_reset(ctrlr);
281 status = nvme_ctrlr_hw_reset(ctrlr);
285 ctrlr->config_hook.ich_func = nvme_ctrlr_start;
286 ctrlr->config_hook.ich_arg = ctrlr;
288 config_intrhook_establish(&ctrlr->config_hook);
294 nvme_detach (device_t dev)
296 struct nvme_controller *ctrlr = DEVICE2SOFTC(dev);
298 nvme_ctrlr_destruct(ctrlr, dev);
303 nvme_notify_consumer(struct nvme_consumer *cons)
306 struct nvme_controller *ctrlr;
307 struct nvme_namespace *ns;
309 int dev_idx, ns_idx, devcount;
311 if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
314 for (dev_idx = 0; dev_idx < devcount; dev_idx++) {
315 ctrlr = DEVICE2SOFTC(devlist[dev_idx]);
316 if (cons->ctrlr_fn != NULL)
317 ctrlr_cookie = (*cons->ctrlr_fn)(ctrlr);
320 ctrlr->cons_cookie[cons->id] = ctrlr_cookie;
321 for (ns_idx = 0; ns_idx < ctrlr->cdata.nn; ns_idx++) {
322 ns = &ctrlr->ns[ns_idx];
323 if (cons->ns_fn != NULL)
324 ns->cons_cookie[cons->id] =
325 (*cons->ns_fn)(ns, ctrlr_cookie);
329 free(devlist, M_TEMP);
333 nvme_notify_async_consumers(struct nvme_controller *ctrlr,
334 const struct nvme_completion *async_cpl)
336 struct nvme_consumer *cons;
339 for (i = 0; i < NVME_MAX_CONSUMERS; i++) {
340 cons = &nvme_consumer[i];
341 if (cons->id != INVALID_CONSUMER_ID && cons->async_fn != NULL)
342 (*cons->async_fn)(ctrlr->cons_cookie[i], async_cpl);
346 struct nvme_consumer *
347 nvme_register_consumer(nvme_cons_ns_fn_t ns_fn, nvme_cons_ctrlr_fn_t ctrlr_fn,
348 nvme_cons_async_fn_t async_fn)
353 * TODO: add locking around consumer registration. Not an issue
354 * right now since we only have one nvme consumer - nvd(4).
356 for (i = 0; i < NVME_MAX_CONSUMERS; i++)
357 if (nvme_consumer[i].id == INVALID_CONSUMER_ID) {
358 nvme_consumer[i].id = i;
359 nvme_consumer[i].ns_fn = ns_fn;
360 nvme_consumer[i].ctrlr_fn = ctrlr_fn;
361 nvme_consumer[i].async_fn = async_fn;
363 nvme_notify_consumer(&nvme_consumer[i]);
364 return (&nvme_consumer[i]);
367 printf("nvme(4): consumer not registered - no slots available\n");
372 nvme_unregister_consumer(struct nvme_consumer *consumer)
375 consumer->id = INVALID_CONSUMER_ID;