sys/dev/nvme/nvme.c

   1 /*-
   2  * Copyright (C) 2012 Intel Corporation
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/bus.h>
  32 #include <sys/conf.h>
  33 #include <sys/module.h>
  34
  35 #include <vm/uma.h>
  36
  37 #include <dev/pci/pcireg.h>
  38 #include <dev/pci/pcivar.h>
  39
  40 #include "nvme_private.h"
  41
  42 struct nvme_consumer {
  43         nvme_consumer_cb_fn_t           cb_fn;
  44         void                            *cb_arg;
  45 };
  46
  47 struct nvme_consumer nvme_consumer[NVME_MAX_CONSUMERS];
  48
  49 uma_zone_t nvme_request_zone;
  50
  51 MALLOC_DEFINE(M_NVME, "nvme", "nvme(4) memory allocations");
  52
  53 static int    nvme_probe(device_t);
  54 static int    nvme_attach(device_t);
  55 static int    nvme_detach(device_t);
  56 static int    nvme_modevent(module_t mod, int type, void *arg);
  57
  58 static devclass_t nvme_devclass;
  59
  60 static device_method_t nvme_pci_methods[] = {
  61         /* Device interface */
  62         DEVMETHOD(device_probe,     nvme_probe),
  63         DEVMETHOD(device_attach,    nvme_attach),
  64         DEVMETHOD(device_detach,    nvme_detach),
  65         { 0, 0 }
  66 };
  67
  68 static driver_t nvme_pci_driver = {
  69         "nvme",
  70         nvme_pci_methods,
  71         sizeof(struct nvme_controller),
  72 };
  73
  74 DRIVER_MODULE(nvme, pci, nvme_pci_driver, nvme_devclass, nvme_modevent, 0);
  75 MODULE_VERSION(nvme, 1);
  76
  77 static struct _pcsid
  78 {
  79         u_int32_t   type;
  80         const char  *desc;
  81 } pci_ids[] = {
  82         { 0x01118086,           "NVMe Controller"  },
  83         { CHATHAM_PCI_ID,       "Chatham Prototype NVMe Controller"  },
  84         { IDT32_PCI_ID,         "IDT NVMe Controller (32 channel)"  },
  85         { IDT8_PCI_ID,          "IDT NVMe Controller (8 channel)" },
  86         { 0x00000000,           NULL  }
  87 };
  88
  89 static int
  90 nvme_probe (device_t device)
  91 {
  92         struct _pcsid   *ep;
  93         u_int32_t       type;
  94
  95         type = pci_get_devid(device);
  96         ep = pci_ids;
  97
  98         while (ep->type && ep->type != type)
  99                 ++ep;
 100
 101         if (ep->desc) {
 102                 device_set_desc(device, ep->desc);
 103                 return (BUS_PROBE_DEFAULT);
 104         }
 105
 106 #if defined(PCIS_STORAGE_NVM)
 107         if (pci_get_class(device)    == PCIC_STORAGE &&
 108             pci_get_subclass(device) == PCIS_STORAGE_NVM &&
 109             pci_get_progif(device)   == PCIP_STORAGE_NVM_ENTERPRISE_NVMHCI_1_0) {
 110                 device_set_desc(device, "Generic NVMe Device");
 111                 return (BUS_PROBE_GENERIC);
 112         }
 113 #endif
 114
 115         return (ENXIO);
 116 }
 117
 118 static void
 119 nvme_init(void)
 120 {
 121         nvme_request_zone = uma_zcreate("nvme_request",
 122             sizeof(struct nvme_request), NULL, NULL, NULL, NULL, 0, 0);
 123 }
 124
 125 SYSINIT(nvme_register, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_init, NULL);
 126
 127 static void
 128 nvme_uninit(void)
 129 {
 130         uma_zdestroy(nvme_request_zone);
 131 }
 132
 133 SYSUNINIT(nvme_unregister, SI_SUB_DRIVERS, SI_ORDER_SECOND, nvme_uninit, NULL);
 134
 135 static void
 136 nvme_load(void)
 137 {
 138 }
 139
 140 static void
 141 nvme_unload(void)
 142 {
 143 }
 144
 145 static void
 146 nvme_shutdown(void)
 147 {
 148         device_t                *devlist;
 149         struct nvme_controller  *ctrlr;
 150         union cc_register       cc;
 151         union csts_register     csts;
 152         int                     dev, devcount;
 153
 154         if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
 155                 return;
 156
 157         for (dev = 0; dev < devcount; dev++) {
 158                 /*
 159                  * Only notify controller of shutdown when a real shutdown is
 160                  *  in process, not when a module unload occurs.  It seems at
 161                  *  least some controllers (Chatham at least) don't let you
 162                  *  re-enable the controller after shutdown notification has
 163                  *  been received.
 164                  */
 165                 ctrlr = DEVICE2SOFTC(devlist[dev]);
 166                 cc.raw = nvme_mmio_read_4(ctrlr, cc);
 167                 cc.bits.shn = NVME_SHN_NORMAL;
 168                 nvme_mmio_write_4(ctrlr, cc, cc.raw);
 169                 csts.raw = nvme_mmio_read_4(ctrlr, csts);
 170                 while (csts.bits.shst != NVME_SHST_COMPLETE) {
 171                         DELAY(5);
 172                         csts.raw = nvme_mmio_read_4(ctrlr, csts);
 173                 }
 174         }
 175
 176         free(devlist, M_TEMP);
 177 }
 178
 179 static int
 180 nvme_modevent(module_t mod, int type, void *arg)
 181 {
 182
 183         switch (type) {
 184         case MOD_LOAD:
 185                 nvme_load();
 186                 break;
 187         case MOD_UNLOAD:
 188                 nvme_unload();
 189                 break;
 190         case MOD_SHUTDOWN:
 191                 nvme_shutdown();
 192                 break;
 193         default:
 194                 break;
 195         }
 196
 197         return (0);
 198 }
 199
 200 void
 201 nvme_dump_command(struct nvme_command *cmd)
 202 {
 203         printf("opc:%x f:%x r1:%x cid:%x nsid:%x r2:%x r3:%x "
 204             "mptr:%qx prp1:%qx prp2:%qx cdw:%x %x %x %x %x %x\n",
 205             cmd->opc, cmd->fuse, cmd->rsvd1, cmd->cid, cmd->nsid,
 206             cmd->rsvd2, cmd->rsvd3,
 207             (long long unsigned int)cmd->mptr,
 208             (long long unsigned int)cmd->prp1,
 209             (long long unsigned int)cmd->prp2,
 210             cmd->cdw10, cmd->cdw11, cmd->cdw12, cmd->cdw13, cmd->cdw14,
 211             cmd->cdw15);
 212 }
 213
 214 void
 215 nvme_dump_completion(struct nvme_completion *cpl)
 216 {
 217         printf("cdw0:%08x sqhd:%04x sqid:%04x "
 218             "cid:%04x p:%x sc:%02x sct:%x m:%x dnr:%x\n",
 219             cpl->cdw0, cpl->sqhd, cpl->sqid,
 220             cpl->cid, cpl->p, cpl->sf_sc, cpl->sf_sct, cpl->sf_m,
 221             cpl->sf_dnr);
 222 }
 223
 224 void
 225 nvme_payload_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
 226 {
 227         struct nvme_tracker     *tr = arg;
 228         uint32_t                cur_nseg;
 229
 230         KASSERT(error == 0, ("nvme_payload_map error != 0\n"));
 231
 232         /*
 233          * Note that we specified PAGE_SIZE for alignment and max
 234          *  segment size when creating the bus dma tags.  So here
 235          *  we can safely just transfer each segment to its
 236          *  associated PRP entry.
 237          */
 238         tr->req->cmd.prp1 = seg[0].ds_addr;
 239
 240         if (nseg == 2) {
 241                 tr->req->cmd.prp2 = seg[1].ds_addr;
 242         } else if (nseg > 2) {
 243                 cur_nseg = 1;
 244                 tr->req->cmd.prp2 = (uint64_t)tr->prp_bus_addr;
 245                 while (cur_nseg < nseg) {
 246                         tr->prp[cur_nseg-1] =
 247                             (uint64_t)seg[cur_nseg].ds_addr;
 248                         cur_nseg++;
 249                 }
 250         }
 251
 252         nvme_qpair_submit_cmd(tr->qpair, tr);
 253 }
 254
 255 static int
 256 nvme_attach(device_t dev)
 257 {
 258         struct nvme_controller  *ctrlr = DEVICE2SOFTC(dev);
 259         int                     status;
 260
 261         status = nvme_ctrlr_construct(ctrlr, dev);
 262
 263         if (status != 0)
 264                 return (status);
 265
 266         /*
 267          * Reset controller twice to ensure we do a transition from cc.en==1
 268          *  to cc.en==0.  This is because we don't really know what status
 269          *  the controller was left in when boot handed off to OS.
 270          */
 271         status = nvme_ctrlr_reset(ctrlr);
 272         if (status != 0)
 273                 return (status);
 274
 275         status = nvme_ctrlr_reset(ctrlr);
 276         if (status != 0)
 277                 return (status);
 278
 279         ctrlr->config_hook.ich_func = nvme_ctrlr_start;
 280         ctrlr->config_hook.ich_arg = ctrlr;
 281
 282         config_intrhook_establish(&ctrlr->config_hook);
 283
 284         return (0);
 285 }
 286
 287 static int
 288 nvme_detach (device_t dev)
 289 {
 290         struct nvme_controller  *ctrlr = DEVICE2SOFTC(dev);
 291         struct nvme_namespace   *ns;
 292         int                     i;
 293
 294         for (i = 0; i < NVME_MAX_NAMESPACES; i++) {
 295                 ns = &ctrlr->ns[i];
 296                 if (ns->cdev)
 297                         destroy_dev(ns->cdev);
 298         }
 299
 300         if (ctrlr->cdev)
 301                 destroy_dev(ctrlr->cdev);
 302
 303         for (i = 0; i < ctrlr->num_io_queues; i++) {
 304                 nvme_io_qpair_destroy(&ctrlr->ioq[i]);
 305         }
 306
 307         free(ctrlr->ioq, M_NVME);
 308
 309         nvme_admin_qpair_destroy(&ctrlr->adminq);
 310
 311         if (ctrlr->resource != NULL) {
 312                 bus_release_resource(dev, SYS_RES_MEMORY,
 313                     ctrlr->resource_id, ctrlr->resource);
 314         }
 315
 316         if (ctrlr->bar4_resource != NULL) {
 317                 bus_release_resource(dev, SYS_RES_MEMORY,
 318                     ctrlr->bar4_resource_id, ctrlr->bar4_resource);
 319         }
 320
 321 #ifdef CHATHAM2
 322         if (ctrlr->chatham_resource != NULL) {
 323                 bus_release_resource(dev, SYS_RES_MEMORY,
 324                     ctrlr->chatham_resource_id, ctrlr->chatham_resource);
 325         }
 326 #endif
 327
 328         if (ctrlr->tag)
 329                 bus_teardown_intr(ctrlr->dev, ctrlr->res, ctrlr->tag);
 330
 331         if (ctrlr->res)
 332                 bus_release_resource(ctrlr->dev, SYS_RES_IRQ,
 333                     rman_get_rid(ctrlr->res), ctrlr->res);
 334
 335         if (ctrlr->msix_enabled)
 336                 pci_release_msi(dev);
 337
 338         return (0);
 339 }
 340
 341 static void
 342 nvme_notify_consumer(struct nvme_consumer *consumer)
 343 {
 344         device_t                *devlist;
 345         struct nvme_controller  *ctrlr;
 346         int                     dev, ns, devcount;
 347
 348         if (devclass_get_devices(nvme_devclass, &devlist, &devcount))
 349                 return;
 350
 351         for (dev = 0; dev < devcount; dev++) {
 352                 ctrlr = DEVICE2SOFTC(devlist[dev]);
 353                 for (ns = 0; ns < ctrlr->cdata.nn; ns++)
 354                         (*consumer->cb_fn)(consumer->cb_arg, &ctrlr->ns[ns]);
 355         }
 356
 357         free(devlist, M_TEMP);
 358 }
 359
 360 struct nvme_consumer *
 361 nvme_register_consumer(nvme_consumer_cb_fn_t cb_fn, void *cb_arg)
 362 {
 363         int i;
 364
 365         /*
 366          * TODO: add locking around consumer registration.  Not an issue
 367          *  right now since we only have one nvme consumer - nvd(4).
 368          */
 369         for (i = 0; i < NVME_MAX_CONSUMERS; i++)
 370                 if (nvme_consumer[i].cb_fn == NULL) {
 371                         nvme_consumer[i].cb_fn = cb_fn;
 372                         nvme_consumer[i].cb_arg = cb_arg;
 373
 374                         nvme_notify_consumer(&nvme_consumer[i]);
 375                         return (&nvme_consumer[i]);
 376                 }
 377
 378         printf("nvme(4): consumer not registered - no slots available\n");
 379         return (NULL);
 380 }
 381
 382 void
 383 nvme_unregister_consumer(struct nvme_consumer *consumer)
 384 {
 385
 386         consumer->cb_fn = NULL;
 387         consumer->cb_arg = NULL;
 388 }
 389