sys/dev/nvme/nvme_private.h

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (C) 2012-2014 Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 #ifndef __NVME_PRIVATE_H__
  32 #define __NVME_PRIVATE_H__
  33
  34 #include <sys/param.h>
  35 #include <sys/bio.h>
  36 #include <sys/bus.h>
  37 #include <sys/kernel.h>
  38 #include <sys/lock.h>
  39 #include <sys/malloc.h>
  40 #include <sys/module.h>
  41 #include <sys/mutex.h>
  42 #include <sys/rman.h>
  43 #include <sys/systm.h>
  44 #include <sys/taskqueue.h>
  45
  46 #include <vm/uma.h>
  47
  48 #include <machine/bus.h>
  49
  50 #include "nvme.h"
  51
  52 #define DEVICE2SOFTC(dev) ((struct nvme_controller *) device_get_softc(dev))
  53
  54 MALLOC_DECLARE(M_NVME);
  55
  56 #define IDT32_PCI_ID            0x80d0111d /* 32 channel board */
  57 #define IDT8_PCI_ID             0x80d2111d /* 8 channel board */
  58
  59 /*
  60  * For commands requiring more than 2 PRP entries, one PRP will be
  61  *  embedded in the command (prp1), and the rest of the PRP entries
  62  *  will be in a list pointed to by the command (prp2).  This means
  63  *  that real max number of PRP entries we support is 32+1, which
  64  *  results in a max xfer size of 32*PAGE_SIZE.
  65  */
  66 #define NVME_MAX_PRP_LIST_ENTRIES       (NVME_MAX_XFER_SIZE / PAGE_SIZE)
  67
  68 #define NVME_ADMIN_TRACKERS     (16)
  69 #define NVME_ADMIN_ENTRIES      (128)
  70 /* min and max are defined in admin queue attributes section of spec */
  71 #define NVME_MIN_ADMIN_ENTRIES  (2)
  72 #define NVME_MAX_ADMIN_ENTRIES  (4096)
  73
  74 /*
  75  * NVME_IO_ENTRIES defines the size of an I/O qpair's submission and completion
  76  *  queues, while NVME_IO_TRACKERS defines the maximum number of I/O that we
  77  *  will allow outstanding on an I/O qpair at any time.  The only advantage in
  78  *  having IO_ENTRIES > IO_TRACKERS is for debugging purposes - when dumping
  79  *  the contents of the submission and completion queues, it will show a longer
  80  *  history of data.
  81  */
  82 #define NVME_IO_ENTRIES         (256)
  83 #define NVME_IO_TRACKERS        (128)
  84 #define NVME_MIN_IO_TRACKERS    (4)
  85 #define NVME_MAX_IO_TRACKERS    (1024)
  86
  87 /*
  88  * NVME_MAX_IO_ENTRIES is not defined, since it is specified in CC.MQES
  89  *  for each controller.
  90  */
  91
  92 #define NVME_INT_COAL_TIME      (0)     /* disabled */
  93 #define NVME_INT_COAL_THRESHOLD (0)     /* 0-based */
  94
  95 #define NVME_MAX_NAMESPACES     (16)
  96 #define NVME_MAX_CONSUMERS      (2)
  97 #define NVME_MAX_ASYNC_EVENTS   (8)
  98
  99 #define NVME_DEFAULT_TIMEOUT_PERIOD     (30)    /* in seconds */
 100 #define NVME_MIN_TIMEOUT_PERIOD         (5)
 101 #define NVME_MAX_TIMEOUT_PERIOD         (120)
 102
 103 #define NVME_DEFAULT_RETRY_COUNT        (4)
 104
 105 /* Maximum log page size to fetch for AERs. */
 106 #define NVME_MAX_AER_LOG_SIZE           (4096)
 107
 108 /*
 109  * Define CACHE_LINE_SIZE here for older FreeBSD versions that do not define
 110  *  it.
 111  */
 112 #ifndef CACHE_LINE_SIZE
 113 #define CACHE_LINE_SIZE         (64)
 114 #endif
 115
 116 extern int32_t          nvme_retry_count;
 117 extern bool             nvme_verbose_cmd_dump;
 118
 119 struct nvme_completion_poll_status {
 120         struct nvme_completion  cpl;
 121         int                     done;
 122 };
 123
 124 extern devclass_t nvme_devclass;
 125
 126 #define NVME_REQUEST_VADDR      1
 127 #define NVME_REQUEST_NULL       2 /* For requests with no payload. */
 128 #define NVME_REQUEST_UIO        3
 129 #define NVME_REQUEST_BIO        4
 130 #define NVME_REQUEST_CCB        5
 131
 132 struct nvme_request {
 133         struct nvme_command             cmd;
 134         struct nvme_qpair               *qpair;
 135         union {
 136                 void                    *payload;
 137                 struct bio              *bio;
 138         } u;
 139         uint32_t                        type;
 140         uint32_t                        payload_size;
 141         bool                            timeout;
 142         nvme_cb_fn_t                    cb_fn;
 143         void                            *cb_arg;
 144         int32_t                         retries;
 145         STAILQ_ENTRY(nvme_request)      stailq;
 146 };
 147
 148 struct nvme_async_event_request {
 149         struct nvme_controller          *ctrlr;
 150         struct nvme_request             *req;
 151         struct nvme_completion          cpl;
 152         uint32_t                        log_page_id;
 153         uint32_t                        log_page_size;
 154         uint8_t                         log_page_buffer[NVME_MAX_AER_LOG_SIZE];
 155 };
 156
 157 struct nvme_tracker {
 158         TAILQ_ENTRY(nvme_tracker)       tailq;
 159         struct nvme_request             *req;
 160         struct nvme_qpair               *qpair;
 161         struct callout                  timer;
 162         bus_dmamap_t                    payload_dma_map;
 163         uint16_t                        cid;
 164
 165         uint64_t                        *prp;
 166         bus_addr_t                      prp_bus_addr;
 167 };
 168
 169 struct nvme_qpair {
 170         struct nvme_controller  *ctrlr;
 171         uint32_t                id;
 172         int                     domain;
 173         int                     cpu;
 174
 175         uint16_t                vector;
 176         int                     rid;
 177         struct resource         *res;
 178         void                    *tag;
 179
 180         uint32_t                num_entries;
 181         uint32_t                num_trackers;
 182         uint32_t                sq_tdbl_off;
 183         uint32_t                cq_hdbl_off;
 184
 185         uint32_t                phase;
 186         uint32_t                sq_head;
 187         uint32_t                sq_tail;
 188         uint32_t                cq_head;
 189
 190         int64_t                 num_cmds;
 191         int64_t                 num_intr_handler_calls;
 192         int64_t                 num_retries;
 193         int64_t                 num_failures;
 194
 195         struct nvme_command     *cmd;
 196         struct nvme_completion  *cpl;
 197
 198         bus_dma_tag_t           dma_tag;
 199         bus_dma_tag_t           dma_tag_payload;
 200
 201         bus_dmamap_t            queuemem_map;
 202         uint64_t                cmd_bus_addr;
 203         uint64_t                cpl_bus_addr;
 204
 205         TAILQ_HEAD(, nvme_tracker)      free_tr;
 206         TAILQ_HEAD(, nvme_tracker)      outstanding_tr;
 207         STAILQ_HEAD(, nvme_request)     queued_req;
 208
 209         struct nvme_tracker     **act_tr;
 210
 211         bool                    is_enabled;
 212
 213         struct mtx              lock __aligned(CACHE_LINE_SIZE);
 214
 215 } __aligned(CACHE_LINE_SIZE);
 216
 217 struct nvme_namespace {
 218         struct nvme_controller          *ctrlr;
 219         struct nvme_namespace_data      data;
 220         uint32_t                        id;
 221         uint32_t                        flags;
 222         struct cdev                     *cdev;
 223         void                            *cons_cookie[NVME_MAX_CONSUMERS];
 224         uint32_t                        boundary;
 225         struct mtx                      lock;
 226 };
 227
 228 /*
 229  * One of these per allocated PCI device.
 230  */
 231 struct nvme_controller {
 232         device_t                dev;
 233
 234         struct mtx              lock;
 235         int                     domain;
 236         uint32_t                ready_timeout_in_ms;
 237         uint32_t                quirks;
 238 #define QUIRK_DELAY_B4_CHK_RDY  1               /* Can't touch MMIO on disable */
 239 #define QUIRK_DISABLE_TIMEOUT   2               /* Disable broken completion timeout feature */
 240
 241         bus_space_tag_t         bus_tag;
 242         bus_space_handle_t      bus_handle;
 243         int                     resource_id;
 244         struct resource         *resource;
 245
 246         /*
 247          * The NVMe spec allows for the MSI-X table to be placed in BAR 4/5,
 248          *  separate from the control registers which are in BAR 0/1.  These
 249          *  members track the mapping of BAR 4/5 for that reason.
 250          */
 251         int                     bar4_resource_id;
 252         struct resource         *bar4_resource;
 253
 254         uint32_t                msix_enabled;
 255         uint32_t                enable_aborts;
 256
 257         uint32_t                num_io_queues;
 258         uint32_t                max_hw_pend_io;
 259
 260         /* Fields for tracking progress during controller initialization. */
 261         struct intr_config_hook config_hook;
 262         uint32_t                ns_identified;
 263         uint32_t                queues_created;
 264
 265         struct task             reset_task;
 266         struct task             fail_req_task;
 267         struct taskqueue        *taskqueue;
 268
 269         /* For shared legacy interrupt. */
 270         int                     rid;
 271         struct resource         *res;
 272         void                    *tag;
 273
 274         /** maximum i/o size in bytes */
 275         uint32_t                max_xfer_size;
 276
 277         /** minimum page size supported by this controller in bytes */
 278         uint32_t                min_page_size;
 279
 280         /** interrupt coalescing time period (in microseconds) */
 281         uint32_t                int_coal_time;
 282
 283         /** interrupt coalescing threshold */
 284         uint32_t                int_coal_threshold;
 285
 286         /** timeout period in seconds */
 287         uint32_t                timeout_period;
 288
 289         /** doorbell stride */
 290         uint32_t                dstrd;
 291
 292         struct nvme_qpair       adminq;
 293         struct nvme_qpair       *ioq;
 294
 295         struct nvme_registers           *regs;
 296
 297         struct nvme_controller_data     cdata;
 298         struct nvme_namespace           ns[NVME_MAX_NAMESPACES];
 299
 300         struct cdev                     *cdev;
 301
 302         /** bit mask of event types currently enabled for async events */
 303         uint32_t                        async_event_config;
 304
 305         uint32_t                        num_aers;
 306         struct nvme_async_event_request aer[NVME_MAX_ASYNC_EVENTS];
 307
 308         void                            *cons_cookie[NVME_MAX_CONSUMERS];
 309
 310         uint32_t                        is_resetting;
 311         uint32_t                        is_initialized;
 312         uint32_t                        notification_sent;
 313
 314         bool                            is_failed;
 315         STAILQ_HEAD(, nvme_request)     fail_req;
 316
 317         /* Host Memory Buffer */
 318         int                             hmb_nchunks;
 319         size_t                          hmb_chunk;
 320         bus_dma_tag_t                   hmb_tag;
 321         struct nvme_hmb_chunk {
 322                 bus_dmamap_t            hmbc_map;
 323                 void                    *hmbc_vaddr;
 324                 uint64_t                hmbc_paddr;
 325         } *hmb_chunks;
 326         bus_dma_tag_t                   hmb_desc_tag;
 327         bus_dmamap_t                    hmb_desc_map;
 328         struct nvme_hmb_desc            *hmb_desc_vaddr;
 329         uint64_t                        hmb_desc_paddr;
 330 };
 331
 332 #define nvme_mmio_offsetof(reg)                                                \
 333         offsetof(struct nvme_registers, reg)
 334
 335 #define nvme_mmio_read_4(sc, reg)                                              \
 336         bus_space_read_4((sc)->bus_tag, (sc)->bus_handle,                      \
 337             nvme_mmio_offsetof(reg))
 338
 339 #define nvme_mmio_write_4(sc, reg, val)                                        \
 340         bus_space_write_4((sc)->bus_tag, (sc)->bus_handle,                     \
 341             nvme_mmio_offsetof(reg), val)
 342
 343 #define nvme_mmio_write_8(sc, reg, val)                                        \
 344         do {                                                                   \
 345                 bus_space_write_4((sc)->bus_tag, (sc)->bus_handle,             \
 346                     nvme_mmio_offsetof(reg), val & 0xFFFFFFFF);                \
 347                 bus_space_write_4((sc)->bus_tag, (sc)->bus_handle,             \
 348                     nvme_mmio_offsetof(reg)+4,                                 \
 349                     (val & 0xFFFFFFFF00000000ULL) >> 32);                      \
 350         } while (0);
 351
 352 #define nvme_printf(ctrlr, fmt, args...)        \
 353     device_printf(ctrlr->dev, fmt, ##args)
 354
 355 void    nvme_ns_test(struct nvme_namespace *ns, u_long cmd, caddr_t arg);
 356
 357 void    nvme_ctrlr_cmd_identify_controller(struct nvme_controller *ctrlr,
 358                                            void *payload,
 359                                            nvme_cb_fn_t cb_fn, void *cb_arg);
 360 void    nvme_ctrlr_cmd_identify_namespace(struct nvme_controller *ctrlr,
 361                                           uint32_t nsid, void *payload,
 362                                           nvme_cb_fn_t cb_fn, void *cb_arg);
 363 void    nvme_ctrlr_cmd_set_interrupt_coalescing(struct nvme_controller *ctrlr,
 364                                                 uint32_t microseconds,
 365                                                 uint32_t threshold,
 366                                                 nvme_cb_fn_t cb_fn,
 367                                                 void *cb_arg);
 368 void    nvme_ctrlr_cmd_get_error_page(struct nvme_controller *ctrlr,
 369                                       struct nvme_error_information_entry *payload,
 370                                       uint32_t num_entries, /* 0 = max */
 371                                       nvme_cb_fn_t cb_fn,
 372                                       void *cb_arg);
 373 void    nvme_ctrlr_cmd_get_health_information_page(struct nvme_controller *ctrlr,
 374                                                    uint32_t nsid,
 375                                                    struct nvme_health_information_page *payload,
 376                                                    nvme_cb_fn_t cb_fn,
 377                                                    void *cb_arg);
 378 void    nvme_ctrlr_cmd_get_firmware_page(struct nvme_controller *ctrlr,
 379                                          struct nvme_firmware_page *payload,
 380                                          nvme_cb_fn_t cb_fn,
 381                                          void *cb_arg);
 382 void    nvme_ctrlr_cmd_create_io_cq(struct nvme_controller *ctrlr,
 383                                     struct nvme_qpair *io_que,
 384                                     nvme_cb_fn_t cb_fn, void *cb_arg);
 385 void    nvme_ctrlr_cmd_create_io_sq(struct nvme_controller *ctrlr,
 386                                     struct nvme_qpair *io_que,
 387                                     nvme_cb_fn_t cb_fn, void *cb_arg);
 388 void    nvme_ctrlr_cmd_delete_io_cq(struct nvme_controller *ctrlr,
 389                                     struct nvme_qpair *io_que,
 390                                     nvme_cb_fn_t cb_fn, void *cb_arg);
 391 void    nvme_ctrlr_cmd_delete_io_sq(struct nvme_controller *ctrlr,
 392                                     struct nvme_qpair *io_que,
 393                                     nvme_cb_fn_t cb_fn, void *cb_arg);
 394 void    nvme_ctrlr_cmd_set_num_queues(struct nvme_controller *ctrlr,
 395                                       uint32_t num_queues, nvme_cb_fn_t cb_fn,
 396                                       void *cb_arg);
 397 void    nvme_ctrlr_cmd_set_async_event_config(struct nvme_controller *ctrlr,
 398                                               uint32_t state,
 399                                               nvme_cb_fn_t cb_fn, void *cb_arg);
 400 void    nvme_ctrlr_cmd_abort(struct nvme_controller *ctrlr, uint16_t cid,
 401                              uint16_t sqid, nvme_cb_fn_t cb_fn, void *cb_arg);
 402
 403 void    nvme_completion_poll_cb(void *arg, const struct nvme_completion *cpl);
 404
 405 int     nvme_ctrlr_construct(struct nvme_controller *ctrlr, device_t dev);
 406 void    nvme_ctrlr_destruct(struct nvme_controller *ctrlr, device_t dev);
 407 void    nvme_ctrlr_shutdown(struct nvme_controller *ctrlr);
 408 int     nvme_ctrlr_hw_reset(struct nvme_controller *ctrlr);
 409 void    nvme_ctrlr_reset(struct nvme_controller *ctrlr);
 410 /* ctrlr defined as void * to allow use with config_intrhook. */
 411 void    nvme_ctrlr_start_config_hook(void *ctrlr_arg);
 412 void    nvme_ctrlr_submit_admin_request(struct nvme_controller *ctrlr,
 413                                         struct nvme_request *req);
 414 void    nvme_ctrlr_submit_io_request(struct nvme_controller *ctrlr,
 415                                      struct nvme_request *req);
 416 void    nvme_ctrlr_post_failed_request(struct nvme_controller *ctrlr,
 417                                        struct nvme_request *req);
 418
 419 int     nvme_qpair_construct(struct nvme_qpair *qpair,
 420                              uint32_t num_entries, uint32_t num_trackers,
 421                              struct nvme_controller *ctrlr);
 422 void    nvme_qpair_submit_tracker(struct nvme_qpair *qpair,
 423                                   struct nvme_tracker *tr);
 424 bool    nvme_qpair_process_completions(struct nvme_qpair *qpair);
 425 void    nvme_qpair_submit_request(struct nvme_qpair *qpair,
 426                                   struct nvme_request *req);
 427 void    nvme_qpair_reset(struct nvme_qpair *qpair);
 428 void    nvme_qpair_fail(struct nvme_qpair *qpair);
 429 void    nvme_qpair_manual_complete_request(struct nvme_qpair *qpair,
 430                                            struct nvme_request *req,
 431                                            uint32_t sct, uint32_t sc);
 432
 433 void    nvme_admin_qpair_enable(struct nvme_qpair *qpair);
 434 void    nvme_admin_qpair_disable(struct nvme_qpair *qpair);
 435 void    nvme_admin_qpair_destroy(struct nvme_qpair *qpair);
 436
 437 void    nvme_io_qpair_enable(struct nvme_qpair *qpair);
 438 void    nvme_io_qpair_disable(struct nvme_qpair *qpair);
 439 void    nvme_io_qpair_destroy(struct nvme_qpair *qpair);
 440
 441 int     nvme_ns_construct(struct nvme_namespace *ns, uint32_t id,
 442                           struct nvme_controller *ctrlr);
 443 void    nvme_ns_destruct(struct nvme_namespace *ns);
 444
 445 void    nvme_sysctl_initialize_ctrlr(struct nvme_controller *ctrlr);
 446
 447 void    nvme_dump_command(struct nvme_command *cmd);
 448 void    nvme_dump_completion(struct nvme_completion *cpl);
 449
 450 int     nvme_attach(device_t dev);
 451 int     nvme_shutdown(device_t dev);
 452 int     nvme_detach(device_t dev);
 453
 454 /*
 455  * Wait for a command to complete using the nvme_completion_poll_cb.
 456  * Used in limited contexts where the caller knows it's OK to block
 457  * briefly while the command runs. The ISR will run the callback which
 458  * will set status->done to true, usually within microseconds. If not,
 459  * then after one second timeout handler should reset the controller
 460  * and abort all outstanding requests including this polled one. If
 461  * still not after ten seconds, then something is wrong with the driver,
 462  * and panic is the only way to recover.
 463  */
 464 static __inline
 465 void
 466 nvme_completion_poll(struct nvme_completion_poll_status *status)
 467 {
 468         int sanity = hz * 10;
 469
 470         while (!atomic_load_acq_int(&status->done) && --sanity > 0)
 471                 pause("nvme", 1);
 472         if (sanity <= 0)
 473                 panic("NVME polled command failed to complete within 10s.");
 474 }
 475
 476 static __inline void
 477 nvme_single_map(void *arg, bus_dma_segment_t *seg, int nseg, int error)
 478 {
 479         uint64_t *bus_addr = (uint64_t *)arg;
 480
 481         if (error != 0)
 482                 printf("nvme_single_map err %d\n", error);
 483         *bus_addr = seg[0].ds_addr;
 484 }
 485
 486 static __inline struct nvme_request *
 487 _nvme_allocate_request(nvme_cb_fn_t cb_fn, void *cb_arg)
 488 {
 489         struct nvme_request *req;
 490
 491         req = malloc(sizeof(*req), M_NVME, M_NOWAIT | M_ZERO);
 492         if (req != NULL) {
 493                 req->cb_fn = cb_fn;
 494                 req->cb_arg = cb_arg;
 495                 req->timeout = true;
 496         }
 497         return (req);
 498 }
 499
 500 static __inline struct nvme_request *
 501 nvme_allocate_request_vaddr(void *payload, uint32_t payload_size,
 502     nvme_cb_fn_t cb_fn, void *cb_arg)
 503 {
 504         struct nvme_request *req;
 505
 506         req = _nvme_allocate_request(cb_fn, cb_arg);
 507         if (req != NULL) {
 508                 req->type = NVME_REQUEST_VADDR;
 509                 req->u.payload = payload;
 510                 req->payload_size = payload_size;
 511         }
 512         return (req);
 513 }
 514
 515 static __inline struct nvme_request *
 516 nvme_allocate_request_null(nvme_cb_fn_t cb_fn, void *cb_arg)
 517 {
 518         struct nvme_request *req;
 519
 520         req = _nvme_allocate_request(cb_fn, cb_arg);
 521         if (req != NULL)
 522                 req->type = NVME_REQUEST_NULL;
 523         return (req);
 524 }
 525
 526 static __inline struct nvme_request *
 527 nvme_allocate_request_bio(struct bio *bio, nvme_cb_fn_t cb_fn, void *cb_arg)
 528 {
 529         struct nvme_request *req;
 530
 531         req = _nvme_allocate_request(cb_fn, cb_arg);
 532         if (req != NULL) {
 533                 req->type = NVME_REQUEST_BIO;
 534                 req->u.bio = bio;
 535         }
 536         return (req);
 537 }
 538
 539 static __inline struct nvme_request *
 540 nvme_allocate_request_ccb(union ccb *ccb, nvme_cb_fn_t cb_fn, void *cb_arg)
 541 {
 542         struct nvme_request *req;
 543
 544         req = _nvme_allocate_request(cb_fn, cb_arg);
 545         if (req != NULL) {
 546                 req->type = NVME_REQUEST_CCB;
 547                 req->u.payload = ccb;
 548         }
 549
 550         return (req);
 551 }
 552
 553 #define nvme_free_request(req)  free(req, M_NVME)
 554
 555 void    nvme_notify_async_consumers(struct nvme_controller *ctrlr,
 556                                     const struct nvme_completion *async_cpl,
 557                                     uint32_t log_page_id, void *log_page_buffer,
 558                                     uint32_t log_page_size);
 559 void    nvme_notify_fail_consumers(struct nvme_controller *ctrlr);
 560 void    nvme_notify_new_controller(struct nvme_controller *ctrlr);
 561 void    nvme_notify_ns(struct nvme_controller *ctrlr, int nsid);
 562
 563 void    nvme_ctrlr_intx_handler(void *arg);
 564 void    nvme_ctrlr_poll(struct nvme_controller *ctrlr);
 565
 566 int     nvme_ctrlr_suspend(struct nvme_controller *ctrlr);
 567 int     nvme_ctrlr_resume(struct nvme_controller *ctrlr);
 568
 569 #endif /* __NVME_PRIVATE_H__ */