sys/dev/nvme/nvme_sim.c

   1 /*-
   2  * Copyright (c) 2016 Netflix, Inc
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/systm.h>
  32 #include <sys/buf.h>
  33 #include <sys/bus.h>
  34 #include <sys/conf.h>
  35 #include <sys/ioccom.h>
  36 #include <sys/malloc.h>
  37 #include <sys/proc.h>
  38 #include <sys/smp.h>
  39
  40 #include <cam/cam.h>
  41 #include <cam/cam_ccb.h>
  42 #include <cam/cam_sim.h>
  43 #include <cam/cam_xpt_sim.h>
  44 #include <cam/cam_xpt_internal.h>       // Yes, this is wrong.
  45 #include <cam/cam_debug.h>
  46
  47 #include "nvme_private.h"
  48
  49 #define ccb_accb_ptr spriv_ptr0
  50 #define ccb_ctrlr_ptr spriv_ptr1
  51 static void     nvme_sim_action(struct cam_sim *sim, union ccb *ccb);
  52 static void     nvme_sim_poll(struct cam_sim *sim);
  53
  54 #define sim2softc(sim)  ((struct nvme_sim_softc *)cam_sim_softc(sim))
  55 #define sim2ns(sim)     (sim2softc(sim)->s_ns)
  56 #define sim2ctrlr(sim)  (sim2softc(sim)->s_ctrlr)
  57
  58 struct nvme_sim_softc
  59 {
  60         struct nvme_controller  *s_ctrlr;
  61         struct nvme_namespace   *s_ns;
  62         struct cam_sim          *s_sim;
  63         struct cam_path         *s_path;
  64 };
  65
  66 static void
  67 nvme_sim_nvmeio_done(void *ccb_arg, const struct nvme_completion *cpl)
  68 {
  69         union ccb *ccb = (union ccb *)ccb_arg;
  70
  71         /*
  72          * Let the periph know the completion, and let it sort out what
  73          * it means. Make our best guess, though for the status code.
  74          */
  75         memcpy(&ccb->nvmeio.cpl, cpl, sizeof(*cpl));
  76         if (nvme_completion_is_error(cpl))
  77                 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
  78         else
  79                 ccb->ccb_h.status = CAM_REQ_CMP;
  80         xpt_done(ccb);
  81 }
  82
  83 static void
  84 nvme_sim_nvmeio(struct cam_sim *sim, union ccb *ccb)
  85 {
  86         struct ccb_nvmeio       *nvmeio = &ccb->nvmeio;
  87         struct nvme_request     *req;
  88         void                    *payload;
  89         uint32_t                size;
  90         struct nvme_controller *ctrlr;
  91
  92         ctrlr = sim2ctrlr(sim);
  93         payload = nvmeio->data_ptr;
  94         size = nvmeio->dxfer_len;
  95         /* SG LIST ??? */
  96         if ((nvmeio->ccb_h.flags & CAM_DATA_MASK) == CAM_DATA_BIO)
  97                 req = nvme_allocate_request_bio((struct bio *)payload,
  98                     nvme_sim_nvmeio_done, ccb);
  99         else if (payload == NULL)
 100                 req = nvme_allocate_request_null(nvme_sim_nvmeio_done, ccb);
 101         else
 102                 req = nvme_allocate_request_vaddr(payload, size,
 103                     nvme_sim_nvmeio_done, ccb);
 104
 105         if (req == NULL) {
 106                 nvmeio->ccb_h.status = CAM_RESRC_UNAVAIL;
 107                 xpt_done(ccb);
 108                 return;
 109         }
 110
 111         memcpy(&req->cmd, &ccb->nvmeio.cmd, sizeof(ccb->nvmeio.cmd));
 112
 113         nvme_ctrlr_submit_io_request(ctrlr, req);
 114
 115         ccb->ccb_h.status |= CAM_SIM_QUEUED;
 116 }
 117
 118 static void
 119 nvme_sim_action(struct cam_sim *sim, union ccb *ccb)
 120 {
 121         struct nvme_controller *ctrlr;
 122         struct nvme_namespace *ns;
 123
 124         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE,
 125             ("nvme_sim_action: func= %#x\n",
 126                 ccb->ccb_h.func_code));
 127
 128         /*
 129          * XXX when we support multiple namespaces in the base driver we'll need
 130          * to revisit how all this gets stored and saved in the periph driver's
 131          * reserved areas. Right now we store all three in the softc of the sim.
 132          */
 133         ns = sim2ns(sim);
 134         ctrlr = sim2ctrlr(sim);
 135
 136         mtx_assert(&ctrlr->lock, MA_OWNED);
 137
 138         switch (ccb->ccb_h.func_code) {
 139         case XPT_CALC_GEOMETRY:         /* Calculate Geometry Totally nuts ? XXX */
 140                 /*
 141                  * Only meaningful for old-school SCSI disks since only the SCSI
 142                  * da driver generates them. Reject all these that slip through.
 143                  */
 144                 /*FALLTHROUGH*/
 145         case XPT_ABORT:                 /* Abort the specified CCB */
 146                 ccb->ccb_h.status = CAM_REQ_INVALID;
 147                 break;
 148         case XPT_SET_TRAN_SETTINGS:
 149                 /*
 150                  * NVMe doesn't really have different transfer settings, but
 151                  * other parts of CAM think failure here is a big deal.
 152                  */
 153                 ccb->ccb_h.status = CAM_REQ_CMP;
 154                 break;
 155         case XPT_PATH_INQ:              /* Path routing inquiry */
 156         {
 157                 struct ccb_pathinq *cpi = &ccb->cpi;
 158
 159                 /*
 160                  * NVMe may have multiple LUNs on the same path. Current generation
 161                  * of NVMe devives support only a single name space. Multiple name
 162                  * space drives are coming, but it's unclear how we should report
 163                  * them up the stack.
 164                  */
 165                 cpi->version_num = 1;
 166                 cpi->hba_inquiry = 0;
 167                 cpi->target_sprt = 0;
 168                 cpi->hba_misc =  PIM_UNMAPPED /* | PIM_NOSCAN */;
 169                 cpi->hba_eng_cnt = 0;
 170                 cpi->max_target = 0;
 171                 cpi->max_lun = ctrlr->cdata.nn;
 172                 cpi->maxio = nvme_ns_get_max_io_xfer_size(ns);
 173                 cpi->initiator_id = 0;
 174                 cpi->bus_id = cam_sim_bus(sim);
 175                 cpi->base_transfer_speed = 4000000;     /* 4 GB/s 4 lanes pcie 3 */
 176                 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 177                 strlcpy(cpi->hba_vid, "NVMe", HBA_IDLEN);
 178                 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
 179                 cpi->unit_number = cam_sim_unit(sim);
 180                 cpi->transport = XPORT_NVME;            /* XXX XPORT_PCIE ? */
 181                 cpi->transport_version = 1;             /* XXX Get PCIe spec ? */
 182                 cpi->protocol = PROTO_NVME;
 183                 cpi->protocol_version = NVME_REV_1;     /* Groks all 1.x NVMe cards */
 184                 cpi->xport_specific.nvme.nsid = ns->id;
 185                 cpi->ccb_h.status = CAM_REQ_CMP;
 186                 break;
 187         }
 188         case XPT_GET_TRAN_SETTINGS:     /* Get transport settings */
 189         {
 190                 struct ccb_trans_settings       *cts;
 191                 struct ccb_trans_settings_nvme  *nvmep;
 192                 struct ccb_trans_settings_nvme  *nvmex;
 193
 194                 cts = &ccb->cts;
 195                 nvmex = &cts->xport_specific.nvme;
 196                 nvmep = &cts->proto_specific.nvme;
 197
 198                 nvmex->valid = CTS_NVME_VALID_SPEC;
 199                 nvmex->spec_major = 1;                  /* XXX read from card */
 200                 nvmex->spec_minor = 2;
 201                 nvmex->spec_tiny = 0;
 202
 203                 nvmep->valid = CTS_NVME_VALID_SPEC;
 204                 nvmep->spec_major = 1;                  /* XXX read from card */
 205                 nvmep->spec_minor = 2;
 206                 nvmep->spec_tiny = 0;
 207                 cts->transport = XPORT_NVME;
 208                 cts->protocol = PROTO_NVME;
 209                 cts->ccb_h.status = CAM_REQ_CMP;
 210                 break;
 211         }
 212         case XPT_TERM_IO:               /* Terminate the I/O process */
 213                 /*
 214                  * every driver handles this, but nothing generates it. Assume
 215                  * it's OK to just say 'that worked'.
 216                  */
 217                 /*FALLTHROUGH*/
 218         case XPT_RESET_DEV:             /* Bus Device Reset the specified device */
 219         case XPT_RESET_BUS:             /* Reset the specified bus */
 220                 /*
 221                  * NVMe doesn't really support physically resetting the bus. It's part
 222                  * of the bus scanning dance, so return sucess to tell the process to
 223                  * proceed.
 224                  */
 225                 ccb->ccb_h.status = CAM_REQ_CMP;
 226                 break;
 227         case XPT_NVME_IO:               /* Execute the requested I/O operation */
 228                 nvme_sim_nvmeio(sim, ccb);
 229                 return;                 /* no done */
 230         default:
 231                 ccb->ccb_h.status = CAM_REQ_INVALID;
 232                 break;
 233         }
 234         xpt_done(ccb);
 235 }
 236
 237 static void
 238 nvme_sim_poll(struct cam_sim *sim)
 239 {
 240
 241         nvme_ctrlr_intx_handler(sim2ctrlr(sim));
 242 }
 243
 244 static void *
 245 nvme_sim_new_controller(struct nvme_controller *ctrlr)
 246 {
 247         struct cam_devq *devq;
 248         int max_trans;
 249         int unit;
 250         struct nvme_sim_softc *sc = NULL;
 251
 252         max_trans = 256;/* XXX not so simple -- must match queues */
 253         unit = device_get_unit(ctrlr->dev);
 254         devq = cam_simq_alloc(max_trans);
 255         if (devq == NULL)
 256                 return NULL;
 257
 258         sc = malloc(sizeof(*sc), M_NVME, M_ZERO | M_WAITOK);
 259
 260         sc->s_ctrlr = ctrlr;
 261
 262         sc->s_sim = cam_sim_alloc(nvme_sim_action, nvme_sim_poll,
 263             "nvme", sc, unit, &ctrlr->lock, max_trans, max_trans, devq);
 264         if (sc->s_sim == NULL) {
 265                 printf("Failed to allocate a sim\n");
 266                 cam_simq_free(devq);
 267                 free(sc, M_NVME);
 268                 return NULL;
 269         }
 270
 271         return sc;
 272 }
 273
 274 static void
 275 nvme_sim_rescan_target(struct nvme_controller *ctrlr, struct cam_path *path)
 276 {
 277         union ccb *ccb;
 278
 279         ccb = xpt_alloc_ccb_nowait();
 280         if (ccb == NULL) {
 281                 printf("unable to alloc CCB for rescan\n");
 282                 return;
 283         }
 284
 285         if (xpt_clone_path(&ccb->ccb_h.path, path) != CAM_REQ_CMP) {
 286                 printf("unable to copy path for rescan\n");
 287                 xpt_free_ccb(ccb);
 288                 return;
 289         }
 290
 291         xpt_rescan(ccb);
 292 }
 293
 294 static void *
 295 nvme_sim_new_ns(struct nvme_namespace *ns, void *sc_arg)
 296 {
 297         struct nvme_sim_softc *sc = sc_arg;
 298         struct nvme_controller *ctrlr = sc->s_ctrlr;
 299         int i;
 300
 301         sc->s_ns = ns;
 302
 303         /*
 304          * XXX this is creating one bus per ns, but it should be one
 305          * XXX target per controller, and one LUN per namespace.
 306          * XXX Current drives only support one NS, so there's time
 307          * XXX to fix it later when new drives arrive.
 308          *
 309          * XXX I'm pretty sure the xpt_bus_register() call below is
 310          * XXX like super lame and it really belongs in the sim_new_ctrlr
 311          * XXX callback. Then the create_path below would be pretty close
 312          * XXX to being right. Except we should be per-ns not per-ctrlr
 313          * XXX data.
 314          */
 315
 316         mtx_lock(&ctrlr->lock);
 317 /* Create bus */
 318
 319         /*
 320          * XXX do I need to lock ctrlr->lock ?
 321          * XXX do I need to lock the path?
 322          * ata and scsi seem to in their code, but their discovery is
 323          * somewhat more asynchronous. We're only every called one at a
 324          * time, and nothing is in parallel.
 325          */
 326
 327         i = 0;
 328         if (xpt_bus_register(sc->s_sim, ctrlr->dev, 0) != CAM_SUCCESS)
 329                 goto error;
 330         i++;
 331         if (xpt_create_path(&sc->s_path, /*periph*/NULL, cam_sim_path(sc->s_sim),
 332             1, ns->id) != CAM_REQ_CMP)
 333                 goto error;
 334         i++;
 335
 336         sc->s_path->device->nvme_data = nvme_ns_get_data(ns);
 337         sc->s_path->device->nvme_cdata = nvme_ctrlr_get_data(ns->ctrlr);
 338
 339 /* Scan bus */
 340         nvme_sim_rescan_target(ctrlr, sc->s_path);
 341
 342         mtx_unlock(&ctrlr->lock);
 343
 344         return ns;
 345
 346 error:
 347         switch (i) {
 348         case 2:
 349                 xpt_free_path(sc->s_path);
 350         case 1:
 351                 xpt_bus_deregister(cam_sim_path(sc->s_sim));
 352         case 0:
 353                 cam_sim_free(sc->s_sim, /*free_devq*/TRUE);
 354         }
 355         mtx_unlock(&ctrlr->lock);
 356         return NULL;
 357 }
 358
 359 static void
 360 nvme_sim_controller_fail(void *ctrlr_arg)
 361 {
 362         /* XXX cleanup XXX */
 363 }
 364
 365 struct nvme_consumer *consumer_cookie;
 366
 367 static void
 368 nvme_sim_init(void)
 369 {
 370
 371         consumer_cookie = nvme_register_consumer(nvme_sim_new_ns,
 372             nvme_sim_new_controller, NULL, nvme_sim_controller_fail);
 373 }
 374
 375 SYSINIT(nvme_sim_register, SI_SUB_DRIVERS, SI_ORDER_ANY,
 376     nvme_sim_init, NULL);
 377
 378 static void
 379 nvme_sim_uninit(void)
 380 {
 381         /* XXX Cleanup */
 382
 383         nvme_unregister_consumer(consumer_cookie);
 384 }
 385
 386 SYSUNINIT(nvme_sim_unregister, SI_SUB_DRIVERS, SI_ORDER_ANY,
 387     nvme_sim_uninit, NULL);