sys/dev/nvme/nvme_sim.c

   1 /*-
   2  * Copyright (c) 2016 Netflix, Inc
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/systm.h>
  32 #include <sys/buf.h>
  33 #include <sys/bus.h>
  34 #include <sys/conf.h>
  35 #include <sys/ioccom.h>
  36 #include <sys/malloc.h>
  37 #include <sys/proc.h>
  38 #include <sys/smp.h>
  39
  40 #include <cam/cam.h>
  41 #include <cam/cam_ccb.h>
  42 #include <cam/cam_sim.h>
  43 #include <cam/cam_xpt_sim.h>
  44 #include <cam/cam_xpt_internal.h>       // Yes, this is wrong.
  45 #include <cam/cam_debug.h>
  46
  47 #include "nvme_private.h"
  48
  49 #define ccb_accb_ptr spriv_ptr0
  50 #define ccb_ctrlr_ptr spriv_ptr1
  51 static void     nvme_sim_action(struct cam_sim *sim, union ccb *ccb);
  52 static void     nvme_sim_poll(struct cam_sim *sim);
  53
  54 #define sim2softc(sim)  ((struct nvme_sim_softc *)cam_sim_softc(sim))
  55 #define sim2ns(sim)     (sim2softc(sim)->s_ns)
  56 #define sim2ctrlr(sim)  (sim2softc(sim)->s_ctrlr)
  57
  58 struct nvme_sim_softc
  59 {
  60         struct nvme_controller  *s_ctrlr;
  61         struct nvme_namespace   *s_ns;
  62         struct cam_sim          *s_sim;
  63         struct cam_path         *s_path;
  64 };
  65
  66 static void
  67 nvme_sim_nvmeio_done(void *ccb_arg, const struct nvme_completion *cpl)
  68 {
  69         union ccb *ccb = (union ccb *)ccb_arg;
  70
  71         /*
  72          * Let the periph know the completion, and let it sort out what
  73          * it means. Make our best guess, though for the status code.
  74          */
  75         memcpy(&ccb->nvmeio.cpl, cpl, sizeof(*cpl));
  76         if (nvme_completion_is_error(cpl)) {
  77                 ccb->ccb_h.status = CAM_REQ_CMP_ERR;
  78                 xpt_done(ccb);
  79         } else {
  80                 ccb->ccb_h.status = CAM_REQ_CMP;
  81                 xpt_done_direct(ccb);
  82         }
  83 }
  84
  85 static void
  86 nvme_sim_nvmeio(struct cam_sim *sim, union ccb *ccb)
  87 {
  88         struct ccb_nvmeio       *nvmeio = &ccb->nvmeio;
  89         struct nvme_request     *req;
  90         void                    *payload;
  91         uint32_t                size;
  92         struct nvme_controller *ctrlr;
  93
  94         ctrlr = sim2ctrlr(sim);
  95         payload = nvmeio->data_ptr;
  96         size = nvmeio->dxfer_len;
  97         /* SG LIST ??? */
  98         if ((nvmeio->ccb_h.flags & CAM_DATA_MASK) == CAM_DATA_BIO)
  99                 req = nvme_allocate_request_bio((struct bio *)payload,
 100                     nvme_sim_nvmeio_done, ccb);
 101         else if ((nvmeio->ccb_h.flags & CAM_DATA_SG) == CAM_DATA_SG)
 102                 req = nvme_allocate_request_ccb(ccb, nvme_sim_nvmeio_done, ccb);
 103         else if (payload == NULL)
 104                 req = nvme_allocate_request_null(nvme_sim_nvmeio_done, ccb);
 105         else
 106                 req = nvme_allocate_request_vaddr(payload, size,
 107                     nvme_sim_nvmeio_done, ccb);
 108
 109         if (req == NULL) {
 110                 nvmeio->ccb_h.status = CAM_RESRC_UNAVAIL;
 111                 xpt_done(ccb);
 112                 return;
 113         }
 114
 115         memcpy(&req->cmd, &ccb->nvmeio.cmd, sizeof(ccb->nvmeio.cmd));
 116
 117         if (ccb->ccb_h.func_code == XPT_NVME_IO)
 118                 nvme_ctrlr_submit_io_request(ctrlr, req);
 119         else
 120                 nvme_ctrlr_submit_admin_request(ctrlr, req);
 121
 122         ccb->ccb_h.status |= CAM_SIM_QUEUED;
 123 }
 124
 125 static void
 126 nvme_sim_action(struct cam_sim *sim, union ccb *ccb)
 127 {
 128         struct nvme_controller *ctrlr;
 129         struct nvme_namespace *ns;
 130
 131         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE,
 132             ("nvme_sim_action: func= %#x\n",
 133                 ccb->ccb_h.func_code));
 134
 135         /*
 136          * XXX when we support multiple namespaces in the base driver we'll need
 137          * to revisit how all this gets stored and saved in the periph driver's
 138          * reserved areas. Right now we store all three in the softc of the sim.
 139          */
 140         ns = sim2ns(sim);
 141         ctrlr = sim2ctrlr(sim);
 142
 143         mtx_assert(&ctrlr->lock, MA_OWNED);
 144
 145         switch (ccb->ccb_h.func_code) {
 146         case XPT_CALC_GEOMETRY:         /* Calculate Geometry Totally nuts ? XXX */
 147                 /*
 148                  * Only meaningful for old-school SCSI disks since only the SCSI
 149                  * da driver generates them. Reject all these that slip through.
 150                  */
 151                 /*FALLTHROUGH*/
 152         case XPT_ABORT:                 /* Abort the specified CCB */
 153         case XPT_EN_LUN:                /* Enable LUN as a target */
 154         case XPT_TARGET_IO:             /* Execute target I/O request */
 155         case XPT_ACCEPT_TARGET_IO:      /* Accept Host Target Mode CDB */
 156         case XPT_CONT_TARGET_IO:        /* Continue Host Target I/O Connection*/
 157                 /*
 158                  * Only target mode generates these, and only for SCSI. They are
 159                  * all invalid/unsupported for NVMe.
 160                  */
 161                 ccb->ccb_h.status = CAM_REQ_INVALID;
 162                 break;
 163         case XPT_SET_TRAN_SETTINGS:
 164                 /*
 165                  * NVMe doesn't really have different transfer settings, but
 166                  * other parts of CAM think failure here is a big deal.
 167                  */
 168                 ccb->ccb_h.status = CAM_REQ_CMP;
 169                 break;
 170         case XPT_PATH_INQ:              /* Path routing inquiry */
 171         {
 172                 struct ccb_pathinq *cpi = &ccb->cpi;
 173
 174                 /*
 175                  * NVMe may have multiple LUNs on the same path. Current generation
 176                  * of NVMe devives support only a single name space. Multiple name
 177                  * space drives are coming, but it's unclear how we should report
 178                  * them up the stack.
 179                  */
 180                 cpi->version_num = 1;
 181                 cpi->hba_inquiry = 0;
 182                 cpi->target_sprt = 0;
 183                 cpi->hba_misc =  PIM_UNMAPPED /* | PIM_NOSCAN */;
 184                 cpi->hba_eng_cnt = 0;
 185                 cpi->max_target = 0;
 186                 cpi->max_lun = ctrlr->cdata.nn;
 187                 cpi->maxio = nvme_ns_get_max_io_xfer_size(ns);
 188                 cpi->initiator_id = 0;
 189                 cpi->bus_id = cam_sim_bus(sim);
 190                 cpi->base_transfer_speed = 4000000;     /* 4 GB/s 4 lanes pcie 3 */
 191                 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
 192                 strncpy(cpi->hba_vid, "NVMe", HBA_IDLEN);
 193                 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
 194                 cpi->unit_number = cam_sim_unit(sim);
 195                 cpi->transport = XPORT_NVME;            /* XXX XPORT_PCIE ? */
 196                 cpi->transport_version = 1;             /* XXX Get PCIe spec ? */
 197                 cpi->protocol = PROTO_NVME;
 198                 cpi->protocol_version = NVME_REV_1;     /* Groks all 1.x NVMe cards */
 199                 cpi->xport_specific.nvme.nsid = ns->id;
 200                 cpi->ccb_h.status = CAM_REQ_CMP;
 201                 break;
 202         }
 203         case XPT_GET_TRAN_SETTINGS:     /* Get transport settings */
 204         {
 205                 struct ccb_trans_settings       *cts;
 206                 struct ccb_trans_settings_nvme  *nvmep;
 207                 struct ccb_trans_settings_nvme  *nvmex;
 208
 209                 cts = &ccb->cts;
 210                 nvmex = &cts->xport_specific.nvme;
 211                 nvmep = &cts->proto_specific.nvme;
 212
 213                 nvmex->valid = CTS_NVME_VALID_SPEC;
 214                 nvmex->spec_major = 1;                  /* XXX read from card */
 215                 nvmex->spec_minor = 2;
 216                 nvmex->spec_tiny = 0;
 217
 218                 nvmep->valid = CTS_NVME_VALID_SPEC;
 219                 nvmep->spec_major = 1;                  /* XXX read from card */
 220                 nvmep->spec_minor = 2;
 221                 nvmep->spec_tiny = 0;
 222                 cts->transport = XPORT_NVME;
 223                 cts->protocol = PROTO_NVME;
 224                 cts->ccb_h.status = CAM_REQ_CMP;
 225                 break;
 226         }
 227         case XPT_TERM_IO:               /* Terminate the I/O process */
 228                 /*
 229                  * every driver handles this, but nothing generates it. Assume
 230                  * it's OK to just say 'that worked'.
 231                  */
 232                 /*FALLTHROUGH*/
 233         case XPT_RESET_DEV:             /* Bus Device Reset the specified device */
 234         case XPT_RESET_BUS:             /* Reset the specified bus */
 235                 /*
 236                  * NVMe doesn't really support physically resetting the bus. It's part
 237                  * of the bus scanning dance, so return sucess to tell the process to
 238                  * proceed.
 239                  */
 240                 ccb->ccb_h.status = CAM_REQ_CMP;
 241                 break;
 242         case XPT_NVME_IO:               /* Execute the requested I/O operation */
 243         case XPT_NVME_ADMIN:            /* or Admin operation */
 244                 nvme_sim_nvmeio(sim, ccb);
 245                 return;                 /* no done */
 246         default:
 247                 ccb->ccb_h.status = CAM_REQ_INVALID;
 248                 break;
 249         }
 250         xpt_done(ccb);
 251 }
 252
 253 static void
 254 nvme_sim_poll(struct cam_sim *sim)
 255 {
 256
 257         nvme_ctrlr_poll(sim2ctrlr(sim));
 258 }
 259
 260 static void *
 261 nvme_sim_new_controller(struct nvme_controller *ctrlr)
 262 {
 263         struct cam_devq *devq;
 264         int max_trans;
 265         int unit;
 266         struct nvme_sim_softc *sc = NULL;
 267
 268         max_trans = ctrlr->max_hw_pend_io;
 269         unit = device_get_unit(ctrlr->dev);
 270         devq = cam_simq_alloc(max_trans);
 271         if (devq == NULL)
 272                 return NULL;
 273
 274         sc = malloc(sizeof(*sc), M_NVME, M_ZERO | M_WAITOK);
 275
 276         sc->s_ctrlr = ctrlr;
 277
 278         sc->s_sim = cam_sim_alloc(nvme_sim_action, nvme_sim_poll,
 279             "nvme", sc, unit, &ctrlr->lock, max_trans, max_trans, devq);
 280         if (sc->s_sim == NULL) {
 281                 printf("Failed to allocate a sim\n");
 282                 cam_simq_free(devq);
 283                 free(sc, M_NVME);
 284                 return NULL;
 285         }
 286
 287         return sc;
 288 }
 289
 290 static void
 291 nvme_sim_rescan_target(struct nvme_controller *ctrlr, struct cam_path *path)
 292 {
 293         union ccb *ccb;
 294
 295         ccb = xpt_alloc_ccb_nowait();
 296         if (ccb == NULL) {
 297                 printf("unable to alloc CCB for rescan\n");
 298                 return;
 299         }
 300
 301         if (xpt_clone_path(&ccb->ccb_h.path, path) != CAM_REQ_CMP) {
 302                 printf("unable to copy path for rescan\n");
 303                 xpt_free_ccb(ccb);
 304                 return;
 305         }
 306
 307         xpt_rescan(ccb);
 308 }
 309
 310 static void *
 311 nvme_sim_new_ns(struct nvme_namespace *ns, void *sc_arg)
 312 {
 313         struct nvme_sim_softc *sc = sc_arg;
 314         struct nvme_controller *ctrlr = sc->s_ctrlr;
 315         int i;
 316
 317         sc->s_ns = ns;
 318
 319         /*
 320          * XXX this is creating one bus per ns, but it should be one
 321          * XXX target per controller, and one LUN per namespace.
 322          * XXX Current drives only support one NS, so there's time
 323          * XXX to fix it later when new drives arrive.
 324          *
 325          * XXX I'm pretty sure the xpt_bus_register() call below is
 326          * XXX like super lame and it really belongs in the sim_new_ctrlr
 327          * XXX callback. Then the create_path below would be pretty close
 328          * XXX to being right. Except we should be per-ns not per-ctrlr
 329          * XXX data.
 330          */
 331
 332         mtx_lock(&ctrlr->lock);
 333 /* Create bus */
 334
 335         /*
 336          * XXX do I need to lock ctrlr->lock ?
 337          * XXX do I need to lock the path?
 338          * ata and scsi seem to in their code, but their discovery is
 339          * somewhat more asynchronous. We're only every called one at a
 340          * time, and nothing is in parallel.
 341          */
 342
 343         i = 0;
 344         if (xpt_bus_register(sc->s_sim, ctrlr->dev, 0) != CAM_SUCCESS)
 345                 goto error;
 346         i++;
 347         if (xpt_create_path(&sc->s_path, /*periph*/NULL, cam_sim_path(sc->s_sim),
 348             1, ns->id) != CAM_REQ_CMP)
 349                 goto error;
 350         i++;
 351
 352         sc->s_path->device->nvme_data = nvme_ns_get_data(ns);
 353         sc->s_path->device->nvme_cdata = nvme_ctrlr_get_data(ns->ctrlr);
 354
 355 /* Scan bus */
 356         nvme_sim_rescan_target(ctrlr, sc->s_path);
 357
 358         mtx_unlock(&ctrlr->lock);
 359
 360         return ns;
 361
 362 error:
 363         switch (i) {
 364         case 2:
 365                 xpt_free_path(sc->s_path);
 366         case 1:
 367                 xpt_bus_deregister(cam_sim_path(sc->s_sim));
 368         case 0:
 369                 cam_sim_free(sc->s_sim, /*free_devq*/TRUE);
 370         }
 371         mtx_unlock(&ctrlr->lock);
 372         return NULL;
 373 }
 374
 375 static void
 376 nvme_sim_controller_fail(void *ctrlr_arg)
 377 {
 378         /* XXX cleanup XXX */
 379 }
 380
 381 struct nvme_consumer *consumer_cookie;
 382
 383 static void
 384 nvme_sim_init(void)
 385 {
 386         if (nvme_use_nvd)
 387                 return;
 388
 389         consumer_cookie = nvme_register_consumer(nvme_sim_new_ns,
 390             nvme_sim_new_controller, NULL, nvme_sim_controller_fail);
 391 }
 392
 393 SYSINIT(nvme_sim_register, SI_SUB_DRIVERS, SI_ORDER_ANY,
 394     nvme_sim_init, NULL);
 395
 396 static void
 397 nvme_sim_uninit(void)
 398 {
 399         if (nvme_use_nvd)
 400                 return;
 401         /* XXX Cleanup */
 402
 403         nvme_unregister_consumer(consumer_cookie);
 404 }
 405
 406 SYSUNINIT(nvme_sim_unregister, SI_SUB_DRIVERS, SI_ORDER_ANY,
 407     nvme_sim_uninit, NULL);