2 * Copyright (c) 2011 Nathan Whitehorn
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/module.h>
34 #include <sys/kernel.h>
37 #include <dev/ofw/openfirm.h>
38 #include <dev/ofw/ofw_pci.h>
39 #include <dev/ofw/ofw_bus.h>
40 #include <dev/ofw/ofw_bus_subr.h>
41 #include <dev/ofw/ofwpci.h>
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcib_private.h>
47 #include <machine/bus.h>
48 #include <machine/md_var.h>
49 #include <machine/resource.h>
57 * If it is necessary to set another value of this for
58 * some platforms it should be set at fdt.h file
61 #define PCI_MAP_INTR 4
64 #define PCI_INTR_PINS 4
69 static struct resource * ofw_pcib_alloc_resource(device_t, device_t,
70 int, int *, rman_res_t, rman_res_t, rman_res_t, u_int);
71 static int ofw_pcib_release_resource(device_t, device_t, int, int,
73 static int ofw_pcib_activate_resource(device_t, device_t, int, int,
75 static int ofw_pcib_deactivate_resource(device_t, device_t, int, int,
77 static int ofw_pcib_adjust_resource(device_t, device_t, int,
78 struct resource *, rman_res_t, rman_res_t);
79 static int ofw_pcib_translate_resource(device_t bus, int type,
80 rman_res_t start, rman_res_t *newstart);
83 static bus_space_tag_t ofw_pcib_bus_get_bus_tag(device_t, device_t);
89 static int ofw_pcib_maxslots(device_t);
94 static phandle_t ofw_pcib_get_node(device_t, device_t);
99 static int ofw_pcib_fill_ranges(phandle_t, struct ofw_pci_range *);
100 static struct rman *ofw_pcib_get_rman(struct ofw_pci_softc *, int, u_int);
105 static device_method_t ofw_pcib_methods[] = {
106 /* Device interface */
107 DEVMETHOD(device_attach, ofw_pcib_attach),
110 DEVMETHOD(bus_print_child, bus_generic_print_child),
111 DEVMETHOD(bus_read_ivar, ofw_pcib_read_ivar),
112 DEVMETHOD(bus_write_ivar, ofw_pcib_write_ivar),
113 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
114 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
115 DEVMETHOD(bus_alloc_resource, ofw_pcib_alloc_resource),
116 DEVMETHOD(bus_release_resource, ofw_pcib_release_resource),
117 DEVMETHOD(bus_activate_resource, ofw_pcib_activate_resource),
118 DEVMETHOD(bus_deactivate_resource, ofw_pcib_deactivate_resource),
119 DEVMETHOD(bus_adjust_resource, ofw_pcib_adjust_resource),
120 DEVMETHOD(bus_translate_resource, ofw_pcib_translate_resource),
122 DEVMETHOD(bus_get_bus_tag, ofw_pcib_bus_get_bus_tag),
126 DEVMETHOD(pcib_maxslots, ofw_pcib_maxslots),
127 DEVMETHOD(pcib_route_interrupt, ofw_pcib_route_interrupt),
128 DEVMETHOD(pcib_request_feature, pcib_request_feature_allow),
130 /* ofw_bus interface */
131 DEVMETHOD(ofw_bus_get_node, ofw_pcib_get_node),
136 DEFINE_CLASS_0(ofw_pcib, ofw_pcib_driver, ofw_pcib_methods, 0);
139 ofw_pcib_init(device_t dev)
141 struct ofw_pci_softc *sc;
143 u_int32_t busrange[2];
144 struct ofw_pci_range *rp;
146 struct ofw_pci_cell_info *cell_info;
148 node = ofw_bus_get_node(dev);
149 sc = device_get_softc(dev);
150 sc->sc_initialized = 1;
152 sc->sc_pci_domain = device_get_unit(dev);
154 cell_info = (struct ofw_pci_cell_info *)malloc(sizeof(*cell_info),
155 M_DEVBUF, M_WAITOK | M_ZERO);
157 sc->sc_cell_info = cell_info;
159 if (OF_getencprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
164 sc->sc_bus = busrange[0];
166 if (sc->sc_quirks & OFW_PCI_QUIRK_RANGES_ON_CHILDREN) {
171 for (c = OF_child(node); c != 0; c = OF_peer(c)) {
172 n = ofw_pcib_nranges(c, cell_info);
176 if (sc->sc_nrange == 0) {
180 sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]),
183 for (c = OF_child(node); c != 0; c = OF_peer(c)) {
184 n = ofw_pcib_fill_ranges(c, &sc->sc_range[i]);
188 KASSERT(i == sc->sc_nrange, ("range count mismatch"));
190 sc->sc_nrange = ofw_pcib_nranges(node, cell_info);
191 if (sc->sc_nrange <= 0) {
192 device_printf(dev, "could not getranges\n");
196 sc->sc_range = malloc(sc->sc_nrange * sizeof(sc->sc_range[0]),
198 ofw_pcib_fill_ranges(node, sc->sc_range);
201 sc->sc_io_rman.rm_type = RMAN_ARRAY;
202 sc->sc_io_rman.rm_descr = "PCI I/O Ports";
203 error = rman_init(&sc->sc_io_rman);
205 device_printf(dev, "rman_init() failed. error = %d\n", error);
209 sc->sc_mem_rman.rm_type = RMAN_ARRAY;
210 sc->sc_mem_rman.rm_descr = "PCI Non Prefetchable Memory";
211 error = rman_init(&sc->sc_mem_rman);
213 device_printf(dev, "rman_init() failed. error = %d\n", error);
217 sc->sc_pmem_rman.rm_type = RMAN_ARRAY;
218 sc->sc_pmem_rman.rm_descr = "PCI Prefetchable Memory";
219 error = rman_init(&sc->sc_pmem_rman);
221 device_printf(dev, "rman_init() failed. error = %d\n", error);
225 for (i = 0; i < sc->sc_nrange; i++) {
227 rp = sc->sc_range + i;
229 if (sc->sc_range_mask & ((uint64_t)1 << i))
231 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
232 case OFW_PCI_PHYS_HI_SPACE_CONFIG:
234 case OFW_PCI_PHYS_HI_SPACE_IO:
235 error = rman_manage_region(&sc->sc_io_rman, rp->pci,
236 rp->pci + rp->size - 1);
238 case OFW_PCI_PHYS_HI_SPACE_MEM32:
239 case OFW_PCI_PHYS_HI_SPACE_MEM64:
240 if (rp->pci_hi & OFW_PCI_PHYS_HI_PREFETCHABLE) {
241 sc->sc_have_pmem = 1;
242 error = rman_manage_region(&sc->sc_pmem_rman,
243 rp->pci, rp->pci + rp->size - 1);
245 error = rman_manage_region(&sc->sc_mem_rman,
246 rp->pci, rp->pci + rp->size - 1);
253 "rman_manage_region(%x, %#jx, %#jx) failed. "
254 "error = %d\n", rp->pci_hi &
255 OFW_PCI_PHYS_HI_SPACEMASK, rp->pci,
256 rp->pci + rp->size - 1, error);
261 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(cell_t));
265 free(cell_info, M_DEVBUF);
266 free(sc->sc_range, M_DEVBUF);
267 rman_fini(&sc->sc_io_rman);
268 rman_fini(&sc->sc_mem_rman);
269 rman_fini(&sc->sc_pmem_rman);
275 ofw_pcib_attach(device_t dev)
277 struct ofw_pci_softc *sc;
280 sc = device_get_softc(dev);
281 if (!sc->sc_initialized) {
282 error = ofw_pcib_init(dev);
287 device_add_child(dev, "pci", -1);
288 return (bus_generic_attach(dev));
292 ofw_pcib_maxslots(device_t dev)
295 return (PCI_SLOTMAX);
299 ofw_pcib_route_interrupt(device_t bus, device_t dev, int pin)
301 struct ofw_pci_softc *sc;
302 struct ofw_pci_register reg;
303 uint32_t pintr, mintr[PCI_MAP_INTR];
307 sc = device_get_softc(bus);
310 /* Fabricate imap information in case this isn't an OFW device */
311 bzero(®, sizeof(reg));
312 reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
313 (pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
314 (pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
316 intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev),
317 &sc->sc_pci_iinfo, ®, sizeof(reg), &pintr, sizeof(pintr),
318 mintr, sizeof(mintr), &iparent);
319 if (intrcells != 0) {
320 pintr = ofw_bus_map_intr(dev, iparent, intrcells, mintr);
325 * Maybe it's a real interrupt, not an intpin
327 if (pin > PCI_INTR_PINS)
330 device_printf(bus, "could not route pin %d for device %d.%d\n",
331 pin, pci_get_slot(dev), pci_get_function(dev));
332 return (PCI_INVALID_IRQ);
336 ofw_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
338 struct ofw_pci_softc *sc;
340 sc = device_get_softc(dev);
343 case PCIB_IVAR_DOMAIN:
344 *result = sc->sc_pci_domain;
347 *result = sc->sc_bus;
357 ofw_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
359 struct ofw_pci_softc *sc;
361 sc = device_get_softc(dev);
375 ofw_pcib_nranges(phandle_t node, struct ofw_pci_cell_info *info)
377 ssize_t nbase_ranges;
382 info->host_address_cells = 1;
383 info->size_cells = 2;
384 info->pci_address_cell = 3;
386 OF_getencprop(OF_parent(node), "#address-cells",
387 &(info->host_address_cells), sizeof(info->host_address_cells));
388 OF_getencprop(node, "#address-cells",
389 &(info->pci_address_cell), sizeof(info->pci_address_cell));
390 OF_getencprop(node, "#size-cells", &(info->size_cells),
391 sizeof(info->size_cells));
393 nbase_ranges = OF_getproplen(node, "ranges");
394 if (nbase_ranges <= 0)
397 return (nbase_ranges / sizeof(cell_t) /
398 (info->pci_address_cell + info->host_address_cells +
402 static struct resource *
403 ofw_pcib_alloc_resource(device_t bus, device_t child, int type, int *rid,
404 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
406 struct ofw_pci_softc *sc;
411 needactivate = flags & RF_ACTIVE;
414 sc = device_get_softc(bus);
416 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
417 if (type == PCI_RES_BUS) {
418 return (pci_domain_alloc_bus(sc->sc_pci_domain, child, rid,
419 start, end, count, flags | needactivate));
423 rm = ofw_pcib_get_rman(sc, type, flags);
425 return (bus_generic_alloc_resource(bus, child, type, rid,
426 start, end, count, flags | needactivate));
429 rv = rman_reserve_resource(rm, start, end, count, flags, child);
431 device_printf(bus, "failed to reserve resource for %s\n",
432 device_get_nameunit(child));
436 rman_set_rid(rv, *rid);
439 if (bus_activate_resource(child, type, *rid, rv) != 0) {
441 "failed to activate resource for %s\n",
442 device_get_nameunit(child));
443 rman_release_resource(rv);
452 ofw_pcib_release_resource(device_t bus, device_t child, int type, int rid,
453 struct resource *res)
455 struct ofw_pci_softc *sc;
459 sc = device_get_softc(bus);
461 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
462 if (type == PCI_RES_BUS)
463 return (pci_domain_release_bus(sc->sc_pci_domain, child, rid,
467 rm = ofw_pcib_get_rman(sc, type, rman_get_flags(res));
469 return (bus_generic_release_resource(bus, child, type, rid,
472 KASSERT(rman_is_region_manager(res, rm), ("rman mismatch"));
474 if (rman_get_flags(res) & RF_ACTIVE) {
475 error = bus_deactivate_resource(child, type, rid, res);
479 return (rman_release_resource(res));
483 ofw_pcib_translate_resource(device_t bus, int type, rman_res_t start,
484 rman_res_t *newstart)
486 struct ofw_pci_softc *sc;
487 struct ofw_pci_range *rp;
490 sc = device_get_softc(bus);
493 * Map this through the ranges list
495 for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
496 rp->pci_hi != 0; rp++) {
497 if (start < rp->pci || start >= rp->pci + rp->size)
500 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
501 case OFW_PCI_PHYS_HI_SPACE_IO:
502 space = SYS_RES_IOPORT;
504 case OFW_PCI_PHYS_HI_SPACE_MEM32:
505 case OFW_PCI_PHYS_HI_SPACE_MEM64:
506 space = SYS_RES_MEMORY;
513 start += (rp->host - rp->pci);
522 ofw_pcib_activate_resource(device_t bus, device_t child, int type, int rid,
523 struct resource *res)
525 struct ofw_pci_softc *sc;
526 bus_space_handle_t handle;
528 struct ofw_pci_range *rp;
533 sc = device_get_softc(bus);
535 if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY) {
536 return (bus_generic_activate_resource(bus, child, type, rid,
540 start = (vm_paddr_t)rman_get_start(res);
543 * Map this through the ranges list
545 for (rp = sc->sc_range; rp < sc->sc_range + sc->sc_nrange &&
546 rp->pci_hi != 0; rp++) {
547 if (start < rp->pci || start >= rp->pci + rp->size)
550 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
551 case OFW_PCI_PHYS_HI_SPACE_IO:
552 space = SYS_RES_IOPORT;
554 case OFW_PCI_PHYS_HI_SPACE_MEM32:
555 case OFW_PCI_PHYS_HI_SPACE_MEM64:
556 space = SYS_RES_MEMORY;
563 start += (rp->host - rp->pci);
569 printf("ofw_pci mapdev: start %jx, len %jd\n",
570 (rman_res_t)start, rman_get_size(res));
572 tag = BUS_GET_BUS_TAG(child, child);
576 rman_set_bustag(res, tag);
577 rv = bus_space_map(tag, start,
578 rman_get_size(res), 0, &handle);
582 rman_set_bushandle(res, handle);
583 rman_set_virtual(res, (void *)handle); /* XXX for powerpc only ? */
585 return (rman_activate_resource(res));
589 static bus_space_tag_t
590 ofw_pcib_bus_get_bus_tag(device_t bus, device_t child)
598 ofw_pcib_deactivate_resource(device_t bus, device_t child, int type, int rid,
599 struct resource *res)
603 if (type != SYS_RES_IOPORT && type != SYS_RES_MEMORY) {
604 return (bus_generic_deactivate_resource(bus, child, type, rid,
608 psize = rman_get_size(res);
609 pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize);
611 return (rman_deactivate_resource(res));
615 ofw_pcib_adjust_resource(device_t bus, device_t child, int type,
616 struct resource *res, rman_res_t start, rman_res_t end)
619 struct ofw_pci_softc *sc;
621 sc = device_get_softc(bus);
622 #if defined(NEW_PCIB) && defined(PCI_RES_BUS)
623 if (type == PCI_RES_BUS)
624 return (pci_domain_adjust_bus(sc->sc_pci_domain, child, res,
628 rm = ofw_pcib_get_rman(sc, type, rman_get_flags(res));
630 return (bus_generic_adjust_resource(bus, child, type, res,
633 KASSERT(rman_is_region_manager(res, rm), ("rman mismatch"));
634 KASSERT(!(rman_get_flags(res) & RF_ACTIVE),
635 ("active resources cannot be adjusted"));
637 return (rman_adjust_resource(res, start, end));
641 ofw_pcib_get_node(device_t bus, device_t dev)
643 struct ofw_pci_softc *sc;
645 sc = device_get_softc(bus);
646 /* We only have one child, the PCI bus, which needs our own node. */
648 return (sc->sc_node);
652 ofw_pcib_fill_ranges(phandle_t node, struct ofw_pci_range *ranges)
654 int host_address_cells = 1, pci_address_cells = 3, size_cells = 2;
656 ssize_t nbase_ranges;
660 OF_getencprop(OF_parent(node), "#address-cells", &host_address_cells,
661 sizeof(host_address_cells));
662 OF_getencprop(node, "#address-cells", &pci_address_cells,
663 sizeof(pci_address_cells));
664 OF_getencprop(node, "#size-cells", &size_cells, sizeof(size_cells));
666 nbase_ranges = OF_getproplen(node, "ranges");
667 if (nbase_ranges <= 0)
669 nranges = nbase_ranges / sizeof(cell_t) /
670 (pci_address_cells + host_address_cells + size_cells);
672 base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
673 OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
675 for (i = 0, j = 0; i < nranges; i++) {
676 ranges[i].pci_hi = base_ranges[j++];
678 for (k = 0; k < pci_address_cells - 1; k++) {
679 ranges[i].pci <<= 32;
680 ranges[i].pci |= base_ranges[j++];
683 for (k = 0; k < host_address_cells; k++) {
684 ranges[i].host <<= 32;
685 ranges[i].host |= base_ranges[j++];
688 for (k = 0; k < size_cells; k++) {
689 ranges[i].size <<= 32;
690 ranges[i].size |= base_ranges[j++];
694 free(base_ranges, M_DEVBUF);
699 ofw_pcib_get_rman(struct ofw_pci_softc *sc, int type, u_int flags)
704 return (&sc->sc_io_rman);
706 if (sc->sc_have_pmem && (flags & RF_PREFETCHABLE))
707 return (&sc->sc_pmem_rman);
709 return (&sc->sc_mem_rman);