1 /* $OpenBSD: if_otus.c,v 1.46 2015/03/14 03:38:49 jsg Exp $ */
4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
5 * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 * Driver for Atheros AR9001U chipset.
24 #include <sys/cdefs.h>
25 __FBSDID("$FreeBSD$");
27 #include <sys/param.h>
28 #include <sys/endian.h>
29 #include <sys/sockio.h>
31 #include <sys/kernel.h>
32 #include <sys/socket.h>
33 #include <sys/systm.h>
37 #include <sys/firmware.h>
38 #include <sys/module.h>
39 #include <sys/taskqueue.h>
41 #include <machine/bus.h>
42 #include <machine/resource.h>
46 #include <net/if_var.h>
47 #include <net/if_arp.h>
48 #include <net/if_dl.h>
49 #include <net/if_media.h>
50 #include <net/if_types.h>
52 #include <netinet/in.h>
53 #include <netinet/in_systm.h>
54 #include <netinet/in_var.h>
55 #include <netinet/if_ether.h>
56 #include <netinet/ip.h>
58 #include <net80211/ieee80211_var.h>
59 #include <net80211/ieee80211_regdomain.h>
60 #include <net80211/ieee80211_radiotap.h>
61 #include <net80211/ieee80211_ratectl.h>
62 #include <net80211/ieee80211_input.h>
64 #include <dev/usb/usb.h>
65 #include <dev/usb/usbdi.h>
68 #define USB_DEBUG_VAR otus_debug
69 #include <dev/usb/usb_debug.h>
71 #include "if_otusreg.h"
73 static int otus_debug = 0;
74 static SYSCTL_NODE(_hw_usb, OID_AUTO, otus, CTLFLAG_RW, 0, "USB otus");
75 SYSCTL_INT(_hw_usb_otus, OID_AUTO, debug, CTLFLAG_RWTUN, &otus_debug, 0,
77 #define OTUS_DEBUG_XMIT 0x00000001
78 #define OTUS_DEBUG_RECV 0x00000002
79 #define OTUS_DEBUG_TXDONE 0x00000004
80 #define OTUS_DEBUG_RXDONE 0x00000008
81 #define OTUS_DEBUG_CMD 0x00000010
82 #define OTUS_DEBUG_CMDDONE 0x00000020
83 #define OTUS_DEBUG_RESET 0x00000040
84 #define OTUS_DEBUG_STATE 0x00000080
85 #define OTUS_DEBUG_CMDNOTIFY 0x00000100
86 #define OTUS_DEBUG_REGIO 0x00000200
87 #define OTUS_DEBUG_IRQ 0x00000400
88 #define OTUS_DEBUG_TXCOMP 0x00000800
89 #define OTUS_DEBUG_ANY 0xffffffff
91 #define OTUS_DPRINTF(sc, dm, ...) \
93 if ((dm == OTUS_DEBUG_ANY) || (dm & otus_debug)) \
94 device_printf(sc->sc_dev, __VA_ARGS__); \
97 #define OTUS_DEV(v, p) { USB_VPI(v, p, 0) }
98 static const STRUCT_USB_HOST_ID otus_devs[] = {
99 OTUS_DEV(USB_VENDOR_ACCTON, USB_PRODUCT_ACCTON_WN7512),
100 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_3CRUSBN275),
101 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_TG121N),
102 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_AR9170),
103 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_WN612),
104 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_WN821NV2),
105 OTUS_DEV(USB_VENDOR_AVM, USB_PRODUCT_AVM_FRITZWLAN),
106 OTUS_DEV(USB_VENDOR_CACE, USB_PRODUCT_CACE_AIRPCAPNX),
107 OTUS_DEV(USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DWA130D1),
108 OTUS_DEV(USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DWA160A1),
109 OTUS_DEV(USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DWA160A2),
110 OTUS_DEV(USB_VENDOR_IODATA, USB_PRODUCT_IODATA_WNGDNUS2),
111 OTUS_DEV(USB_VENDOR_NEC, USB_PRODUCT_NEC_WL300NUG),
112 OTUS_DEV(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_WN111V2),
113 OTUS_DEV(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_WNA1000),
114 OTUS_DEV(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_WNDA3100),
115 OTUS_DEV(USB_VENDOR_PLANEX2, USB_PRODUCT_PLANEX2_GW_US300),
116 OTUS_DEV(USB_VENDOR_WISTRONNEWEB, USB_PRODUCT_WISTRONNEWEB_O8494),
117 OTUS_DEV(USB_VENDOR_WISTRONNEWEB, USB_PRODUCT_WISTRONNEWEB_WNC0600),
118 OTUS_DEV(USB_VENDOR_ZCOM, USB_PRODUCT_ZCOM_UB81),
119 OTUS_DEV(USB_VENDOR_ZCOM, USB_PRODUCT_ZCOM_UB82),
120 OTUS_DEV(USB_VENDOR_ZYDAS, USB_PRODUCT_ZYDAS_ZD1221),
121 OTUS_DEV(USB_VENDOR_ZYXEL, USB_PRODUCT_ZYXEL_NWD271N),
124 static device_probe_t otus_match;
125 static device_attach_t otus_attach;
126 static device_detach_t otus_detach;
128 static int otus_attachhook(struct otus_softc *);
129 void otus_get_chanlist(struct otus_softc *);
130 int otus_load_firmware(struct otus_softc *, const char *,
132 int otus_open_pipes(struct otus_softc *);
133 void otus_close_pipes(struct otus_softc *);
135 static int otus_alloc_tx_cmd_list(struct otus_softc *);
136 static void otus_free_tx_cmd_list(struct otus_softc *);
138 static int otus_alloc_rx_list(struct otus_softc *);
139 static void otus_free_rx_list(struct otus_softc *);
140 static int otus_alloc_tx_list(struct otus_softc *);
141 static void otus_free_tx_list(struct otus_softc *);
142 static void otus_free_list(struct otus_softc *, struct otus_data [], int);
143 static struct otus_data *_otus_getbuf(struct otus_softc *);
144 static struct otus_data *otus_getbuf(struct otus_softc *);
145 static void otus_freebuf(struct otus_softc *, struct otus_data *);
147 static struct otus_tx_cmd *_otus_get_txcmd(struct otus_softc *);
148 static struct otus_tx_cmd *otus_get_txcmd(struct otus_softc *);
149 static void otus_free_txcmd(struct otus_softc *, struct otus_tx_cmd *);
151 void otus_next_scan(void *, int);
152 static void otus_tx_task(void *, int pending);
153 static void otus_wme_update_task(void *, int pending);
154 void otus_do_async(struct otus_softc *,
155 void (*)(struct otus_softc *, void *), void *, int);
156 int otus_newstate(struct ieee80211vap *, enum ieee80211_state,
158 int otus_cmd(struct otus_softc *, uint8_t, const void *, int,
160 void otus_write(struct otus_softc *, uint32_t, uint32_t);
161 int otus_write_barrier(struct otus_softc *);
162 struct ieee80211_node *otus_node_alloc(struct ieee80211com *);
163 int otus_media_change(struct ifnet *);
164 int otus_read_eeprom(struct otus_softc *);
165 void otus_newassoc(struct ieee80211_node *, int);
166 void otus_cmd_rxeof(struct otus_softc *, uint8_t *, int);
167 void otus_sub_rxeof(struct otus_softc *, uint8_t *, int,
169 static int otus_tx(struct otus_softc *, struct ieee80211_node *,
170 struct mbuf *, struct otus_data *);
171 int otus_ioctl(struct ifnet *, u_long, caddr_t);
172 int otus_set_multi(struct otus_softc *);
173 static void otus_updateedca(struct otus_softc *sc);
174 static void otus_updateslot(struct otus_softc *sc);
175 int otus_init_mac(struct otus_softc *);
176 uint32_t otus_phy_get_def(struct otus_softc *, uint32_t);
177 int otus_set_board_values(struct otus_softc *,
178 struct ieee80211_channel *);
179 int otus_program_phy(struct otus_softc *,
180 struct ieee80211_channel *);
181 int otus_set_rf_bank4(struct otus_softc *,
182 struct ieee80211_channel *);
183 void otus_get_delta_slope(uint32_t, uint32_t *, uint32_t *);
184 static int otus_set_chan(struct otus_softc *, struct ieee80211_channel *,
186 int otus_set_key(struct ieee80211com *, struct ieee80211_node *,
187 struct ieee80211_key *);
188 void otus_set_key_cb(struct otus_softc *, void *);
189 void otus_delete_key(struct ieee80211com *, struct ieee80211_node *,
190 struct ieee80211_key *);
191 void otus_delete_key_cb(struct otus_softc *, void *);
192 void otus_calibrate_to(void *, int);
193 int otus_set_bssid(struct otus_softc *, const uint8_t *);
194 int otus_set_macaddr(struct otus_softc *, const uint8_t *);
195 void otus_led_newstate_type1(struct otus_softc *);
196 void otus_led_newstate_type2(struct otus_softc *);
197 void otus_led_newstate_type3(struct otus_softc *);
198 int otus_init(struct otus_softc *sc);
199 void otus_stop(struct otus_softc *sc);
201 static device_method_t otus_methods[] = {
202 DEVMETHOD(device_probe, otus_match),
203 DEVMETHOD(device_attach, otus_attach),
204 DEVMETHOD(device_detach, otus_detach),
209 static driver_t otus_driver = {
211 .methods = otus_methods,
212 .size = sizeof(struct otus_softc)
215 static devclass_t otus_devclass;
217 DRIVER_MODULE(otus, uhub, otus_driver, otus_devclass, NULL, 0);
218 MODULE_DEPEND(otus, wlan, 1, 1, 1);
219 MODULE_DEPEND(otus, usb, 1, 1, 1);
220 MODULE_DEPEND(otus, firmware, 1, 1, 1);
221 MODULE_VERSION(otus, 1);
223 static usb_callback_t otus_bulk_tx_callback;
224 static usb_callback_t otus_bulk_rx_callback;
225 static usb_callback_t otus_bulk_irq_callback;
226 static usb_callback_t otus_bulk_cmd_callback;
228 static const struct usb_config otus_config[OTUS_N_XFER] = {
231 .endpoint = UE_ADDR_ANY,
232 .direction = UE_DIR_OUT,
234 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
235 .callback = otus_bulk_tx_callback,
236 .timeout = 5000, /* ms */
240 .endpoint = UE_ADDR_ANY,
241 .direction = UE_DIR_IN,
242 .bufsize = OTUS_RXBUFSZ,
243 .flags = { .ext_buffer = 1, .pipe_bof = 1,.short_xfer_ok = 1,},
244 .callback = otus_bulk_rx_callback,
247 .type = UE_INTERRUPT,
248 .endpoint = UE_ADDR_ANY,
249 .direction = UE_DIR_IN,
250 .bufsize = OTUS_MAX_CTRLSZ,
251 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
252 .callback = otus_bulk_irq_callback,
255 .type = UE_INTERRUPT,
256 .endpoint = UE_ADDR_ANY,
257 .direction = UE_DIR_OUT,
258 .bufsize = OTUS_MAX_CTRLSZ,
259 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
260 .callback = otus_bulk_cmd_callback,
261 .timeout = 5000, /* ms */
266 otus_match(device_t self)
268 struct usb_attach_arg *uaa = device_get_ivars(self);
270 if (uaa->usb_mode != USB_MODE_HOST ||
271 uaa->info.bIfaceIndex != 0 ||
272 uaa->info.bConfigIndex != 0)
275 return (usbd_lookup_id_by_uaa(otus_devs, sizeof(otus_devs), uaa));
279 otus_attach(device_t self)
281 struct usb_attach_arg *uaa = device_get_ivars(self);
282 struct otus_softc *sc = device_get_softc(self);
286 device_set_usb_desc(self);
287 sc->sc_udev = uaa->device;
290 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK,
293 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->scan_to, 0, otus_next_scan, sc);
294 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_to, 0, otus_calibrate_to, sc);
295 TASK_INIT(&sc->tx_task, 0, otus_tx_task, sc);
296 TASK_INIT(&sc->wme_update_task, 0, otus_wme_update_task, sc);
297 mbufq_init(&sc->sc_snd, ifqmaxlen);
300 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
301 otus_config, OTUS_N_XFER, sc, &sc->sc_mtx);
303 device_printf(sc->sc_dev,
304 "could not allocate USB transfers, err=%s\n",
309 if ((error = otus_open_pipes(sc)) != 0) {
310 device_printf(sc->sc_dev, "%s: could not open pipes\n",
315 /* XXX check return status; fail out if appropriate */
316 if (otus_attachhook(sc) != 0)
322 otus_close_pipes(sc);
324 mtx_destroy(&sc->sc_mtx);
329 otus_detach(device_t self)
331 struct otus_softc *sc = device_get_softc(self);
332 struct ieee80211com *ic = &sc->sc_ic;
336 usbd_transfer_unsetup(sc->sc_xfer, OTUS_N_XFER);
338 taskqueue_drain_timeout(taskqueue_thread, &sc->scan_to);
339 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_to);
340 taskqueue_drain(taskqueue_thread, &sc->tx_task);
341 taskqueue_drain(taskqueue_thread, &sc->wme_update_task);
344 /* Wait for all queued asynchronous commands to complete. */
345 usb_rem_wait_task(sc->sc_udev, &sc->sc_task);
347 usbd_ref_wait(sc->sc_udev);
350 ieee80211_ifdetach(ic);
351 otus_close_pipes(sc);
352 mtx_destroy(&sc->sc_mtx);
357 otus_delay_ms(struct otus_softc *sc, int ms)
363 static struct ieee80211vap *
364 otus_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
365 enum ieee80211_opmode opmode, int flags,
366 const uint8_t bssid[IEEE80211_ADDR_LEN],
367 const uint8_t mac[IEEE80211_ADDR_LEN])
369 struct otus_vap *uvp;
370 struct ieee80211vap *vap;
372 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
375 uvp = malloc(sizeof(struct otus_vap), M_80211_VAP, M_WAITOK | M_ZERO);
378 if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
379 flags, bssid) != 0) {
381 free(uvp, M_80211_VAP);
385 /* override state transition machine */
386 uvp->newstate = vap->iv_newstate;
387 vap->iv_newstate = otus_newstate;
389 /* XXX TODO: double-check */
390 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16;
391 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K;
393 ieee80211_ratectl_init(vap);
396 ieee80211_vap_attach(vap, ieee80211_media_change,
397 ieee80211_media_status, mac);
398 ic->ic_opmode = opmode;
404 otus_vap_delete(struct ieee80211vap *vap)
406 struct otus_vap *uvp = OTUS_VAP(vap);
408 ieee80211_ratectl_deinit(vap);
409 ieee80211_vap_detach(vap);
410 free(uvp, M_80211_VAP);
414 otus_parent(struct ieee80211com *ic)
416 struct otus_softc *sc = ic->ic_softc;
419 if (ic->ic_nrunning > 0) {
420 if (!sc->sc_running) {
424 (void) otus_set_multi(sc);
426 } else if (sc->sc_running)
430 ieee80211_start_all(ic);
434 otus_drain_mbufq(struct otus_softc *sc)
437 struct ieee80211_node *ni;
439 OTUS_LOCK_ASSERT(sc);
440 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
441 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
442 m->m_pkthdr.rcvif = NULL;
443 ieee80211_free_node(ni);
449 otus_tx_start(struct otus_softc *sc)
452 taskqueue_enqueue(taskqueue_thread, &sc->tx_task);
456 otus_transmit(struct ieee80211com *ic, struct mbuf *m)
458 struct otus_softc *sc = ic->ic_softc;
462 if (! sc->sc_running) {
467 /* XXX TODO: handle fragments */
468 error = mbufq_enqueue(&sc->sc_snd, m);
470 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
471 "%s: mbufq_enqueue failed: %d\n",
486 _otus_start(struct otus_softc *sc)
488 struct ieee80211_node *ni;
489 struct otus_data *bf;
492 OTUS_LOCK_ASSERT(sc);
494 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
495 bf = otus_getbuf(sc);
497 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
498 "%s: failed to get buffer\n", __func__);
499 mbufq_prepend(&sc->sc_snd, m);
503 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
504 m->m_pkthdr.rcvif = NULL;
506 if (otus_tx(sc, ni, m, bf) != 0) {
507 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
508 "%s: failed to transmit\n", __func__);
509 if_inc_counter(ni->ni_vap->iv_ifp,
510 IFCOUNTER_OERRORS, 1);
511 otus_freebuf(sc, bf);
512 ieee80211_free_node(ni);
520 otus_tx_task(void *arg, int pending)
522 struct otus_softc *sc = arg;
530 otus_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
531 const struct ieee80211_bpf_params *params)
533 struct ieee80211com *ic= ni->ni_ic;
534 struct otus_softc *sc = ic->ic_softc;
535 struct otus_data *bf = NULL;
538 /* Don't transmit if we're not running */
540 if (! sc->sc_running) {
545 bf = otus_getbuf(sc);
552 * XXX TODO: support TX bpf params
554 if (otus_tx(sc, ni, m, bf) != 0) {
563 otus_freebuf(sc, bf);
565 ieee80211_free_node(ni);
571 otus_update_chw(struct ieee80211com *ic)
574 printf("%s: TODO\n", __func__);
578 otus_set_channel(struct ieee80211com *ic)
580 struct otus_softc *sc = ic->ic_softc;
581 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "%s: set channel: %d\n",
583 ic->ic_curchan->ic_freq);
586 (void) otus_set_chan(sc, ic->ic_curchan, 0);
591 otus_wme_update_task(void *arg, int pending)
593 struct otus_softc *sc = arg;
597 * XXX TODO: take temporary copy of EDCA information
598 * when scheduling this so we have a more time-correct view
606 otus_wme_schedule_update(struct otus_softc *sc)
609 taskqueue_enqueue(taskqueue_thread, &sc->wme_update_task);
613 * This is called by net80211 in RX packet context, so we
616 * TODO: have net80211 schedule an update itself for its
617 * own internal taskqueue.
620 otus_wme_update(struct ieee80211com *ic)
622 struct otus_softc *sc = ic->ic_softc;
624 otus_wme_schedule_update(sc);
629 otus_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
632 /* For now, no A-MPDU TX support in the driver */
637 otus_scan_start(struct ieee80211com *ic)
640 // printf("%s: TODO\n", __func__);
644 otus_scan_end(struct ieee80211com *ic)
647 // printf("%s: TODO\n", __func__);
651 otus_update_mcast(struct ieee80211com *ic)
653 struct otus_softc *sc = ic->ic_softc;
655 (void) otus_set_multi(sc);
659 otus_attachhook(struct otus_softc *sc)
661 struct ieee80211com *ic = &sc->sc_ic;
662 usb_device_request_t req;
668 error = otus_load_firmware(sc, "otusfw_init", AR_FW_INIT_ADDR);
670 device_printf(sc->sc_dev, "%s: could not load %s firmware\n",
675 /* XXX not locked? */
676 otus_delay_ms(sc, 1000);
679 error = otus_load_firmware(sc, "otusfw_main", AR_FW_MAIN_ADDR);
681 device_printf(sc->sc_dev, "%s: could not load %s firmware\n",
688 /* Tell device that firmware transfer is complete. */
689 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
690 req.bRequest = AR_FW_DOWNLOAD_COMPLETE;
691 USETW(req.wValue, 0);
692 USETW(req.wIndex, 0);
693 USETW(req.wLength, 0);
694 if (usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, &req, NULL,
695 0, NULL, 250) != 0) {
697 device_printf(sc->sc_dev,
698 "%s: firmware initialization failed\n",
703 /* Send an ECHO command to check that everything is settled. */
705 if (otus_cmd(sc, AR_CMD_ECHO, &in, sizeof in, &out) != 0) {
707 device_printf(sc->sc_dev,
708 "%s: echo command failed\n", __func__);
713 device_printf(sc->sc_dev,
714 "%s: echo reply mismatch: 0x%08x!=0x%08x\n",
719 /* Read entire EEPROM. */
720 if (otus_read_eeprom(sc) != 0) {
722 device_printf(sc->sc_dev,
723 "%s: could not read EEPROM\n",
730 sc->txmask = sc->eeprom.baseEepHeader.txMask;
731 sc->rxmask = sc->eeprom.baseEepHeader.rxMask;
732 sc->capflags = sc->eeprom.baseEepHeader.opCapFlags;
733 IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->eeprom.baseEepHeader.macAddr);
734 sc->sc_led_newstate = otus_led_newstate_type3; /* XXX */
736 device_printf(sc->sc_dev,
737 "MAC/BBP AR9170, RF AR%X, MIMO %dT%dR, address %s\n",
738 (sc->capflags & AR5416_OPFLAGS_11A) ?
739 0x9104 : ((sc->txmask == 0x5) ? 0x9102 : 0x9101),
740 (sc->txmask == 0x5) ? 2 : 1, (sc->rxmask == 0x5) ? 2 : 1,
741 ether_sprintf(ic->ic_macaddr));
744 ic->ic_name = device_get_nameunit(sc->sc_dev);
745 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
746 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
748 /* Set device capabilities. */
750 IEEE80211_C_STA | /* station mode */
752 IEEE80211_C_BGSCAN | /* Background scan. */
754 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */
755 IEEE80211_C_WME | /* WME/QoS */
756 IEEE80211_C_SHSLOT | /* Short slot time supported. */
757 IEEE80211_C_FF | /* Atheros fast-frames supported. */
758 IEEE80211_C_WPA; /* WPA/RSN. */
763 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
764 /* Set supported .11b and .11g rates. */
765 ic->ic_sup_rates[IEEE80211_MODE_11B] =
766 ieee80211_std_rateset_11b;
767 ic->ic_sup_rates[IEEE80211_MODE_11G] =
768 ieee80211_std_rateset_11g;
770 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
771 /* Set supported .11a rates. */
772 ic->ic_sup_rates[IEEE80211_MODE_11A] =
773 ieee80211_std_rateset_11a;
778 /* Build the list of supported channels. */
779 otus_get_chanlist(sc);
781 /* Set supported .11b and .11g rates. */
783 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
784 setbit(&bands, IEEE80211_MODE_11B);
785 setbit(&bands, IEEE80211_MODE_11G);
787 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
788 setbit(&bands, IEEE80211_MODE_11A);
792 setbit(&bands, IEEE80211_MODE_11NG);
794 ieee80211_init_channels(ic, NULL, &bands);
797 ieee80211_ifattach(ic);
798 ic->ic_raw_xmit = otus_raw_xmit;
799 ic->ic_scan_start = otus_scan_start;
800 ic->ic_scan_end = otus_scan_end;
801 ic->ic_set_channel = otus_set_channel;
802 ic->ic_vap_create = otus_vap_create;
803 ic->ic_vap_delete = otus_vap_delete;
804 ic->ic_update_mcast = otus_update_mcast;
805 ic->ic_update_promisc = otus_update_mcast;
806 ic->ic_parent = otus_parent;
807 ic->ic_transmit = otus_transmit;
808 ic->ic_update_chw = otus_update_chw;
809 ic->ic_ampdu_enable = otus_ampdu_enable;
810 ic->ic_wme.wme_update = otus_wme_update;
811 ic->ic_newassoc = otus_newassoc;
814 ic->ic_set_key = otus_set_key;
815 ic->ic_delete_key = otus_delete_key;
818 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr,
819 sizeof(sc->sc_txtap), OTUS_TX_RADIOTAP_PRESENT,
820 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
821 OTUS_RX_RADIOTAP_PRESENT);
827 otus_get_chanlist(struct otus_softc *sc)
829 struct ieee80211com *ic = &sc->sc_ic;
834 /* XXX regulatory domain. */
835 domain = le16toh(sc->eeprom.baseEepHeader.regDmn[0]);
836 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "regdomain=0x%04x\n", domain);
838 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
839 for (i = 0; i < 14; i++) {
841 ic->ic_channels[chan].ic_freq =
842 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
843 ic->ic_channels[chan].ic_flags =
844 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
845 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
848 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
849 for (i = 14; i < nitems(ar_chans); i++) {
851 ic->ic_channels[chan].ic_freq =
852 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
853 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A;
859 otus_load_firmware(struct otus_softc *sc, const char *name, uint32_t addr)
861 usb_device_request_t req;
863 const struct firmware *fw;
864 int mlen, error, size;
868 /* Read firmware image from the filesystem. */
869 if ((fw = firmware_get(name)) == NULL) {
870 device_printf(sc->sc_dev,
871 "%s: failed loadfirmware of file %s\n", __func__, name);
874 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
875 req.bRequest = AR_FW_DOWNLOAD;
876 USETW(req.wIndex, 0);
881 ptr = __DECONST(char *, fw->data);
885 mlen = MIN(size, 4096);
887 USETW(req.wValue, addr);
888 USETW(req.wLength, mlen);
889 if (usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
890 &req, ptr, 0, NULL, 250) != 0) {
901 firmware_put(fw, FIRMWARE_UNLOAD);
903 device_printf(sc->sc_dev,
904 "%s: %s: error=%d\n", __func__, name, error);
909 otus_open_pipes(struct otus_softc *sc)
917 OTUS_UNLOCK_ASSERT(sc);
919 if ((error = otus_alloc_tx_cmd_list(sc)) != 0) {
920 device_printf(sc->sc_dev,
921 "%s: could not allocate command xfer\n",
926 if ((error = otus_alloc_tx_list(sc)) != 0) {
927 device_printf(sc->sc_dev, "%s: could not allocate Tx xfers\n",
932 if ((error = otus_alloc_rx_list(sc)) != 0) {
933 device_printf(sc->sc_dev, "%s: could not allocate Rx xfers\n",
938 /* Enable RX transfers; needed for initial firmware messages */
940 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_RX]);
941 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_IRQ]);
945 fail: otus_close_pipes(sc);
950 otus_close_pipes(struct otus_softc *sc)
952 otus_free_tx_cmd_list(sc);
953 otus_free_tx_list(sc);
954 otus_free_rx_list(sc);
956 usbd_transfer_unsetup(sc->sc_xfer, OTUS_N_XFER);
960 otus_free_cmd_list(struct otus_softc *sc, struct otus_tx_cmd cmd[], int ndata)
964 /* XXX TODO: someone has to have waken up waiters! */
965 for (i = 0; i < ndata; i++) {
966 struct otus_tx_cmd *dp = &cmd[i];
968 if (dp->buf != NULL) {
969 free(dp->buf, M_USBDEV);
976 otus_alloc_cmd_list(struct otus_softc *sc, struct otus_tx_cmd cmd[],
977 int ndata, int maxsz)
981 for (i = 0; i < ndata; i++) {
982 struct otus_tx_cmd *dp = &cmd[i];
983 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT);
985 if (dp->buf == NULL) {
986 device_printf(sc->sc_dev,
987 "could not allocate buffer\n");
995 otus_free_cmd_list(sc, cmd, ndata);
1000 otus_alloc_tx_cmd_list(struct otus_softc *sc)
1004 error = otus_alloc_cmd_list(sc, sc->sc_cmd, OTUS_CMD_LIST_COUNT,
1009 STAILQ_INIT(&sc->sc_cmd_active);
1010 STAILQ_INIT(&sc->sc_cmd_inactive);
1011 STAILQ_INIT(&sc->sc_cmd_pending);
1012 STAILQ_INIT(&sc->sc_cmd_waiting);
1014 for (i = 0; i < OTUS_CMD_LIST_COUNT; i++)
1015 STAILQ_INSERT_HEAD(&sc->sc_cmd_inactive, &sc->sc_cmd[i],
1022 otus_free_tx_cmd_list(struct otus_softc *sc)
1026 * XXX TODO: something needs to wake up any pending/sleeping
1029 STAILQ_INIT(&sc->sc_cmd_active);
1030 STAILQ_INIT(&sc->sc_cmd_inactive);
1031 STAILQ_INIT(&sc->sc_cmd_pending);
1032 STAILQ_INIT(&sc->sc_cmd_waiting);
1034 otus_free_cmd_list(sc, sc->sc_cmd, OTUS_CMD_LIST_COUNT);
1038 otus_alloc_list(struct otus_softc *sc, struct otus_data data[],
1039 int ndata, int maxsz)
1043 for (i = 0; i < ndata; i++) {
1044 struct otus_data *dp = &data[i];
1047 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT);
1048 if (dp->buf == NULL) {
1049 device_printf(sc->sc_dev,
1050 "could not allocate buffer\n");
1059 otus_free_list(sc, data, ndata);
1064 otus_alloc_rx_list(struct otus_softc *sc)
1068 error = otus_alloc_list(sc, sc->sc_rx, OTUS_RX_LIST_COUNT,
1073 STAILQ_INIT(&sc->sc_rx_active);
1074 STAILQ_INIT(&sc->sc_rx_inactive);
1076 for (i = 0; i < OTUS_RX_LIST_COUNT; i++)
1077 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1083 otus_alloc_tx_list(struct otus_softc *sc)
1087 error = otus_alloc_list(sc, sc->sc_tx, OTUS_TX_LIST_COUNT,
1092 STAILQ_INIT(&sc->sc_tx_inactive);
1094 for (i = 0; i != OTUS_N_XFER; i++) {
1095 STAILQ_INIT(&sc->sc_tx_active[i]);
1096 STAILQ_INIT(&sc->sc_tx_pending[i]);
1099 for (i = 0; i < OTUS_TX_LIST_COUNT; i++) {
1100 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next);
1107 otus_free_tx_list(struct otus_softc *sc)
1111 /* prevent further allocations from TX list(s) */
1112 STAILQ_INIT(&sc->sc_tx_inactive);
1114 for (i = 0; i != OTUS_N_XFER; i++) {
1115 STAILQ_INIT(&sc->sc_tx_active[i]);
1116 STAILQ_INIT(&sc->sc_tx_pending[i]);
1119 otus_free_list(sc, sc->sc_tx, OTUS_TX_LIST_COUNT);
1123 otus_free_rx_list(struct otus_softc *sc)
1125 /* prevent further allocations from RX list(s) */
1126 STAILQ_INIT(&sc->sc_rx_inactive);
1127 STAILQ_INIT(&sc->sc_rx_active);
1129 otus_free_list(sc, sc->sc_rx, OTUS_RX_LIST_COUNT);
1133 otus_free_list(struct otus_softc *sc, struct otus_data data[], int ndata)
1137 for (i = 0; i < ndata; i++) {
1138 struct otus_data *dp = &data[i];
1140 if (dp->buf != NULL) {
1141 free(dp->buf, M_USBDEV);
1144 if (dp->ni != NULL) {
1145 ieee80211_free_node(dp->ni);
1151 static struct otus_data *
1152 _otus_getbuf(struct otus_softc *sc)
1154 struct otus_data *bf;
1156 bf = STAILQ_FIRST(&sc->sc_tx_inactive);
1158 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
1164 static struct otus_data *
1165 otus_getbuf(struct otus_softc *sc)
1167 struct otus_data *bf;
1169 OTUS_LOCK_ASSERT(sc);
1171 bf = _otus_getbuf(sc);
1176 otus_freebuf(struct otus_softc *sc, struct otus_data *bf)
1179 OTUS_LOCK_ASSERT(sc);
1180 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next);
1183 static struct otus_tx_cmd *
1184 _otus_get_txcmd(struct otus_softc *sc)
1186 struct otus_tx_cmd *bf;
1188 bf = STAILQ_FIRST(&sc->sc_cmd_inactive);
1190 STAILQ_REMOVE_HEAD(&sc->sc_cmd_inactive, next_cmd);
1196 static struct otus_tx_cmd *
1197 otus_get_txcmd(struct otus_softc *sc)
1199 struct otus_tx_cmd *bf;
1201 OTUS_LOCK_ASSERT(sc);
1203 bf = _otus_get_txcmd(sc);
1205 device_printf(sc->sc_dev, "%s: no tx cmd buffers\n",
1212 otus_free_txcmd(struct otus_softc *sc, struct otus_tx_cmd *bf)
1215 OTUS_LOCK_ASSERT(sc);
1216 STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, bf, next_cmd);
1220 otus_next_scan(void *arg, int pending)
1223 struct otus_softc *sc = arg;
1225 if (usbd_is_dying(sc->sc_udev))
1228 usbd_ref_incr(sc->sc_udev);
1230 if (sc->sc_ic.ic_state == IEEE80211_S_SCAN)
1231 ieee80211_next_scan(&sc->sc_ic.ic_if);
1233 usbd_ref_decr(sc->sc_udev);
1238 otus_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1240 struct otus_vap *uvp = OTUS_VAP(vap);
1241 struct ieee80211com *ic = vap->iv_ic;
1242 struct otus_softc *sc = ic->ic_softc;
1243 struct ieee80211_node *ni;
1244 enum ieee80211_state ostate;
1246 ostate = vap->iv_state;
1247 OTUS_DPRINTF(sc, OTUS_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1248 ieee80211_state_name[ostate],
1249 ieee80211_state_name[nstate]);
1251 IEEE80211_UNLOCK(ic);
1255 /* XXX TODO: more fleshing out! */
1258 case IEEE80211_S_RUN:
1259 ni = ieee80211_ref_node(vap->iv_bss);
1261 if (ic->ic_opmode == IEEE80211_M_STA) {
1262 otus_updateslot(sc);
1263 otus_set_bssid(sc, ni->ni_bssid);
1265 /* Start calibration timer. */
1266 taskqueue_enqueue_timeout(taskqueue_thread,
1274 /* XXX TODO: calibration? */
1276 sc->sc_led_newstate(sc);
1280 return (uvp->newstate(vap, nstate, arg));
1284 otus_cmd(struct otus_softc *sc, uint8_t code, const void *idata, int ilen,
1287 struct otus_tx_cmd *cmd;
1288 struct ar_cmd_hdr *hdr;
1291 OTUS_LOCK_ASSERT(sc);
1293 /* Always bulk-out a multiple of 4 bytes. */
1294 xferlen = (sizeof (*hdr) + ilen + 3) & ~3;
1295 if (xferlen > OTUS_MAX_TXCMDSZ) {
1296 device_printf(sc->sc_dev, "%s: command (0x%02x) size (%d) > %d\n",
1304 cmd = otus_get_txcmd(sc);
1306 device_printf(sc->sc_dev, "%s: failed to get buf\n",
1311 hdr = (struct ar_cmd_hdr *)cmd->buf;
1314 hdr->token = ++sc->token; /* Don't care about endianness. */
1315 cmd->token = hdr->token;
1316 /* XXX TODO: check max cmd length? */
1317 memcpy((uint8_t *)&hdr[1], idata, ilen);
1319 OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
1320 "%s: sending command code=0x%02x len=%d token=%d\n",
1321 __func__, code, ilen, hdr->token);
1324 cmd->buflen = xferlen;
1326 /* Queue the command to the endpoint */
1327 STAILQ_INSERT_TAIL(&sc->sc_cmd_pending, cmd, next_cmd);
1328 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_CMD]);
1330 /* Sleep on the command; wait for it to complete */
1331 error = msleep(cmd, &sc->sc_mtx, PCATCH, "otuscmd", hz);
1334 * At this point we don't own cmd any longer; it'll be
1335 * freed by the cmd bulk path or the RX notification
1336 * path. If the data is made available then it'll be copied
1337 * to the caller. All that is left to do is communicate
1338 * status back to the caller.
1341 device_printf(sc->sc_dev,
1342 "%s: timeout waiting for command 0x%02x reply\n",
1349 otus_write(struct otus_softc *sc, uint32_t reg, uint32_t val)
1352 OTUS_LOCK_ASSERT(sc);
1354 sc->write_buf[sc->write_idx].reg = htole32(reg);
1355 sc->write_buf[sc->write_idx].val = htole32(val);
1357 if (++sc->write_idx > (AR_MAX_WRITE_IDX-1))
1358 (void)otus_write_barrier(sc);
1362 otus_write_barrier(struct otus_softc *sc)
1366 OTUS_LOCK_ASSERT(sc);
1368 if (sc->write_idx == 0)
1369 return 0; /* Nothing to flush. */
1371 OTUS_DPRINTF(sc, OTUS_DEBUG_REGIO, "%s: called; %d updates\n",
1375 error = otus_cmd(sc, AR_CMD_WREG, sc->write_buf,
1376 sizeof (sc->write_buf[0]) * sc->write_idx, NULL);
1381 struct ieee80211_node *
1382 otus_node_alloc(struct ieee80211com *ic)
1384 return malloc(sizeof (struct otus_node), M_DEVBUF, M_NOWAIT | M_ZERO);
1389 otus_media_change(struct ifnet *ifp)
1391 struct otus_softc *sc = ifp->if_softc;
1392 struct ieee80211com *ic = &sc->sc_ic;
1396 error = ieee80211_media_change(ifp);
1397 if (error != ENETRESET)
1400 if (ic->ic_fixed_rate != -1) {
1401 rate = ic->ic_sup_rates[ic->ic_curmode].
1402 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL;
1403 for (ridx = 0; ridx <= OTUS_RIDX_MAX; ridx++)
1404 if (otus_rates[ridx].rate == rate)
1406 sc->fixed_ridx = ridx;
1409 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
1410 error = otus_init(sc);
1417 otus_read_eeprom(struct otus_softc *sc)
1419 uint32_t regs[8], reg;
1423 OTUS_LOCK_ASSERT(sc);
1425 /* Read EEPROM by blocks of 32 bytes. */
1426 eep = (uint8_t *)&sc->eeprom;
1427 reg = AR_EEPROM_OFFSET;
1428 for (i = 0; i < sizeof (sc->eeprom) / 32; i++) {
1429 for (j = 0; j < 8; j++, reg += 4)
1430 regs[j] = htole32(reg);
1431 error = otus_cmd(sc, AR_CMD_RREG, regs, sizeof regs, eep);
1440 otus_newassoc(struct ieee80211_node *ni, int isnew)
1442 struct ieee80211com *ic = ni->ni_ic;
1443 struct otus_softc *sc = ic->ic_softc;
1444 struct otus_node *on = OTUS_NODE(ni);
1446 OTUS_DPRINTF(sc, OTUS_DEBUG_STATE, "new assoc isnew=%d addr=%s\n",
1447 isnew, ether_sprintf(ni->ni_macaddr));
1455 otus_cmd_handle_response(struct otus_softc *sc, struct ar_cmd_hdr *hdr)
1457 struct otus_tx_cmd *cmd;
1459 OTUS_LOCK_ASSERT(sc);
1461 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1462 "%s: received reply code=0x%02x len=%d token=%d\n",
1464 hdr->code, hdr->len, hdr->token);
1467 * Walk the list, freeing items that aren't ours,
1468 * stopping when we hit our token.
1470 while ((cmd = STAILQ_FIRST(&sc->sc_cmd_waiting)) != NULL) {
1471 STAILQ_REMOVE_HEAD(&sc->sc_cmd_waiting, next_cmd);
1472 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1473 "%s: cmd=%p; hdr.token=%d, cmd.token=%d\n",
1478 if (hdr->token == cmd->token) {
1479 /* Copy answer into caller's supplied buffer. */
1480 if (cmd->odata != NULL)
1481 memcpy(cmd->odata, &hdr[1], hdr->len);
1485 STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, cmd, next_cmd);
1490 otus_cmd_rxeof(struct otus_softc *sc, uint8_t *buf, int len)
1492 struct ieee80211com *ic = &sc->sc_ic;
1493 struct ar_cmd_hdr *hdr;
1495 OTUS_LOCK_ASSERT(sc);
1497 if (__predict_false(len < sizeof (*hdr))) {
1498 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1499 "cmd too small %d\n", len);
1502 hdr = (struct ar_cmd_hdr *)buf;
1503 if (__predict_false(sizeof (*hdr) + hdr->len > len ||
1504 sizeof (*hdr) + hdr->len > 64)) {
1505 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1506 "cmd too large %d\n", hdr->len);
1510 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1516 * XXX TODO: has to reach into the cmd queue "waiting for
1517 * an RX response" list, grab the head entry and check
1519 if ((hdr->code & 0xc0) != 0xc0) {
1520 otus_cmd_handle_response(sc, hdr);
1524 /* Received unsolicited notification. */
1525 switch (hdr->code & 0x3f) {
1528 case AR_EVT_TX_COMP:
1530 struct ar_evt_tx_comp *tx = (struct ar_evt_tx_comp *)&hdr[1];
1531 struct ieee80211_node *ni;
1533 ni = ieee80211_find_node(&ic->ic_sta, tx->macaddr);
1535 device_printf(sc->sc_dev,
1536 "%s: txcomp on unknown node (%s)\n",
1538 ether_sprintf(tx->macaddr));
1542 OTUS_DPRINTF(sc, OTUS_DEBUG_TXCOMP,
1543 "tx completed %s status=%d phy=0x%x\n",
1544 ether_sprintf(tx->macaddr), le16toh(tx->status),
1547 switch (le16toh(tx->status)) {
1548 case AR_TX_STATUS_COMP:
1551 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
1552 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
1555 * We don't get the above; only error notifications.
1556 * Sigh. So, don't worry about this.
1559 case AR_TX_STATUS_RETRY_COMP:
1560 OTUS_NODE(ni)->tx_retries++;
1562 case AR_TX_STATUS_FAILED:
1563 OTUS_NODE(ni)->tx_err++;
1566 ieee80211_free_node(ni);
1571 case AR_EVT_DO_BB_RESET:
1573 * This is "tell driver to reset baseband" from ar9170-fw.
1575 * I'm not sure what we should do here, so I'm going to
1576 * fall through; it gets generated when RTSRetryCnt internally
1577 * reaches '5' - I guess the firmware authors thought that
1578 * meant that the BB may have gone deaf or something.
1581 device_printf(sc->sc_dev,
1582 "%s: received notification code=0x%02x len=%d\n",
1584 hdr->code, hdr->len);
1589 otus_sub_rxeof(struct otus_softc *sc, uint8_t *buf, int len, struct mbufq *rxq)
1591 struct ieee80211com *ic = &sc->sc_ic;
1592 struct ieee80211_rx_stats rxs;
1594 struct ieee80211_node *ni;
1596 struct ar_rx_tail *tail;
1597 struct ieee80211_frame *wh;
1603 if (__predict_false(len < AR_PLCP_HDR_LEN)) {
1604 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1605 "sub-xfer too short %d\n", len);
1610 /* All bits in the PLCP header are set to 1 for non-MPDU. */
1611 if (memcmp(plcp, AR_PLCP_HDR_INTR, AR_PLCP_HDR_LEN) == 0) {
1612 otus_cmd_rxeof(sc, plcp + AR_PLCP_HDR_LEN,
1613 len - AR_PLCP_HDR_LEN);
1617 /* Received MPDU. */
1618 if (__predict_false(len < AR_PLCP_HDR_LEN + sizeof (*tail))) {
1619 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "MPDU too short %d\n", len);
1620 counter_u64_add(ic->ic_ierrors, 1);
1623 tail = (struct ar_rx_tail *)(plcp + len - sizeof (*tail));
1625 /* Discard error frames. */
1626 if (__predict_false(tail->error != 0)) {
1627 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "error frame 0x%02x\n", tail->error);
1628 if (tail->error & AR_RX_ERROR_FCS) {
1629 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "bad FCS\n");
1630 } else if (tail->error & AR_RX_ERROR_MMIC) {
1631 /* Report Michael MIC failures to net80211. */
1633 ieee80211_notify_michael_failure(ni->ni_vap, wh, keyidx);
1635 device_printf(sc->sc_dev, "%s: MIC failure\n", __func__);
1637 counter_u64_add(ic->ic_ierrors, 1);
1640 /* Compute MPDU's length. */
1641 mlen = len - AR_PLCP_HDR_LEN - sizeof (*tail);
1642 /* Make sure there's room for an 802.11 header + FCS. */
1643 if (__predict_false(mlen < IEEE80211_MIN_LEN)) {
1644 counter_u64_add(ic->ic_ierrors, 1);
1647 mlen -= IEEE80211_CRC_LEN; /* strip 802.11 FCS */
1649 wh = (struct ieee80211_frame *)(plcp + AR_PLCP_HDR_LEN);
1651 m = m_get2(mlen, M_NOWAIT, MT_DATA, M_PKTHDR);
1653 device_printf(sc->sc_dev, "%s: failed m_get2()\n", __func__);
1654 counter_u64_add(ic->ic_ierrors, 1);
1657 /* Finalize mbuf. */
1658 memcpy(mtod(m, uint8_t *), wh, mlen);
1659 m->m_pkthdr.len = m->m_len = mlen;
1662 if (__predict_false(sc->sc_drvbpf != NULL)) {
1663 struct otus_rx_radiotap_header *tap = &sc->sc_rxtap;
1667 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1668 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1669 tap->wr_antsignal = tail->rssi;
1670 tap->wr_rate = 2; /* In case it can't be found below. */
1671 switch (tail->status & AR_RX_STATUS_MT_MASK) {
1672 case AR_RX_STATUS_MT_CCK:
1674 case 10: tap->wr_rate = 2; break;
1675 case 20: tap->wr_rate = 4; break;
1676 case 55: tap->wr_rate = 11; break;
1677 case 110: tap->wr_rate = 22; break;
1679 if (tail->status & AR_RX_STATUS_SHPREAMBLE)
1680 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1682 case AR_RX_STATUS_MT_OFDM:
1683 switch (plcp[0] & 0xf) {
1684 case 0xb: tap->wr_rate = 12; break;
1685 case 0xf: tap->wr_rate = 18; break;
1686 case 0xa: tap->wr_rate = 24; break;
1687 case 0xe: tap->wr_rate = 36; break;
1688 case 0x9: tap->wr_rate = 48; break;
1689 case 0xd: tap->wr_rate = 72; break;
1690 case 0x8: tap->wr_rate = 96; break;
1691 case 0xc: tap->wr_rate = 108; break;
1695 mb.m_data = (caddr_t)tap;
1696 mb.m_len = sc->sc_rxtap_len;
1698 mb.m_nextpkt = NULL;
1701 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
1705 /* Add RSSI/NF to this mbuf */
1706 bzero(&rxs, sizeof(rxs));
1707 rxs.r_flags = IEEE80211_R_NF | IEEE80211_R_RSSI;
1708 rxs.nf = sc->sc_nf[0]; /* XXX chain 0 != combined rssi/nf */
1709 rxs.rssi = tail->rssi;
1710 /* XXX TODO: add MIMO RSSI/NF as well */
1711 ieee80211_add_rx_params(m, &rxs);
1713 /* XXX make a method */
1714 STAILQ_INSERT_TAIL(&rxq->mq_head, m, m_stailqpkt);
1718 ni = ieee80211_find_rxnode(ic, wh);
1720 rxi.rxi_rssi = tail->rssi;
1721 rxi.rxi_tstamp = 0; /* unused */
1722 ieee80211_input(ifp, m, ni, &rxi);
1724 /* Node is no longer needed. */
1725 ieee80211_release_node(ic, ni);
1731 otus_rxeof(struct usb_xfer *xfer, struct otus_data *data, struct mbufq *rxq)
1733 struct otus_softc *sc = usbd_xfer_softc(xfer);
1734 caddr_t buf = data->buf;
1735 struct ar_rx_head *head;
1739 usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
1741 while (len >= sizeof (*head)) {
1742 head = (struct ar_rx_head *)buf;
1743 if (__predict_false(head->tag != htole16(AR_RX_HEAD_TAG))) {
1744 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1745 "tag not valid 0x%x\n", le16toh(head->tag));
1748 hlen = le16toh(head->len);
1749 if (__predict_false(sizeof (*head) + hlen > len)) {
1750 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1751 "xfer too short %d/%d\n", len, hlen);
1754 /* Process sub-xfer. */
1755 otus_sub_rxeof(sc, (uint8_t *)&head[1], hlen, rxq);
1757 /* Next sub-xfer is aligned on a 32-bit boundary. */
1758 hlen = (sizeof (*head) + hlen + 3) & ~3;
1765 otus_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
1767 struct otus_softc *sc = usbd_xfer_softc(xfer);
1768 struct ieee80211com *ic = &sc->sc_ic;
1769 struct ieee80211_frame *wh;
1770 struct ieee80211_node *ni;
1773 struct otus_data *data;
1775 OTUS_LOCK_ASSERT(sc);
1777 mbufq_init(&scrx, 1024);
1780 device_printf(sc->sc_dev, "%s: called; state=%d; error=%d\n",
1782 USB_GET_STATE(xfer),
1786 switch (USB_GET_STATE(xfer)) {
1787 case USB_ST_TRANSFERRED:
1788 data = STAILQ_FIRST(&sc->sc_rx_active);
1791 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1792 otus_rxeof(xfer, data, &scrx);
1793 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1798 * XXX TODO: what if sc_rx isn't empty, but data
1799 * is empty? Then we leak mbufs.
1801 data = STAILQ_FIRST(&sc->sc_rx_inactive);
1803 //KASSERT(m == NULL, ("mbuf isn't NULL"));
1806 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
1807 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
1808 usbd_xfer_set_frame_data(xfer, 0, data->buf,
1809 usbd_xfer_max_len(xfer));
1810 usbd_transfer_submit(xfer);
1812 * To avoid LOR we should unlock our private mutex here to call
1813 * ieee80211_input() because here is at the end of a USB
1814 * callback and safe to unlock.
1817 while ((m = mbufq_dequeue(&scrx)) != NULL) {
1818 wh = mtod(m, struct ieee80211_frame *);
1819 ni = ieee80211_find_rxnode(ic,
1820 (struct ieee80211_frame_min *)wh);
1822 if (ni->ni_flags & IEEE80211_NODE_HT)
1823 m->m_flags |= M_AMPDU;
1824 (void)ieee80211_input_mimo(ni, m, NULL);
1825 ieee80211_free_node(ni);
1827 (void)ieee80211_input_mimo_all(ic, m, NULL);
1832 /* needs it to the inactive queue due to a error. */
1833 data = STAILQ_FIRST(&sc->sc_rx_active);
1835 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1836 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1838 if (error != USB_ERR_CANCELLED) {
1839 usbd_xfer_set_stall(xfer);
1840 counter_u64_add(ic->ic_ierrors, 1);
1848 otus_txeof(struct usb_xfer *xfer, struct otus_data *data)
1850 struct otus_softc *sc = usbd_xfer_softc(xfer);
1852 OTUS_DPRINTF(sc, OTUS_DEBUG_TXDONE,
1853 "%s: called; data=%p\n", __func__, data);
1855 OTUS_LOCK_ASSERT(sc);
1859 /* XXX we get TX status via the RX path.. */
1860 ieee80211_tx_complete(data->ni, data->m, 0);
1867 otus_txcmdeof(struct usb_xfer *xfer, struct otus_tx_cmd *cmd)
1869 struct otus_softc *sc = usbd_xfer_softc(xfer);
1871 OTUS_LOCK_ASSERT(sc);
1873 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1874 "%s: called; data=%p; odata=%p\n",
1875 __func__, cmd, cmd->odata);
1878 * Non-response commands still need wakeup so the caller
1879 * knows it was submitted and completed OK; response commands should
1880 * wait until they're ACKed by the firmware with a response.
1883 STAILQ_INSERT_TAIL(&sc->sc_cmd_waiting, cmd, next_cmd);
1886 otus_free_txcmd(sc, cmd);
1891 otus_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
1893 uint8_t which = OTUS_BULK_TX;
1894 struct otus_softc *sc = usbd_xfer_softc(xfer);
1895 struct ieee80211com *ic = &sc->sc_ic;
1896 struct otus_data *data;
1898 OTUS_LOCK_ASSERT(sc);
1900 switch (USB_GET_STATE(xfer)) {
1901 case USB_ST_TRANSFERRED:
1902 data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1905 OTUS_DPRINTF(sc, OTUS_DEBUG_TXDONE,
1906 "%s: transfer done %p\n", __func__, data);
1907 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1908 otus_txeof(xfer, data);
1909 otus_freebuf(sc, data);
1913 data = STAILQ_FIRST(&sc->sc_tx_pending[which]);
1915 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
1916 "%s: empty pending queue sc %p\n", __func__, sc);
1919 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next);
1920 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next);
1921 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
1922 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
1923 "%s: submitting transfer %p\n", __func__, data);
1924 usbd_transfer_submit(xfer);
1927 data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1929 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1930 otus_txeof(xfer, data);
1931 otus_freebuf(sc, data);
1933 counter_u64_add(ic->ic_oerrors, 1);
1935 if (error != USB_ERR_CANCELLED) {
1936 usbd_xfer_set_stall(xfer);
1948 otus_bulk_cmd_callback(struct usb_xfer *xfer, usb_error_t error)
1950 struct otus_softc *sc = usbd_xfer_softc(xfer);
1952 struct ieee80211com *ic = &sc->sc_ic;
1954 struct otus_tx_cmd *cmd;
1956 OTUS_LOCK_ASSERT(sc);
1958 switch (USB_GET_STATE(xfer)) {
1959 case USB_ST_TRANSFERRED:
1960 cmd = STAILQ_FIRST(&sc->sc_cmd_active);
1963 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1964 "%s: transfer done %p\n", __func__, cmd);
1965 STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next_cmd);
1966 otus_txcmdeof(xfer, cmd);
1970 cmd = STAILQ_FIRST(&sc->sc_cmd_pending);
1972 OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
1973 "%s: empty pending queue sc %p\n", __func__, sc);
1976 STAILQ_REMOVE_HEAD(&sc->sc_cmd_pending, next_cmd);
1977 STAILQ_INSERT_TAIL(&sc->sc_cmd_active, cmd, next_cmd);
1978 usbd_xfer_set_frame_data(xfer, 0, cmd->buf, cmd->buflen);
1979 OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
1980 "%s: submitting transfer %p; buf=%p, buflen=%d\n", __func__, cmd, cmd->buf, cmd->buflen);
1981 usbd_transfer_submit(xfer);
1984 cmd = STAILQ_FIRST(&sc->sc_cmd_active);
1986 STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next_cmd);
1987 otus_txcmdeof(xfer, cmd);
1990 if (error != USB_ERR_CANCELLED) {
1991 usbd_xfer_set_stall(xfer);
1999 * This isn't used by carl9170; it however may be used by the
2000 * initial bootloader.
2003 otus_bulk_irq_callback(struct usb_xfer *xfer, usb_error_t error)
2005 struct otus_softc *sc = usbd_xfer_softc(xfer);
2009 usbd_xfer_status(xfer, &actlen, &sumlen, NULL, NULL);
2010 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ,
2011 "%s: called; state=%d\n", __func__, USB_GET_STATE(xfer));
2013 switch (USB_GET_STATE(xfer)) {
2014 case USB_ST_TRANSFERRED:
2016 * Read usb frame data, if any.
2017 * "actlen" has the total length for all frames
2020 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ,
2021 "%s: comp; %d bytes\n",
2025 pc = usbd_xfer_get_frame(xfer, 0);
2026 otus_dump_usb_rx_page(sc, pc, actlen);
2028 /* XXX fallthrough */
2031 * Setup xfer frame lengths/count and data
2033 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ, "%s: setup\n", __func__);
2034 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
2035 usbd_transfer_submit(xfer);
2038 default: /* Error */
2040 * Print error message and clear stall
2043 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ, "%s: ERROR?\n", __func__);
2049 * Map net80211 rate to hw rate for otus MAC/PHY.
2052 otus_rate_to_hw_rate(struct otus_softc *sc, uint8_t rate)
2056 is_2ghz = !! (IEEE80211_IS_CHAN_2GHZ(sc->sc_ic.ic_curchan));
2086 device_printf(sc->sc_dev, "%s: unknown rate '%d'\n",
2087 __func__, (int) rate);
2090 return (0x0); /* 1MB CCK */
2092 return (0xb); /* 6MB OFDM */
2099 otus_hw_rate_is_ofdm(struct otus_softc *sc, uint8_t hw_rate)
2115 otus_tx_update_ratectl(struct otus_softc *sc, struct ieee80211_node *ni)
2117 int tx, tx_success, tx_retry;
2119 tx = OTUS_NODE(ni)->tx_done;
2120 tx_success = OTUS_NODE(ni)->tx_done - OTUS_NODE(ni)->tx_err;
2121 tx_retry = OTUS_NODE(ni)->tx_retries;
2123 ieee80211_ratectl_tx_update(ni->ni_vap, ni, &tx, &tx_success,
2128 * XXX TODO: support tx bpf parameters for configuration!
2131 otus_tx(struct otus_softc *sc, struct ieee80211_node *ni, struct mbuf *m,
2132 struct otus_data *data)
2134 struct ieee80211com *ic = &sc->sc_ic;
2135 struct ieee80211vap *vap = ni->ni_vap;
2136 struct ieee80211_frame *wh;
2137 struct ieee80211_key *k;
2138 struct ar_tx_head *head;
2140 uint16_t macctl, qos;
2142 int hasqos, xferlen;
2144 wh = mtod(m, struct ieee80211_frame *);
2145 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
2146 k = ieee80211_crypto_encap(ni, m);
2148 device_printf(sc->sc_dev,
2149 "%s: m=%p: ieee80211_crypto_encap returns NULL\n",
2154 wh = mtod(m, struct ieee80211_frame *);
2157 /* Calculate transfer length; ensure data buffer is large enough */
2158 xferlen = sizeof (*head) + m->m_pkthdr.len;
2159 if (xferlen > OTUS_TXBUFSZ) {
2160 device_printf(sc->sc_dev,
2161 "%s: 802.11 TX frame is %d bytes, max %d bytes\n",
2168 hasqos = !! IEEE80211_QOS_HAS_SEQ(wh);
2172 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
2173 tid = qos & IEEE80211_QOS_TID;
2174 qid = TID_TO_WME_AC(tid);
2180 /* Pickup a rate index. */
2181 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
2182 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) {
2183 /* Get lowest rate */
2184 rate = otus_rate_to_hw_rate(sc, 0);
2186 (void) ieee80211_ratectl_rate(ni, NULL, 0);
2187 rate = otus_rate_to_hw_rate(sc, ni->ni_txrate);
2191 macctl = AR_TX_MAC_BACKOFF | AR_TX_MAC_HW_DUR | AR_TX_MAC_QID(qid);
2193 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
2194 (hasqos && ((qos & IEEE80211_QOS_ACKPOLICY) ==
2195 IEEE80211_QOS_ACKPOLICY_NOACK)))
2196 macctl |= AR_TX_MAC_NOACK;
2198 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2199 if (m->m_pkthdr.len + IEEE80211_CRC_LEN >= vap->iv_rtsthreshold)
2200 macctl |= AR_TX_MAC_RTS;
2201 else if (ic->ic_flags & IEEE80211_F_USEPROT) {
2202 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2203 macctl |= AR_TX_MAC_CTS;
2204 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2205 macctl |= AR_TX_MAC_RTS;
2209 phyctl |= AR_TX_PHY_MCS(rate);
2210 if (otus_hw_rate_is_ofdm(sc, rate)) {
2211 phyctl |= AR_TX_PHY_MT_OFDM;
2212 /* Always use all tx antennas for now, just to be safe */
2213 phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
2215 phyctl |= AR_TX_PHY_MT_CCK;
2216 phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
2219 /* Update net80211 with the current counters */
2220 otus_tx_update_ratectl(sc, ni);
2222 /* Update rate control stats for frames that are ACK'ed. */
2223 if (!(macctl & AR_TX_MAC_NOACK))
2224 OTUS_NODE(ni)->tx_done++;
2227 /* Fill Tx descriptor. */
2228 head = (struct ar_tx_head *)data->buf;
2229 head->len = htole16(m->m_pkthdr.len + IEEE80211_CRC_LEN);
2230 head->macctl = htole16(macctl);
2231 head->phyctl = htole32(phyctl);
2233 m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&head[1]);
2235 data->buflen = xferlen;
2239 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
2240 "%s: tx: m=%p; data=%p; len=%d mac=0x%04x phy=0x%08x rate=0x%02x, ni_txrate=%d\n",
2241 __func__, m, data, head->len, head->macctl, head->phyctl,
2242 (int) rate, (int) ni->ni_txrate);
2244 /* Submit transfer */
2245 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[OTUS_BULK_TX], data, next);
2246 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_TX]);
2252 otus_set_multi(struct otus_softc *sc)
2255 struct ieee80211com *ic = &sc->sc_ic;
2258 if (ic->ic_allmulti > 0 || ic->ic_promisc > 0 ||
2259 ic->ic_opmode == IEEE80211_M_MONITOR) {
2263 struct ieee80211vap *vap;
2265 struct ifmultiaddr *ifma;
2268 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) {
2270 if_maddr_rlock(ifp);
2271 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2275 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
2276 val = LE_READ_4(dl + 4);
2277 /* Get address byte 5 */
2278 val = val & 0x0000ff00;
2281 /* As per below, shift it >> 2 to get only 6 bits */
2286 hi |= 1 << (val - 32);
2288 if_maddr_runlock(ifp);
2292 /* XXX openbsd code */
2293 while (enm != NULL) {
2294 bit = enm->enm_addrlo[5] >> 2;
2298 hi |= 1 << (bit - 32);
2299 ETHER_NEXT_MULTI(step, enm);
2303 hi |= 1U << 31; /* Make sure the broadcast bit is set. */
2306 otus_write(sc, AR_MAC_REG_GROUP_HASH_TBL_L, lo);
2307 otus_write(sc, AR_MAC_REG_GROUP_HASH_TBL_H, hi);
2308 r = otus_write_barrier(sc);
2314 otus_updateedca(struct otus_softc *sc)
2316 #define EXP2(val) ((1 << (val)) - 1)
2317 #define AIFS(val) ((val) * 9 + 10)
2318 struct ieee80211com *ic = &sc->sc_ic;
2319 const struct wmeParams *edca;
2321 OTUS_LOCK_ASSERT(sc);
2323 edca = ic->ic_wme.wme_chanParams.cap_wmeParams;
2325 /* Set CWmin/CWmax values. */
2326 otus_write(sc, AR_MAC_REG_AC0_CW,
2327 EXP2(edca[WME_AC_BE].wmep_logcwmax) << 16 |
2328 EXP2(edca[WME_AC_BE].wmep_logcwmin));
2329 otus_write(sc, AR_MAC_REG_AC1_CW,
2330 EXP2(edca[WME_AC_BK].wmep_logcwmax) << 16 |
2331 EXP2(edca[WME_AC_BK].wmep_logcwmin));
2332 otus_write(sc, AR_MAC_REG_AC2_CW,
2333 EXP2(edca[WME_AC_VI].wmep_logcwmax) << 16 |
2334 EXP2(edca[WME_AC_VI].wmep_logcwmin));
2335 otus_write(sc, AR_MAC_REG_AC3_CW,
2336 EXP2(edca[WME_AC_VO].wmep_logcwmax) << 16 |
2337 EXP2(edca[WME_AC_VO].wmep_logcwmin));
2338 otus_write(sc, AR_MAC_REG_AC4_CW, /* Special TXQ. */
2339 EXP2(edca[WME_AC_VO].wmep_logcwmax) << 16 |
2340 EXP2(edca[WME_AC_VO].wmep_logcwmin));
2342 /* Set AIFSN values. */
2343 otus_write(sc, AR_MAC_REG_AC1_AC0_AIFS,
2344 AIFS(edca[WME_AC_VI].wmep_aifsn) << 24 |
2345 AIFS(edca[WME_AC_BK].wmep_aifsn) << 12 |
2346 AIFS(edca[WME_AC_BE].wmep_aifsn));
2347 otus_write(sc, AR_MAC_REG_AC3_AC2_AIFS,
2348 AIFS(edca[WME_AC_VO].wmep_aifsn) << 16 | /* Special TXQ. */
2349 AIFS(edca[WME_AC_VO].wmep_aifsn) << 4 |
2350 AIFS(edca[WME_AC_VI].wmep_aifsn) >> 8);
2352 /* Set TXOP limit. */
2353 otus_write(sc, AR_MAC_REG_AC1_AC0_TXOP,
2354 edca[WME_AC_BK].wmep_txopLimit << 16 |
2355 edca[WME_AC_BE].wmep_txopLimit);
2356 otus_write(sc, AR_MAC_REG_AC3_AC2_TXOP,
2357 edca[WME_AC_VO].wmep_txopLimit << 16 |
2358 edca[WME_AC_VI].wmep_txopLimit);
2360 /* XXX ACK policy? */
2362 (void)otus_write_barrier(sc);
2369 otus_updateslot(struct otus_softc *sc)
2371 struct ieee80211com *ic = &sc->sc_ic;
2374 OTUS_LOCK_ASSERT(sc);
2376 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2377 otus_write(sc, AR_MAC_REG_SLOT_TIME, slottime << 10);
2378 (void)otus_write_barrier(sc);
2382 otus_init_mac(struct otus_softc *sc)
2386 OTUS_LOCK_ASSERT(sc);
2388 otus_write(sc, AR_MAC_REG_ACK_EXTENSION, 0x40);
2389 otus_write(sc, AR_MAC_REG_RETRY_MAX, 0);
2390 otus_write(sc, AR_MAC_REG_SNIFFER, 0x2000000);
2391 otus_write(sc, AR_MAC_REG_RX_THRESHOLD, 0xc1f80);
2392 otus_write(sc, AR_MAC_REG_RX_PE_DELAY, 0x70);
2393 otus_write(sc, AR_MAC_REG_EIFS_AND_SIFS, 0xa144000);
2394 otus_write(sc, AR_MAC_REG_SLOT_TIME, 9 << 10);
2395 otus_write(sc, 0x1c3b2c, 0x19000000);
2396 /* NAV protects ACK only (in TXOP). */
2397 otus_write(sc, 0x1c3b38, 0x201);
2398 /* Set beacon Tx power to 0x7. */
2399 otus_write(sc, AR_MAC_REG_BCN_HT1, 0x8000170);
2400 otus_write(sc, AR_MAC_REG_BACKOFF_PROTECT, 0x105);
2401 otus_write(sc, 0x1c3b9c, 0x10000a);
2402 /* Filter any control frames, BAR is bit 24. */
2403 otus_write(sc, 0x1c368c, 0x0500ffff);
2404 otus_write(sc, 0x1c3c40, 0x1);
2405 otus_write(sc, AR_MAC_REG_BASIC_RATE, 0x150f);
2406 otus_write(sc, AR_MAC_REG_MANDATORY_RATE, 0x150f);
2407 otus_write(sc, AR_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
2408 otus_write(sc, 0x1c3694, 0x4003c1e);
2409 /* Enable LED0 and LED1. */
2410 otus_write(sc, 0x1d0100, 0x3);
2411 otus_write(sc, 0x1d0104, 0x3);
2412 /* Switch MAC to OTUS interface. */
2413 otus_write(sc, 0x1c3600, 0x3);
2414 otus_write(sc, 0x1c3c50, 0xffff);
2415 otus_write(sc, 0x1c3680, 0xf00008);
2416 /* Disable Rx timeout (workaround). */
2417 otus_write(sc, 0x1c362c, 0);
2419 /* Set USB Rx stream mode maximum frame number to 2. */
2420 otus_write(sc, 0x1e1110, 0x4);
2421 /* Set USB Rx stream mode timeout to 10us. */
2422 otus_write(sc, 0x1e1114, 0x80);
2424 /* Set clock frequency to 88/80MHz. */
2425 otus_write(sc, 0x1d4008, 0x73);
2426 /* Set WLAN DMA interrupt mode: generate intr per packet. */
2427 otus_write(sc, 0x1c3d7c, 0x110011);
2428 otus_write(sc, 0x1c3bb0, 0x4);
2429 otus_write(sc, AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION, 0x141e0f48);
2431 /* Disable HW decryption for now. */
2432 otus_write(sc, 0x1c3678, 0x78);
2434 if ((error = otus_write_barrier(sc)) != 0)
2437 /* Set default EDCA parameters. */
2438 otus_updateedca(sc);
2444 * Return default value for PHY register based on current operating mode.
2447 otus_phy_get_def(struct otus_softc *sc, uint32_t reg)
2451 for (i = 0; i < nitems(ar5416_phy_regs); i++)
2452 if (AR_PHY(ar5416_phy_regs[i]) == reg)
2453 return sc->phy_vals[i];
2454 return 0; /* Register not found. */
2458 * Update PHY's programming based on vendor-specific data stored in EEPROM.
2459 * This is for FEM-type devices only.
2462 otus_set_board_values(struct otus_softc *sc, struct ieee80211_channel *c)
2464 const struct ModalEepHeader *eep;
2465 uint32_t tmp, offset;
2467 if (IEEE80211_IS_CHAN_5GHZ(c))
2468 eep = &sc->eeprom.modalHeader[0];
2470 eep = &sc->eeprom.modalHeader[1];
2472 /* Offset of chain 2. */
2473 offset = 2 * 0x1000;
2475 tmp = le32toh(eep->antCtrlCommon);
2476 otus_write(sc, AR_PHY_SWITCH_COM, tmp);
2478 tmp = le32toh(eep->antCtrlChain[0]);
2479 otus_write(sc, AR_PHY_SWITCH_CHAIN_0, tmp);
2481 tmp = le32toh(eep->antCtrlChain[1]);
2482 otus_write(sc, AR_PHY_SWITCH_CHAIN_0 + offset, tmp);
2484 if (1 /* sc->sc_sco == AR_SCO_SCN */) {
2485 tmp = otus_phy_get_def(sc, AR_PHY_SETTLING);
2486 tmp &= ~(0x7f << 7);
2487 tmp |= (eep->switchSettling & 0x7f) << 7;
2488 otus_write(sc, AR_PHY_SETTLING, tmp);
2491 tmp = otus_phy_get_def(sc, AR_PHY_DESIRED_SZ);
2493 tmp |= eep->pgaDesiredSize << 8 | eep->adcDesiredSize;
2494 otus_write(sc, AR_PHY_DESIRED_SZ, tmp);
2496 tmp = eep->txEndToXpaOff << 24 | eep->txEndToXpaOff << 16 |
2497 eep->txFrameToXpaOn << 8 | eep->txFrameToXpaOn;
2498 otus_write(sc, AR_PHY_RF_CTL4, tmp);
2500 tmp = otus_phy_get_def(sc, AR_PHY_RF_CTL3);
2501 tmp &= ~(0xff << 16);
2502 tmp |= eep->txEndToRxOn << 16;
2503 otus_write(sc, AR_PHY_RF_CTL3, tmp);
2505 tmp = otus_phy_get_def(sc, AR_PHY_CCA);
2506 tmp &= ~(0x7f << 12);
2507 tmp |= (eep->thresh62 & 0x7f) << 12;
2508 otus_write(sc, AR_PHY_CCA, tmp);
2510 tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN);
2511 tmp &= ~(0x3f << 12);
2512 tmp |= (eep->txRxAttenCh[0] & 0x3f) << 12;
2513 otus_write(sc, AR_PHY_RXGAIN, tmp);
2515 tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN + offset);
2516 tmp &= ~(0x3f << 12);
2517 tmp |= (eep->txRxAttenCh[1] & 0x3f) << 12;
2518 otus_write(sc, AR_PHY_RXGAIN + offset, tmp);
2520 tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ);
2521 tmp &= ~(0x3f << 18);
2522 tmp |= (eep->rxTxMarginCh[0] & 0x3f) << 18;
2523 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2524 tmp &= ~(0xf << 10);
2525 tmp |= (eep->bswMargin[0] & 0xf) << 10;
2527 otus_write(sc, AR_PHY_GAIN_2GHZ, tmp);
2529 tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ + offset);
2530 tmp &= ~(0x3f << 18);
2531 tmp |= (eep->rxTxMarginCh[1] & 0x3f) << 18;
2532 otus_write(sc, AR_PHY_GAIN_2GHZ + offset, tmp);
2534 tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4);
2535 tmp &= ~(0x3f << 5 | 0x1f);
2536 tmp |= (eep->iqCalICh[0] & 0x3f) << 5 | (eep->iqCalQCh[0] & 0x1f);
2537 otus_write(sc, AR_PHY_TIMING_CTRL4, tmp);
2539 tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4 + offset);
2540 tmp &= ~(0x3f << 5 | 0x1f);
2541 tmp |= (eep->iqCalICh[1] & 0x3f) << 5 | (eep->iqCalQCh[1] & 0x1f);
2542 otus_write(sc, AR_PHY_TIMING_CTRL4 + offset, tmp);
2544 tmp = otus_phy_get_def(sc, AR_PHY_TPCRG1);
2545 tmp &= ~(0xf << 16);
2546 tmp |= (eep->xpd & 0xf) << 16;
2547 otus_write(sc, AR_PHY_TPCRG1, tmp);
2549 return otus_write_barrier(sc);
2553 otus_program_phy(struct otus_softc *sc, struct ieee80211_channel *c)
2555 const uint32_t *vals;
2558 /* Select PHY programming based on band and bandwidth. */
2559 if (IEEE80211_IS_CHAN_2GHZ(c))
2560 vals = ar5416_phy_vals_2ghz_20mhz;
2562 vals = ar5416_phy_vals_5ghz_20mhz;
2563 for (i = 0; i < nitems(ar5416_phy_regs); i++)
2564 otus_write(sc, AR_PHY(ar5416_phy_regs[i]), vals[i]);
2565 sc->phy_vals = vals;
2567 if (sc->eeprom.baseEepHeader.deviceType == 0x80) /* FEM */
2568 if ((error = otus_set_board_values(sc, c)) != 0)
2571 /* Initial Tx power settings. */
2572 otus_write(sc, AR_PHY_POWER_TX_RATE_MAX, 0x7f);
2573 otus_write(sc, AR_PHY_POWER_TX_RATE1, 0x3f3f3f3f);
2574 otus_write(sc, AR_PHY_POWER_TX_RATE2, 0x3f3f3f3f);
2575 otus_write(sc, AR_PHY_POWER_TX_RATE3, 0x3f3f3f3f);
2576 otus_write(sc, AR_PHY_POWER_TX_RATE4, 0x3f3f3f3f);
2577 otus_write(sc, AR_PHY_POWER_TX_RATE5, 0x3f3f3f3f);
2578 otus_write(sc, AR_PHY_POWER_TX_RATE6, 0x3f3f3f3f);
2579 otus_write(sc, AR_PHY_POWER_TX_RATE7, 0x3f3f3f3f);
2580 otus_write(sc, AR_PHY_POWER_TX_RATE8, 0x3f3f3f3f);
2581 otus_write(sc, AR_PHY_POWER_TX_RATE9, 0x3f3f3f3f);
2583 if (IEEE80211_IS_CHAN_2GHZ(c))
2584 otus_write(sc, 0x1d4014, 0x5163);
2586 otus_write(sc, 0x1d4014, 0x5143);
2588 return otus_write_barrier(sc);
2591 static __inline uint8_t
2592 otus_reverse_bits(uint8_t v)
2594 v = ((v >> 1) & 0x55) | ((v & 0x55) << 1);
2595 v = ((v >> 2) & 0x33) | ((v & 0x33) << 2);
2596 v = ((v >> 4) & 0x0f) | ((v & 0x0f) << 4);
2601 otus_set_rf_bank4(struct otus_softc *sc, struct ieee80211_channel *c)
2603 uint8_t chansel, d0, d1;
2607 OTUS_LOCK_ASSERT(sc);
2610 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2611 chansel = (c->ic_freq - 4800) / 5;
2613 d0 |= AR_BANK4_AMODE_REFSEL(2);
2615 d0 |= AR_BANK4_AMODE_REFSEL(1);
2617 d0 |= AR_BANK4_AMODE_REFSEL(2);
2618 if (c->ic_freq == 2484) { /* CH 14 */
2619 d0 |= AR_BANK4_BMODE_LF_SYNTH_FREQ;
2620 chansel = 10 + (c->ic_freq - 2274) / 5;
2622 chansel = 16 + (c->ic_freq - 2272) / 5;
2625 d0 |= AR_BANK4_ADDR(1) | AR_BANK4_CHUP;
2626 d1 = otus_reverse_bits(chansel);
2628 /* Write bits 0-4 of d0 and d1. */
2629 data = (d1 & 0x1f) << 5 | (d0 & 0x1f);
2630 otus_write(sc, AR_PHY(44), data);
2631 /* Write bits 5-7 of d0 and d1. */
2632 data = (d1 >> 5) << 5 | (d0 >> 5);
2633 otus_write(sc, AR_PHY(58), data);
2635 if ((error = otus_write_barrier(sc)) == 0)
2636 otus_delay_ms(sc, 10);
2641 otus_get_delta_slope(uint32_t coeff, uint32_t *exponent, uint32_t *mantissa)
2643 #define COEFF_SCALE_SHIFT 24
2646 /* exponent = 14 - floor(log2(coeff)) */
2647 for (exp = 31; exp > 0; exp--)
2648 if (coeff & (1 << exp))
2650 KASSERT(exp != 0, ("exp"));
2651 exp = 14 - (exp - COEFF_SCALE_SHIFT);
2653 /* mantissa = floor(coeff * 2^exponent + 0.5) */
2654 man = coeff + (1 << (COEFF_SCALE_SHIFT - exp - 1));
2656 *mantissa = man >> (COEFF_SCALE_SHIFT - exp);
2657 *exponent = exp - 16;
2658 #undef COEFF_SCALE_SHIFT
2662 otus_set_chan(struct otus_softc *sc, struct ieee80211_channel *c, int assoc)
2664 struct ieee80211com *ic = &sc->sc_ic;
2665 struct ar_cmd_frequency cmd;
2666 struct ar_rsp_frequency rsp;
2667 const uint32_t *vals;
2668 uint32_t coeff, exp, man, tmp;
2673 chan = ieee80211_chan2ieee(ic, c);
2675 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2676 "setting channel %d (%dMHz)\n", chan, c->ic_freq);
2678 tmp = IEEE80211_IS_CHAN_2GHZ(c) ? 0x105 : 0x104;
2679 otus_write(sc, AR_MAC_REG_DYNAMIC_SIFS_ACK, tmp);
2680 if ((error = otus_write_barrier(sc)) != 0)
2683 /* Disable BB Heavy Clip. */
2684 otus_write(sc, AR_PHY_HEAVY_CLIP_ENABLE, 0x200);
2685 if ((error = otus_write_barrier(sc)) != 0)
2688 /* XXX Is that FREQ_START ? */
2689 error = otus_cmd(sc, AR_CMD_FREQ_STRAT, NULL, 0, NULL);
2693 /* Reprogram PHY and RF on channel band or bandwidth changes. */
2694 if (sc->bb_reset || c->ic_flags != sc->sc_curchan->ic_flags) {
2695 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "band switch\n");
2697 /* Cold/Warm reset BB/ADDA. */
2698 otus_write(sc, 0x1d4004, sc->bb_reset ? 0x800 : 0x400);
2699 if ((error = otus_write_barrier(sc)) != 0)
2701 otus_write(sc, 0x1d4004, 0);
2702 if ((error = otus_write_barrier(sc)) != 0)
2706 if ((error = otus_program_phy(sc, c)) != 0) {
2707 device_printf(sc->sc_dev,
2708 "%s: could not program PHY\n",
2713 /* Select RF programming based on band. */
2714 if (IEEE80211_IS_CHAN_5GHZ(c))
2715 vals = ar5416_banks_vals_5ghz;
2717 vals = ar5416_banks_vals_2ghz;
2718 for (i = 0; i < nitems(ar5416_banks_regs); i++)
2719 otus_write(sc, AR_PHY(ar5416_banks_regs[i]), vals[i]);
2720 if ((error = otus_write_barrier(sc)) != 0) {
2721 device_printf(sc->sc_dev,
2722 "%s: could not program RF\n",
2726 code = AR_CMD_RF_INIT;
2728 code = AR_CMD_FREQUENCY;
2731 if ((error = otus_set_rf_bank4(sc, c)) != 0)
2734 tmp = (sc->txmask == 0x5) ? 0x340 : 0x240;
2735 otus_write(sc, AR_PHY_TURBO, tmp);
2736 if ((error = otus_write_barrier(sc)) != 0)
2739 /* Send firmware command to set channel. */
2740 cmd.freq = htole32((uint32_t)c->ic_freq * 1000);
2741 cmd.dynht2040 = htole32(0);
2742 cmd.htena = htole32(1);
2743 /* Set Delta Slope (exponent and mantissa). */
2744 coeff = (100 << 24) / c->ic_freq;
2745 otus_get_delta_slope(coeff, &exp, &man);
2746 cmd.dsc_exp = htole32(exp);
2747 cmd.dsc_man = htole32(man);
2748 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2749 "ds coeff=%u exp=%u man=%u\n", coeff, exp, man);
2750 /* For Short GI, coeff is 9/10 that of normal coeff. */
2751 coeff = (9 * coeff) / 10;
2752 otus_get_delta_slope(coeff, &exp, &man);
2753 cmd.dsc_shgi_exp = htole32(exp);
2754 cmd.dsc_shgi_man = htole32(man);
2755 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2756 "ds shgi coeff=%u exp=%u man=%u\n", coeff, exp, man);
2757 /* Set wait time for AGC and noise calibration (100 or 200ms). */
2758 cmd.check_loop_count = assoc ? htole32(2000) : htole32(1000);
2759 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2760 "%s\n", (code == AR_CMD_RF_INIT) ? "RF_INIT" : "FREQUENCY");
2761 error = otus_cmd(sc, code, &cmd, sizeof cmd, &rsp);
2764 if ((rsp.status & htole32(AR_CAL_ERR_AGC | AR_CAL_ERR_NF_VAL)) != 0) {
2765 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2766 "status=0x%x\n", le32toh(rsp.status));
2767 /* Force cold reset on next channel. */
2771 if (otus_debug & OTUS_DEBUG_RESET) {
2772 device_printf(sc->sc_dev, "calibration status=0x%x\n",
2773 le32toh(rsp.status));
2774 for (i = 0; i < 2; i++) { /* 2 Rx chains */
2775 /* Sign-extend 9-bit NF values. */
2776 device_printf(sc->sc_dev,
2777 "noisefloor chain %d=%d\n", i,
2778 (((int32_t)le32toh(rsp.nf[i])) << 4) >> 23);
2779 device_printf(sc->sc_dev,
2780 "noisefloor ext chain %d=%d\n", i,
2781 ((int32_t)le32toh(rsp.nf_ext[i])) >> 23);
2785 for (i = 0; i < OTUS_NUM_CHAINS; i++) {
2786 sc->sc_nf[i] = ((((int32_t)le32toh(rsp.nf[i])) << 4) >> 23);
2795 otus_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2796 struct ieee80211_key *k)
2798 struct otus_softc *sc = ic->ic_softc;
2799 struct otus_cmd_key cmd;
2801 /* Defer setting of WEP keys until interface is brought up. */
2802 if ((ic->ic_if.if_flags & (IFF_UP | IFF_RUNNING)) !=
2803 (IFF_UP | IFF_RUNNING))
2806 /* Do it in a process context. */
2808 cmd.associd = (ni != NULL) ? ni->ni_associd : 0;
2809 otus_do_async(sc, otus_set_key_cb, &cmd, sizeof cmd);
2814 otus_set_key_cb(struct otus_softc *sc, void *arg)
2816 struct otus_cmd_key *cmd = arg;
2817 struct ieee80211_key *k = &cmd->key;
2818 struct ar_cmd_ekey key;
2822 memset(&key, 0, sizeof key);
2823 if (k->k_flags & IEEE80211_KEY_GROUP) {
2824 key.uid = htole16(k->k_id);
2825 IEEE80211_ADDR_COPY(key.macaddr, sc->sc_ic.ic_myaddr);
2826 key.macaddr[0] |= 0x80;
2828 key.uid = htole16(OTUS_UID(cmd->associd));
2829 IEEE80211_ADDR_COPY(key.macaddr, ni->ni_macaddr);
2831 key.kix = htole16(0);
2832 /* Map net80211 cipher to hardware. */
2833 switch (k->k_cipher) {
2834 case IEEE80211_CIPHER_WEP40:
2835 cipher = AR_CIPHER_WEP64;
2837 case IEEE80211_CIPHER_WEP104:
2838 cipher = AR_CIPHER_WEP128;
2840 case IEEE80211_CIPHER_TKIP:
2841 cipher = AR_CIPHER_TKIP;
2843 case IEEE80211_CIPHER_CCMP:
2844 cipher = AR_CIPHER_AES;
2849 key.cipher = htole16(cipher);
2850 memcpy(key.key, k->k_key, MIN(k->k_len, 16));
2851 error = otus_cmd(sc, AR_CMD_EKEY, &key, sizeof key, NULL);
2852 if (error != 0 || k->k_cipher != IEEE80211_CIPHER_TKIP)
2855 /* TKIP: set Tx/Rx MIC Key. */
2856 key.kix = htole16(1);
2857 memcpy(key.key, k->k_key + 16, 16);
2858 (void)otus_cmd(sc, AR_CMD_EKEY, &key, sizeof key, NULL);
2862 otus_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2863 struct ieee80211_key *k)
2865 struct otus_softc *sc = ic->ic_softc;
2866 struct otus_cmd_key cmd;
2868 if (!(ic->ic_if.if_flags & IFF_RUNNING) ||
2869 ic->ic_state != IEEE80211_S_RUN)
2870 return; /* Nothing to do. */
2872 /* Do it in a process context. */
2874 cmd.associd = (ni != NULL) ? ni->ni_associd : 0;
2875 otus_do_async(sc, otus_delete_key_cb, &cmd, sizeof cmd);
2879 otus_delete_key_cb(struct otus_softc *sc, void *arg)
2881 struct otus_cmd_key *cmd = arg;
2882 struct ieee80211_key *k = &cmd->key;
2885 if (k->k_flags & IEEE80211_KEY_GROUP)
2886 uid = htole32(k->k_id);
2888 uid = htole32(OTUS_UID(cmd->associd));
2889 (void)otus_cmd(sc, AR_CMD_DKEY, &uid, sizeof uid, NULL);
2894 * XXX TODO: check if we have to be doing any calibration in the host
2895 * or whether it's purely a firmware thing.
2898 otus_calibrate_to(void *arg, int pending)
2901 struct otus_softc *sc = arg;
2903 device_printf(sc->sc_dev, "%s: called\n", __func__);
2904 struct ieee80211com *ic = &sc->sc_ic;
2905 struct ieee80211_node *ni;
2908 if (usbd_is_dying(sc->sc_udev))
2911 usbd_ref_incr(sc->sc_udev);
2915 ieee80211_amrr_choose(&sc->amrr, ni, &((struct otus_node *)ni)->amn);
2918 if (!usbd_is_dying(sc->sc_udev))
2919 timeout_add_sec(&sc->calib_to, 1);
2921 usbd_ref_decr(sc->sc_udev);
2926 otus_set_bssid(struct otus_softc *sc, const uint8_t *bssid)
2929 OTUS_LOCK_ASSERT(sc);
2931 otus_write(sc, AR_MAC_REG_BSSID_L,
2932 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
2933 otus_write(sc, AR_MAC_REG_BSSID_H,
2934 bssid[4] | bssid[5] << 8);
2935 return otus_write_barrier(sc);
2939 otus_set_macaddr(struct otus_softc *sc, const uint8_t *addr)
2941 OTUS_LOCK_ASSERT(sc);
2943 otus_write(sc, AR_MAC_REG_MAC_ADDR_L,
2944 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
2945 otus_write(sc, AR_MAC_REG_MAC_ADDR_H,
2946 addr[4] | addr[5] << 8);
2947 return otus_write_barrier(sc);
2950 /* Default single-LED. */
2952 otus_led_newstate_type1(struct otus_softc *sc)
2955 device_printf(sc->sc_dev, "%s: TODO\n", __func__);
2958 /* NETGEAR, dual-LED. */
2960 otus_led_newstate_type2(struct otus_softc *sc)
2963 device_printf(sc->sc_dev, "%s: TODO\n", __func__);
2966 /* NETGEAR, single-LED/3 colors (blue, red, purple.) */
2968 otus_led_newstate_type3(struct otus_softc *sc)
2971 struct ieee80211com *ic = &sc->sc_ic;
2972 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2974 uint32_t state = sc->led_state;
2976 OTUS_LOCK_ASSERT(sc);
2979 state = 0; /* led off */
2980 } else if (vap->iv_state == IEEE80211_S_INIT) {
2981 state = 0; /* LED off. */
2982 } else if (vap->iv_state == IEEE80211_S_RUN) {
2983 /* Associated, LED always on. */
2984 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan))
2985 state = AR_LED0_ON; /* 2GHz=>Red. */
2987 state = AR_LED1_ON; /* 5GHz=>Blue. */
2989 /* Scanning, blink LED. */
2990 state ^= AR_LED0_ON | AR_LED1_ON;
2991 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan))
2992 state &= ~AR_LED1_ON;
2994 state &= ~AR_LED0_ON;
2996 if (state != sc->led_state) {
2997 otus_write(sc, 0x1d0104, state);
2998 if (otus_write_barrier(sc) == 0)
2999 sc->led_state = state;
3005 otus_init(struct otus_softc *sc)
3007 struct ieee80211com *ic = &sc->sc_ic;
3010 OTUS_UNLOCK_ASSERT(sc);
3014 /* Drain any pending TX frames */
3015 otus_drain_mbufq(sc);
3018 if ((error = otus_init_mac(sc)) != 0) {
3020 device_printf(sc->sc_dev,
3021 "%s: could not initialize MAC\n", __func__);
3025 (void) otus_set_macaddr(sc, ic->ic_macaddr);
3028 switch (ic->ic_opmode) {
3030 #ifndef IEEE80211_STA_ONLY
3031 case IEEE80211_M_HOSTAP:
3032 otus_write(sc, 0x1c3700, 0x0f0000a1);
3033 otus_write(sc, 0x1c3c40, 0x1);
3035 case IEEE80211_M_IBSS:
3036 otus_write(sc, 0x1c3700, 0x0f000000);
3037 otus_write(sc, 0x1c3c40, 0x1);
3041 case IEEE80211_M_STA:
3042 otus_write(sc, 0x1c3700, 0x0f000002);
3043 otus_write(sc, 0x1c3c40, 0x1);
3050 /* Expect STA operation */
3051 otus_write(sc, 0x1c3700, 0x0f000002);
3052 otus_write(sc, 0x1c3c40, 0x1);
3054 /* XXX ic_opmode? */
3055 otus_write(sc, AR_MAC_REG_SNIFFER,
3056 (ic->ic_opmode == IEEE80211_M_MONITOR) ? 0x2000001 : 0x2000000);
3057 (void)otus_write_barrier(sc);
3059 sc->bb_reset = 1; /* Force cold reset. */
3061 if ((error = otus_set_chan(sc, ic->ic_curchan, 0)) != 0) {
3063 device_printf(sc->sc_dev,
3064 "%s: could not set channel\n", __func__);
3069 otus_write(sc, 0x1c3d30, 0x100);
3070 (void)otus_write_barrier(sc);
3079 otus_stop(struct otus_softc *sc)
3085 OTUS_UNLOCK_ASSERT(sc);
3089 sc->sc_tx_timer = 0;
3092 taskqueue_drain_timeout(taskqueue_thread, &sc->scan_to);
3093 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_to);
3094 taskqueue_drain(taskqueue_thread, &sc->tx_task);
3095 taskqueue_drain(taskqueue_thread, &sc->wme_update_task);
3100 otus_write(sc, 0x1c3d30, 0);
3101 (void)otus_write_barrier(sc);
3103 /* Drain any pending TX frames */
3104 otus_drain_mbufq(sc);