1 /* $OpenBSD: if_otus.c,v 1.49 2015/11/24 13:33:18 mpi Exp $ */
4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr>
5 * Copyright (c) 2015 Adrian Chadd <adrian@FreeBSD.org>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21 * Driver for Atheros AR9001U chipset.
24 #include <sys/cdefs.h>
25 __FBSDID("$FreeBSD$");
29 #include <sys/param.h>
30 #include <sys/endian.h>
31 #include <sys/sockio.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/socket.h>
36 #include <sys/systm.h>
40 #include <sys/firmware.h>
41 #include <sys/module.h>
42 #include <sys/taskqueue.h>
44 #include <machine/bus.h>
45 #include <machine/resource.h>
49 #include <net/if_var.h>
50 #include <net/if_arp.h>
51 #include <net/if_dl.h>
52 #include <net/if_media.h>
54 #include <netinet/in.h>
55 #include <netinet/in_systm.h>
56 #include <netinet/in_var.h>
57 #include <netinet/if_ether.h>
58 #include <netinet/ip.h>
60 #include <net80211/ieee80211_var.h>
61 #include <net80211/ieee80211_regdomain.h>
62 #include <net80211/ieee80211_radiotap.h>
63 #include <net80211/ieee80211_ratectl.h>
64 #ifdef IEEE80211_SUPPORT_SUPERG
65 #include <net80211/ieee80211_superg.h>
68 #include <dev/usb/usb.h>
69 #include <dev/usb/usbdi.h>
72 #define USB_DEBUG_VAR otus_debug
73 #include <dev/usb/usb_debug.h>
75 #include "if_otusreg.h"
77 static int otus_debug = 0;
78 static SYSCTL_NODE(_hw_usb, OID_AUTO, otus, CTLFLAG_RW, 0, "USB otus");
79 SYSCTL_INT(_hw_usb_otus, OID_AUTO, debug, CTLFLAG_RWTUN, &otus_debug, 0,
81 #define OTUS_DEBUG_XMIT 0x00000001
82 #define OTUS_DEBUG_RECV 0x00000002
83 #define OTUS_DEBUG_TXDONE 0x00000004
84 #define OTUS_DEBUG_RXDONE 0x00000008
85 #define OTUS_DEBUG_CMD 0x00000010
86 #define OTUS_DEBUG_CMDDONE 0x00000020
87 #define OTUS_DEBUG_RESET 0x00000040
88 #define OTUS_DEBUG_STATE 0x00000080
89 #define OTUS_DEBUG_CMDNOTIFY 0x00000100
90 #define OTUS_DEBUG_REGIO 0x00000200
91 #define OTUS_DEBUG_IRQ 0x00000400
92 #define OTUS_DEBUG_TXCOMP 0x00000800
93 #define OTUS_DEBUG_ANY 0xffffffff
95 #define OTUS_DPRINTF(sc, dm, ...) \
97 if ((dm == OTUS_DEBUG_ANY) || (dm & otus_debug)) \
98 device_printf(sc->sc_dev, __VA_ARGS__); \
101 #define OTUS_DEV(v, p) { USB_VPI(v, p, 0) }
102 static const STRUCT_USB_HOST_ID otus_devs[] = {
103 OTUS_DEV(USB_VENDOR_ACCTON, USB_PRODUCT_ACCTON_WN7512),
104 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_3CRUSBN275),
105 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_TG121N),
106 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_AR9170),
107 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_WN612),
108 OTUS_DEV(USB_VENDOR_ATHEROS2, USB_PRODUCT_ATHEROS2_WN821NV2),
109 OTUS_DEV(USB_VENDOR_AVM, USB_PRODUCT_AVM_FRITZWLAN),
110 OTUS_DEV(USB_VENDOR_CACE, USB_PRODUCT_CACE_AIRPCAPNX),
111 OTUS_DEV(USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DWA130D1),
112 OTUS_DEV(USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DWA160A1),
113 OTUS_DEV(USB_VENDOR_DLINK2, USB_PRODUCT_DLINK2_DWA160A2),
114 OTUS_DEV(USB_VENDOR_IODATA, USB_PRODUCT_IODATA_WNGDNUS2),
115 OTUS_DEV(USB_VENDOR_NEC, USB_PRODUCT_NEC_WL300NUG),
116 OTUS_DEV(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_WN111V2),
117 OTUS_DEV(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_WNA1000),
118 OTUS_DEV(USB_VENDOR_NETGEAR, USB_PRODUCT_NETGEAR_WNDA3100),
119 OTUS_DEV(USB_VENDOR_PLANEX2, USB_PRODUCT_PLANEX2_GW_US300),
120 OTUS_DEV(USB_VENDOR_WISTRONNEWEB, USB_PRODUCT_WISTRONNEWEB_O8494),
121 OTUS_DEV(USB_VENDOR_WISTRONNEWEB, USB_PRODUCT_WISTRONNEWEB_WNC0600),
122 OTUS_DEV(USB_VENDOR_ZCOM, USB_PRODUCT_ZCOM_UB81),
123 OTUS_DEV(USB_VENDOR_ZCOM, USB_PRODUCT_ZCOM_UB82),
124 OTUS_DEV(USB_VENDOR_ZYDAS, USB_PRODUCT_ZYDAS_ZD1221),
125 OTUS_DEV(USB_VENDOR_ZYXEL, USB_PRODUCT_ZYXEL_NWD271N),
128 static device_probe_t otus_match;
129 static device_attach_t otus_attach;
130 static device_detach_t otus_detach;
132 static int otus_attachhook(struct otus_softc *);
133 void otus_get_chanlist(struct otus_softc *);
134 static void otus_getradiocaps(struct ieee80211com *, int, int *,
135 struct ieee80211_channel[]);
136 int otus_load_firmware(struct otus_softc *, const char *,
138 int otus_open_pipes(struct otus_softc *);
139 void otus_close_pipes(struct otus_softc *);
141 static int otus_alloc_tx_cmd_list(struct otus_softc *);
142 static void otus_free_tx_cmd_list(struct otus_softc *);
144 static int otus_alloc_rx_list(struct otus_softc *);
145 static void otus_free_rx_list(struct otus_softc *);
146 static int otus_alloc_tx_list(struct otus_softc *);
147 static void otus_free_tx_list(struct otus_softc *);
148 static void otus_free_list(struct otus_softc *, struct otus_data [], int);
149 static struct otus_data *_otus_getbuf(struct otus_softc *);
150 static struct otus_data *otus_getbuf(struct otus_softc *);
151 static void otus_freebuf(struct otus_softc *, struct otus_data *);
153 static struct otus_tx_cmd *_otus_get_txcmd(struct otus_softc *);
154 static struct otus_tx_cmd *otus_get_txcmd(struct otus_softc *);
155 static void otus_free_txcmd(struct otus_softc *, struct otus_tx_cmd *);
157 void otus_next_scan(void *, int);
158 static void otus_tx_task(void *, int pending);
159 void otus_do_async(struct otus_softc *,
160 void (*)(struct otus_softc *, void *), void *, int);
161 int otus_newstate(struct ieee80211vap *, enum ieee80211_state,
163 int otus_cmd(struct otus_softc *, uint8_t, const void *, int,
165 void otus_write(struct otus_softc *, uint32_t, uint32_t);
166 int otus_write_barrier(struct otus_softc *);
167 static struct ieee80211_node *otus_node_alloc(struct ieee80211vap *vap,
168 const uint8_t mac[IEEE80211_ADDR_LEN]);
169 int otus_media_change(struct ifnet *);
170 int otus_read_eeprom(struct otus_softc *);
171 void otus_newassoc(struct ieee80211_node *, int);
172 void otus_cmd_rxeof(struct otus_softc *, uint8_t *, int);
173 void otus_sub_rxeof(struct otus_softc *, uint8_t *, int,
175 static int otus_tx(struct otus_softc *, struct ieee80211_node *,
176 struct mbuf *, struct otus_data *,
177 const struct ieee80211_bpf_params *);
178 int otus_ioctl(struct ifnet *, u_long, caddr_t);
179 int otus_set_multi(struct otus_softc *);
180 static int otus_updateedca(struct ieee80211com *);
181 static void otus_updateedca_locked(struct otus_softc *);
182 static void otus_updateslot(struct otus_softc *);
183 static void otus_set_operating_mode(struct otus_softc *sc);
184 static void otus_set_rx_filter(struct otus_softc *sc);
185 int otus_init_mac(struct otus_softc *);
186 uint32_t otus_phy_get_def(struct otus_softc *, uint32_t);
187 int otus_set_board_values(struct otus_softc *,
188 struct ieee80211_channel *);
189 int otus_program_phy(struct otus_softc *,
190 struct ieee80211_channel *);
191 int otus_set_rf_bank4(struct otus_softc *,
192 struct ieee80211_channel *);
193 void otus_get_delta_slope(uint32_t, uint32_t *, uint32_t *);
194 static int otus_set_chan(struct otus_softc *, struct ieee80211_channel *,
196 int otus_set_key(struct ieee80211com *, struct ieee80211_node *,
197 struct ieee80211_key *);
198 void otus_set_key_cb(struct otus_softc *, void *);
199 void otus_delete_key(struct ieee80211com *, struct ieee80211_node *,
200 struct ieee80211_key *);
201 void otus_delete_key_cb(struct otus_softc *, void *);
202 void otus_calibrate_to(void *, int);
203 int otus_set_bssid(struct otus_softc *, const uint8_t *);
204 int otus_set_macaddr(struct otus_softc *, const uint8_t *);
205 void otus_led_newstate_type1(struct otus_softc *);
206 void otus_led_newstate_type2(struct otus_softc *);
207 void otus_led_newstate_type3(struct otus_softc *);
208 int otus_init(struct otus_softc *sc);
209 void otus_stop(struct otus_softc *sc);
211 static device_method_t otus_methods[] = {
212 DEVMETHOD(device_probe, otus_match),
213 DEVMETHOD(device_attach, otus_attach),
214 DEVMETHOD(device_detach, otus_detach),
219 static driver_t otus_driver = {
221 .methods = otus_methods,
222 .size = sizeof(struct otus_softc)
225 static devclass_t otus_devclass;
227 DRIVER_MODULE(otus, uhub, otus_driver, otus_devclass, NULL, 0);
228 MODULE_DEPEND(otus, wlan, 1, 1, 1);
229 MODULE_DEPEND(otus, usb, 1, 1, 1);
230 MODULE_DEPEND(otus, firmware, 1, 1, 1);
231 MODULE_VERSION(otus, 1);
233 static usb_callback_t otus_bulk_tx_callback;
234 static usb_callback_t otus_bulk_rx_callback;
235 static usb_callback_t otus_bulk_irq_callback;
236 static usb_callback_t otus_bulk_cmd_callback;
238 static const struct usb_config otus_config[OTUS_N_XFER] = {
241 .endpoint = UE_ADDR_ANY,
242 .direction = UE_DIR_OUT,
244 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
245 .callback = otus_bulk_tx_callback,
246 .timeout = 5000, /* ms */
250 .endpoint = UE_ADDR_ANY,
251 .direction = UE_DIR_IN,
252 .bufsize = OTUS_RXBUFSZ,
253 .flags = { .ext_buffer = 1, .pipe_bof = 1,.short_xfer_ok = 1,},
254 .callback = otus_bulk_rx_callback,
257 .type = UE_INTERRUPT,
258 .endpoint = UE_ADDR_ANY,
259 .direction = UE_DIR_IN,
260 .bufsize = OTUS_MAX_CTRLSZ,
261 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
262 .callback = otus_bulk_irq_callback,
265 .type = UE_INTERRUPT,
266 .endpoint = UE_ADDR_ANY,
267 .direction = UE_DIR_OUT,
268 .bufsize = OTUS_MAX_CTRLSZ,
269 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
270 .callback = otus_bulk_cmd_callback,
271 .timeout = 5000, /* ms */
276 otus_match(device_t self)
278 struct usb_attach_arg *uaa = device_get_ivars(self);
280 if (uaa->usb_mode != USB_MODE_HOST ||
281 uaa->info.bIfaceIndex != 0 ||
282 uaa->info.bConfigIndex != 0)
285 return (usbd_lookup_id_by_uaa(otus_devs, sizeof(otus_devs), uaa));
289 otus_attach(device_t self)
291 struct usb_attach_arg *uaa = device_get_ivars(self);
292 struct otus_softc *sc = device_get_softc(self);
296 device_set_usb_desc(self);
297 sc->sc_udev = uaa->device;
300 mtx_init(&sc->sc_mtx, device_get_nameunit(self), MTX_NETWORK_LOCK,
303 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->scan_to, 0, otus_next_scan, sc);
304 TIMEOUT_TASK_INIT(taskqueue_thread, &sc->calib_to, 0, otus_calibrate_to, sc);
305 TASK_INIT(&sc->tx_task, 0, otus_tx_task, sc);
306 mbufq_init(&sc->sc_snd, ifqmaxlen);
309 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
310 otus_config, OTUS_N_XFER, sc, &sc->sc_mtx);
312 device_printf(sc->sc_dev,
313 "could not allocate USB transfers, err=%s\n",
318 if ((error = otus_open_pipes(sc)) != 0) {
319 device_printf(sc->sc_dev, "%s: could not open pipes\n",
324 /* XXX check return status; fail out if appropriate */
325 if (otus_attachhook(sc) != 0)
331 otus_close_pipes(sc);
333 mtx_destroy(&sc->sc_mtx);
338 otus_detach(device_t self)
340 struct otus_softc *sc = device_get_softc(self);
341 struct ieee80211com *ic = &sc->sc_ic;
345 usbd_transfer_unsetup(sc->sc_xfer, OTUS_N_XFER);
347 taskqueue_drain_timeout(taskqueue_thread, &sc->scan_to);
348 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_to);
349 taskqueue_drain(taskqueue_thread, &sc->tx_task);
351 otus_close_pipes(sc);
353 /* Wait for all queued asynchronous commands to complete. */
354 usb_rem_wait_task(sc->sc_udev, &sc->sc_task);
356 usbd_ref_wait(sc->sc_udev);
359 ieee80211_ifdetach(ic);
360 mtx_destroy(&sc->sc_mtx);
365 otus_delay_ms(struct otus_softc *sc, int ms)
371 static struct ieee80211vap *
372 otus_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
373 enum ieee80211_opmode opmode, int flags,
374 const uint8_t bssid[IEEE80211_ADDR_LEN],
375 const uint8_t mac[IEEE80211_ADDR_LEN])
377 struct otus_vap *uvp;
378 struct ieee80211vap *vap;
380 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
383 uvp = malloc(sizeof(struct otus_vap), M_80211_VAP, M_WAITOK | M_ZERO);
386 if (ieee80211_vap_setup(ic, vap, name, unit, opmode,
387 flags, bssid) != 0) {
389 free(uvp, M_80211_VAP);
393 /* override state transition machine */
394 uvp->newstate = vap->iv_newstate;
395 vap->iv_newstate = otus_newstate;
397 /* XXX TODO: double-check */
398 vap->iv_ampdu_density = IEEE80211_HTCAP_MPDUDENSITY_16;
399 vap->iv_ampdu_rxmax = IEEE80211_HTCAP_MAXRXAMPDU_32K;
401 ieee80211_ratectl_init(vap);
404 ieee80211_vap_attach(vap, ieee80211_media_change,
405 ieee80211_media_status, mac);
406 ic->ic_opmode = opmode;
412 otus_vap_delete(struct ieee80211vap *vap)
414 struct otus_vap *uvp = OTUS_VAP(vap);
416 ieee80211_ratectl_deinit(vap);
417 ieee80211_vap_detach(vap);
418 free(uvp, M_80211_VAP);
422 otus_parent(struct ieee80211com *ic)
424 struct otus_softc *sc = ic->ic_softc;
427 if (ic->ic_nrunning > 0) {
428 if (!sc->sc_running) {
432 (void) otus_set_multi(sc);
434 } else if (sc->sc_running)
438 ieee80211_start_all(ic);
442 otus_drain_mbufq(struct otus_softc *sc)
445 struct ieee80211_node *ni;
447 OTUS_LOCK_ASSERT(sc);
448 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
449 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
450 m->m_pkthdr.rcvif = NULL;
451 ieee80211_free_node(ni);
457 otus_tx_start(struct otus_softc *sc)
460 taskqueue_enqueue(taskqueue_thread, &sc->tx_task);
464 otus_transmit(struct ieee80211com *ic, struct mbuf *m)
466 struct otus_softc *sc = ic->ic_softc;
470 if (! sc->sc_running) {
475 /* XXX TODO: handle fragments */
476 error = mbufq_enqueue(&sc->sc_snd, m);
478 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
479 "%s: mbufq_enqueue failed: %d\n",
494 _otus_start(struct otus_softc *sc)
496 struct ieee80211_node *ni;
497 struct otus_data *bf;
500 OTUS_LOCK_ASSERT(sc);
502 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
503 bf = otus_getbuf(sc);
505 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
506 "%s: failed to get buffer\n", __func__);
507 mbufq_prepend(&sc->sc_snd, m);
511 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
512 m->m_pkthdr.rcvif = NULL;
514 if (otus_tx(sc, ni, m, bf, NULL) != 0) {
515 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
516 "%s: failed to transmit\n", __func__);
517 if_inc_counter(ni->ni_vap->iv_ifp,
518 IFCOUNTER_OERRORS, 1);
519 otus_freebuf(sc, bf);
520 ieee80211_free_node(ni);
528 otus_tx_task(void *arg, int pending)
530 struct otus_softc *sc = arg;
538 otus_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
539 const struct ieee80211_bpf_params *params)
541 struct ieee80211com *ic= ni->ni_ic;
542 struct otus_softc *sc = ic->ic_softc;
543 struct otus_data *bf = NULL;
546 /* Don't transmit if we're not running */
548 if (! sc->sc_running) {
553 bf = otus_getbuf(sc);
559 if (otus_tx(sc, ni, m, bf, params) != 0) {
568 otus_freebuf(sc, bf);
575 otus_update_chw(struct ieee80211com *ic)
578 printf("%s: TODO\n", __func__);
582 otus_set_channel(struct ieee80211com *ic)
584 struct otus_softc *sc = ic->ic_softc;
585 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "%s: set channel: %d\n",
587 ic->ic_curchan->ic_freq);
590 (void) otus_set_chan(sc, ic->ic_curchan, 0);
595 otus_ampdu_enable(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
598 /* For now, no A-MPDU TX support in the driver */
603 otus_scan_start(struct ieee80211com *ic)
606 // printf("%s: TODO\n", __func__);
610 otus_scan_end(struct ieee80211com *ic)
613 // printf("%s: TODO\n", __func__);
617 otus_update_mcast(struct ieee80211com *ic)
619 struct otus_softc *sc = ic->ic_softc;
621 (void) otus_set_multi(sc);
625 otus_attachhook(struct otus_softc *sc)
627 struct ieee80211com *ic = &sc->sc_ic;
628 usb_device_request_t req;
633 error = otus_load_firmware(sc, "otusfw_init", AR_FW_INIT_ADDR);
635 device_printf(sc->sc_dev, "%s: could not load %s firmware\n",
640 /* XXX not locked? */
641 otus_delay_ms(sc, 1000);
644 error = otus_load_firmware(sc, "otusfw_main", AR_FW_MAIN_ADDR);
646 device_printf(sc->sc_dev, "%s: could not load %s firmware\n",
653 /* Tell device that firmware transfer is complete. */
654 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
655 req.bRequest = AR_FW_DOWNLOAD_COMPLETE;
656 USETW(req.wValue, 0);
657 USETW(req.wIndex, 0);
658 USETW(req.wLength, 0);
659 if (usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, &req, NULL,
660 0, NULL, 250) != 0) {
662 device_printf(sc->sc_dev,
663 "%s: firmware initialization failed\n",
668 /* Send an ECHO command to check that everything is settled. */
670 if (otus_cmd(sc, AR_CMD_ECHO, &in, sizeof in, &out, sizeof(out)) != 0) {
672 device_printf(sc->sc_dev,
673 "%s: echo command failed\n", __func__);
678 device_printf(sc->sc_dev,
679 "%s: echo reply mismatch: 0x%08x!=0x%08x\n",
684 /* Read entire EEPROM. */
685 if (otus_read_eeprom(sc) != 0) {
687 device_printf(sc->sc_dev,
688 "%s: could not read EEPROM\n",
695 sc->txmask = sc->eeprom.baseEepHeader.txMask;
696 sc->rxmask = sc->eeprom.baseEepHeader.rxMask;
697 sc->capflags = sc->eeprom.baseEepHeader.opCapFlags;
698 IEEE80211_ADDR_COPY(ic->ic_macaddr, sc->eeprom.baseEepHeader.macAddr);
699 sc->sc_led_newstate = otus_led_newstate_type3; /* XXX */
701 device_printf(sc->sc_dev,
702 "MAC/BBP AR9170, RF AR%X, MIMO %dT%dR, address %s\n",
703 (sc->capflags & AR5416_OPFLAGS_11A) ?
704 0x9104 : ((sc->txmask == 0x5) ? 0x9102 : 0x9101),
705 (sc->txmask == 0x5) ? 2 : 1, (sc->rxmask == 0x5) ? 2 : 1,
706 ether_sprintf(ic->ic_macaddr));
709 ic->ic_name = device_get_nameunit(sc->sc_dev);
710 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
711 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
713 /* Set device capabilities. */
715 IEEE80211_C_STA | /* station mode */
717 IEEE80211_C_BGSCAN | /* Background scan. */
719 IEEE80211_C_SHPREAMBLE | /* Short preamble supported. */
720 IEEE80211_C_WME | /* WME/QoS */
721 IEEE80211_C_SHSLOT | /* Short slot time supported. */
722 IEEE80211_C_FF | /* Atheros fast-frames supported. */
723 IEEE80211_C_MONITOR |
724 IEEE80211_C_WPA; /* WPA/RSN. */
729 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
730 /* Set supported .11b and .11g rates. */
731 ic->ic_sup_rates[IEEE80211_MODE_11B] =
732 ieee80211_std_rateset_11b;
733 ic->ic_sup_rates[IEEE80211_MODE_11G] =
734 ieee80211_std_rateset_11g;
736 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
737 /* Set supported .11a rates. */
738 ic->ic_sup_rates[IEEE80211_MODE_11A] =
739 ieee80211_std_rateset_11a;
744 /* Build the list of supported channels. */
745 otus_get_chanlist(sc);
747 otus_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
751 ieee80211_ifattach(ic);
752 ic->ic_raw_xmit = otus_raw_xmit;
753 ic->ic_scan_start = otus_scan_start;
754 ic->ic_scan_end = otus_scan_end;
755 ic->ic_set_channel = otus_set_channel;
756 ic->ic_getradiocaps = otus_getradiocaps;
757 ic->ic_vap_create = otus_vap_create;
758 ic->ic_vap_delete = otus_vap_delete;
759 ic->ic_update_mcast = otus_update_mcast;
760 ic->ic_update_promisc = otus_update_mcast;
761 ic->ic_parent = otus_parent;
762 ic->ic_transmit = otus_transmit;
763 ic->ic_update_chw = otus_update_chw;
764 ic->ic_ampdu_enable = otus_ampdu_enable;
765 ic->ic_wme.wme_update = otus_updateedca;
766 ic->ic_newassoc = otus_newassoc;
767 ic->ic_node_alloc = otus_node_alloc;
770 ic->ic_set_key = otus_set_key;
771 ic->ic_delete_key = otus_delete_key;
774 ieee80211_radiotap_attach(ic, &sc->sc_txtap.wt_ihdr,
775 sizeof(sc->sc_txtap), OTUS_TX_RADIOTAP_PRESENT,
776 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
777 OTUS_RX_RADIOTAP_PRESENT);
783 otus_get_chanlist(struct otus_softc *sc)
785 struct ieee80211com *ic = &sc->sc_ic;
790 /* XXX regulatory domain. */
791 domain = le16toh(sc->eeprom.baseEepHeader.regDmn[0]);
792 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "regdomain=0x%04x\n", domain);
794 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
795 for (i = 0; i < 14; i++) {
797 ic->ic_channels[chan].ic_freq =
798 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
799 ic->ic_channels[chan].ic_flags =
800 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
801 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
804 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
805 for (i = 14; i < nitems(ar_chans); i++) {
807 ic->ic_channels[chan].ic_freq =
808 ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
809 ic->ic_channels[chan].ic_flags = IEEE80211_CHAN_A;
815 otus_getradiocaps(struct ieee80211com *ic,
816 int maxchans, int *nchans, struct ieee80211_channel chans[])
818 struct otus_softc *sc = ic->ic_softc;
819 uint8_t bands[IEEE80211_MODE_BYTES];
821 /* Set supported .11b and .11g rates. */
822 memset(bands, 0, sizeof(bands));
823 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11G) {
824 setbit(bands, IEEE80211_MODE_11B);
825 setbit(bands, IEEE80211_MODE_11G);
828 setbit(bands, IEEE80211_MODE_11NG);
830 ieee80211_add_channel_list_2ghz(chans, maxchans, nchans,
831 ar_chans, 14, bands, 0);
833 if (sc->eeprom.baseEepHeader.opCapFlags & AR5416_OPFLAGS_11A) {
834 setbit(bands, IEEE80211_MODE_11A);
835 ieee80211_add_channel_list_5ghz(chans, maxchans, nchans,
836 &ar_chans[14], nitems(ar_chans) - 14, bands, 0);
841 otus_load_firmware(struct otus_softc *sc, const char *name, uint32_t addr)
843 usb_device_request_t req;
845 const struct firmware *fw;
846 int mlen, error, size;
850 /* Read firmware image from the filesystem. */
851 if ((fw = firmware_get(name)) == NULL) {
852 device_printf(sc->sc_dev,
853 "%s: failed loadfirmware of file %s\n", __func__, name);
856 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
857 req.bRequest = AR_FW_DOWNLOAD;
858 USETW(req.wIndex, 0);
863 ptr = __DECONST(char *, fw->data);
867 mlen = MIN(size, 4096);
869 USETW(req.wValue, addr);
870 USETW(req.wLength, mlen);
871 if (usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
872 &req, ptr, 0, NULL, 250) != 0) {
883 firmware_put(fw, FIRMWARE_UNLOAD);
885 device_printf(sc->sc_dev,
886 "%s: %s: error=%d\n", __func__, name, error);
891 otus_open_pipes(struct otus_softc *sc)
899 OTUS_UNLOCK_ASSERT(sc);
901 if ((error = otus_alloc_tx_cmd_list(sc)) != 0) {
902 device_printf(sc->sc_dev,
903 "%s: could not allocate command xfer\n",
908 if ((error = otus_alloc_tx_list(sc)) != 0) {
909 device_printf(sc->sc_dev, "%s: could not allocate Tx xfers\n",
914 if ((error = otus_alloc_rx_list(sc)) != 0) {
915 device_printf(sc->sc_dev, "%s: could not allocate Rx xfers\n",
920 /* Enable RX transfers; needed for initial firmware messages */
922 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_RX]);
923 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_IRQ]);
927 fail: otus_close_pipes(sc);
932 otus_close_pipes(struct otus_softc *sc)
936 otus_free_tx_cmd_list(sc);
937 otus_free_tx_list(sc);
938 otus_free_rx_list(sc);
941 usbd_transfer_unsetup(sc->sc_xfer, OTUS_N_XFER);
945 otus_free_cmd_list(struct otus_softc *sc, struct otus_tx_cmd cmd[], int ndata)
949 /* XXX TODO: someone has to have waken up waiters! */
950 for (i = 0; i < ndata; i++) {
951 struct otus_tx_cmd *dp = &cmd[i];
953 if (dp->buf != NULL) {
954 free(dp->buf, M_USBDEV);
961 otus_alloc_cmd_list(struct otus_softc *sc, struct otus_tx_cmd cmd[],
962 int ndata, int maxsz)
966 for (i = 0; i < ndata; i++) {
967 struct otus_tx_cmd *dp = &cmd[i];
968 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT | M_ZERO);
970 if (dp->buf == NULL) {
971 device_printf(sc->sc_dev,
972 "could not allocate buffer\n");
980 otus_free_cmd_list(sc, cmd, ndata);
985 otus_alloc_tx_cmd_list(struct otus_softc *sc)
989 error = otus_alloc_cmd_list(sc, sc->sc_cmd, OTUS_CMD_LIST_COUNT,
994 STAILQ_INIT(&sc->sc_cmd_active);
995 STAILQ_INIT(&sc->sc_cmd_inactive);
996 STAILQ_INIT(&sc->sc_cmd_pending);
997 STAILQ_INIT(&sc->sc_cmd_waiting);
999 for (i = 0; i < OTUS_CMD_LIST_COUNT; i++)
1000 STAILQ_INSERT_HEAD(&sc->sc_cmd_inactive, &sc->sc_cmd[i],
1007 otus_free_tx_cmd_list(struct otus_softc *sc)
1011 * XXX TODO: something needs to wake up any pending/sleeping
1014 STAILQ_INIT(&sc->sc_cmd_active);
1015 STAILQ_INIT(&sc->sc_cmd_inactive);
1016 STAILQ_INIT(&sc->sc_cmd_pending);
1017 STAILQ_INIT(&sc->sc_cmd_waiting);
1019 otus_free_cmd_list(sc, sc->sc_cmd, OTUS_CMD_LIST_COUNT);
1023 otus_alloc_list(struct otus_softc *sc, struct otus_data data[],
1024 int ndata, int maxsz)
1028 for (i = 0; i < ndata; i++) {
1029 struct otus_data *dp = &data[i];
1032 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT | M_ZERO);
1033 if (dp->buf == NULL) {
1034 device_printf(sc->sc_dev,
1035 "could not allocate buffer\n");
1044 otus_free_list(sc, data, ndata);
1049 otus_alloc_rx_list(struct otus_softc *sc)
1053 error = otus_alloc_list(sc, sc->sc_rx, OTUS_RX_LIST_COUNT,
1058 STAILQ_INIT(&sc->sc_rx_active);
1059 STAILQ_INIT(&sc->sc_rx_inactive);
1061 for (i = 0; i < OTUS_RX_LIST_COUNT; i++)
1062 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next);
1068 otus_alloc_tx_list(struct otus_softc *sc)
1072 error = otus_alloc_list(sc, sc->sc_tx, OTUS_TX_LIST_COUNT,
1077 STAILQ_INIT(&sc->sc_tx_inactive);
1079 for (i = 0; i != OTUS_N_XFER; i++) {
1080 STAILQ_INIT(&sc->sc_tx_active[i]);
1081 STAILQ_INIT(&sc->sc_tx_pending[i]);
1084 for (i = 0; i < OTUS_TX_LIST_COUNT; i++) {
1085 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], next);
1092 otus_free_tx_list(struct otus_softc *sc)
1096 /* prevent further allocations from TX list(s) */
1097 STAILQ_INIT(&sc->sc_tx_inactive);
1099 for (i = 0; i != OTUS_N_XFER; i++) {
1100 STAILQ_INIT(&sc->sc_tx_active[i]);
1101 STAILQ_INIT(&sc->sc_tx_pending[i]);
1104 otus_free_list(sc, sc->sc_tx, OTUS_TX_LIST_COUNT);
1108 otus_free_rx_list(struct otus_softc *sc)
1110 /* prevent further allocations from RX list(s) */
1111 STAILQ_INIT(&sc->sc_rx_inactive);
1112 STAILQ_INIT(&sc->sc_rx_active);
1114 otus_free_list(sc, sc->sc_rx, OTUS_RX_LIST_COUNT);
1118 otus_free_list(struct otus_softc *sc, struct otus_data data[], int ndata)
1122 for (i = 0; i < ndata; i++) {
1123 struct otus_data *dp = &data[i];
1125 if (dp->buf != NULL) {
1126 free(dp->buf, M_USBDEV);
1129 if (dp->ni != NULL) {
1130 ieee80211_free_node(dp->ni);
1136 static struct otus_data *
1137 _otus_getbuf(struct otus_softc *sc)
1139 struct otus_data *bf;
1141 bf = STAILQ_FIRST(&sc->sc_tx_inactive);
1143 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next);
1150 static struct otus_data *
1151 otus_getbuf(struct otus_softc *sc)
1153 struct otus_data *bf;
1155 OTUS_LOCK_ASSERT(sc);
1157 bf = _otus_getbuf(sc);
1162 otus_freebuf(struct otus_softc *sc, struct otus_data *bf)
1165 OTUS_LOCK_ASSERT(sc);
1166 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, bf, next);
1169 static struct otus_tx_cmd *
1170 _otus_get_txcmd(struct otus_softc *sc)
1172 struct otus_tx_cmd *bf;
1174 bf = STAILQ_FIRST(&sc->sc_cmd_inactive);
1176 STAILQ_REMOVE_HEAD(&sc->sc_cmd_inactive, next_cmd);
1182 static struct otus_tx_cmd *
1183 otus_get_txcmd(struct otus_softc *sc)
1185 struct otus_tx_cmd *bf;
1187 OTUS_LOCK_ASSERT(sc);
1189 bf = _otus_get_txcmd(sc);
1191 device_printf(sc->sc_dev, "%s: no tx cmd buffers\n",
1198 otus_free_txcmd(struct otus_softc *sc, struct otus_tx_cmd *bf)
1201 OTUS_LOCK_ASSERT(sc);
1202 STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, bf, next_cmd);
1206 otus_next_scan(void *arg, int pending)
1209 struct otus_softc *sc = arg;
1211 if (usbd_is_dying(sc->sc_udev))
1214 usbd_ref_incr(sc->sc_udev);
1216 if (sc->sc_ic.ic_state == IEEE80211_S_SCAN)
1217 ieee80211_next_scan(&sc->sc_ic.ic_if);
1219 usbd_ref_decr(sc->sc_udev);
1224 otus_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1226 struct otus_vap *uvp = OTUS_VAP(vap);
1227 struct ieee80211com *ic = vap->iv_ic;
1228 struct otus_softc *sc = ic->ic_softc;
1229 enum ieee80211_state ostate;
1231 ostate = vap->iv_state;
1232 OTUS_DPRINTF(sc, OTUS_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1233 ieee80211_state_name[ostate],
1234 ieee80211_state_name[nstate]);
1236 IEEE80211_UNLOCK(ic);
1240 /* XXX TODO: more fleshing out! */
1243 case IEEE80211_S_INIT:
1244 otus_set_operating_mode(sc);
1245 otus_set_rx_filter(sc);
1247 case IEEE80211_S_RUN:
1248 if (ic->ic_opmode == IEEE80211_M_STA) {
1249 otus_updateslot(sc);
1250 otus_set_operating_mode(sc);
1251 otus_set_rx_filter(sc);
1253 /* Start calibration timer. */
1254 taskqueue_enqueue_timeout(taskqueue_thread,
1262 /* XXX TODO: calibration? */
1264 sc->sc_led_newstate(sc);
1268 return (uvp->newstate(vap, nstate, arg));
1272 otus_cmd(struct otus_softc *sc, uint8_t code, const void *idata, int ilen,
1273 void *odata, int odatalen)
1275 struct otus_tx_cmd *cmd;
1276 struct ar_cmd_hdr *hdr;
1279 OTUS_LOCK_ASSERT(sc);
1281 /* Always bulk-out a multiple of 4 bytes. */
1282 xferlen = (sizeof (*hdr) + ilen + 3) & ~3;
1283 if (xferlen > OTUS_MAX_TXCMDSZ) {
1284 device_printf(sc->sc_dev, "%s: command (0x%02x) size (%d) > %d\n",
1292 cmd = otus_get_txcmd(sc);
1294 device_printf(sc->sc_dev, "%s: failed to get buf\n",
1299 hdr = (struct ar_cmd_hdr *)cmd->buf;
1302 hdr->token = ++sc->token; /* Don't care about endianness. */
1303 cmd->token = hdr->token;
1304 /* XXX TODO: check max cmd length? */
1305 memcpy((uint8_t *)&hdr[1], idata, ilen);
1307 OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
1308 "%s: sending command code=0x%02x len=%d token=%d\n",
1309 __func__, code, ilen, hdr->token);
1312 cmd->odatalen = odatalen;
1313 cmd->buflen = xferlen;
1315 /* Queue the command to the endpoint */
1316 STAILQ_INSERT_TAIL(&sc->sc_cmd_pending, cmd, next_cmd);
1317 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_CMD]);
1319 /* Sleep on the command; wait for it to complete */
1320 error = msleep(cmd, &sc->sc_mtx, PCATCH, "otuscmd", hz);
1323 * At this point we don't own cmd any longer; it'll be
1324 * freed by the cmd bulk path or the RX notification
1325 * path. If the data is made available then it'll be copied
1326 * to the caller. All that is left to do is communicate
1327 * status back to the caller.
1330 device_printf(sc->sc_dev,
1331 "%s: timeout waiting for command 0x%02x reply\n",
1338 otus_write(struct otus_softc *sc, uint32_t reg, uint32_t val)
1341 OTUS_LOCK_ASSERT(sc);
1343 sc->write_buf[sc->write_idx].reg = htole32(reg);
1344 sc->write_buf[sc->write_idx].val = htole32(val);
1346 if (++sc->write_idx > (AR_MAX_WRITE_IDX-1))
1347 (void)otus_write_barrier(sc);
1351 otus_write_barrier(struct otus_softc *sc)
1355 OTUS_LOCK_ASSERT(sc);
1357 if (sc->write_idx == 0)
1358 return 0; /* Nothing to flush. */
1360 OTUS_DPRINTF(sc, OTUS_DEBUG_REGIO, "%s: called; %d updates\n",
1364 error = otus_cmd(sc, AR_CMD_WREG, sc->write_buf,
1365 sizeof (sc->write_buf[0]) * sc->write_idx, NULL, 0);
1370 static struct ieee80211_node *
1371 otus_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
1374 return malloc(sizeof (struct otus_node), M_80211_NODE,
1380 otus_media_change(struct ifnet *ifp)
1382 struct otus_softc *sc = ifp->if_softc;
1383 struct ieee80211com *ic = &sc->sc_ic;
1387 error = ieee80211_media_change(ifp);
1388 if (error != ENETRESET)
1391 if (ic->ic_fixed_rate != -1) {
1392 rate = ic->ic_sup_rates[ic->ic_curmode].
1393 rs_rates[ic->ic_fixed_rate] & IEEE80211_RATE_VAL;
1394 for (ridx = 0; ridx <= OTUS_RIDX_MAX; ridx++)
1395 if (otus_rates[ridx].rate == rate)
1397 sc->fixed_ridx = ridx;
1400 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
1401 error = otus_init(sc);
1408 otus_read_eeprom(struct otus_softc *sc)
1410 uint32_t regs[8], reg;
1414 OTUS_LOCK_ASSERT(sc);
1416 /* Read EEPROM by blocks of 32 bytes. */
1417 eep = (uint8_t *)&sc->eeprom;
1418 reg = AR_EEPROM_OFFSET;
1419 for (i = 0; i < sizeof (sc->eeprom) / 32; i++) {
1420 for (j = 0; j < 8; j++, reg += 4)
1421 regs[j] = htole32(reg);
1422 error = otus_cmd(sc, AR_CMD_RREG, regs, sizeof regs, eep, 32);
1431 otus_newassoc(struct ieee80211_node *ni, int isnew)
1433 struct ieee80211com *ic = ni->ni_ic;
1434 struct otus_softc *sc = ic->ic_softc;
1435 struct otus_node *on = OTUS_NODE(ni);
1437 OTUS_DPRINTF(sc, OTUS_DEBUG_STATE, "new assoc isnew=%d addr=%s\n",
1438 isnew, ether_sprintf(ni->ni_macaddr));
1446 otus_cmd_handle_response(struct otus_softc *sc, struct ar_cmd_hdr *hdr)
1448 struct otus_tx_cmd *cmd;
1450 OTUS_LOCK_ASSERT(sc);
1452 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1453 "%s: received reply code=0x%02x len=%d token=%d\n",
1455 hdr->code, hdr->len, hdr->token);
1458 * Walk the list, freeing items that aren't ours,
1459 * stopping when we hit our token.
1461 while ((cmd = STAILQ_FIRST(&sc->sc_cmd_waiting)) != NULL) {
1462 STAILQ_REMOVE_HEAD(&sc->sc_cmd_waiting, next_cmd);
1463 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1464 "%s: cmd=%p; hdr.token=%d, cmd.token=%d\n",
1469 if (hdr->token == cmd->token) {
1470 /* Copy answer into caller's supplied buffer. */
1471 if (cmd->odata != NULL) {
1472 if (hdr->len != cmd->odatalen) {
1473 device_printf(sc->sc_dev,
1474 "%s: code 0x%02x, len=%d, olen=%d\n",
1478 (int) cmd->odatalen);
1480 memcpy(cmd->odata, &hdr[1],
1481 MIN(cmd->odatalen, hdr->len));
1486 STAILQ_INSERT_TAIL(&sc->sc_cmd_inactive, cmd, next_cmd);
1491 otus_cmd_rxeof(struct otus_softc *sc, uint8_t *buf, int len)
1493 struct ieee80211com *ic = &sc->sc_ic;
1494 struct ar_cmd_hdr *hdr;
1496 OTUS_LOCK_ASSERT(sc);
1498 if (__predict_false(len < sizeof (*hdr))) {
1499 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1500 "cmd too small %d\n", len);
1503 hdr = (struct ar_cmd_hdr *)buf;
1504 if (__predict_false(sizeof (*hdr) + hdr->len > len ||
1505 sizeof (*hdr) + hdr->len > 64)) {
1506 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1507 "cmd too large %d\n", hdr->len);
1511 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1517 * This has to reach into the cmd queue "waiting for
1518 * an RX response" list, grab the head entry and check
1519 * if we need to wake anyone up.
1521 if ((hdr->code & 0xc0) != 0xc0) {
1522 otus_cmd_handle_response(sc, hdr);
1526 /* Received unsolicited notification. */
1527 switch (hdr->code & 0x3f) {
1530 case AR_EVT_TX_COMP:
1532 struct ar_evt_tx_comp *tx = (struct ar_evt_tx_comp *)&hdr[1];
1533 struct ieee80211_node *ni;
1535 ni = ieee80211_find_node(&ic->ic_sta, tx->macaddr);
1537 device_printf(sc->sc_dev,
1538 "%s: txcomp on unknown node (%s)\n",
1540 ether_sprintf(tx->macaddr));
1544 OTUS_DPRINTF(sc, OTUS_DEBUG_TXCOMP,
1545 "tx completed %s status=%d phy=0x%x\n",
1546 ether_sprintf(tx->macaddr), le16toh(tx->status),
1549 switch (le16toh(tx->status)) {
1550 case AR_TX_STATUS_COMP:
1553 ieee80211_ratectl_tx_complete(ni->ni_vap, ni,
1554 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
1557 * We don't get the above; only error notifications.
1558 * Sigh. So, don't worry about this.
1561 case AR_TX_STATUS_RETRY_COMP:
1562 OTUS_NODE(ni)->tx_retries++;
1564 case AR_TX_STATUS_FAILED:
1565 OTUS_NODE(ni)->tx_err++;
1568 ieee80211_free_node(ni);
1573 case AR_EVT_DO_BB_RESET:
1575 * This is "tell driver to reset baseband" from ar9170-fw.
1577 * I'm not sure what we should do here, so I'm going to
1578 * fall through; it gets generated when RTSRetryCnt internally
1579 * reaches '5' - I guess the firmware authors thought that
1580 * meant that the BB may have gone deaf or something.
1583 device_printf(sc->sc_dev,
1584 "%s: received notification code=0x%02x len=%d\n",
1586 hdr->code, hdr->len);
1591 otus_sub_rxeof(struct otus_softc *sc, uint8_t *buf, int len, struct mbufq *rxq)
1593 struct ieee80211com *ic = &sc->sc_ic;
1594 struct ieee80211_rx_stats rxs;
1596 struct ieee80211_node *ni;
1598 struct ar_rx_tail *tail;
1599 struct ieee80211_frame *wh;
1605 if (__predict_false(len < AR_PLCP_HDR_LEN)) {
1606 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1607 "sub-xfer too short %d\n", len);
1612 /* All bits in the PLCP header are set to 1 for non-MPDU. */
1613 if (memcmp(plcp, AR_PLCP_HDR_INTR, AR_PLCP_HDR_LEN) == 0) {
1614 otus_cmd_rxeof(sc, plcp + AR_PLCP_HDR_LEN,
1615 len - AR_PLCP_HDR_LEN);
1619 /* Received MPDU. */
1620 if (__predict_false(len < AR_PLCP_HDR_LEN + sizeof (*tail))) {
1621 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "MPDU too short %d\n", len);
1622 counter_u64_add(ic->ic_ierrors, 1);
1625 tail = (struct ar_rx_tail *)(plcp + len - sizeof (*tail));
1627 /* Discard error frames; don't discard BAD_RA (eg monitor mode); let net80211 do that */
1628 if (__predict_false((tail->error & ~AR_RX_ERROR_BAD_RA) != 0)) {
1629 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "error frame 0x%02x\n", tail->error);
1630 if (tail->error & AR_RX_ERROR_FCS) {
1631 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE, "bad FCS\n");
1632 } else if (tail->error & AR_RX_ERROR_MMIC) {
1633 /* Report Michael MIC failures to net80211. */
1635 ieee80211_notify_michael_failure(ni->ni_vap, wh, keyidx);
1637 device_printf(sc->sc_dev, "%s: MIC failure\n", __func__);
1639 counter_u64_add(ic->ic_ierrors, 1);
1642 /* Compute MPDU's length. */
1643 mlen = len - AR_PLCP_HDR_LEN - sizeof (*tail);
1644 /* Make sure there's room for an 802.11 header + FCS. */
1645 if (__predict_false(mlen < IEEE80211_MIN_LEN)) {
1646 counter_u64_add(ic->ic_ierrors, 1);
1649 mlen -= IEEE80211_CRC_LEN; /* strip 802.11 FCS */
1651 wh = (struct ieee80211_frame *)(plcp + AR_PLCP_HDR_LEN);
1654 * TODO: I see > 2KiB buffers in this path; is it A-MSDU or something?
1656 m = m_get2(mlen, M_NOWAIT, MT_DATA, M_PKTHDR);
1658 device_printf(sc->sc_dev, "%s: failed m_get2() (mlen=%d)\n", __func__, mlen);
1659 counter_u64_add(ic->ic_ierrors, 1);
1663 /* Finalize mbuf. */
1664 memcpy(mtod(m, uint8_t *), wh, mlen);
1665 m->m_pkthdr.len = m->m_len = mlen;
1668 if (__predict_false(sc->sc_drvbpf != NULL)) {
1669 struct otus_rx_radiotap_header *tap = &sc->sc_rxtap;
1673 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1674 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1675 tap->wr_antsignal = tail->rssi;
1676 tap->wr_rate = 2; /* In case it can't be found below. */
1677 switch (tail->status & AR_RX_STATUS_MT_MASK) {
1678 case AR_RX_STATUS_MT_CCK:
1680 case 10: tap->wr_rate = 2; break;
1681 case 20: tap->wr_rate = 4; break;
1682 case 55: tap->wr_rate = 11; break;
1683 case 110: tap->wr_rate = 22; break;
1685 if (tail->status & AR_RX_STATUS_SHPREAMBLE)
1686 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1688 case AR_RX_STATUS_MT_OFDM:
1689 switch (plcp[0] & 0xf) {
1690 case 0xb: tap->wr_rate = 12; break;
1691 case 0xf: tap->wr_rate = 18; break;
1692 case 0xa: tap->wr_rate = 24; break;
1693 case 0xe: tap->wr_rate = 36; break;
1694 case 0x9: tap->wr_rate = 48; break;
1695 case 0xd: tap->wr_rate = 72; break;
1696 case 0x8: tap->wr_rate = 96; break;
1697 case 0xc: tap->wr_rate = 108; break;
1701 mb.m_data = (caddr_t)tap;
1703 mb.m_nextpkt = NULL;
1706 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN);
1710 /* Add RSSI/NF to this mbuf */
1711 bzero(&rxs, sizeof(rxs));
1712 rxs.r_flags = IEEE80211_R_NF | IEEE80211_R_RSSI;
1713 rxs.c_nf = sc->sc_nf[0]; /* XXX chain 0 != combined rssi/nf */
1714 rxs.c_rssi = tail->rssi;
1715 /* XXX TODO: add MIMO RSSI/NF as well */
1716 if (ieee80211_add_rx_params(m, &rxs) == 0) {
1717 counter_u64_add(ic->ic_ierrors, 1);
1721 /* XXX make a method */
1722 STAILQ_INSERT_TAIL(&rxq->mq_head, m, m_stailqpkt);
1726 ni = ieee80211_find_rxnode(ic, wh);
1728 rxi.rxi_rssi = tail->rssi;
1729 rxi.rxi_tstamp = 0; /* unused */
1730 ieee80211_input(ifp, m, ni, &rxi);
1732 /* Node is no longer needed. */
1733 ieee80211_release_node(ic, ni);
1739 otus_rxeof(struct usb_xfer *xfer, struct otus_data *data, struct mbufq *rxq)
1741 struct otus_softc *sc = usbd_xfer_softc(xfer);
1742 caddr_t buf = data->buf;
1743 struct ar_rx_head *head;
1747 usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
1749 while (len >= sizeof (*head)) {
1750 head = (struct ar_rx_head *)buf;
1751 if (__predict_false(head->tag != htole16(AR_RX_HEAD_TAG))) {
1752 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1753 "tag not valid 0x%x\n", le16toh(head->tag));
1756 hlen = le16toh(head->len);
1757 if (__predict_false(sizeof (*head) + hlen > len)) {
1758 OTUS_DPRINTF(sc, OTUS_DEBUG_RXDONE,
1759 "xfer too short %d/%d\n", len, hlen);
1762 /* Process sub-xfer. */
1763 otus_sub_rxeof(sc, (uint8_t *)&head[1], hlen, rxq);
1765 /* Next sub-xfer is aligned on a 32-bit boundary. */
1766 hlen = (sizeof (*head) + hlen + 3) & ~3;
1773 otus_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error)
1775 struct otus_softc *sc = usbd_xfer_softc(xfer);
1776 struct ieee80211com *ic = &sc->sc_ic;
1777 struct ieee80211_frame *wh;
1778 struct ieee80211_node *ni;
1781 struct otus_data *data;
1783 OTUS_LOCK_ASSERT(sc);
1785 mbufq_init(&scrx, 1024);
1788 device_printf(sc->sc_dev, "%s: called; state=%d; error=%d\n",
1790 USB_GET_STATE(xfer),
1794 switch (USB_GET_STATE(xfer)) {
1795 case USB_ST_TRANSFERRED:
1796 data = STAILQ_FIRST(&sc->sc_rx_active);
1799 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1800 otus_rxeof(xfer, data, &scrx);
1801 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1806 * XXX TODO: what if sc_rx isn't empty, but data
1807 * is empty? Then we leak mbufs.
1809 data = STAILQ_FIRST(&sc->sc_rx_inactive);
1811 //KASSERT(m == NULL, ("mbuf isn't NULL"));
1814 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next);
1815 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next);
1816 usbd_xfer_set_frame_data(xfer, 0, data->buf,
1817 usbd_xfer_max_len(xfer));
1818 usbd_transfer_submit(xfer);
1820 * To avoid LOR we should unlock our private mutex here to call
1821 * ieee80211_input() because here is at the end of a USB
1822 * callback and safe to unlock.
1825 while ((m = mbufq_dequeue(&scrx)) != NULL) {
1826 wh = mtod(m, struct ieee80211_frame *);
1827 ni = ieee80211_find_rxnode(ic,
1828 (struct ieee80211_frame_min *)wh);
1830 if (ni->ni_flags & IEEE80211_NODE_HT)
1831 m->m_flags |= M_AMPDU;
1832 (void)ieee80211_input_mimo(ni, m);
1833 ieee80211_free_node(ni);
1835 (void)ieee80211_input_mimo_all(ic, m);
1837 #ifdef IEEE80211_SUPPORT_SUPERG
1838 ieee80211_ff_age_all(ic, 100);
1843 /* needs it to the inactive queue due to a error. */
1844 data = STAILQ_FIRST(&sc->sc_rx_active);
1846 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next);
1847 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next);
1849 if (error != USB_ERR_CANCELLED) {
1850 usbd_xfer_set_stall(xfer);
1851 counter_u64_add(ic->ic_ierrors, 1);
1859 otus_txeof(struct usb_xfer *xfer, struct otus_data *data)
1861 struct otus_softc *sc = usbd_xfer_softc(xfer);
1863 OTUS_DPRINTF(sc, OTUS_DEBUG_TXDONE,
1864 "%s: called; data=%p\n", __func__, data);
1866 OTUS_LOCK_ASSERT(sc);
1868 if (sc->sc_tx_n_active == 0) {
1869 device_printf(sc->sc_dev,
1870 "%s: completed but tx_active=0\n",
1873 sc->sc_tx_n_active--;
1878 /* XXX we get TX status via the RX path.. */
1879 ieee80211_tx_complete(data->ni, data->m, 0);
1886 otus_txcmdeof(struct usb_xfer *xfer, struct otus_tx_cmd *cmd)
1888 struct otus_softc *sc = usbd_xfer_softc(xfer);
1890 OTUS_LOCK_ASSERT(sc);
1892 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
1893 "%s: called; data=%p; odata=%p\n",
1894 __func__, cmd, cmd->odata);
1897 * Non-response commands still need wakeup so the caller
1898 * knows it was submitted and completed OK; response commands should
1899 * wait until they're ACKed by the firmware with a response.
1902 STAILQ_INSERT_TAIL(&sc->sc_cmd_waiting, cmd, next_cmd);
1905 otus_free_txcmd(sc, cmd);
1910 otus_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error)
1912 uint8_t which = OTUS_BULK_TX;
1913 struct otus_softc *sc = usbd_xfer_softc(xfer);
1914 struct ieee80211com *ic = &sc->sc_ic;
1915 struct otus_data *data;
1917 OTUS_LOCK_ASSERT(sc);
1919 switch (USB_GET_STATE(xfer)) {
1920 case USB_ST_TRANSFERRED:
1921 data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1924 OTUS_DPRINTF(sc, OTUS_DEBUG_TXDONE,
1925 "%s: transfer done %p\n", __func__, data);
1926 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1927 otus_txeof(xfer, data);
1928 otus_freebuf(sc, data);
1932 data = STAILQ_FIRST(&sc->sc_tx_pending[which]);
1934 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
1935 "%s: empty pending queue sc %p\n", __func__, sc);
1936 sc->sc_tx_n_active = 0;
1939 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending[which], next);
1940 STAILQ_INSERT_TAIL(&sc->sc_tx_active[which], data, next);
1941 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen);
1942 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
1943 "%s: submitting transfer %p\n", __func__, data);
1944 usbd_transfer_submit(xfer);
1945 sc->sc_tx_n_active++;
1948 data = STAILQ_FIRST(&sc->sc_tx_active[which]);
1950 STAILQ_REMOVE_HEAD(&sc->sc_tx_active[which], next);
1951 otus_txeof(xfer, data);
1952 otus_freebuf(sc, data);
1954 counter_u64_add(ic->ic_oerrors, 1);
1956 if (error != USB_ERR_CANCELLED) {
1957 usbd_xfer_set_stall(xfer);
1964 #ifdef IEEE80211_SUPPORT_SUPERG
1966 * If the TX active queue drops below a certain
1967 * threshold, ensure we age fast-frames out so they're
1970 if (sc->sc_tx_n_active < 2) {
1971 /* XXX ew - net80211 should defer this for us! */
1973 ieee80211_ff_flush(ic, WME_AC_VO);
1974 ieee80211_ff_flush(ic, WME_AC_VI);
1975 ieee80211_ff_flush(ic, WME_AC_BE);
1976 ieee80211_ff_flush(ic, WME_AC_BK);
1985 otus_bulk_cmd_callback(struct usb_xfer *xfer, usb_error_t error)
1987 struct otus_softc *sc = usbd_xfer_softc(xfer);
1989 struct ieee80211com *ic = &sc->sc_ic;
1991 struct otus_tx_cmd *cmd;
1993 OTUS_LOCK_ASSERT(sc);
1995 switch (USB_GET_STATE(xfer)) {
1996 case USB_ST_TRANSFERRED:
1997 cmd = STAILQ_FIRST(&sc->sc_cmd_active);
2000 OTUS_DPRINTF(sc, OTUS_DEBUG_CMDDONE,
2001 "%s: transfer done %p\n", __func__, cmd);
2002 STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next_cmd);
2003 otus_txcmdeof(xfer, cmd);
2007 cmd = STAILQ_FIRST(&sc->sc_cmd_pending);
2009 OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
2010 "%s: empty pending queue sc %p\n", __func__, sc);
2013 STAILQ_REMOVE_HEAD(&sc->sc_cmd_pending, next_cmd);
2014 STAILQ_INSERT_TAIL(&sc->sc_cmd_active, cmd, next_cmd);
2015 usbd_xfer_set_frame_data(xfer, 0, cmd->buf, cmd->buflen);
2016 OTUS_DPRINTF(sc, OTUS_DEBUG_CMD,
2017 "%s: submitting transfer %p; buf=%p, buflen=%d\n", __func__, cmd, cmd->buf, cmd->buflen);
2018 usbd_transfer_submit(xfer);
2021 cmd = STAILQ_FIRST(&sc->sc_cmd_active);
2023 STAILQ_REMOVE_HEAD(&sc->sc_cmd_active, next_cmd);
2024 otus_txcmdeof(xfer, cmd);
2027 if (error != USB_ERR_CANCELLED) {
2028 usbd_xfer_set_stall(xfer);
2036 * This isn't used by carl9170; it however may be used by the
2037 * initial bootloader.
2040 otus_bulk_irq_callback(struct usb_xfer *xfer, usb_error_t error)
2042 struct otus_softc *sc = usbd_xfer_softc(xfer);
2046 usbd_xfer_status(xfer, &actlen, &sumlen, NULL, NULL);
2047 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ,
2048 "%s: called; state=%d\n", __func__, USB_GET_STATE(xfer));
2050 switch (USB_GET_STATE(xfer)) {
2051 case USB_ST_TRANSFERRED:
2053 * Read usb frame data, if any.
2054 * "actlen" has the total length for all frames
2057 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ,
2058 "%s: comp; %d bytes\n",
2062 pc = usbd_xfer_get_frame(xfer, 0);
2063 otus_dump_usb_rx_page(sc, pc, actlen);
2065 /* XXX fallthrough */
2068 * Setup xfer frame lengths/count and data
2070 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ, "%s: setup\n", __func__);
2071 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
2072 usbd_transfer_submit(xfer);
2075 default: /* Error */
2077 * Print error message and clear stall
2080 OTUS_DPRINTF(sc, OTUS_DEBUG_IRQ, "%s: ERROR?\n", __func__);
2086 * Map net80211 rate to hw rate for otus MAC/PHY.
2089 otus_rate_to_hw_rate(struct otus_softc *sc, uint8_t rate)
2093 is_2ghz = !! (IEEE80211_IS_CHAN_2GHZ(sc->sc_ic.ic_curchan));
2123 device_printf(sc->sc_dev, "%s: unknown rate '%d'\n",
2124 __func__, (int) rate);
2127 return (0x0); /* 1MB CCK */
2129 return (0xb); /* 6MB OFDM */
2136 otus_hw_rate_is_ofdm(struct otus_softc *sc, uint8_t hw_rate)
2152 otus_tx_update_ratectl(struct otus_softc *sc, struct ieee80211_node *ni)
2154 struct ieee80211_ratectl_tx_stats *txs = &sc->sc_txs;
2155 struct otus_node *on = OTUS_NODE(ni);
2157 txs->flags = IEEE80211_RATECTL_TX_STATS_NODE |
2158 IEEE80211_RATECTL_TX_STATS_RETRIES;
2160 txs->nframes = on->tx_done;
2161 txs->nsuccess = on->tx_done - on->tx_err;
2162 txs->nretries = on->tx_retries;
2164 ieee80211_ratectl_tx_update(ni->ni_vap, txs);
2165 on->tx_done = on->tx_err = on->tx_retries = 0;
2169 * XXX TODO: support tx bpf parameters for configuration!
2173 * ac = params->ibp_pri & 3;
2174 * rate = params->ibp_rate0;
2175 * params->ibp_flags & IEEE80211_BPF_NOACK
2176 * params->ibp_flags & IEEE80211_BPF_RTS
2177 * params->ibp_flags & IEEE80211_BPF_CTS
2178 * tx->rts_ntries = params->ibp_try1;
2179 * tx->data_ntries = params->ibp_try0;
2182 otus_tx(struct otus_softc *sc, struct ieee80211_node *ni, struct mbuf *m,
2183 struct otus_data *data, const struct ieee80211_bpf_params *params)
2185 struct ieee80211com *ic = &sc->sc_ic;
2186 struct ieee80211vap *vap = ni->ni_vap;
2187 struct ieee80211_frame *wh;
2188 struct ieee80211_key *k;
2189 struct ar_tx_head *head;
2191 uint16_t macctl, qos;
2193 int hasqos, xferlen;
2195 wh = mtod(m, struct ieee80211_frame *);
2196 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
2197 k = ieee80211_crypto_encap(ni, m);
2199 device_printf(sc->sc_dev,
2200 "%s: m=%p: ieee80211_crypto_encap returns NULL\n",
2205 wh = mtod(m, struct ieee80211_frame *);
2208 /* Calculate transfer length; ensure data buffer is large enough */
2209 xferlen = sizeof (*head) + m->m_pkthdr.len;
2210 if (xferlen > OTUS_TXBUFSZ) {
2211 device_printf(sc->sc_dev,
2212 "%s: 802.11 TX frame is %d bytes, max %d bytes\n",
2219 hasqos = !! IEEE80211_QOS_HAS_SEQ(wh);
2223 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
2224 tid = qos & IEEE80211_QOS_TID;
2225 qid = TID_TO_WME_AC(tid);
2231 /* Pickup a rate index. */
2232 if (params != NULL) {
2233 rate = otus_rate_to_hw_rate(sc, params->ibp_rate0);
2234 } else if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
2235 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_DATA) {
2236 /* Get lowest rate */
2237 rate = otus_rate_to_hw_rate(sc, 0);
2238 } else if (m->m_flags & M_EAPOL) {
2239 /* Get lowest rate */
2240 rate = otus_rate_to_hw_rate(sc, 0);
2242 (void) ieee80211_ratectl_rate(ni, NULL, 0);
2243 rate = otus_rate_to_hw_rate(sc, ni->ni_txrate);
2247 macctl = AR_TX_MAC_BACKOFF | AR_TX_MAC_HW_DUR | AR_TX_MAC_QID(qid);
2250 * XXX TODO: params for NOACK, ACK, RTS, CTS, etc
2252 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
2253 (hasqos && ((qos & IEEE80211_QOS_ACKPOLICY) ==
2254 IEEE80211_QOS_ACKPOLICY_NOACK)))
2255 macctl |= AR_TX_MAC_NOACK;
2257 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2258 if (m->m_pkthdr.len + IEEE80211_CRC_LEN >= vap->iv_rtsthreshold)
2259 macctl |= AR_TX_MAC_RTS;
2260 else if (ic->ic_flags & IEEE80211_F_USEPROT) {
2261 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2262 macctl |= AR_TX_MAC_CTS;
2263 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2264 macctl |= AR_TX_MAC_RTS;
2268 phyctl |= AR_TX_PHY_MCS(rate);
2269 if (otus_hw_rate_is_ofdm(sc, rate)) {
2270 phyctl |= AR_TX_PHY_MT_OFDM;
2271 /* Always use all tx antennas for now, just to be safe */
2272 phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
2274 phyctl |= AR_TX_PHY_MT_CCK;
2275 phyctl |= AR_TX_PHY_ANTMSK(sc->txmask);
2278 /* Update net80211 with the current counters */
2279 otus_tx_update_ratectl(sc, ni);
2281 /* Update rate control stats for frames that are ACK'ed. */
2282 if (!(macctl & AR_TX_MAC_NOACK))
2283 OTUS_NODE(ni)->tx_done++;
2286 /* Fill Tx descriptor. */
2287 head = (struct ar_tx_head *)data->buf;
2288 head->len = htole16(m->m_pkthdr.len + IEEE80211_CRC_LEN);
2289 head->macctl = htole16(macctl);
2290 head->phyctl = htole32(phyctl);
2292 m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&head[1]);
2294 data->buflen = xferlen;
2298 OTUS_DPRINTF(sc, OTUS_DEBUG_XMIT,
2299 "%s: tx: m=%p; data=%p; len=%d mac=0x%04x phy=0x%08x rate=0x%02x, ni_txrate=%d\n",
2300 __func__, m, data, le16toh(head->len), macctl, phyctl,
2301 (int) rate, (int) ni->ni_txrate);
2303 /* Submit transfer */
2304 STAILQ_INSERT_TAIL(&sc->sc_tx_pending[OTUS_BULK_TX], data, next);
2305 usbd_transfer_start(sc->sc_xfer[OTUS_BULK_TX]);
2311 otus_set_multi(struct otus_softc *sc)
2314 struct ieee80211com *ic = &sc->sc_ic;
2317 if (ic->ic_allmulti > 0 || ic->ic_promisc > 0 ||
2318 ic->ic_opmode == IEEE80211_M_MONITOR) {
2322 struct ieee80211vap *vap;
2324 struct ifmultiaddr *ifma;
2327 TAILQ_FOREACH(vap, &ic->ic_vaps, iv_next) {
2329 if_maddr_rlock(ifp);
2330 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2334 dl = LLADDR((struct sockaddr_dl *) ifma->ifma_addr);
2335 val = le32dec(dl + 4);
2336 /* Get address byte 5 */
2337 val = val & 0x0000ff00;
2340 /* As per below, shift it >> 2 to get only 6 bits */
2345 hi |= 1 << (val - 32);
2347 if_maddr_runlock(ifp);
2351 /* XXX openbsd code */
2352 while (enm != NULL) {
2353 bit = enm->enm_addrlo[5] >> 2;
2357 hi |= 1 << (bit - 32);
2358 ETHER_NEXT_MULTI(step, enm);
2362 hi |= 1U << 31; /* Make sure the broadcast bit is set. */
2365 otus_write(sc, AR_MAC_REG_GROUP_HASH_TBL_L, lo);
2366 otus_write(sc, AR_MAC_REG_GROUP_HASH_TBL_H, hi);
2367 r = otus_write_barrier(sc);
2368 /* XXX operating mode? filter? */
2374 otus_updateedca(struct ieee80211com *ic)
2376 struct otus_softc *sc = ic->ic_softc;
2380 * XXX TODO: take temporary copy of EDCA information
2381 * when scheduling this so we have a more time-correct view
2383 * XXX TODO: this can be done on the net80211 level
2385 otus_updateedca_locked(sc);
2391 otus_updateedca_locked(struct otus_softc *sc)
2393 #define EXP2(val) ((1 << (val)) - 1)
2394 #define AIFS(val) ((val) * 9 + 10)
2395 struct ieee80211com *ic = &sc->sc_ic;
2396 const struct wmeParams *edca;
2398 OTUS_LOCK_ASSERT(sc);
2400 edca = ic->ic_wme.wme_chanParams.cap_wmeParams;
2402 /* Set CWmin/CWmax values. */
2403 otus_write(sc, AR_MAC_REG_AC0_CW,
2404 EXP2(edca[WME_AC_BE].wmep_logcwmax) << 16 |
2405 EXP2(edca[WME_AC_BE].wmep_logcwmin));
2406 otus_write(sc, AR_MAC_REG_AC1_CW,
2407 EXP2(edca[WME_AC_BK].wmep_logcwmax) << 16 |
2408 EXP2(edca[WME_AC_BK].wmep_logcwmin));
2409 otus_write(sc, AR_MAC_REG_AC2_CW,
2410 EXP2(edca[WME_AC_VI].wmep_logcwmax) << 16 |
2411 EXP2(edca[WME_AC_VI].wmep_logcwmin));
2412 otus_write(sc, AR_MAC_REG_AC3_CW,
2413 EXP2(edca[WME_AC_VO].wmep_logcwmax) << 16 |
2414 EXP2(edca[WME_AC_VO].wmep_logcwmin));
2415 otus_write(sc, AR_MAC_REG_AC4_CW, /* Special TXQ. */
2416 EXP2(edca[WME_AC_VO].wmep_logcwmax) << 16 |
2417 EXP2(edca[WME_AC_VO].wmep_logcwmin));
2419 /* Set AIFSN values. */
2420 otus_write(sc, AR_MAC_REG_AC1_AC0_AIFS,
2421 AIFS(edca[WME_AC_VI].wmep_aifsn) << 24 |
2422 AIFS(edca[WME_AC_BK].wmep_aifsn) << 12 |
2423 AIFS(edca[WME_AC_BE].wmep_aifsn));
2424 otus_write(sc, AR_MAC_REG_AC3_AC2_AIFS,
2425 AIFS(edca[WME_AC_VO].wmep_aifsn) << 16 | /* Special TXQ. */
2426 AIFS(edca[WME_AC_VO].wmep_aifsn) << 4 |
2427 AIFS(edca[WME_AC_VI].wmep_aifsn) >> 8);
2429 /* Set TXOP limit. */
2430 otus_write(sc, AR_MAC_REG_AC1_AC0_TXOP,
2431 edca[WME_AC_BK].wmep_txopLimit << 16 |
2432 edca[WME_AC_BE].wmep_txopLimit);
2433 otus_write(sc, AR_MAC_REG_AC3_AC2_TXOP,
2434 edca[WME_AC_VO].wmep_txopLimit << 16 |
2435 edca[WME_AC_VI].wmep_txopLimit);
2437 /* XXX ACK policy? */
2439 (void)otus_write_barrier(sc);
2446 otus_updateslot(struct otus_softc *sc)
2448 struct ieee80211com *ic = &sc->sc_ic;
2451 OTUS_LOCK_ASSERT(sc);
2453 slottime = IEEE80211_GET_SLOTTIME(ic);
2454 otus_write(sc, AR_MAC_REG_SLOT_TIME, slottime << 10);
2455 (void)otus_write_barrier(sc);
2459 otus_init_mac(struct otus_softc *sc)
2463 OTUS_LOCK_ASSERT(sc);
2465 otus_write(sc, AR_MAC_REG_ACK_EXTENSION, 0x40);
2466 otus_write(sc, AR_MAC_REG_RETRY_MAX, 0);
2467 otus_write(sc, AR_MAC_REG_RX_THRESHOLD, 0xc1f80);
2468 otus_write(sc, AR_MAC_REG_RX_PE_DELAY, 0x70);
2469 otus_write(sc, AR_MAC_REG_EIFS_AND_SIFS, 0xa144000);
2470 otus_write(sc, AR_MAC_REG_SLOT_TIME, 9 << 10);
2471 otus_write(sc, AR_MAC_REG_TID_CFACK_CFEND_RATE, 0x19000000);
2472 /* NAV protects ACK only (in TXOP). */
2473 otus_write(sc, AR_MAC_REG_TXOP_DURATION, 0x201);
2474 /* Set beacon Tx power to 0x7. */
2475 otus_write(sc, AR_MAC_REG_BCN_HT1, 0x8000170);
2476 otus_write(sc, AR_MAC_REG_BACKOFF_PROTECT, 0x105);
2477 otus_write(sc, AR_MAC_REG_AMPDU_FACTOR, 0x10000a);
2479 otus_set_rx_filter(sc);
2481 otus_write(sc, AR_MAC_REG_BASIC_RATE, 0x150f);
2482 otus_write(sc, AR_MAC_REG_MANDATORY_RATE, 0x150f);
2483 otus_write(sc, AR_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
2484 otus_write(sc, AR_MAC_REG_ACK_TPC, 0x4003c1e);
2486 /* Enable LED0 and LED1. */
2487 otus_write(sc, AR_GPIO_REG_PORT_TYPE, 0x3);
2488 otus_write(sc, AR_GPIO_REG_PORT_DATA, 0x3);
2489 /* Switch MAC to OTUS interface. */
2490 otus_write(sc, 0x1c3600, 0x3);
2491 otus_write(sc, AR_MAC_REG_AMPDU_RX_THRESH, 0xffff);
2492 otus_write(sc, AR_MAC_REG_MISC_680, 0xf00008);
2493 /* Disable Rx timeout (workaround). */
2494 otus_write(sc, AR_MAC_REG_RX_TIMEOUT, 0);
2496 /* Set USB Rx stream mode maximum frame number to 2. */
2497 otus_write(sc, 0x1e1110, 0x4);
2498 /* Set USB Rx stream mode timeout to 10us. */
2499 otus_write(sc, 0x1e1114, 0x80);
2501 /* Set clock frequency to 88/80MHz. */
2502 otus_write(sc, AR_PWR_REG_CLOCK_SEL, 0x73);
2503 /* Set WLAN DMA interrupt mode: generate intr per packet. */
2504 otus_write(sc, AR_MAC_REG_TXRX_MPI, 0x110011);
2505 otus_write(sc, AR_MAC_REG_FCS_SELECT, 0x4);
2506 otus_write(sc, AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION, 0x141e0f48);
2508 /* Disable HW decryption for now. */
2509 otus_write(sc, AR_MAC_REG_ENCRYPTION, 0x78);
2511 if ((error = otus_write_barrier(sc)) != 0)
2514 /* Set default EDCA parameters. */
2515 otus_updateedca_locked(sc);
2521 * Return default value for PHY register based on current operating mode.
2524 otus_phy_get_def(struct otus_softc *sc, uint32_t reg)
2528 for (i = 0; i < nitems(ar5416_phy_regs); i++)
2529 if (AR_PHY(ar5416_phy_regs[i]) == reg)
2530 return sc->phy_vals[i];
2531 return 0; /* Register not found. */
2535 * Update PHY's programming based on vendor-specific data stored in EEPROM.
2536 * This is for FEM-type devices only.
2539 otus_set_board_values(struct otus_softc *sc, struct ieee80211_channel *c)
2541 const struct ModalEepHeader *eep;
2542 uint32_t tmp, offset;
2544 if (IEEE80211_IS_CHAN_5GHZ(c))
2545 eep = &sc->eeprom.modalHeader[0];
2547 eep = &sc->eeprom.modalHeader[1];
2549 /* Offset of chain 2. */
2550 offset = 2 * 0x1000;
2552 tmp = le32toh(eep->antCtrlCommon);
2553 otus_write(sc, AR_PHY_SWITCH_COM, tmp);
2555 tmp = le32toh(eep->antCtrlChain[0]);
2556 otus_write(sc, AR_PHY_SWITCH_CHAIN_0, tmp);
2558 tmp = le32toh(eep->antCtrlChain[1]);
2559 otus_write(sc, AR_PHY_SWITCH_CHAIN_0 + offset, tmp);
2561 if (1 /* sc->sc_sco == AR_SCO_SCN */) {
2562 tmp = otus_phy_get_def(sc, AR_PHY_SETTLING);
2563 tmp &= ~(0x7f << 7);
2564 tmp |= (eep->switchSettling & 0x7f) << 7;
2565 otus_write(sc, AR_PHY_SETTLING, tmp);
2568 tmp = otus_phy_get_def(sc, AR_PHY_DESIRED_SZ);
2570 tmp |= eep->pgaDesiredSize << 8 | eep->adcDesiredSize;
2571 otus_write(sc, AR_PHY_DESIRED_SZ, tmp);
2573 tmp = eep->txEndToXpaOff << 24 | eep->txEndToXpaOff << 16 |
2574 eep->txFrameToXpaOn << 8 | eep->txFrameToXpaOn;
2575 otus_write(sc, AR_PHY_RF_CTL4, tmp);
2577 tmp = otus_phy_get_def(sc, AR_PHY_RF_CTL3);
2578 tmp &= ~(0xff << 16);
2579 tmp |= eep->txEndToRxOn << 16;
2580 otus_write(sc, AR_PHY_RF_CTL3, tmp);
2582 tmp = otus_phy_get_def(sc, AR_PHY_CCA);
2583 tmp &= ~(0x7f << 12);
2584 tmp |= (eep->thresh62 & 0x7f) << 12;
2585 otus_write(sc, AR_PHY_CCA, tmp);
2587 tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN);
2588 tmp &= ~(0x3f << 12);
2589 tmp |= (eep->txRxAttenCh[0] & 0x3f) << 12;
2590 otus_write(sc, AR_PHY_RXGAIN, tmp);
2592 tmp = otus_phy_get_def(sc, AR_PHY_RXGAIN + offset);
2593 tmp &= ~(0x3f << 12);
2594 tmp |= (eep->txRxAttenCh[1] & 0x3f) << 12;
2595 otus_write(sc, AR_PHY_RXGAIN + offset, tmp);
2597 tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ);
2598 tmp &= ~(0x3f << 18);
2599 tmp |= (eep->rxTxMarginCh[0] & 0x3f) << 18;
2600 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2601 tmp &= ~(0xf << 10);
2602 tmp |= (eep->bswMargin[0] & 0xf) << 10;
2604 otus_write(sc, AR_PHY_GAIN_2GHZ, tmp);
2606 tmp = otus_phy_get_def(sc, AR_PHY_GAIN_2GHZ + offset);
2607 tmp &= ~(0x3f << 18);
2608 tmp |= (eep->rxTxMarginCh[1] & 0x3f) << 18;
2609 otus_write(sc, AR_PHY_GAIN_2GHZ + offset, tmp);
2611 tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4);
2612 tmp &= ~(0x3f << 5 | 0x1f);
2613 tmp |= (eep->iqCalICh[0] & 0x3f) << 5 | (eep->iqCalQCh[0] & 0x1f);
2614 otus_write(sc, AR_PHY_TIMING_CTRL4, tmp);
2616 tmp = otus_phy_get_def(sc, AR_PHY_TIMING_CTRL4 + offset);
2617 tmp &= ~(0x3f << 5 | 0x1f);
2618 tmp |= (eep->iqCalICh[1] & 0x3f) << 5 | (eep->iqCalQCh[1] & 0x1f);
2619 otus_write(sc, AR_PHY_TIMING_CTRL4 + offset, tmp);
2621 tmp = otus_phy_get_def(sc, AR_PHY_TPCRG1);
2622 tmp &= ~(0xf << 16);
2623 tmp |= (eep->xpd & 0xf) << 16;
2624 otus_write(sc, AR_PHY_TPCRG1, tmp);
2626 return otus_write_barrier(sc);
2630 otus_program_phy(struct otus_softc *sc, struct ieee80211_channel *c)
2632 const uint32_t *vals;
2635 /* Select PHY programming based on band and bandwidth. */
2636 if (IEEE80211_IS_CHAN_2GHZ(c))
2637 vals = ar5416_phy_vals_2ghz_20mhz;
2639 vals = ar5416_phy_vals_5ghz_20mhz;
2640 for (i = 0; i < nitems(ar5416_phy_regs); i++)
2641 otus_write(sc, AR_PHY(ar5416_phy_regs[i]), vals[i]);
2642 sc->phy_vals = vals;
2644 if (sc->eeprom.baseEepHeader.deviceType == 0x80) /* FEM */
2645 if ((error = otus_set_board_values(sc, c)) != 0)
2648 /* Initial Tx power settings. */
2649 otus_write(sc, AR_PHY_POWER_TX_RATE_MAX, 0x7f);
2650 otus_write(sc, AR_PHY_POWER_TX_RATE1, 0x3f3f3f3f);
2651 otus_write(sc, AR_PHY_POWER_TX_RATE2, 0x3f3f3f3f);
2652 otus_write(sc, AR_PHY_POWER_TX_RATE3, 0x3f3f3f3f);
2653 otus_write(sc, AR_PHY_POWER_TX_RATE4, 0x3f3f3f3f);
2654 otus_write(sc, AR_PHY_POWER_TX_RATE5, 0x3f3f3f3f);
2655 otus_write(sc, AR_PHY_POWER_TX_RATE6, 0x3f3f3f3f);
2656 otus_write(sc, AR_PHY_POWER_TX_RATE7, 0x3f3f3f3f);
2657 otus_write(sc, AR_PHY_POWER_TX_RATE8, 0x3f3f3f3f);
2658 otus_write(sc, AR_PHY_POWER_TX_RATE9, 0x3f3f3f3f);
2660 if (IEEE80211_IS_CHAN_2GHZ(c))
2661 otus_write(sc, AR_PWR_REG_PLL_ADDAC, 0x5163);
2663 otus_write(sc, AR_PWR_REG_PLL_ADDAC, 0x5143);
2665 return otus_write_barrier(sc);
2668 static __inline uint8_t
2669 otus_reverse_bits(uint8_t v)
2671 v = ((v >> 1) & 0x55) | ((v & 0x55) << 1);
2672 v = ((v >> 2) & 0x33) | ((v & 0x33) << 2);
2673 v = ((v >> 4) & 0x0f) | ((v & 0x0f) << 4);
2678 otus_set_rf_bank4(struct otus_softc *sc, struct ieee80211_channel *c)
2680 uint8_t chansel, d0, d1;
2684 OTUS_LOCK_ASSERT(sc);
2687 if (IEEE80211_IS_CHAN_5GHZ(c)) {
2688 chansel = (c->ic_freq - 4800) / 5;
2690 d0 |= AR_BANK4_AMODE_REFSEL(2);
2692 d0 |= AR_BANK4_AMODE_REFSEL(1);
2694 d0 |= AR_BANK4_AMODE_REFSEL(2);
2695 if (c->ic_freq == 2484) { /* CH 14 */
2696 d0 |= AR_BANK4_BMODE_LF_SYNTH_FREQ;
2697 chansel = 10 + (c->ic_freq - 2274) / 5;
2699 chansel = 16 + (c->ic_freq - 2272) / 5;
2702 d0 |= AR_BANK4_ADDR(1) | AR_BANK4_CHUP;
2703 d1 = otus_reverse_bits(chansel);
2705 /* Write bits 0-4 of d0 and d1. */
2706 data = (d1 & 0x1f) << 5 | (d0 & 0x1f);
2707 otus_write(sc, AR_PHY(44), data);
2708 /* Write bits 5-7 of d0 and d1. */
2709 data = (d1 >> 5) << 5 | (d0 >> 5);
2710 otus_write(sc, AR_PHY(58), data);
2712 if ((error = otus_write_barrier(sc)) == 0)
2713 otus_delay_ms(sc, 10);
2718 otus_get_delta_slope(uint32_t coeff, uint32_t *exponent, uint32_t *mantissa)
2720 #define COEFF_SCALE_SHIFT 24
2723 /* exponent = 14 - floor(log2(coeff)) */
2724 for (exp = 31; exp > 0; exp--)
2725 if (coeff & (1 << exp))
2727 KASSERT(exp != 0, ("exp"));
2728 exp = 14 - (exp - COEFF_SCALE_SHIFT);
2730 /* mantissa = floor(coeff * 2^exponent + 0.5) */
2731 man = coeff + (1 << (COEFF_SCALE_SHIFT - exp - 1));
2733 *mantissa = man >> (COEFF_SCALE_SHIFT - exp);
2734 *exponent = exp - 16;
2735 #undef COEFF_SCALE_SHIFT
2739 otus_set_chan(struct otus_softc *sc, struct ieee80211_channel *c, int assoc)
2741 struct ieee80211com *ic = &sc->sc_ic;
2742 struct ar_cmd_frequency cmd;
2743 struct ar_rsp_frequency rsp;
2744 const uint32_t *vals;
2745 uint32_t coeff, exp, man, tmp;
2750 chan = ieee80211_chan2ieee(ic, c);
2752 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2753 "setting channel %d (%dMHz)\n", chan, c->ic_freq);
2755 tmp = IEEE80211_IS_CHAN_2GHZ(c) ? 0x105 : 0x104;
2756 otus_write(sc, AR_MAC_REG_DYNAMIC_SIFS_ACK, tmp);
2757 if ((error = otus_write_barrier(sc)) != 0)
2760 /* Disable BB Heavy Clip. */
2761 otus_write(sc, AR_PHY_HEAVY_CLIP_ENABLE, 0x200);
2762 if ((error = otus_write_barrier(sc)) != 0)
2765 /* XXX Is that FREQ_START ? */
2766 error = otus_cmd(sc, AR_CMD_FREQ_STRAT, NULL, 0, NULL, 0);
2770 /* Reprogram PHY and RF on channel band or bandwidth changes. */
2771 if (sc->bb_reset || c->ic_flags != sc->sc_curchan->ic_flags) {
2772 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET, "band switch\n");
2774 /* Cold/Warm reset BB/ADDA. */
2775 otus_write(sc, AR_PWR_REG_RESET, sc->bb_reset ? 0x800 : 0x400);
2776 if ((error = otus_write_barrier(sc)) != 0)
2778 otus_write(sc, AR_PWR_REG_RESET, 0);
2779 if ((error = otus_write_barrier(sc)) != 0)
2783 if ((error = otus_program_phy(sc, c)) != 0) {
2784 device_printf(sc->sc_dev,
2785 "%s: could not program PHY\n",
2790 /* Select RF programming based on band. */
2791 if (IEEE80211_IS_CHAN_5GHZ(c))
2792 vals = ar5416_banks_vals_5ghz;
2794 vals = ar5416_banks_vals_2ghz;
2795 for (i = 0; i < nitems(ar5416_banks_regs); i++)
2796 otus_write(sc, AR_PHY(ar5416_banks_regs[i]), vals[i]);
2797 if ((error = otus_write_barrier(sc)) != 0) {
2798 device_printf(sc->sc_dev,
2799 "%s: could not program RF\n",
2803 code = AR_CMD_RF_INIT;
2805 code = AR_CMD_FREQUENCY;
2808 if ((error = otus_set_rf_bank4(sc, c)) != 0)
2811 tmp = (sc->txmask == 0x5) ? 0x340 : 0x240;
2812 otus_write(sc, AR_PHY_TURBO, tmp);
2813 if ((error = otus_write_barrier(sc)) != 0)
2816 /* Send firmware command to set channel. */
2817 cmd.freq = htole32((uint32_t)c->ic_freq * 1000);
2818 cmd.dynht2040 = htole32(0);
2819 cmd.htena = htole32(1);
2820 /* Set Delta Slope (exponent and mantissa). */
2821 coeff = (100 << 24) / c->ic_freq;
2822 otus_get_delta_slope(coeff, &exp, &man);
2823 cmd.dsc_exp = htole32(exp);
2824 cmd.dsc_man = htole32(man);
2825 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2826 "ds coeff=%u exp=%u man=%u\n", coeff, exp, man);
2827 /* For Short GI, coeff is 9/10 that of normal coeff. */
2828 coeff = (9 * coeff) / 10;
2829 otus_get_delta_slope(coeff, &exp, &man);
2830 cmd.dsc_shgi_exp = htole32(exp);
2831 cmd.dsc_shgi_man = htole32(man);
2832 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2833 "ds shgi coeff=%u exp=%u man=%u\n", coeff, exp, man);
2834 /* Set wait time for AGC and noise calibration (100 or 200ms). */
2835 cmd.check_loop_count = assoc ? htole32(2000) : htole32(1000);
2836 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2837 "%s\n", (code == AR_CMD_RF_INIT) ? "RF_INIT" : "FREQUENCY");
2838 error = otus_cmd(sc, code, &cmd, sizeof cmd, &rsp, sizeof(rsp));
2841 if ((rsp.status & htole32(AR_CAL_ERR_AGC | AR_CAL_ERR_NF_VAL)) != 0) {
2842 OTUS_DPRINTF(sc, OTUS_DEBUG_RESET,
2843 "status=0x%x\n", le32toh(rsp.status));
2844 /* Force cold reset on next channel. */
2848 if (otus_debug & OTUS_DEBUG_RESET) {
2849 device_printf(sc->sc_dev, "calibration status=0x%x\n",
2850 le32toh(rsp.status));
2851 for (i = 0; i < 2; i++) { /* 2 Rx chains */
2852 /* Sign-extend 9-bit NF values. */
2853 device_printf(sc->sc_dev,
2854 "noisefloor chain %d=%d\n", i,
2855 (((int32_t)le32toh(rsp.nf[i])) << 4) >> 23);
2856 device_printf(sc->sc_dev,
2857 "noisefloor ext chain %d=%d\n", i,
2858 ((int32_t)le32toh(rsp.nf_ext[i])) >> 23);
2862 for (i = 0; i < OTUS_NUM_CHAINS; i++) {
2863 sc->sc_nf[i] = ((((int32_t)le32toh(rsp.nf[i])) << 4) >> 23);
2872 otus_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2873 struct ieee80211_key *k)
2875 struct otus_softc *sc = ic->ic_softc;
2876 struct otus_cmd_key cmd;
2878 /* Defer setting of WEP keys until interface is brought up. */
2879 if ((ic->ic_if.if_flags & (IFF_UP | IFF_RUNNING)) !=
2880 (IFF_UP | IFF_RUNNING))
2883 /* Do it in a process context. */
2885 cmd.associd = (ni != NULL) ? ni->ni_associd : 0;
2886 otus_do_async(sc, otus_set_key_cb, &cmd, sizeof cmd);
2891 otus_set_key_cb(struct otus_softc *sc, void *arg)
2893 struct otus_cmd_key *cmd = arg;
2894 struct ieee80211_key *k = &cmd->key;
2895 struct ar_cmd_ekey key;
2899 memset(&key, 0, sizeof key);
2900 if (k->k_flags & IEEE80211_KEY_GROUP) {
2901 key.uid = htole16(k->k_id);
2902 IEEE80211_ADDR_COPY(key.macaddr, sc->sc_ic.ic_myaddr);
2903 key.macaddr[0] |= 0x80;
2905 key.uid = htole16(OTUS_UID(cmd->associd));
2906 IEEE80211_ADDR_COPY(key.macaddr, ni->ni_macaddr);
2908 key.kix = htole16(0);
2909 /* Map net80211 cipher to hardware. */
2910 switch (k->k_cipher) {
2911 case IEEE80211_CIPHER_WEP40:
2912 cipher = AR_CIPHER_WEP64;
2914 case IEEE80211_CIPHER_WEP104:
2915 cipher = AR_CIPHER_WEP128;
2917 case IEEE80211_CIPHER_TKIP:
2918 cipher = AR_CIPHER_TKIP;
2920 case IEEE80211_CIPHER_CCMP:
2921 cipher = AR_CIPHER_AES;
2926 key.cipher = htole16(cipher);
2927 memcpy(key.key, k->k_key, MIN(k->k_len, 16));
2928 error = otus_cmd(sc, AR_CMD_EKEY, &key, sizeof key, NULL, 0);
2929 if (error != 0 || k->k_cipher != IEEE80211_CIPHER_TKIP)
2932 /* TKIP: set Tx/Rx MIC Key. */
2933 key.kix = htole16(1);
2934 memcpy(key.key, k->k_key + 16, 16);
2935 (void)otus_cmd(sc, AR_CMD_EKEY, &key, sizeof key, NULL, 0);
2939 otus_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
2940 struct ieee80211_key *k)
2942 struct otus_softc *sc = ic->ic_softc;
2943 struct otus_cmd_key cmd;
2945 if (!(ic->ic_if.if_flags & IFF_RUNNING) ||
2946 ic->ic_state != IEEE80211_S_RUN)
2947 return; /* Nothing to do. */
2949 /* Do it in a process context. */
2951 cmd.associd = (ni != NULL) ? ni->ni_associd : 0;
2952 otus_do_async(sc, otus_delete_key_cb, &cmd, sizeof cmd);
2956 otus_delete_key_cb(struct otus_softc *sc, void *arg)
2958 struct otus_cmd_key *cmd = arg;
2959 struct ieee80211_key *k = &cmd->key;
2962 if (k->k_flags & IEEE80211_KEY_GROUP)
2963 uid = htole32(k->k_id);
2965 uid = htole32(OTUS_UID(cmd->associd));
2966 (void)otus_cmd(sc, AR_CMD_DKEY, &uid, sizeof uid, NULL, 0);
2971 * XXX TODO: check if we have to be doing any calibration in the host
2972 * or whether it's purely a firmware thing.
2975 otus_calibrate_to(void *arg, int pending)
2978 struct otus_softc *sc = arg;
2980 device_printf(sc->sc_dev, "%s: called\n", __func__);
2981 struct ieee80211com *ic = &sc->sc_ic;
2982 struct ieee80211_node *ni;
2985 if (usbd_is_dying(sc->sc_udev))
2988 usbd_ref_incr(sc->sc_udev);
2992 ieee80211_amrr_choose(&sc->amrr, ni, &((struct otus_node *)ni)->amn);
2995 if (!usbd_is_dying(sc->sc_udev))
2996 timeout_add_sec(&sc->calib_to, 1);
2998 usbd_ref_decr(sc->sc_udev);
3003 otus_set_bssid(struct otus_softc *sc, const uint8_t *bssid)
3006 OTUS_LOCK_ASSERT(sc);
3008 otus_write(sc, AR_MAC_REG_BSSID_L,
3009 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
3010 otus_write(sc, AR_MAC_REG_BSSID_H,
3011 bssid[4] | bssid[5] << 8);
3012 return otus_write_barrier(sc);
3016 otus_set_macaddr(struct otus_softc *sc, const uint8_t *addr)
3018 OTUS_LOCK_ASSERT(sc);
3020 otus_write(sc, AR_MAC_REG_MAC_ADDR_L,
3021 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
3022 otus_write(sc, AR_MAC_REG_MAC_ADDR_H,
3023 addr[4] | addr[5] << 8);
3024 return otus_write_barrier(sc);
3027 /* Default single-LED. */
3029 otus_led_newstate_type1(struct otus_softc *sc)
3032 device_printf(sc->sc_dev, "%s: TODO\n", __func__);
3035 /* NETGEAR, dual-LED. */
3037 otus_led_newstate_type2(struct otus_softc *sc)
3040 device_printf(sc->sc_dev, "%s: TODO\n", __func__);
3043 /* NETGEAR, single-LED/3 colors (blue, red, purple.) */
3045 otus_led_newstate_type3(struct otus_softc *sc)
3048 struct ieee80211com *ic = &sc->sc_ic;
3049 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3051 uint32_t state = sc->led_state;
3053 OTUS_LOCK_ASSERT(sc);
3056 state = 0; /* led off */
3057 } else if (vap->iv_state == IEEE80211_S_INIT) {
3058 state = 0; /* LED off. */
3059 } else if (vap->iv_state == IEEE80211_S_RUN) {
3060 /* Associated, LED always on. */
3061 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan))
3062 state = AR_LED0_ON; /* 2GHz=>Red. */
3064 state = AR_LED1_ON; /* 5GHz=>Blue. */
3066 /* Scanning, blink LED. */
3067 state ^= AR_LED0_ON | AR_LED1_ON;
3068 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan))
3069 state &= ~AR_LED1_ON;
3071 state &= ~AR_LED0_ON;
3073 if (state != sc->led_state) {
3074 otus_write(sc, AR_GPIO_REG_PORT_DATA, state);
3075 if (otus_write_barrier(sc) == 0)
3076 sc->led_state = state;
3081 static uint8_t zero_macaddr[IEEE80211_ADDR_LEN] = { 0,0,0,0,0,0 };
3084 * Set up operating mode, MAC/BSS address and RX filter.
3087 otus_set_operating_mode(struct otus_softc *sc)
3089 struct ieee80211com *ic = &sc->sc_ic;
3090 struct ieee80211vap *vap;
3091 uint32_t cam_mode = AR_MAC_CAM_DEFAULTS;
3092 uint32_t rx_ctrl = AR_MAC_RX_CTRL_DEAGG | AR_MAC_RX_CTRL_SHORT_FILTER;
3093 uint32_t sniffer = AR_MAC_SNIFFER_DEFAULTS;
3094 uint32_t enc_mode = 0x78; /* XXX */
3095 const uint8_t *macaddr;
3096 uint8_t bssid[IEEE80211_ADDR_LEN];
3097 struct ieee80211_node *ni;
3099 OTUS_LOCK_ASSERT(sc);
3102 * If we're in sniffer mode or we don't have a MAC
3103 * address assigned, ensure it gets reset to all-zero.
3105 IEEE80211_ADDR_COPY(bssid, zero_macaddr);
3106 vap = TAILQ_FIRST(&ic->ic_vaps);
3107 macaddr = ic->ic_macaddr;
3109 switch (ic->ic_opmode) {
3110 case IEEE80211_M_STA:
3112 ni = ieee80211_ref_node(vap->iv_bss);
3113 IEEE80211_ADDR_COPY(bssid, ni->ni_bssid);
3114 ieee80211_free_node(ni);
3116 cam_mode |= AR_MAC_CAM_STA;
3117 rx_ctrl |= AR_MAC_RX_CTRL_PASS_TO_HOST;
3119 case IEEE80211_M_MONITOR:
3121 * Note: monitor mode ends up causing the MAC to
3122 * generate ACK frames for everything it sees.
3123 * So don't do that; instead just put it in STA mode
3124 * and disable RX filters.
3127 cam_mode |= AR_MAC_CAM_STA;
3128 rx_ctrl |= AR_MAC_RX_CTRL_PASS_TO_HOST;
3133 * TODO: if/when we do hardware encryption, ensure it's
3134 * disabled if the NIC is in monitor mode.
3136 otus_write(sc, AR_MAC_REG_SNIFFER, sniffer);
3137 otus_write(sc, AR_MAC_REG_CAM_MODE, cam_mode);
3138 otus_write(sc, AR_MAC_REG_ENCRYPTION, enc_mode);
3139 otus_write(sc, AR_MAC_REG_RX_CONTROL, rx_ctrl);
3140 otus_set_macaddr(sc, macaddr);
3141 otus_set_bssid(sc, bssid);
3146 otus_set_rx_filter(struct otus_softc *sc)
3148 // struct ieee80211com *ic = &sc->sc_ic;
3150 OTUS_LOCK_ASSERT(sc);
3153 if (ic->ic_allmulti > 0 || ic->ic_promisc > 0 ||
3154 ic->ic_opmode == IEEE80211_M_MONITOR) {
3155 otus_write(sc, AR_MAC_REG_FRAMETYPE_FILTER, 0xff00ffff);
3158 /* Filter any control frames, BAR is bit 24. */
3159 otus_write(sc, AR_MAC_REG_FRAMETYPE_FILTER, 0x0500ffff);
3166 otus_init(struct otus_softc *sc)
3168 struct ieee80211com *ic = &sc->sc_ic;
3171 OTUS_UNLOCK_ASSERT(sc);
3175 /* Drain any pending TX frames */
3176 otus_drain_mbufq(sc);
3179 if ((error = otus_init_mac(sc)) != 0) {
3181 device_printf(sc->sc_dev,
3182 "%s: could not initialize MAC\n", __func__);
3186 otus_set_operating_mode(sc);
3187 otus_set_rx_filter(sc);
3188 (void) otus_set_operating_mode(sc);
3190 sc->bb_reset = 1; /* Force cold reset. */
3192 if ((error = otus_set_chan(sc, ic->ic_curchan, 0)) != 0) {
3194 device_printf(sc->sc_dev,
3195 "%s: could not set channel\n", __func__);
3200 otus_write(sc, AR_MAC_REG_DMA_TRIGGER, 0x100);
3201 (void)otus_write_barrier(sc);
3210 otus_stop(struct otus_softc *sc)
3216 OTUS_UNLOCK_ASSERT(sc);
3220 sc->sc_tx_timer = 0;
3223 taskqueue_drain_timeout(taskqueue_thread, &sc->scan_to);
3224 taskqueue_drain_timeout(taskqueue_thread, &sc->calib_to);
3225 taskqueue_drain(taskqueue_thread, &sc->tx_task);
3230 otus_write(sc, AR_MAC_REG_DMA_TRIGGER, 0);
3231 (void)otus_write_barrier(sc);
3233 /* Drain any pending TX frames */
3234 otus_drain_mbufq(sc);